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Commit ab74a914 authored by Olof Johansson's avatar Olof Johansson
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Merge branch 'v3.3-samsung-fixes-2' of... 

Merge branch 'v3.3-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes

* 'v3.3-samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Correct M-5MOLS sensor clock frequency on Universal C210 board
  ARM: EXYNOS: Correct framebuffer window size on Nuri board
  ARM: SAMSUNG: Fix missing api-change from subsys_interface change
  ARM: EXYNOS: Fix "warning: initialization from incompatible pointer type"
  ARM: S5PV210: Fix the name of exynos4_clk_hdmiphy_ctrl() for S5PV210
  ARM: EXYNOS: Remove build warning without enabling PM
  ARM: SAMSUNG: Fix platform data setup for I2C adapter 0
  ARM: EXYNOS: fix non-SMP builds for EXYNOS4
  ARM: S3C6410: Use device names for both I2C clocks
  ARM: S3C64XX: Make s3c64xx_init_uarts() static
parents ca43784d 3e8ad561
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Showing with 62 additions and 36 deletions
arch/arm/mach-exynos/clock-exynos4210.c
View file @ ab74a914
...@@ -32,6 +32,7 @@ ...@@ -32,6 +32,7 @@
#include "common.h" #include "common.h"
#ifdef CONFIG_PM_SLEEP
static struct sleep_save exynos4210_clock_save[] = { static struct sleep_save exynos4210_clock_save[] = {
SAVE_ITEM(S5P_CLKSRC_IMAGE), SAVE_ITEM(S5P_CLKSRC_IMAGE),
SAVE_ITEM(S5P_CLKSRC_LCD1), SAVE_ITEM(S5P_CLKSRC_LCD1),
...@@ -42,6 +43,7 @@ static struct sleep_save exynos4210_clock_save[] = { ...@@ -42,6 +43,7 @@ static struct sleep_save exynos4210_clock_save[] = {
SAVE_ITEM(S5P_CLKGATE_IP_LCD1), SAVE_ITEM(S5P_CLKGATE_IP_LCD1),
SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210), SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210),
}; };
#endif
static struct clksrc_clk *sysclks[] = { static struct clksrc_clk *sysclks[] = {
/* nothing here yet */ /* nothing here yet */
......
arch/arm/mach-exynos/clock-exynos4212.c
View file @ ab74a914
...@@ -32,12 +32,14 @@ ...@@ -32,12 +32,14 @@
#include "common.h" #include "common.h"
#ifdef CONFIG_PM_SLEEP
static struct sleep_save exynos4212_clock_save[] = { static struct sleep_save exynos4212_clock_save[] = {
SAVE_ITEM(S5P_CLKSRC_IMAGE), SAVE_ITEM(S5P_CLKSRC_IMAGE),
SAVE_ITEM(S5P_CLKDIV_IMAGE), SAVE_ITEM(S5P_CLKDIV_IMAGE),
SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4212), SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4212),
SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4212), SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4212),
}; };
#endif
static struct clk *clk_src_mpll_user_list[] = { static struct clk *clk_src_mpll_user_list[] = {
[0] = &clk_fin_mpll, [0] = &clk_fin_mpll,
......
arch/arm/mach-exynos/clock.c
View file @ ab74a914
...@@ -30,6 +30,7 @@ ...@@ -30,6 +30,7 @@
#include "common.h" #include "common.h"
#ifdef CONFIG_PM_SLEEP
static struct sleep_save exynos4_clock_save[] = { static struct sleep_save exynos4_clock_save[] = {
SAVE_ITEM(S5P_CLKDIV_LEFTBUS), SAVE_ITEM(S5P_CLKDIV_LEFTBUS),
SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS), SAVE_ITEM(S5P_CLKGATE_IP_LEFTBUS),
...@@ -93,6 +94,7 @@ static struct sleep_save exynos4_clock_save[] = { ...@@ -93,6 +94,7 @@ static struct sleep_save exynos4_clock_save[] = {
SAVE_ITEM(S5P_CLKGATE_SCLKCPU), SAVE_ITEM(S5P_CLKGATE_SCLKCPU),
SAVE_ITEM(S5P_CLKGATE_IP_CPU), SAVE_ITEM(S5P_CLKGATE_IP_CPU),
}; };
#endif
struct clk clk_sclk_hdmi27m = { struct clk clk_sclk_hdmi27m = {
.name = "sclk_hdmi27m", .name = "sclk_hdmi27m",
......
arch/arm/mach-exynos/mach-nuri.c
View file @ ab74a914
...@@ -220,14 +220,14 @@ static struct s3c_fb_pd_win nuri_fb_win0 = { ...@@ -220,14 +220,14 @@ static struct s3c_fb_pd_win nuri_fb_win0 = {
.lower_margin = 1, .lower_margin = 1,
.hsync_len = 48, .hsync_len = 48,
.vsync_len = 3, .vsync_len = 3,
.xres = 1280, .xres = 1024,
.yres = 800, .yres = 600,
.refresh = 60, .refresh = 60,
}, },
.max_bpp = 24, .max_bpp = 24,
.default_bpp = 16, .default_bpp = 16,
.virtual_x = 1280, .virtual_x = 1024,
.virtual_y = 800, .virtual_y = 2 * 600,
}; };
static struct s3c_fb_platdata nuri_fb_pdata __initdata = { static struct s3c_fb_platdata nuri_fb_pdata __initdata = {
......
arch/arm/mach-exynos/mach-universal_c210.c
View file @ ab74a914
...@@ -910,7 +910,7 @@ static struct s5p_fimc_isp_info universal_camera_sensors[] = { ...@@ -910,7 +910,7 @@ static struct s5p_fimc_isp_info universal_camera_sensors[] = {
.bus_type = FIMC_MIPI_CSI2, .bus_type = FIMC_MIPI_CSI2,
.board_info = &m5mols_board_info, .board_info = &m5mols_board_info,
.i2c_bus_num = 0, .i2c_bus_num = 0,
.clk_frequency = 21600000UL, .clk_frequency = 24000000UL,
.csi_data_align = 32, .csi_data_align = 32,
}, },
}; };
......
arch/arm/mach-exynos/pm.c
View file @ ab74a914
...@@ -206,7 +206,7 @@ static void exynos4_pm_prepare(void) ...@@ -206,7 +206,7 @@ static void exynos4_pm_prepare(void)
} }
static int exynos4_pm_add(struct device *dev) static int exynos4_pm_add(struct device *dev, struct subsys_interface *sif)
{ {
pm_cpu_prep = exynos4_pm_prepare; pm_cpu_prep = exynos4_pm_prepare;
pm_cpu_sleep = exynos4_cpu_suspend; pm_cpu_sleep = exynos4_cpu_suspend;
...@@ -384,7 +384,9 @@ static void exynos4_pm_resume(void) ...@@ -384,7 +384,9 @@ static void exynos4_pm_resume(void)
exynos4_restore_pll(); exynos4_restore_pll();
#ifdef CONFIG_SMP
scu_enable(S5P_VA_SCU); scu_enable(S5P_VA_SCU);
#endif
#ifdef CONFIG_CACHE_L2X0 #ifdef CONFIG_CACHE_L2X0
s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save)); s3c_pm_do_restore_core(exynos4_l2cc_save, ARRAY_SIZE(exynos4_l2cc_save));
......
arch/arm/mach-s3c2410/cpu-freq.c
View file @ ab74a914
...@@ -115,7 +115,8 @@ static struct s3c_cpufreq_info s3c2410_cpufreq_info = { ...@@ -115,7 +115,8 @@ static struct s3c_cpufreq_info s3c2410_cpufreq_info = {
.debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs), .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
}; };
static int s3c2410_cpufreq_add(struct device *dev) static int s3c2410_cpufreq_add(struct device *dev,
struct subsys_interface *sif)
{ {
return s3c_cpufreq_register(&s3c2410_cpufreq_info); return s3c_cpufreq_register(&s3c2410_cpufreq_info);
} }
...@@ -133,7 +134,8 @@ static int __init s3c2410_cpufreq_init(void) ...@@ -133,7 +134,8 @@ static int __init s3c2410_cpufreq_init(void)
arch_initcall(s3c2410_cpufreq_init); arch_initcall(s3c2410_cpufreq_init);
static int s3c2410a_cpufreq_add(struct device *dev) static int s3c2410a_cpufreq_add(struct device *dev,
struct subsys_interface *sif)
{ {
/* alter the maximum freq settings for S3C2410A. If a board knows /* alter the maximum freq settings for S3C2410A. If a board knows
* it only has a maximum of 200, then it should register its own * it only has a maximum of 200, then it should register its own
...@@ -144,7 +146,7 @@ static int s3c2410a_cpufreq_add(struct device *dev) ...@@ -144,7 +146,7 @@ static int s3c2410a_cpufreq_add(struct device *dev)
s3c2410_cpufreq_info.max.pclk = 66500000; s3c2410_cpufreq_info.max.pclk = 66500000;
s3c2410_cpufreq_info.name = "s3c2410a"; s3c2410_cpufreq_info.name = "s3c2410a";
return s3c2410_cpufreq_add(dev); return s3c2410_cpufreq_add(dev, sif);
} }
static struct subsys_interface s3c2410a_cpufreq_interface = { static struct subsys_interface s3c2410a_cpufreq_interface = {
......
arch/arm/mach-s3c2410/dma.c
View file @ ab74a914
...@@ -132,7 +132,8 @@ static struct s3c24xx_dma_order __initdata s3c2410_dma_order = { ...@@ -132,7 +132,8 @@ static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
}, },
}; };
static int __init s3c2410_dma_add(struct device *dev) static int __init s3c2410_dma_add(struct device *dev,
struct subsys_interface *sif)
{ {
s3c2410_dma_init(); s3c2410_dma_init();
s3c24xx_dma_order_set(&s3c2410_dma_order); s3c24xx_dma_order_set(&s3c2410_dma_order);
...@@ -148,7 +149,7 @@ static struct subsys_interface s3c2410_dma_interface = { ...@@ -148,7 +149,7 @@ static struct subsys_interface s3c2410_dma_interface = {
static int __init s3c2410_dma_drvinit(void) static int __init s3c2410_dma_drvinit(void)
{ {
return subsys_interface_register(&s3c2410_interface); return subsys_interface_register(&s3c2410_dma_interface);
} }
arch_initcall(s3c2410_dma_drvinit); arch_initcall(s3c2410_dma_drvinit);
......
arch/arm/mach-s3c2410/pll.c
View file @ ab74a914
...@@ -66,7 +66,7 @@ static struct cpufreq_frequency_table pll_vals_12MHz[] = { ...@@ -66,7 +66,7 @@ static struct cpufreq_frequency_table pll_vals_12MHz[] = {
{ .frequency = 270000000, .index = PLLVAL(127, 1, 1), }, { .frequency = 270000000, .index = PLLVAL(127, 1, 1), },
}; };
static int s3c2410_plls_add(struct device *dev) static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)
{ {
return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz)); return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));
} }
......
arch/arm/mach-s3c2410/pm.c
View file @ ab74a914
...@@ -111,7 +111,7 @@ struct syscore_ops s3c2410_pm_syscore_ops = { ...@@ -111,7 +111,7 @@ struct syscore_ops s3c2410_pm_syscore_ops = {
.resume = s3c2410_pm_resume, .resume = s3c2410_pm_resume,
}; };
static int s3c2410_pm_add(struct device *dev) static int s3c2410_pm_add(struct device *dev, struct subsys_interface *sif)
{ {
pm_cpu_prep = s3c2410_pm_prepare; pm_cpu_prep = s3c2410_pm_prepare;
pm_cpu_sleep = s3c2410_cpu_suspend; pm_cpu_sleep = s3c2410_cpu_suspend;
......
arch/arm/mach-s3c2412/cpu-freq.c
View file @ ab74a914
...@@ -194,7 +194,8 @@ static struct s3c_cpufreq_info s3c2412_cpufreq_info = { ...@@ -194,7 +194,8 @@ static struct s3c_cpufreq_info s3c2412_cpufreq_info = {
.debug_io_show = s3c_cpufreq_debugfs_call(s3c2412_iotiming_debugfs), .debug_io_show = s3c_cpufreq_debugfs_call(s3c2412_iotiming_debugfs),
}; };
static int s3c2412_cpufreq_add(struct device *dev) static int s3c2412_cpufreq_add(struct device *dev,
struct subsys_interface *sif)
{ {
unsigned long fclk_rate; unsigned long fclk_rate;
......
arch/arm/mach-s3c2412/dma.c
View file @ ab74a914
...@@ -159,7 +159,8 @@ static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { ...@@ -159,7 +159,8 @@ static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = {
.map_size = ARRAY_SIZE(s3c2412_dma_mappings), .map_size = ARRAY_SIZE(s3c2412_dma_mappings),
}; };
static int __init s3c2412_dma_add(struct device *dev) static int __init s3c2412_dma_add(struct device *dev,
struct subsys_interface *sif)
{ {
s3c2410_dma_init(); s3c2410_dma_init();
return s3c24xx_dma_init_map(&s3c2412_dma_sel); return s3c24xx_dma_init_map(&s3c2412_dma_sel);
......
arch/arm/mach-s3c2412/irq.c
View file @ ab74a914
...@@ -170,7 +170,7 @@ static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state) ...@@ -170,7 +170,7 @@ static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state)
static struct irq_chip s3c2412_irq_rtc_chip; static struct irq_chip s3c2412_irq_rtc_chip;
static int s3c2412_irq_add(struct device *dev) static int s3c2412_irq_add(struct device *dev, struct subsys_interface *sif)
{ {
unsigned int irqno; unsigned int irqno;
......
arch/arm/mach-s3c2412/pm.c
View file @ ab74a914
...@@ -56,7 +56,7 @@ static void s3c2412_pm_prepare(void) ...@@ -56,7 +56,7 @@ static void s3c2412_pm_prepare(void)
{ {
} }
static int s3c2412_pm_add(struct device *dev) static int s3c2412_pm_add(struct device *dev, struct subsys_interface *sif)
{ {
pm_cpu_prep = s3c2412_pm_prepare; pm_cpu_prep = s3c2412_pm_prepare;
pm_cpu_sleep = s3c2412_cpu_suspend; pm_cpu_sleep = s3c2412_cpu_suspend;
......
arch/arm/mach-s3c2416/irq.c
View file @ ab74a914
...@@ -213,7 +213,8 @@ static int __init s3c2416_add_sub(unsigned int base, ...@@ -213,7 +213,8 @@ static int __init s3c2416_add_sub(unsigned int base,
return 0; return 0;
} }
static int __init s3c2416_irq_add(struct device *dev) static int __init s3c2416_irq_add(struct device *dev,
struct subsys_interface *sif)
{ {
printk(KERN_INFO "S3C2416: IRQ Support\n"); printk(KERN_INFO "S3C2416: IRQ Support\n");
......
arch/arm/mach-s3c2416/pm.c
View file @ ab74a914
...@@ -48,7 +48,7 @@ static void s3c2416_pm_prepare(void) ...@@ -48,7 +48,7 @@ static void s3c2416_pm_prepare(void)
__raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1); __raw_writel(virt_to_phys(s3c_cpu_resume), S3C2412_INFORM1);
} }
static int s3c2416_pm_add(struct device *dev) static int s3c2416_pm_add(struct device *dev, struct subsys_interface *sif)
{ {
pm_cpu_prep = s3c2416_pm_prepare; pm_cpu_prep = s3c2416_pm_prepare;
pm_cpu_sleep = s3c2416_cpu_suspend; pm_cpu_sleep = s3c2416_cpu_suspend;
......
arch/arm/mach-s3c2440/clock.c
View file @ ab74a914
...@@ -149,7 +149,7 @@ static struct clk_lookup s3c2440_clk_lookup[] = { ...@@ -149,7 +149,7 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
}; };
static int s3c2440_clk_add(struct device *dev) static int s3c2440_clk_add(struct device *dev, struct subsys_interface *sif)
{ {
struct clk *clock_upll; struct clk *clock_upll;
struct clk *clock_h; struct clk *clock_h;
......
arch/arm/mach-s3c2440/dma.c
View file @ ab74a914
...@@ -174,7 +174,8 @@ static struct s3c24xx_dma_order __initdata s3c2440_dma_order = { ...@@ -174,7 +174,8 @@ static struct s3c24xx_dma_order __initdata s3c2440_dma_order = {
}, },
}; };
static int __init s3c2440_dma_add(struct device *dev) static int __init s3c2440_dma_add(struct device *dev,
struct subsys_interface *sif)
{ {
s3c2410_dma_init(); s3c2410_dma_init();
s3c24xx_dma_order_set(&s3c2440_dma_order); s3c24xx_dma_order_set(&s3c2440_dma_order);
......
arch/arm/mach-s3c2440/irq.c
View file @ ab74a914
...@@ -92,7 +92,7 @@ static struct irq_chip s3c_irq_wdtac97 = { ...@@ -92,7 +92,7 @@ static struct irq_chip s3c_irq_wdtac97 = {
.irq_ack = s3c_irq_wdtac97_ack, .irq_ack = s3c_irq_wdtac97_ack,
}; };
static int s3c2440_irq_add(struct device *dev) static int s3c2440_irq_add(struct device *dev, struct subsys_interface *sif)
{ {
unsigned int irqno; unsigned int irqno;
......
arch/arm/mach-s3c2440/s3c2440-cpufreq.c
View file @ ab74a914
...@@ -270,7 +270,8 @@ struct s3c_cpufreq_info s3c2440_cpufreq_info = { ...@@ -270,7 +270,8 @@ struct s3c_cpufreq_info s3c2440_cpufreq_info = {
.debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs), .debug_io_show = s3c_cpufreq_debugfs_call(s3c2410_iotiming_debugfs),
}; };
static int s3c2440_cpufreq_add(struct device *dev) static int s3c2440_cpufreq_add(struct device *dev,
struct subsys_interface *sif)
{ {
xtal = s3c_cpufreq_clk_get(NULL, "xtal"); xtal = s3c_cpufreq_clk_get(NULL, "xtal");
hclk = s3c_cpufreq_clk_get(NULL, "hclk"); hclk = s3c_cpufreq_clk_get(NULL, "hclk");
......
arch/arm/mach-s3c2440/s3c2440-pll-12000000.c
View file @ ab74a914
...@@ -51,7 +51,7 @@ static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = { ...@@ -51,7 +51,7 @@ static struct cpufreq_frequency_table s3c2440_plls_12[] __initdata = {
{ .frequency = 400000000, .index = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */ { .frequency = 400000000, .index = PLLVAL(0x5c, 1, 1), }, /* FVco 800.000000 */
}; };
static int s3c2440_plls12_add(struct device *dev) static int s3c2440_plls12_add(struct device *dev, struct subsys_interface *sif)
{ {
struct clk *xtal_clk; struct clk *xtal_clk;
unsigned long xtal; unsigned long xtal;
......
arch/arm/mach-s3c2440/s3c2440-pll-16934400.c
View file @ ab74a914
...@@ -79,7 +79,8 @@ static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = { ...@@ -79,7 +79,8 @@ static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = {
{ .frequency = 402192000, .index = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */ { .frequency = 402192000, .index = PLLVAL(87, 2, 1), }, /* FVco 804.384000 */
}; };
static int s3c2440_plls169344_add(struct device *dev) static int s3c2440_plls169344_add(struct device *dev,
struct subsys_interface *sif)
{ {
struct clk *xtal_clk; struct clk *xtal_clk;
unsigned long xtal; unsigned long xtal;
......
arch/arm/mach-s3c2440/s3c2442.c
View file @ ab74a914
...@@ -122,7 +122,7 @@ static struct clk s3c2442_clk_cam_upll = { ...@@ -122,7 +122,7 @@ static struct clk s3c2442_clk_cam_upll = {
}, },
}; };
static int s3c2442_clk_add(struct device *dev) static int s3c2442_clk_add(struct device *dev, struct subsys_interface *sif)
{ {
struct clk *clock_upll; struct clk *clock_upll;
struct clk *clock_h; struct clk *clock_h;
......
arch/arm/mach-s3c2440/s3c244x-clock.c
View file @ ab74a914
...@@ -72,7 +72,7 @@ static struct clk clk_arm = { ...@@ -72,7 +72,7 @@ static struct clk clk_arm = {
}, },
}; };
static int s3c244x_clk_add(struct device *dev) static int s3c244x_clk_add(struct device *dev, struct subsys_interface *sif)
{ {
unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
unsigned long clkdivn; unsigned long clkdivn;
......
arch/arm/mach-s3c2440/s3c244x-irq.c
View file @ ab74a914
...@@ -91,7 +91,7 @@ static struct irq_chip s3c_irq_cam = { ...@@ -91,7 +91,7 @@ static struct irq_chip s3c_irq_cam = {
.irq_ack = s3c_irq_cam_ack, .irq_ack = s3c_irq_cam_ack,
}; };
static int s3c244x_irq_add(struct device *dev) static int s3c244x_irq_add(struct device *dev, struct subsys_interface *sif)
{ {
unsigned int irqno; unsigned int irqno;
......
arch/arm/mach-s3c2443/dma.c
View file @ ab74a914
...@@ -135,7 +135,8 @@ static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = { ...@@ -135,7 +135,8 @@ static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = {
.map_size = ARRAY_SIZE(s3c2443_dma_mappings), .map_size = ARRAY_SIZE(s3c2443_dma_mappings),
}; };
static int __init s3c2443_dma_add(struct device *dev) static int __init s3c2443_dma_add(struct device *dev,
struct subsys_interface *sif)
{ {
s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100); s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100);
return s3c24xx_dma_init_map(&s3c2443_dma_sel); return s3c24xx_dma_init_map(&s3c2443_dma_sel);
......
arch/arm/mach-s3c2443/irq.c
View file @ ab74a914
...@@ -241,7 +241,8 @@ static int __init s3c2443_add_sub(unsigned int base, ...@@ -241,7 +241,8 @@ static int __init s3c2443_add_sub(unsigned int base,
return 0; return 0;
} }
static int __init s3c2443_irq_add(struct device *dev) static int __init s3c2443_irq_add(struct device *dev,
struct subsys_interface *sif)
{ {
printk("S3C2443: IRQ Support\n"); printk("S3C2443: IRQ Support\n");
......
arch/arm/mach-s3c64xx/clock.c
View file @ ab74a914
...@@ -138,6 +138,11 @@ static struct clk init_clocks_off[] = { ...@@ -138,6 +138,11 @@ static struct clk init_clocks_off[] = {
.ctrlbit = S3C_CLKCON_PCLK_TSADC, .ctrlbit = S3C_CLKCON_PCLK_TSADC,
}, { }, {
.name = "i2c", .name = "i2c",
#ifdef CONFIG_S3C_DEV_I2C1
.devname = "s3c2440-i2c.0",
#else
.devname = "s3c2440-i2c",
#endif
.parent = &clk_p, .parent = &clk_p,
.enable = s3c64xx_pclk_ctrl, .enable = s3c64xx_pclk_ctrl,
.ctrlbit = S3C_CLKCON_PCLK_IIC, .ctrlbit = S3C_CLKCON_PCLK_IIC,
......
arch/arm/mach-s3c64xx/common.c
View file @ ab74a914
...@@ -49,7 +49,7 @@ ...@@ -49,7 +49,7 @@
/* uart registration process */ /* uart registration process */
void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) static void __init s3c64xx_init_uarts(struct s3c2410_uartcfg *cfg, int no)
{ {
s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no); s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources, cfg, no);
} }
......
arch/arm/mach-s5p64x0/pm.c
View file @ ab74a914
...@@ -160,7 +160,7 @@ static void s5p64x0_pm_prepare(void) ...@@ -160,7 +160,7 @@ static void s5p64x0_pm_prepare(void)
} }
static int s5p64x0_pm_add(struct device *dev) static int s5p64x0_pm_add(struct device *dev, struct subsys_interface *sif)
{ {
pm_cpu_prep = s5p64x0_pm_prepare; pm_cpu_prep = s5p64x0_pm_prepare;
pm_cpu_sleep = s5p64x0_cpu_suspend; pm_cpu_sleep = s5p64x0_cpu_suspend;
......
arch/arm/mach-s5pv210/clock.c
View file @ ab74a914
...@@ -175,7 +175,7 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable) ...@@ -175,7 +175,7 @@ static int s5pv210_clk_mask1_ctrl(struct clk *clk, int enable)
return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable); return s5p_gatectrl(S5P_CLK_SRC_MASK1, clk, enable);
} }
static int exynos4_clk_hdmiphy_ctrl(struct clk *clk, int enable) static int s5pv210_clk_hdmiphy_ctrl(struct clk *clk, int enable)
{ {
return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable); return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
} }
...@@ -372,7 +372,7 @@ static struct clk init_clocks_off[] = { ...@@ -372,7 +372,7 @@ static struct clk init_clocks_off[] = {
}, { }, {
.name = "hdmiphy", .name = "hdmiphy",
.devname = "s5pv210-hdmi", .devname = "s5pv210-hdmi",
.enable = exynos4_clk_hdmiphy_ctrl, .enable = s5pv210_clk_hdmiphy_ctrl,
.ctrlbit = (1 << 0), .ctrlbit = (1 << 0),
}, { }, {
.name = "dacphy", .name = "dacphy",
......
arch/arm/mach-s5pv210/pm.c
View file @ ab74a914
...@@ -133,7 +133,7 @@ static void s5pv210_pm_prepare(void) ...@@ -133,7 +133,7 @@ static void s5pv210_pm_prepare(void)
s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save)); s3c_pm_do_save(s5pv210_core_save, ARRAY_SIZE(s5pv210_core_save));
} }
static int s5pv210_pm_add(struct device *dev) static int s5pv210_pm_add(struct device *dev, struct subsys_interface *sif)
{ {
pm_cpu_prep = s5pv210_pm_prepare; pm_cpu_prep = s5pv210_pm_prepare;
pm_cpu_sleep = s5pv210_cpu_suspend; pm_cpu_sleep = s5pv210_cpu_suspend;
......
arch/arm/plat-samsung/devs.c
View file @ ab74a914
...@@ -468,8 +468,10 @@ void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) ...@@ -468,8 +468,10 @@ void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
{ {
struct s3c2410_platform_i2c *npd; struct s3c2410_platform_i2c *npd;
if (!pd) if (!pd) {
pd = &default_i2c_data; pd = &default_i2c_data;
pd->bus_num = 0;
}
npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c), npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
&s3c_device_i2c0); &s3c_device_i2c0);
......
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