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Commit abfd7fc4 authored by Andrew Morton's avatar Andrew Morton Committed by Linus Torvalds
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[PATCH] ppc32: Update Motorola PrPMC750 support 

From: Tom Rini <trini@kernel.crashing.org>

This patch updates support for the Motorola PrPMC750 platform.  Most of the
size in this patch comes from merging prpmc750_pci.c and prpmc750_setup.c into
just prpmc750.c.
parent 6c4f928b
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Showing with 566 additions and 329 deletions
arch/ppc/Kconfig
View file @ abfd7fc4
......@@ -609,7 +609,7 @@ config PPC_OF
config PPC_GEN550
bool
depends on SANDPOINT || MCPN765 || SPRUCE || PPLUS || PCORE || K2
depends on SANDPOINT || MCPN765 || SPRUCE || PPLUS || PCORE || PRPMC750 || K2
default y
config FORCE
......
arch/ppc/configs/prpmc750_defconfig
View file @ abfd7fc4
This diff is collapsed.
arch/ppc/platforms/Makefile
View file @ abfd7fc4
......@@ -42,7 +42,7 @@ obj-$(CONFIG_PAL4) += pal4_setup.o pal4_pci.o
obj-$(CONFIG_PCORE) += pcore.o
obj-$(CONFIG_POWERPMC250) += powerpmc250.o
obj-$(CONFIG_PPLUS) += pplus.o
obj-$(CONFIG_PRPMC750) += prpmc750_setup.o prpmc750_pci.o
obj-$(CONFIG_PRPMC750) += prpmc750.o
obj-$(CONFIG_PRPMC800) += prpmc800_setup.o prpmc800_pci.o
obj-$(CONFIG_SANDPOINT) += sandpoint.o
obj-$(CONFIG_SPRUCE) += spruce.o
......
arch/ppc/platforms/prpmc750.h
View file @ abfd7fc4
......@@ -19,27 +19,47 @@
#include <linux/serial_reg.h>
#define PRPMC750_PCI_CONFIG_ADDR 0x80000cf8
#define PRPMC750_PCI_CONFIG_DATA 0x80000cfc
/*
* Due to limiations imposed by legacy hardware (primaryily IDE controllers),
* the PrPMC750 carrier board operates using a PReP address map.
*
* From Processor (physical) -> PCI:
* PCI Mem Space: 0xc0000000 - 0xfe000000 -> 0x00000000 - 0x3e000000 (768 MB)
* PCI I/O Space: 0x80000000 - 0x90000000 -> 0x00000000 - 0x10000000 (256 MB)
* Note: Must skip 0xfe000000-0xfe400000 for CONFIG_HIGHMEM/PKMAP area
*
* From PCI -> Processor (physical):
* System Memory: 0x80000000 -> 0x00000000
*/
#define PRPMC750_PCI_PHY_MEM_BASE 0xc0000000
#define PRPMC750_PCI_MEM_BASE 0xf0000000
#define PRPMC750_PCI_IO_BASE 0x80000000
#define PRPMC750_ISA_IO_BASE PREP_ISA_IO_BASE
#define PRPMC750_ISA_MEM_BASE PREP_ISA_MEM_BASE
#define PRPMC750_ISA_IO_BASE PRPMC750_PCI_IO_BASE
#define PRPMC750_ISA_MEM_BASE PRPMC750_PCI_MEM_BASE
#define PRPMC750_PCI_MEM_OFFSET PRPMC750_PCI_PHY_MEM_BASE
/* PCI Memory space mapping info */
#define PRPMC750_PCI_MEM_SIZE 0x30000000U
#define PRPMC750_PROC_PCI_MEM_START PRPMC750_ISA_MEM_BASE
#define PRPMC750_PROC_PCI_MEM_END (PRPMC750_PROC_PCI_MEM_START + \
PRPMC750_PCI_MEM_SIZE - 1)
#define PRPMC750_PCI_MEM_START 0x00000000U
#define PRPMC750_PCI_MEM_END (PRPMC750_PCI_MEM_START + \
PRPMC750_PCI_MEM_SIZE - 1)
#define PRPMC750_SYS_MEM_BASE 0x80000000
/* PCI I/O space mapping info */
#define PRPMC750_PCI_IO_SIZE 0x10000000U
#define PRPMC750_PROC_PCI_IO_START PRPMC750_ISA_IO_BASE
#define PRPMC750_PROC_PCI_IO_END (PRPMC750_PROC_PCI_IO_START + \
PRPMC750_PCI_IO_SIZE - 1)
#define PRPMC750_PCI_IO_START 0x00000000U
#define PRPMC750_PCI_IO_END (PRPMC750_PCI_IO_START + \
PRPMC750_PCI_IO_SIZE - 1)
#define PRPMC750_PCI_LOWER_MEM 0x00000000
#define PRPMC750_PCI_UPPER_MEM_AUTO 0x3bf7ffff
#define PRPMC750_PCI_UPPER_MEM 0x3bffffff
#define PRPMC750_PCI_LOWER_IO 0x00000000
#define PRPMC750_PCI_UPPER_IO 0x0ff7ffff
/* System memory mapping info */
#define PRPMC750_PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
#define PRPMC750_PCI_PHY_MEM_OFFSET (PRPMC750_ISA_MEM_BASE-PRPMC750_PCI_MEM_START)
#define PRPMC750_HAWK_MPIC_BASE 0xfbf80000
#define PRPMC750_HAWK_SMC_BASE 0xfef80000
/* Register address definitions */
#define PRPMC750_HAWK_SMC_BASE 0xfef80000U
#define PRPMC750_HAWK_PPC_REG_BASE 0xfeff0000U
#define PRPMC750_BASE_BAUD 1843200
#define PRPMC750_SERIAL_0 0xfef88000
......
arch/ppc/platforms/prpmc750_pci.c deleted 100644 → 0
View file @ 6c4f928b
/*
* arch/ppc/platforms/prpmc750_pci.c
*
* PCI support for Motorola PrPMC750
*
* Author: Matt Porter <mporter@mvista.com>
*
* 2001 (c) MontaVista, Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <asm/byteorder.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <platforms/prpmc750.h>
/*
* Motorola PrPMC750/PrPMC800 in PrPMCBASE or PrPMC-Carrier
* Combined irq tables. Only Base has IDSEL 14, only Carrier has 21 and 22.
*/
static inline int
prpmc_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
static char pci_irq_table[][4] =
/*
* PCI IDSEL/INTPIN->INTLINE
* A B C D
*/
{
{12, 0, 0, 0}, /* IDSEL 14 - Ethernet, base */
{0, 0, 0, 0}, /* IDSEL 15 - unused */
{10, 11, 12, 9}, /* IDSEL 16 - PMC A1, PMC1 */
{10, 11, 12, 9}, /* IDSEL 17 - PrPMC-A-B, PMC2-B */
{11, 12, 9, 10}, /* IDSEL 18 - PMC A1-B, PMC1-B */
{0, 0, 0, 0}, /* IDSEL 19 - unused */
{9, 10, 11, 12}, /* IDSEL 20 - P2P Bridge */
{11, 12, 9, 10}, /* IDSEL 21 - PMC A2, carrier */
{12, 9, 10, 11}, /* IDSEL 22 - PMC A2-B, carrier */
};
const long min_idsel = 14, max_idsel = 22, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
};
static void __init
prpmc750_pcibios_fixup(void)
{
struct pci_dev *dev;
unsigned short wtmp;
/*
* Kludge to clean up after PPC6BUG which doesn't
* configure the CL5446 VGA card. Also the
* resource subsystem doesn't fixup the
* PCI mem resources on the CL5446.
*/
if ((dev = pci_find_device(PCI_VENDOR_ID_CIRRUS,
PCI_DEVICE_ID_CIRRUS_5446, 0)))
{
dev->resource[0].start += PRPMC750_PCI_PHY_MEM_BASE;
dev->resource[0].end += PRPMC750_PCI_PHY_MEM_BASE;
pci_read_config_word(dev,
PCI_COMMAND,
&wtmp);
pci_write_config_word(dev,
PCI_COMMAND,
wtmp|3);
/* Enable Color mode in MISC reg */
outb(0x03, 0x3c2);
/* Select DRAM config reg */
outb(0x0f, 0x3c4);
/* Set proper DRAM config */
outb(0xdf, 0x3c5);
}
}
void __init
prpmc750_find_bridges(void)
{
struct pci_controller* hose;
hose = pcibios_alloc_controller();
if (!hose)
return;
hose->first_busno = 0;
hose->last_busno = 0xff;
hose->pci_mem_offset = PRPMC750_PCI_PHY_MEM_BASE;
pci_init_resource(&hose->io_resource,
PRPMC750_PCI_LOWER_IO,
PRPMC750_PCI_UPPER_IO,
IORESOURCE_IO,
"PCI host bridge");
pci_init_resource(&hose->mem_resources[0],
PRPMC750_PCI_LOWER_MEM + PRPMC750_PCI_PHY_MEM_BASE,
PRPMC750_PCI_UPPER_MEM + PRPMC750_PCI_PHY_MEM_BASE,
IORESOURCE_MEM,
"PCI host bridge");
hose->io_space.start = PRPMC750_PCI_LOWER_IO;
hose->io_space.end = PRPMC750_PCI_UPPER_IO;
hose->mem_space.start = PRPMC750_PCI_LOWER_MEM;
hose->mem_space.end = PRPMC750_PCI_UPPER_MEM_AUTO;
hose->io_base_virt = (void *)PRPMC750_ISA_IO_BASE;
setup_indirect_pci(hose,
PRPMC750_PCI_CONFIG_ADDR,
PRPMC750_PCI_CONFIG_DATA);
/*
* Disable MPIC response to PCI I/O space (BAR 0).
* Make MPIC respond to PCI Mem space at specified address.
* (BAR 1).
*/
early_write_config_dword(hose,
0,
PCI_DEVFN(0,0),
PCI_BASE_ADDRESS_0,
0x00000000 | 0x1);
early_write_config_dword(hose,
0,
PCI_DEVFN(0,0),
PCI_BASE_ADDRESS_1,
(PRPMC750_HAWK_MPIC_BASE -
PRPMC750_PCI_MEM_OFFSET) | 0x0);
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
ppc_md.pcibios_fixup = prpmc750_pcibios_fixup;
ppc_md.pci_swizzle = common_swizzle;
ppc_md.pci_map_irq = prpmc_map_irq;
}
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