Commit aec49c7c authored by Benjamin Herrenschmidt's avatar Benjamin Herrenschmidt

Merge remote-tracking branch 'kumar/merge' into merge

parents 932e9f35 4351f30a
/*
* PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ]
*
* Copyright 2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Freescale Semiconductor nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
*
* ALTERNATIVELY, this software may be distributed under the terms of the
* GNU General Public License ("GPL") as published by the Free Software
* Foundation, either version 2 of that License or (at your option) any
* later version.
*
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
message@42400 {
compatible = "fsl,mpic-v3.1-msgr";
reg = <0x42400 0x200>;
interrupts = <
0xb4 2 0 0
0xb5 2 0 0
0xb6 2 0 0
0xb7 2 0 0>;
};
...@@ -53,6 +53,16 @@ timer@41100 { ...@@ -53,6 +53,16 @@ timer@41100 {
3 0 3 0>; 3 0 3 0>;
}; };
message@41400 {
compatible = "fsl,mpic-v3.1-msgr";
reg = <0x41400 0x200>;
interrupts = <
0xb0 2 0 0
0xb1 2 0 0
0xb2 2 0 0
0xb3 2 0 0>;
};
msi@41600 { msi@41600 {
compatible = "fsl,mpic-msi"; compatible = "fsl,mpic-msi";
reg = <0x41600 0x80>; reg = <0x41600 0x80>;
......
...@@ -13,6 +13,7 @@ ...@@ -13,6 +13,7 @@
#include <linux/types.h> #include <linux/types.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <asm/smp.h>
struct mpic_msgr { struct mpic_msgr {
u32 __iomem *base; u32 __iomem *base;
......
...@@ -15,11 +15,6 @@ ...@@ -15,11 +15,6 @@
#ifndef __ASM_POWERPC_REG_BOOKE_H__ #ifndef __ASM_POWERPC_REG_BOOKE_H__
#define __ASM_POWERPC_REG_BOOKE_H__ #define __ASM_POWERPC_REG_BOOKE_H__
#ifdef CONFIG_BOOKE_WDT
extern u32 booke_wdt_enabled;
extern u32 booke_wdt_period;
#endif /* CONFIG_BOOKE_WDT */
/* Machine State Register (MSR) Fields */ /* Machine State Register (MSR) Fields */
#define MSR_GS (1<<28) /* Guest state */ #define MSR_GS (1<<28) /* Guest state */
#define MSR_UCLE (1<<26) /* User-mode cache lock enable */ #define MSR_UCLE (1<<26) /* User-mode cache lock enable */
......
...@@ -150,6 +150,9 @@ notrace void __init machine_init(u64 dt_ptr) ...@@ -150,6 +150,9 @@ notrace void __init machine_init(u64 dt_ptr)
} }
#ifdef CONFIG_BOOKE_WDT #ifdef CONFIG_BOOKE_WDT
extern u32 booke_wdt_enabled;
extern u32 booke_wdt_period;
/* Checks wdt=x and wdt_period=xx command-line option */ /* Checks wdt=x and wdt_period=xx command-line option */
notrace int __init early_parse_wdt(char *p) notrace int __init early_parse_wdt(char *p)
{ {
......
...@@ -21,6 +21,12 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = { ...@@ -21,6 +21,12 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = {
{ .compatible = "fsl,qe", }, { .compatible = "fsl,qe", },
{ .compatible = "fsl,cpm2", }, { .compatible = "fsl,cpm2", },
{ .compatible = "fsl,srio", }, { .compatible = "fsl,srio", },
/* So that the DMA channel nodes can be probed individually: */
{ .compatible = "fsl,eloplus-dma", },
/* For the PMC driver */
{ .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
{}, {},
}; };
......
...@@ -399,12 +399,6 @@ static int __init board_fixups(void) ...@@ -399,12 +399,6 @@ static int __init board_fixups(void)
machine_arch_initcall(mpc8568_mds, board_fixups); machine_arch_initcall(mpc8568_mds, board_fixups);
machine_arch_initcall(mpc8569_mds, board_fixups); machine_arch_initcall(mpc8569_mds, board_fixups);
static struct of_device_id mpc85xx_ids[] = {
{ .compatible = "fsl,mpc8548-guts", },
{ .compatible = "gpio-leds", },
{},
};
static int __init mpc85xx_publish_devices(void) static int __init mpc85xx_publish_devices(void)
{ {
if (machine_is(mpc8568_mds)) if (machine_is(mpc8568_mds))
...@@ -412,10 +406,7 @@ static int __init mpc85xx_publish_devices(void) ...@@ -412,10 +406,7 @@ static int __init mpc85xx_publish_devices(void)
if (machine_is(mpc8569_mds)) if (machine_is(mpc8569_mds))
simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio"); simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
mpc85xx_common_publish_devices(); return mpc85xx_common_publish_devices();
of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
return 0;
} }
machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices); machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
......
...@@ -460,18 +460,7 @@ static void __init p1022_ds_setup_arch(void) ...@@ -460,18 +460,7 @@ static void __init p1022_ds_setup_arch(void)
pr_info("Freescale P1022 DS reference board\n"); pr_info("Freescale P1022 DS reference board\n");
} }
static struct of_device_id __initdata p1022_ds_ids[] = { machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
/* So that the DMA channel nodes can be probed individually: */
{ .compatible = "fsl,eloplus-dma", },
{},
};
static int __init p1022_ds_publish_devices(void)
{
mpc85xx_common_publish_devices();
return of_platform_bus_probe(NULL, p1022_ds_ids, NULL);
}
machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier); machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
......
...@@ -27,6 +27,7 @@ ...@@ -27,6 +27,7 @@
static struct mpic_msgr **mpic_msgrs; static struct mpic_msgr **mpic_msgrs;
static unsigned int mpic_msgr_count; static unsigned int mpic_msgr_count;
static DEFINE_RAW_SPINLOCK(msgrs_lock);
static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value) static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
{ {
...@@ -56,12 +57,11 @@ struct mpic_msgr *mpic_msgr_get(unsigned int reg_num) ...@@ -56,12 +57,11 @@ struct mpic_msgr *mpic_msgr_get(unsigned int reg_num)
if (reg_num >= mpic_msgr_count) if (reg_num >= mpic_msgr_count)
return ERR_PTR(-ENODEV); return ERR_PTR(-ENODEV);
raw_spin_lock_irqsave(&msgr->lock, flags); raw_spin_lock_irqsave(&msgrs_lock, flags);
if (mpic_msgrs[reg_num]->in_use == MSGR_FREE) {
msgr = mpic_msgrs[reg_num]; msgr = mpic_msgrs[reg_num];
if (msgr->in_use == MSGR_FREE)
msgr->in_use = MSGR_INUSE; msgr->in_use = MSGR_INUSE;
} raw_spin_unlock_irqrestore(&msgrs_lock, flags);
raw_spin_unlock_irqrestore(&msgr->lock, flags);
return msgr; return msgr;
} }
...@@ -228,7 +228,7 @@ static __devinit int mpic_msgr_probe(struct platform_device *dev) ...@@ -228,7 +228,7 @@ static __devinit int mpic_msgr_probe(struct platform_device *dev)
reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i; reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE; msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
msgr->mer = msgr->base + MPIC_MSGR_MER_OFFSET; msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
msgr->in_use = MSGR_FREE; msgr->in_use = MSGR_FREE;
msgr->num = i; msgr->num = i;
raw_spin_lock_init(&msgr->lock); raw_spin_lock_init(&msgr->lock);
......
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