Commit b055c8f3 authored by Jesse Barnes's avatar Jesse Barnes Committed by Keith Packard

drm/i915/hdmi: send AVI info frames on ILK+ as well

On Ironlake and above, we have per-transcoder DIP registers, so use them
for sending DIPs like AVI infoframes on ILK and above.
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarKeith Packard <keithp@keithp.com>
parent cb0e0931
...@@ -3020,6 +3020,20 @@ ...@@ -3020,6 +3020,20 @@
#define _TRANSA_DP_LINK_M2 0xe0048 #define _TRANSA_DP_LINK_M2 0xe0048
#define _TRANSA_DP_LINK_N2 0xe004c #define _TRANSA_DP_LINK_N2 0xe004c
/* Per-transcoder DIP controls */
#define _VIDEO_DIP_CTL_A 0xe0200
#define _VIDEO_DIP_DATA_A 0xe0208
#define _VIDEO_DIP_GCP_A 0xe0210
#define _VIDEO_DIP_CTL_B 0xe1200
#define _VIDEO_DIP_DATA_B 0xe1208
#define _VIDEO_DIP_GCP_B 0xe1210
#define TVIDEO_DIP_CTL(pipe) _PIPE(pipe, _VIDEO_DIP_CTL_A, _VIDEO_DIP_CTL_B)
#define TVIDEO_DIP_DATA(pipe) _PIPE(pipe, _VIDEO_DIP_DATA_A, _VIDEO_DIP_DATA_B)
#define TVIDEO_DIP_GCP(pipe) _PIPE(pipe, _VIDEO_DIP_GCP_A, _VIDEO_DIP_GCP_B)
#define _TRANS_HTOTAL_B 0xe1000 #define _TRANS_HTOTAL_B 0xe1000
#define _TRANS_HBLANK_B 0xe1004 #define _TRANS_HBLANK_B 0xe1004
#define _TRANS_HSYNC_B 0xe1008 #define _TRANS_HSYNC_B 0xe1008
......
...@@ -112,6 +112,40 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder) ...@@ -112,6 +112,40 @@ static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
VIDEO_DIP_ENABLE_AVI); VIDEO_DIP_ENABLE_AVI);
} }
static void intel_ironlake_hdmi_set_avi_infoframe(struct drm_encoder *encoder)
{
struct dip_infoframe avi_if = {
.type = DIP_TYPE_AVI,
.ver = DIP_VERSION_AVI,
.len = DIP_LEN_AVI,
};
uint32_t *data = (uint32_t *)&avi_if;
struct drm_device *dev = encoder->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);
struct drm_crtc *crtc = encoder->crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
int reg = TVIDEO_DIP_CTL(intel_crtc->pipe);
unsigned i;
if (!intel_hdmi->has_hdmi_sink)
return;
intel_wait_for_vblank(dev, intel_crtc->pipe);
I915_WRITE(reg, VIDEO_DIP_SELECT_AVI);
intel_dip_infoframe_csum(&avi_if);
for (i = 0; i < sizeof(avi_if); i += 4) {
I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data);
data++;
}
I915_WRITE(reg, VIDEO_DIP_ENABLE | VIDEO_DIP_SELECT_AVI |
VIDEO_DIP_FREQ_VSYNC | (DIP_LEN_AVI << 8) |
VIDEO_DIP_ENABLE_AVI);
}
static void intel_hdmi_mode_set(struct drm_encoder *encoder, static void intel_hdmi_mode_set(struct drm_encoder *encoder,
struct drm_display_mode *mode, struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode) struct drm_display_mode *adjusted_mode)
...@@ -149,6 +183,9 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder, ...@@ -149,6 +183,9 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder,
I915_WRITE(intel_hdmi->sdvox_reg, sdvox); I915_WRITE(intel_hdmi->sdvox_reg, sdvox);
POSTING_READ(intel_hdmi->sdvox_reg); POSTING_READ(intel_hdmi->sdvox_reg);
if (HAS_PCH_SPLIT(dev))
intel_ironlake_hdmi_set_avi_infoframe(encoder);
else
intel_hdmi_set_avi_infoframe(encoder); intel_hdmi_set_avi_infoframe(encoder);
} }
......
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