Commit b1b3f062 authored by Jerome Brunet's avatar Jerome Brunet

clk: meson: g12a: fix missing uart2 in regmap table

UART2 peripheral is missing from the regmap fixup table of the g12a family
clock controller. As it is, any access to this clock would Oops, which is
not great.

Add the clock to the table to fix the problem.

Fixes: 085a4ea9 ("clk: meson: g12a: add peripheral clock controller")
Reported-by: default avatarDmitry Shmidt <dimitrysh@google.com>
Tested-by: default avatarDmitry Shmidt <dimitrysh@google.com>
Acked-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Tested-by: default avatarKevin Hilman <khilman@baylibre.com>
Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
parent e42617b8
...@@ -4692,6 +4692,7 @@ static struct clk_regmap *const g12a_clk_regmaps[] = { ...@@ -4692,6 +4692,7 @@ static struct clk_regmap *const g12a_clk_regmaps[] = {
&g12a_bt656, &g12a_bt656,
&g12a_usb1_to_ddr, &g12a_usb1_to_ddr,
&g12a_mmc_pclk, &g12a_mmc_pclk,
&g12a_uart2,
&g12a_vpu_intr, &g12a_vpu_intr,
&g12a_gic, &g12a_gic,
&g12a_sd_emmc_a_clk0, &g12a_sd_emmc_a_clk0,
......
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