Commit b217e6f5 authored by Monk Liu's avatar Monk Liu Committed by Alex Deucher

drm/amdgpu: clear the messed up checking logic

for ARCTURUS+ ASICS, we always support SW_SMU for bare-metal
and for SRIOV one_vf_mode
Signed-off-by: default avatarMonk Liu <Monk.Liu@amd.com>
Acked-by: default avatarYintian Tao <yttao@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c2ce6aeb
...@@ -571,14 +571,9 @@ bool is_support_sw_smu(struct amdgpu_device *adev) ...@@ -571,14 +571,9 @@ bool is_support_sw_smu(struct amdgpu_device *adev)
if (adev->asic_type == CHIP_VEGA20) if (adev->asic_type == CHIP_VEGA20)
return (amdgpu_dpm == 2) ? true : false; return (amdgpu_dpm == 2) ? true : false;
else if (adev->asic_type >= CHIP_ARCTURUS) { else if (adev->asic_type >= CHIP_ARCTURUS) {
if (amdgpu_sriov_vf(adev) && if (amdgpu_sriov_is_pp_one_vf(adev) || !amdgpu_sriov_vf(adev))
!(adev->asic_type == CHIP_ARCTURUS &&
amdgpu_sriov_is_pp_one_vf(adev)))
return false;
else
return true; return true;
} else }
return false; return false;
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment