Commit b3e3b302 authored by Ingo Molnar's avatar Ingo Molnar

Merge branches 'irq/sparseirq' and 'linus' into irq/core

parents a6bc3262 59fcbdda
......@@ -3738,7 +3738,7 @@ S: 93149 Nittenau
S: Germany
N: Gertjan van Wingerde
E: gwingerde@home.nl
E: gwingerde@gmail.com
D: Ralink rt2x00 WLAN driver
D: Minix V2 file-system
D: Misc fixes
......
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This is the full-colour version of the currently unofficial Linux logo
("currently unofficial" just means that there has been no paperwork and
that I have not really announced it yet). It was created by Larry Ewing,
and is freely usable as long as you acknowledge Larry as the original
artist.
Note that there are black-and-white versions of this available that
scale down to smaller sizes and are better for letterheads or whatever
you want to use it for: for the full range of logos take a look at
Larry's web-page:
http://www.isc.tamu.edu/~lewing/linux/
Tux is taking a three month sabbatical to work as a barber, so Tuz is
standing in. He's taken pains to ensure you'll hardly notice.
Image by Andrew McGown and Josh Bush. Image is licensed CC BY-SA.
......@@ -3876,6 +3876,15 @@ L: linux-ide@vger.kernel.org
T: git kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev.git
S: Supported
SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER
P: Sathya Perla
M: sathyap@serverengines.com
P: Subbu Seetharaman
M: subbus@serverengines.com
L: netdev@vger.kernel.org
W: http://www.serverengines.com
S: Supported
SFC NETWORK DRIVER
P: Steve Hodgson
P: Ben Hutchings
......
......@@ -566,6 +566,9 @@ KBUILD_CFLAGS += $(call cc-option,-Wdeclaration-after-statement,)
# disable pointer signed / unsigned warnings in gcc 4.0
KBUILD_CFLAGS += $(call cc-option,-Wno-pointer-sign,)
# disable invalid "can't wrap" optimzations for signed / pointers
KBUILD_CFLAGS += $(call cc-option,-fwrapv)
# Add user supplied CPPFLAGS, AFLAGS and CFLAGS as the last assignments
# But warn user when we do so
warn-assign = \
......
#ifndef _M68K_PARAM_H
#define _M68K_PARAM_H
#ifdef __KERNEL__
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
#endif
#ifndef HZ
#define HZ 100
#endif
#ifdef __uClinux__
#include "param_no.h"
#define EXEC_PAGESIZE 4096
#else
#include "param_mm.h"
#define EXEC_PAGESIZE 8192
#endif
#ifndef NOGROUP
#define NOGROUP (-1)
#endif
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#endif /* _M68K_PARAM_H */
#ifndef _M68K_PARAM_H
#define _M68K_PARAM_H
#ifdef __KERNEL__
# define HZ CONFIG_HZ /* Internal kernel timer frequency */
# define USER_HZ 100 /* .. some user interfaces are in "ticks" */
# define CLOCKS_PER_SEC (USER_HZ) /* like times() */
#endif
#ifndef HZ
#define HZ 100
#endif
#define EXEC_PAGESIZE 8192
#ifndef NOGROUP
#define NOGROUP (-1)
#endif
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#endif /* _M68K_PARAM_H */
#ifndef _M68KNOMMU_PARAM_H
#define _M68KNOMMU_PARAM_H
#ifdef __KERNEL__
#define HZ CONFIG_HZ
#define USER_HZ HZ
#define CLOCKS_PER_SEC (USER_HZ)
#endif
#ifndef HZ
#define HZ 100
#endif
#define EXEC_PAGESIZE 4096
#ifndef NOGROUP
#define NOGROUP (-1)
#endif
#define MAXHOSTNAMELEN 64 /* max length of hostname */
#endif /* _M68KNOMMU_PARAM_H */
#ifdef __uClinux__
#include "ptrace_no.h"
#ifndef _M68K_PTRACE_H
#define _M68K_PTRACE_H
#define PT_D1 0
#define PT_D2 1
#define PT_D3 2
#define PT_D4 3
#define PT_D5 4
#define PT_D6 5
#define PT_D7 6
#define PT_A0 7
#define PT_A1 8
#define PT_A2 9
#define PT_A3 10
#define PT_A4 11
#define PT_A5 12
#define PT_A6 13
#define PT_D0 14
#define PT_USP 15
#define PT_ORIG_D0 16
#define PT_SR 17
#define PT_PC 18
#ifndef __ASSEMBLY__
/* this struct defines the way the registers are stored on the
stack during a system call. */
struct pt_regs {
long d1;
long d2;
long d3;
long d4;
long d5;
long a0;
long a1;
long a2;
long d0;
long orig_d0;
long stkadj;
#ifdef CONFIG_COLDFIRE
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
unsigned short sr;
unsigned long pc;
#else
#include "ptrace_mm.h"
unsigned short sr;
unsigned long pc;
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
#endif
};
/*
* This is the extended stack used by signal handlers and the context
* switcher: it's pushed after the normal "struct pt_regs".
*/
struct switch_stack {
unsigned long d6;
unsigned long d7;
unsigned long a3;
unsigned long a4;
unsigned long a5;
unsigned long a6;
unsigned long retpc;
};
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
#ifdef __KERNEL__
#ifndef PS_S
#define PS_S (0x2000)
#define PS_M (0x1000)
#endif
#define user_mode(regs) (!((regs)->sr & PS_S))
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
extern void show_regs(struct pt_regs *);
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _M68K_PTRACE_H */
#ifndef _M68K_PTRACE_H
#define _M68K_PTRACE_H
#define PT_D1 0
#define PT_D2 1
#define PT_D3 2
#define PT_D4 3
#define PT_D5 4
#define PT_D6 5
#define PT_D7 6
#define PT_A0 7
#define PT_A1 8
#define PT_A2 9
#define PT_A3 10
#define PT_A4 11
#define PT_A5 12
#define PT_A6 13
#define PT_D0 14
#define PT_USP 15
#define PT_ORIG_D0 16
#define PT_SR 17
#define PT_PC 18
#ifndef __ASSEMBLY__
/* this struct defines the way the registers are stored on the
stack during a system call. */
struct pt_regs {
long d1;
long d2;
long d3;
long d4;
long d5;
long a0;
long a1;
long a2;
long d0;
long orig_d0;
long stkadj;
unsigned short sr;
unsigned long pc;
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
};
/*
* This is the extended stack used by signal handlers and the context
* switcher: it's pushed after the normal "struct pt_regs".
*/
struct switch_stack {
unsigned long d6;
unsigned long d7;
unsigned long a3;
unsigned long a4;
unsigned long a5;
unsigned long a6;
unsigned long retpc;
};
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
#ifdef __KERNEL__
#ifndef PS_S
#define PS_S (0x2000)
#define PS_M (0x1000)
#endif
#define user_mode(regs) (!((regs)->sr & PS_S))
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
extern void show_regs(struct pt_regs *);
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _M68K_PTRACE_H */
#ifndef _M68K_PTRACE_H
#define _M68K_PTRACE_H
#define PT_D1 0
#define PT_D2 1
#define PT_D3 2
#define PT_D4 3
#define PT_D5 4
#define PT_D6 5
#define PT_D7 6
#define PT_A0 7
#define PT_A1 8
#define PT_A2 9
#define PT_A3 10
#define PT_A4 11
#define PT_A5 12
#define PT_A6 13
#define PT_D0 14
#define PT_USP 15
#define PT_ORIG_D0 16
#define PT_SR 17
#define PT_PC 18
#ifndef __ASSEMBLY__
/* this struct defines the way the registers are stored on the
stack during a system call. */
struct pt_regs {
long d1;
long d2;
long d3;
long d4;
long d5;
long a0;
long a1;
long a2;
long d0;
long orig_d0;
long stkadj;
#ifdef CONFIG_COLDFIRE
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
unsigned short sr;
unsigned long pc;
#else
unsigned short sr;
unsigned long pc;
unsigned format : 4; /* frame format specifier */
unsigned vector : 12; /* vector offset */
#endif
};
/*
* This is the extended stack used by signal handlers and the context
* switcher: it's pushed after the normal "struct pt_regs".
*/
struct switch_stack {
unsigned long d6;
unsigned long d7;
unsigned long a3;
unsigned long a4;
unsigned long a5;
unsigned long a6;
unsigned long retpc;
};
/* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
#define PTRACE_SETFPREGS 15
#ifdef __KERNEL__
#ifndef PS_S
#define PS_S (0x2000)
#define PS_M (0x1000)
#endif
#define user_mode(regs) (!((regs)->sr & PS_S))
#define instruction_pointer(regs) ((regs)->pc)
#define profile_pc(regs) instruction_pointer(regs)
extern void show_regs(struct pt_regs *);
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _M68K_PTRACE_H */
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#ifdef __KERNEL__
#include <asm/setup_mm.h>
/* We have a bigger command line buffer. */
#undef COMMAND_LINE_SIZE
#endif /* __KERNEL__ */
#define COMMAND_LINE_SIZE 512
#ifndef _ASM_M68k_SIGCONTEXT_H
#define _ASM_M68k_SIGCONTEXT_H
struct sigcontext {
unsigned long sc_mask; /* old sigmask */
unsigned long sc_usp; /* old user stack pointer */
unsigned long sc_d0;
unsigned long sc_d1;
unsigned long sc_a0;
unsigned long sc_a1;
#ifdef __uClinux__
#include "sigcontext_no.h"
#else
#include "sigcontext_mm.h"
unsigned long sc_a5;
#endif
unsigned short sc_sr;
unsigned long sc_pc;
unsigned short sc_formatvec;
#ifndef __uClinux__
unsigned long sc_fpregs[2*3]; /* room for two fp registers */
unsigned long sc_fpcntl[3];
unsigned char sc_fpstate[216];
#endif
};
#endif
#ifndef _ASM_M68k_SIGCONTEXT_H
#define _ASM_M68k_SIGCONTEXT_H
struct sigcontext {
unsigned long sc_mask; /* old sigmask */
unsigned long sc_usp; /* old user stack pointer */
unsigned long sc_d0;
unsigned long sc_d1;
unsigned long sc_a0;
unsigned long sc_a1;
unsigned short sc_sr;
unsigned long sc_pc;
unsigned short sc_formatvec;
unsigned long sc_fpregs[2*3]; /* room for two fp registers */
unsigned long sc_fpcntl[3];
unsigned char sc_fpstate[216];
};
#endif
#ifndef _ASM_M68KNOMMU_SIGCONTEXT_H
#define _ASM_M68KNOMMU_SIGCONTEXT_H
struct sigcontext {
unsigned long sc_mask; /* old sigmask */
unsigned long sc_usp; /* old user stack pointer */
unsigned long sc_d0;
unsigned long sc_d1;
unsigned long sc_a0;
unsigned long sc_a1;
unsigned long sc_a5;
unsigned short sc_sr;
unsigned long sc_pc;
unsigned short sc_formatvec;
};
#endif
#ifdef __uClinux__
#include "siginfo_no.h"
#ifndef _M68K_SIGINFO_H
#define _M68K_SIGINFO_H
#ifndef __uClinux__
#define HAVE_ARCH_SIGINFO_T
#define HAVE_ARCH_COPY_SIGINFO
#endif
#include <asm-generic/siginfo.h>
#ifndef __uClinux__
typedef struct siginfo {
int si_signo;
int si_errno;
int si_code;
union {
int _pad[SI_PAD_SIZE];
/* kill() */
struct {
__kernel_pid_t _pid; /* sender's pid */
__kernel_uid_t _uid; /* backwards compatibility */
__kernel_uid32_t _uid32; /* sender's uid */
} _kill;
/* POSIX.1b timers */
struct {
timer_t _tid; /* timer id */
int _overrun; /* overrun count */
char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
sigval_t _sigval; /* same as below */
int _sys_private; /* not to be passed to user */
} _timer;
/* POSIX.1b signals */
struct {
__kernel_pid_t _pid; /* sender's pid */
__kernel_uid_t _uid; /* backwards compatibility */
sigval_t _sigval;
__kernel_uid32_t _uid32; /* sender's uid */
} _rt;
/* SIGCHLD */
struct {
__kernel_pid_t _pid; /* which child */
__kernel_uid_t _uid; /* backwards compatibility */
int _status; /* exit code */
clock_t _utime;
clock_t _stime;
__kernel_uid32_t _uid32; /* sender's uid */
} _sigchld;
/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
struct {
void *_addr; /* faulting insn/memory ref. */
} _sigfault;
/* SIGPOLL */
struct {
int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
int _fd;
} _sigpoll;
} _sifields;
} siginfo_t;
#define UID16_SIGINFO_COMPAT_NEEDED
/*
* How these fields are to be accessed.
*/
#undef si_uid
#ifdef __KERNEL__
#define si_uid _sifields._kill._uid32
#define si_uid16 _sifields._kill._uid
#else
#include "siginfo_mm.h"
#define si_uid _sifields._kill._uid
#endif
#ifdef __KERNEL__
#include <linux/string.h>
static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
{
if (from->si_code < 0)
memcpy(to, from, sizeof(*to));
else
/* _sigchld is currently the largest know union member */
memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
}
#endif /* __KERNEL__ */
#endif /* !__uClinux__ */
#endif
#ifndef _M68K_SIGINFO_H
#define _M68K_SIGINFO_H
#define HAVE_ARCH_SIGINFO_T
#define HAVE_ARCH_COPY_SIGINFO
#include <asm-generic/siginfo.h>
typedef struct siginfo {
int si_signo;
int si_errno;
int si_code;
union {
int _pad[SI_PAD_SIZE];
/* kill() */
struct {
__kernel_pid_t _pid; /* sender's pid */
__kernel_uid_t _uid; /* backwards compatibility */
__kernel_uid32_t _uid32; /* sender's uid */
} _kill;
/* POSIX.1b timers */
struct {
timer_t _tid; /* timer id */
int _overrun; /* overrun count */
char _pad[sizeof( __ARCH_SI_UID_T) - sizeof(int)];
sigval_t _sigval; /* same as below */
int _sys_private; /* not to be passed to user */
} _timer;
/* POSIX.1b signals */
struct {
__kernel_pid_t _pid; /* sender's pid */
__kernel_uid_t _uid; /* backwards compatibility */
sigval_t _sigval;
__kernel_uid32_t _uid32; /* sender's uid */
} _rt;
/* SIGCHLD */
struct {
__kernel_pid_t _pid; /* which child */
__kernel_uid_t _uid; /* backwards compatibility */
int _status; /* exit code */
clock_t _utime;
clock_t _stime;
__kernel_uid32_t _uid32; /* sender's uid */
} _sigchld;
/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
struct {
void *_addr; /* faulting insn/memory ref. */
} _sigfault;
/* SIGPOLL */
struct {
int _band; /* POLL_IN, POLL_OUT, POLL_MSG */
int _fd;
} _sigpoll;
} _sifields;
} siginfo_t;
#define UID16_SIGINFO_COMPAT_NEEDED
/*
* How these fields are to be accessed.
*/
#undef si_uid
#ifdef __KERNEL__
#define si_uid _sifields._kill._uid32
#define si_uid16 _sifields._kill._uid
#else
#define si_uid _sifields._kill._uid
#endif
#ifdef __KERNEL__
#include <linux/string.h>
static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
{
if (from->si_code < 0)
memcpy(to, from, sizeof(*to));
else
/* _sigchld is currently the largest know union member */
memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
}
#endif /* __KERNEL__ */
#endif
#ifndef _M68KNOMMU_SIGINFO_H
#define _M68KNOMMU_SIGINFO_H
#include <asm-generic/siginfo.h>
#endif
#ifdef __uClinux__
#include "signal_no.h"
#ifndef _M68K_SIGNAL_H
#define _M68K_SIGNAL_H
#include <linux/types.h>
/* Avoid too many header ordering problems. */
struct siginfo;
#ifdef __KERNEL__
/* Most things should be clean enough to redefine this at will, if care
is taken to make libc match. */
#define _NSIG 64
#define _NSIG_BPW 32
#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
typedef unsigned long old_sigset_t; /* at least 32 bits */
typedef struct {
unsigned long sig[_NSIG_WORDS];
} sigset_t;
#else
#include "signal_mm.h"
#endif
/* Here we must cater to libcs that poke about in kernel headers. */
#define NSIG 32
typedef unsigned long sigset_t;
#endif /* __KERNEL__ */
#define SIGHUP 1
#define SIGINT 2
#define SIGQUIT 3
#define SIGILL 4
#define SIGTRAP 5
#define SIGABRT 6
#define SIGIOT 6
#define SIGBUS 7
#define SIGFPE 8
#define SIGKILL 9
#define SIGUSR1 10
#define SIGSEGV 11
#define SIGUSR2 12
#define SIGPIPE 13
#define SIGALRM 14
#define SIGTERM 15
#define SIGSTKFLT 16
#define SIGCHLD 17
#define SIGCONT 18
#define SIGSTOP 19
#define SIGTSTP 20
#define SIGTTIN 21
#define SIGTTOU 22
#define SIGURG 23
#define SIGXCPU 24
#define SIGXFSZ 25
#define SIGVTALRM 26
#define SIGPROF 27
#define SIGWINCH 28
#define SIGIO 29
#define SIGPOLL SIGIO
/*
#define SIGLOST 29
*/
#define SIGPWR 30
#define SIGSYS 31
#define SIGUNUSED 31
/* These should not be considered constants from userland. */
#define SIGRTMIN 32
#define SIGRTMAX _NSIG
/*
* SA_FLAGS values:
*
* SA_ONSTACK indicates that a registered stack_t will be used.
* SA_RESTART flag to get restarting signals (which were the default long ago)
* SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
* SA_RESETHAND clears the handler when the signal is delivered.
* SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
* SA_NODEFER prevents the current signal from being masked in the handler.
*
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
* Unix names RESETHAND and NODEFER respectively.
*/
#define SA_NOCLDSTOP 0x00000001
#define SA_NOCLDWAIT 0x00000002
#define SA_SIGINFO 0x00000004
#define SA_ONSTACK 0x08000000
#define SA_RESTART 0x10000000
#define SA_NODEFER 0x40000000
#define SA_RESETHAND 0x80000000
#define SA_NOMASK SA_NODEFER
#define SA_ONESHOT SA_RESETHAND
/*
* sigaltstack controls
*/
#define SS_ONSTACK 1
#define SS_DISABLE 2
#define MINSIGSTKSZ 2048
#define SIGSTKSZ 8192
#include <asm-generic/signal.h>
#ifdef __KERNEL__
struct old_sigaction {
__sighandler_t sa_handler;
old_sigset_t sa_mask;
unsigned long sa_flags;
__sigrestore_t sa_restorer;
};
struct sigaction {
__sighandler_t sa_handler;
unsigned long sa_flags;
__sigrestore_t sa_restorer;
sigset_t sa_mask; /* mask last for extensibility */
};
struct k_sigaction {
struct sigaction sa;
};
#else
/* Here we must cater to libcs that poke about in kernel headers. */
struct sigaction {
union {
__sighandler_t _sa_handler;
void (*_sa_sigaction)(int, struct siginfo *, void *);
} _u;
sigset_t sa_mask;
unsigned long sa_flags;
void (*sa_restorer)(void);
};
#define sa_handler _u._sa_handler
#define sa_sigaction _u._sa_sigaction
#endif /* __KERNEL__ */
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
size_t ss_size;
} stack_t;
#ifdef __KERNEL__
#include <asm/sigcontext.h>
#ifndef __uClinux__
#define __HAVE_ARCH_SIG_BITOPS
static inline void sigaddset(sigset_t *set, int _sig)
{
asm ("bfset %0{%1,#1}"
: "+od" (*set)
: "id" ((_sig - 1) ^ 31)
: "cc");
}
static inline void sigdelset(sigset_t *set, int _sig)
{
asm ("bfclr %0{%1,#1}"
: "+od" (*set)
: "id" ((_sig - 1) ^ 31)
: "cc");
}
static inline int __const_sigismember(sigset_t *set, int _sig)
{
unsigned long sig = _sig - 1;
return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
}
static inline int __gen_sigismember(sigset_t *set, int _sig)
{
int ret;
asm ("bfextu %1{%2,#1},%0"
: "=d" (ret)
: "od" (*set), "id" ((_sig-1) ^ 31)
: "cc");
return ret;
}
#define sigismember(set,sig) \
(__builtin_constant_p(sig) ? \
__const_sigismember(set,sig) : \
__gen_sigismember(set,sig))
static inline int sigfindinword(unsigned long word)
{
asm ("bfffo %1{#0,#0},%0"
: "=d" (word)
: "d" (word & -word)
: "cc");
return word ^ 31;
}
struct pt_regs;
extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie);
#else
#undef __HAVE_ARCH_SIG_BITOPS
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
#endif /* __uClinux__ */
#endif /* __KERNEL__ */
#endif /* _M68K_SIGNAL_H */
#ifndef _M68K_SIGNAL_H
#define _M68K_SIGNAL_H
#include <linux/types.h>
/* Avoid too many header ordering problems. */
struct siginfo;
#ifdef __KERNEL__
/* Most things should be clean enough to redefine this at will, if care
is taken to make libc match. */
#define _NSIG 64
#define _NSIG_BPW 32
#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
typedef unsigned long old_sigset_t; /* at least 32 bits */
typedef struct {
unsigned long sig[_NSIG_WORDS];
} sigset_t;
#else
/* Here we must cater to libcs that poke about in kernel headers. */
#define NSIG 32
typedef unsigned long sigset_t;
#endif /* __KERNEL__ */
#define SIGHUP 1
#define SIGINT 2
#define SIGQUIT 3
#define SIGILL 4
#define SIGTRAP 5
#define SIGABRT 6
#define SIGIOT 6
#define SIGBUS 7
#define SIGFPE 8
#define SIGKILL 9
#define SIGUSR1 10
#define SIGSEGV 11
#define SIGUSR2 12
#define SIGPIPE 13
#define SIGALRM 14
#define SIGTERM 15
#define SIGSTKFLT 16
#define SIGCHLD 17
#define SIGCONT 18
#define SIGSTOP 19
#define SIGTSTP 20
#define SIGTTIN 21
#define SIGTTOU 22
#define SIGURG 23
#define SIGXCPU 24
#define SIGXFSZ 25
#define SIGVTALRM 26
#define SIGPROF 27
#define SIGWINCH 28
#define SIGIO 29
#define SIGPOLL SIGIO
/*
#define SIGLOST 29
*/
#define SIGPWR 30
#define SIGSYS 31
#define SIGUNUSED 31
/* These should not be considered constants from userland. */
#define SIGRTMIN 32
#define SIGRTMAX _NSIG
/*
* SA_FLAGS values:
*
* SA_ONSTACK indicates that a registered stack_t will be used.
* SA_RESTART flag to get restarting signals (which were the default long ago)
* SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
* SA_RESETHAND clears the handler when the signal is delivered.
* SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
* SA_NODEFER prevents the current signal from being masked in the handler.
*
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
* Unix names RESETHAND and NODEFER respectively.
*/
#define SA_NOCLDSTOP 0x00000001
#define SA_NOCLDWAIT 0x00000002
#define SA_SIGINFO 0x00000004
#define SA_ONSTACK 0x08000000
#define SA_RESTART 0x10000000
#define SA_NODEFER 0x40000000
#define SA_RESETHAND 0x80000000
#define SA_NOMASK SA_NODEFER
#define SA_ONESHOT SA_RESETHAND
/*
* sigaltstack controls
*/
#define SS_ONSTACK 1
#define SS_DISABLE 2
#define MINSIGSTKSZ 2048
#define SIGSTKSZ 8192
#include <asm-generic/signal.h>
#ifdef __KERNEL__
struct old_sigaction {
__sighandler_t sa_handler;
old_sigset_t sa_mask;
unsigned long sa_flags;
__sigrestore_t sa_restorer;
};
struct sigaction {
__sighandler_t sa_handler;
unsigned long sa_flags;
__sigrestore_t sa_restorer;
sigset_t sa_mask; /* mask last for extensibility */
};
struct k_sigaction {
struct sigaction sa;
};
#else
/* Here we must cater to libcs that poke about in kernel headers. */
struct sigaction {
union {
__sighandler_t _sa_handler;
void (*_sa_sigaction)(int, struct siginfo *, void *);
} _u;
sigset_t sa_mask;
unsigned long sa_flags;
void (*sa_restorer)(void);
};
#define sa_handler _u._sa_handler
#define sa_sigaction _u._sa_sigaction
#endif /* __KERNEL__ */
typedef struct sigaltstack {
void __user *ss_sp;
int ss_flags;
size_t ss_size;
} stack_t;
#ifdef __KERNEL__
#include <asm/sigcontext.h>
#define __HAVE_ARCH_SIG_BITOPS
static inline void sigaddset(sigset_t *set, int _sig)
{
asm ("bfset %0{%1,#1}"
: "+od" (*set)
: "id" ((_sig - 1) ^ 31)
: "cc");
}
static inline void sigdelset(sigset_t *set, int _sig)
{
asm ("bfclr %0{%1,#1}"
: "+od" (*set)
: "id" ((_sig - 1) ^ 31)
: "cc");
}
static inline int __const_sigismember(sigset_t *set, int _sig)
{
unsigned long sig = _sig - 1;
return 1 & (set->sig[sig / _NSIG_BPW] >> (sig % _NSIG_BPW));
}
static inline int __gen_sigismember(sigset_t *set, int _sig)
{
int ret;
asm ("bfextu %1{%2,#1},%0"
: "=d" (ret)
: "od" (*set), "id" ((_sig-1) ^ 31)
: "cc");
return ret;
}
#define sigismember(set,sig) \
(__builtin_constant_p(sig) ? \
__const_sigismember(set,sig) : \
__gen_sigismember(set,sig))
static inline int sigfindinword(unsigned long word)
{
asm ("bfffo %1{#0,#0},%0"
: "=d" (word)
: "d" (word & -word)
: "cc");
return word ^ 31;
}
struct pt_regs;
extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie);
#endif /* __KERNEL__ */
#endif /* _M68K_SIGNAL_H */
#ifndef _M68KNOMMU_SIGNAL_H
#define _M68KNOMMU_SIGNAL_H
#include <linux/types.h>
/* Avoid too many header ordering problems. */
struct siginfo;
#ifdef __KERNEL__
/* Most things should be clean enough to redefine this at will, if care
is taken to make libc match. */
#define _NSIG 64
#define _NSIG_BPW 32
#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
typedef unsigned long old_sigset_t; /* at least 32 bits */
typedef struct {
unsigned long sig[_NSIG_WORDS];
} sigset_t;
#else
/* Here we must cater to libcs that poke about in kernel headers. */
#define NSIG 32
typedef unsigned long sigset_t;
#endif /* __KERNEL__ */
#define SIGHUP 1
#define SIGINT 2
#define SIGQUIT 3
#define SIGILL 4
#define SIGTRAP 5
#define SIGABRT 6
#define SIGIOT 6
#define SIGBUS 7
#define SIGFPE 8
#define SIGKILL 9
#define SIGUSR1 10
#define SIGSEGV 11
#define SIGUSR2 12
#define SIGPIPE 13
#define SIGALRM 14
#define SIGTERM 15
#define SIGSTKFLT 16
#define SIGCHLD 17
#define SIGCONT 18
#define SIGSTOP 19
#define SIGTSTP 20
#define SIGTTIN 21
#define SIGTTOU 22
#define SIGURG 23
#define SIGXCPU 24
#define SIGXFSZ 25
#define SIGVTALRM 26
#define SIGPROF 27
#define SIGWINCH 28
#define SIGIO 29
#define SIGPOLL SIGIO
/*
#define SIGLOST 29
*/
#define SIGPWR 30
#define SIGSYS 31
#define SIGUNUSED 31
/* These should not be considered constants from userland. */
#define SIGRTMIN 32
#define SIGRTMAX _NSIG
/*
* SA_FLAGS values:
*
* SA_ONSTACK indicates that a registered stack_t will be used.
* SA_RESTART flag to get restarting signals (which were the default long ago)
* SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
* SA_RESETHAND clears the handler when the signal is delivered.
* SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
* SA_NODEFER prevents the current signal from being masked in the handler.
*
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
* Unix names RESETHAND and NODEFER respectively.
*/
#define SA_NOCLDSTOP 0x00000001
#define SA_NOCLDWAIT 0x00000002
#define SA_SIGINFO 0x00000004
#define SA_ONSTACK 0x08000000
#define SA_RESTART 0x10000000
#define SA_NODEFER 0x40000000
#define SA_RESETHAND 0x80000000
#define SA_NOMASK SA_NODEFER
#define SA_ONESHOT SA_RESETHAND
/*
* sigaltstack controls
*/
#define SS_ONSTACK 1
#define SS_DISABLE 2
#define MINSIGSTKSZ 2048
#define SIGSTKSZ 8192
#include <asm-generic/signal.h>
#ifdef __KERNEL__
struct old_sigaction {
__sighandler_t sa_handler;
old_sigset_t sa_mask;
unsigned long sa_flags;
void (*sa_restorer)(void);
};
struct sigaction {
__sighandler_t sa_handler;
unsigned long sa_flags;
void (*sa_restorer)(void);
sigset_t sa_mask; /* mask last for extensibility */
};
struct k_sigaction {
struct sigaction sa;
};
#else
/* Here we must cater to libcs that poke about in kernel headers. */
struct sigaction {
union {
__sighandler_t _sa_handler;
void (*_sa_sigaction)(int, struct siginfo *, void *);
} _u;
sigset_t sa_mask;
unsigned long sa_flags;
void (*sa_restorer)(void);
};
#define sa_handler _u._sa_handler
#define sa_sigaction _u._sa_sigaction
#endif /* __KERNEL__ */
typedef struct sigaltstack {
void *ss_sp;
int ss_flags;
size_t ss_size;
} stack_t;
#ifdef __KERNEL__
#include <asm/sigcontext.h>
#undef __HAVE_ARCH_SIG_BITOPS
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
#endif /* __KERNEL__ */
#endif /* _M68KNOMMU_SIGNAL_H */
#ifdef __uClinux__
#include "swab_no.h"
#else
#include "swab_mm.h"
#ifndef _M68K_SWAB_H
#define _M68K_SWAB_H
#include <asm/types.h>
#include <linux/compiler.h>
#define __SWAB_64_THRU_32__
#if defined (__mcfisaaplus__) || defined (__mcfisac__)
static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
{
__asm__("byterev %0" : "=d" (val) : "0" (val));
return val;
}
#define __arch_swab32 __arch_swab32
#elif !defined(__uClinux__)
static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
{
__asm__("rolw #8,%0; swap %0; rolw #8,%0" : "=d" (val) : "0" (val));
return val;
}
#define __arch_swab32 __arch_swab32
#endif
#endif /* _M68K_SWAB_H */
#ifndef _M68K_SWAB_H
#define _M68K_SWAB_H
#include <asm/types.h>
#include <linux/compiler.h>
#define __SWAB_64_THRU_32__
static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
{
__asm__("rolw #8,%0; swap %0; rolw #8,%0" : "=d" (val) : "0" (val));
return val;
}
#define __arch_swab32 __arch_swab32
#endif /* _M68K_SWAB_H */
#ifndef _M68KNOMMU_SWAB_H
#define _M68KNOMMU_SWAB_H
#include <linux/types.h>
#if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__)
# define __SWAB_64_THRU_32__
#endif
#if defined (__mcfisaaplus__) || defined (__mcfisac__)
static inline __attribute_const__ __u32 __arch_swab32(__u32 val)
{
asm(
"byterev %0"
: "=d" (val)
: "0" (val)
);
return val;
}
#define __arch_swab32 __arch_swab32
#endif
#endif /* _M68KNOMMU_SWAB_H */
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......@@ -241,9 +241,11 @@ extern const char *powerpc_base_platform;
/* We need to mark all pages as being coherent if we're SMP or we have a
* 74[45]x and an MPC107 host bridge. Also 83xx and PowerQUICC II
* require it for PCI "streaming/prefetch" to work properly.
* This is also required by 52xx family.
*/
#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE) \
|| defined(CONFIG_PPC_83xx) || defined(CONFIG_8260)
|| defined(CONFIG_PPC_83xx) || defined(CONFIG_8260) \
|| defined(CONFIG_PPC_MPC52xx)
#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT
#else
#define CPU_FTR_COMMON 0
......
......@@ -511,7 +511,7 @@ InstructionTLBMiss:
and r1,r1,r2 /* writable if _RW and _DIRTY */
rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
ori r1,r1,0xe14 /* clear out reserved bits and M */
ori r1,r1,0xe04 /* clear out reserved bits */
andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
mtspr SPRN_RPA,r1
mfspr r3,SPRN_IMISS
......@@ -585,7 +585,7 @@ DataLoadTLBMiss:
and r1,r1,r2 /* writable if _RW and _DIRTY */
rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
rlwimi r3,r3,32-1,31,31 /* _PAGE_USER -> PP lsb */
ori r1,r1,0xe14 /* clear out reserved bits and M */
ori r1,r1,0xe04 /* clear out reserved bits */
andc r1,r3,r1 /* PP = user? (rw&dirty? 2: 3): 0 */
mtspr SPRN_RPA,r1
mfspr r3,SPRN_DMISS
......@@ -653,7 +653,7 @@ DataStoreTLBMiss:
stw r3,0(r2) /* update PTE (accessed/dirty bits) */
/* Convert linux-style PTE to low word of PPC-style PTE */
rlwimi r3,r3,32-1,30,30 /* _PAGE_USER -> PP msb */
li r1,0xe15 /* clear out reserved bits and M */
li r1,0xe05 /* clear out reserved bits & PP lsb */
andc r1,r3,r1 /* PP = user? 2: 0 */
mtspr SPRN_RPA,r1
mfspr r3,SPRN_DMISS
......
......@@ -128,6 +128,13 @@ config PS3_FLASH
be disabled on the kernel command line using "ps3flash=off", to
not allocate this fixed buffer.
config PS3_VRAM
tristate "PS3 Video RAM Storage Driver"
depends on FB_PS3=y && BLOCK && m
help
This driver allows you to use excess PS3 video RAM as volatile
storage or system swap.
config PS3_LPM
tristate "PS3 Logical Performance Monitor support"
depends on PPC_PS3
......
......@@ -22,4 +22,9 @@
#define MCL_CURRENT 1 /* lock all current mappings */
#define MCL_FUTURE 2 /* lock all future mappings */
#if defined(__KERNEL__) && !defined(__ASSEMBLY__) && defined(CONFIG_64BIT)
int s390_mmap_check(unsigned long addr, unsigned long len);
#define arch_mmap_check(addr,len,flags) s390_mmap_check(addr,len)
#endif
#endif /* __S390_MMAN_H__ */
......@@ -61,7 +61,7 @@ extern void print_cpu_info(struct cpuinfo_S390 *);
extern int get_cpu_capability(unsigned int *);
/*
* User space process size: 2GB for 31 bit, 4TB for 64 bit.
* User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
*/
#ifndef __s390x__
......@@ -70,8 +70,7 @@ extern int get_cpu_capability(unsigned int *);
#else /* __s390x__ */
#define TASK_SIZE_OF(tsk) (test_tsk_thread_flag(tsk,TIF_31BIT) ? \
(1UL << 31) : (1UL << 53))
#define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
(1UL << 30) : (1UL << 41))
#define TASK_SIZE TASK_SIZE_OF(current)
......
......@@ -30,6 +30,8 @@ static inline void s390_init_cpu_topology(void)
};
#endif
#define SD_MC_INIT SD_CPU_INIT
#include <asm-generic/topology.h>
#endif /* _ASM_S390_TOPOLOGY_H */
......@@ -5,6 +5,8 @@
*
*/
#include <asm/asm-offsets.h>
#ifndef CONFIG_64BIT
.globl _mcount
_mcount:
......@@ -14,7 +16,7 @@ _mcount:
ahi %r15,-96
l %r3,100(%r15)
la %r2,0(%r14)
st %r1,0(%r15)
st %r1,__SF_BACKCHAIN(%r15)
la %r3,0(%r3)
bras %r14,0f
.long ftrace_trace_function
......@@ -38,7 +40,7 @@ _mcount:
stg %r14,112(%r15)
lgr %r1,%r15
aghi %r15,-160
stg %r1,0(%r15)
stg %r1,__SF_BACKCHAIN(%r15)
lgr %r2,%r14
lg %r3,168(%r15)
larl %r14,ftrace_trace_function
......
......@@ -61,7 +61,7 @@ static uint32_t __div64_31(uint64_t *n, uint32_t base)
" clr %0,%3\n"
" jl 0f\n"
" slr %0,%3\n"
" alr %1,%2\n"
" ahi %1,1\n"
"0:\n"
: "+d" (reg2), "+d" (reg3), "=d" (tmp)
: "d" (base), "2" (1UL) : "cc" );
......
......@@ -119,8 +119,6 @@ static size_t __user_copy_pt(unsigned long uaddr, void *kptr,
goto fault;
pfn = pte_pfn(*pte);
if (!pfn_valid(pfn))
goto out;
offset = uaddr & (PAGE_SIZE - 1);
size = min(n - done, PAGE_SIZE - offset);
......@@ -135,7 +133,6 @@ static size_t __user_copy_pt(unsigned long uaddr, void *kptr,
done += size;
uaddr += size;
} while (done < n);
out:
spin_unlock(&mm->page_table_lock);
return n - done;
fault:
......@@ -163,9 +160,6 @@ static unsigned long __dat_user_addr(unsigned long uaddr)
goto fault;
pfn = pte_pfn(*pte);
if (!pfn_valid(pfn))
goto out;
ret = (pfn << PAGE_SHIFT) + (uaddr & (PAGE_SIZE - 1));
out:
return ret;
......@@ -244,11 +238,6 @@ static size_t strnlen_user_pt(size_t count, const char __user *src)
goto fault;
pfn = pte_pfn(*pte);
if (!pfn_valid(pfn)) {
done = -1;
goto out;
}
offset = uaddr & (PAGE_SIZE-1);
addr = (char *)(pfn << PAGE_SHIFT) + offset;
len = min(count - done, PAGE_SIZE - offset);
......@@ -256,7 +245,6 @@ static size_t strnlen_user_pt(size_t count, const char __user *src)
done += len_str;
uaddr += len_str;
} while ((len_str == len) && (done < count));
out:
spin_unlock(&mm->page_table_lock);
return done + 1;
fault:
......@@ -325,12 +313,7 @@ static size_t copy_in_user_pt(size_t n, void __user *to,
}
pfn_from = pte_pfn(*pte_from);
if (!pfn_valid(pfn_from))
goto out;
pfn_to = pte_pfn(*pte_to);
if (!pfn_valid(pfn_to))
goto out;
offset_from = uaddr_from & (PAGE_SIZE-1);
offset_to = uaddr_from & (PAGE_SIZE-1);
offset_max = max(offset_from, offset_to);
......@@ -342,7 +325,6 @@ static size_t copy_in_user_pt(size_t n, void __user *to,
uaddr_from += size;
uaddr_to += size;
} while (done < n);
out:
spin_unlock(&mm->page_table_lock);
return n - done;
fault:
......
......@@ -35,7 +35,7 @@
* Leave an at least ~128 MB hole.
*/
#define MIN_GAP (128*1024*1024)
#define MAX_GAP (TASK_SIZE/6*5)
#define MAX_GAP (STACK_TOP/6*5)
static inline unsigned long mmap_base(void)
{
......@@ -46,7 +46,7 @@ static inline unsigned long mmap_base(void)
else if (gap > MAX_GAP)
gap = MAX_GAP;
return TASK_SIZE - (gap & PAGE_MASK);
return STACK_TOP - (gap & PAGE_MASK);
}
static inline int mmap_is_legacy(void)
......@@ -89,42 +89,58 @@ EXPORT_SYMBOL_GPL(arch_pick_mmap_layout);
#else
int s390_mmap_check(unsigned long addr, unsigned long len)
{
if (!test_thread_flag(TIF_31BIT) &&
len >= TASK_SIZE && TASK_SIZE < (1UL << 53))
return crst_table_upgrade(current->mm, 1UL << 53);
return 0;
}
static unsigned long
s390_get_unmapped_area(struct file *filp, unsigned long addr,
unsigned long len, unsigned long pgoff, unsigned long flags)
{
struct mm_struct *mm = current->mm;
unsigned long area;
int rc;
addr = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
if (addr & ~PAGE_MASK)
return addr;
if (unlikely(mm->context.asce_limit < addr + len)) {
rc = crst_table_upgrade(mm, addr + len);
area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
if (!(area & ~PAGE_MASK))
return area;
if (area == -ENOMEM &&
!test_thread_flag(TIF_31BIT) && TASK_SIZE < (1UL << 53)) {
/* Upgrade the page table to 4 levels and retry. */
rc = crst_table_upgrade(mm, 1UL << 53);
if (rc)
return (unsigned long) rc;
area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
}
return addr;
return area;
}
static unsigned long
s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr0,
s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr,
const unsigned long len, const unsigned long pgoff,
const unsigned long flags)
{
struct mm_struct *mm = current->mm;
unsigned long addr = addr0;
unsigned long area;
int rc;
addr = arch_get_unmapped_area_topdown(filp, addr, len, pgoff, flags);
if (addr & ~PAGE_MASK)
return addr;
if (unlikely(mm->context.asce_limit < addr + len)) {
rc = crst_table_upgrade(mm, addr + len);
area = arch_get_unmapped_area_topdown(filp, addr, len, pgoff, flags);
if (!(area & ~PAGE_MASK))
return area;
if (area == -ENOMEM &&
!test_thread_flag(TIF_31BIT) && TASK_SIZE < (1UL << 53)) {
/* Upgrade the page table to 4 levels and retry. */
rc = crst_table_upgrade(mm, 1UL << 53);
if (rc)
return (unsigned long) rc;
area = arch_get_unmapped_area_topdown(filp, addr, len,
pgoff, flags);
}
return addr;
return area;
}
/*
* This function, called very early during the creation of a new
......
......@@ -117,6 +117,7 @@ int crst_table_upgrade(struct mm_struct *mm, unsigned long limit)
crst_table_init(table, entry);
pgd_populate(mm, (pgd_t *) table, (pud_t *) pgd);
mm->pgd = (pgd_t *) table;
mm->task_size = mm->context.asce_limit;
table = NULL;
}
spin_unlock(&mm->page_table_lock);
......@@ -154,6 +155,7 @@ void crst_table_downgrade(struct mm_struct *mm, unsigned long limit)
BUG();
}
mm->pgd = (pgd_t *) (pgd_val(*pgd) & _REGION_ENTRY_ORIGIN);
mm->task_size = mm->context.asce_limit;
crst_table_free(mm, (unsigned long *) pgd);
}
update_mm(mm, current);
......
......@@ -193,6 +193,9 @@ static int __kprobes can_boost(kprobe_opcode_t *opcodes)
kprobe_opcode_t opcode;
kprobe_opcode_t *orig_opcodes = opcodes;
if (search_exception_tables(opcodes))
return 0; /* Page fault may occur on this address. */
retry:
if (opcodes - orig_opcodes > MAX_INSN_SIZE - 1)
return 0;
......
......@@ -273,30 +273,43 @@ static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin)
* use the TSC value at the transitions to calculate a pretty
* good value for the TSC frequencty.
*/
static inline int pit_expect_msb(unsigned char val)
static inline int pit_expect_msb(unsigned char val, u64 *tscp, unsigned long *deltap)
{
int count = 0;
int count;
u64 tsc = 0;
for (count = 0; count < 50000; count++) {
/* Ignore LSB */
inb(0x42);
if (inb(0x42) != val)
break;
tsc = get_cycles();
}
return count > 50;
*deltap = get_cycles() - tsc;
*tscp = tsc;
/*
* We require _some_ success, but the quality control
* will be based on the error terms on the TSC values.
*/
return count > 5;
}
/*
* How many MSB values do we want to see? We aim for a
* 15ms calibration, which assuming a 2us counter read
* error should give us roughly 150 ppm precision for
* the calibration.
* How many MSB values do we want to see? We aim for
* a maximum error rate of 500ppm (in practice the
* real error is much smaller), but refuse to spend
* more than 25ms on it.
*/
#define QUICK_PIT_MS 15
#define QUICK_PIT_ITERATIONS (QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
#define MAX_QUICK_PIT_MS 25
#define MAX_QUICK_PIT_ITERATIONS (MAX_QUICK_PIT_MS * PIT_TICK_RATE / 1000 / 256)
static unsigned long quick_pit_calibrate(void)
{
int i;
u64 tsc, delta;
unsigned long d1, d2;
/* Set the Gate high, disable speaker */
outb((inb(0x61) & ~0x02) | 0x01, 0x61);
......@@ -315,45 +328,52 @@ static unsigned long quick_pit_calibrate(void)
outb(0xff, 0x42);
outb(0xff, 0x42);
if (pit_expect_msb(0xff)) {
int i;
u64 t1, t2, delta;
unsigned char expect = 0xfe;
/*
* The PIT starts counting at the next edge, so we
* need to delay for a microsecond. The easiest way
* to do that is to just read back the 16-bit counter
* once from the PIT.
*/
inb(0x42);
inb(0x42);
t1 = get_cycles();
for (i = 0; i < QUICK_PIT_ITERATIONS; i++, expect--) {
if (!pit_expect_msb(expect))
goto failed;
}
t2 = get_cycles();
if (pit_expect_msb(0xff, &tsc, &d1)) {
for (i = 1; i <= MAX_QUICK_PIT_ITERATIONS; i++) {
if (!pit_expect_msb(0xff-i, &delta, &d2))
break;
/*
* Make sure we can rely on the second TSC timestamp:
* Iterate until the error is less than 500 ppm
*/
if (!pit_expect_msb(expect))
goto failed;
delta -= tsc;
if (d1+d2 < delta >> 11)
goto success;
}
}
printk("Fast TSC calibration failed\n");
return 0;
success:
/*
* Ok, if we get here, then we've seen the
* MSB of the PIT decrement QUICK_PIT_ITERATIONS
* times, and each MSB had many hits, so we never
* had any sudden jumps.
* MSB of the PIT decrement 'i' times, and the
* error has shrunk to less than 500 ppm.
*
* As a result, we can depend on there not being
* any odd delays anywhere, and the TSC reads are
* reliable.
* reliable (within the error). We also adjust the
* delta to the middle of the error bars, just
* because it looks nicer.
*
* kHz = ticks / time-in-seconds / 1000;
* kHz = (t2 - t1) / (QPI * 256 / PIT_TICK_RATE) / 1000
* kHz = ((t2 - t1) * PIT_TICK_RATE) / (QPI * 256 * 1000)
* kHz = (t2 - t1) / (I * 256 / PIT_TICK_RATE) / 1000
* kHz = ((t2 - t1) * PIT_TICK_RATE) / (I * 256 * 1000)
*/
delta = (t2 - t1)*PIT_TICK_RATE;
do_div(delta, QUICK_PIT_ITERATIONS*256*1000);
delta += (long)(d2 - d1)/2;
delta *= PIT_TICK_RATE;
do_div(delta, i*256*1000);
printk("Fast TSC calibration using PIT\n");
return delta;
}
failed:
return 0;
}
/**
......
......@@ -758,8 +758,7 @@ static int __init acpi_bus_init(void)
acpi_status status = AE_OK;
extern acpi_status acpi_os_initialize1(void);
status = acpi_os_initialize1();
acpi_os_initialize1();
status =
acpi_enable_subsystem(ACPI_NO_HARDWARE_INIT | ACPI_NO_ACPI_ENABLE);
......@@ -769,12 +768,6 @@ static int __init acpi_bus_init(void)
goto error1;
}
if (ACPI_FAILURE(status)) {
printk(KERN_ERR PREFIX
"Unable to initialize ACPI OS objects\n");
goto error1;
}
/*
* ACPI 2.0 requires the EC driver to be loaded and work before
* the EC device is found in the namespace (i.e. before acpi_initialize_objects()
......
......@@ -277,7 +277,7 @@ int acpi_get_node(acpi_handle *handle)
int pxm, node = -1;
pxm = acpi_get_pxm(handle);
if (pxm >= 0)
if (pxm >= 0 && pxm < MAX_PXM_DOMAINS)
node = acpi_map_pxm_to_node(pxm);
return node;
......
......@@ -1317,54 +1317,6 @@ acpi_os_validate_interface (char *interface)
return AE_SUPPORT;
}
#ifdef CONFIG_X86
struct aml_port_desc {
uint start;
uint end;
char* name;
char warned;
};
static struct aml_port_desc aml_invalid_port_list[] = {
{0x20, 0x21, "PIC0", 0},
{0xA0, 0xA1, "PIC1", 0},
{0x4D0, 0x4D1, "ELCR", 0}
};
/*
* valid_aml_io_address()
*
* if valid, return true
* else invalid, warn once, return false
*/
static bool valid_aml_io_address(uint address, uint length)
{
int i;
int entries = sizeof(aml_invalid_port_list) / sizeof(struct aml_port_desc);
for (i = 0; i < entries; ++i) {
if ((address >= aml_invalid_port_list[i].start &&
address <= aml_invalid_port_list[i].end) ||
(address + length >= aml_invalid_port_list[i].start &&
address + length <= aml_invalid_port_list[i].end))
{
if (!aml_invalid_port_list[i].warned)
{
printk(KERN_ERR "ACPI: Denied BIOS AML access"
" to invalid port 0x%x+0x%x (%s)\n",
address, length,
aml_invalid_port_list[i].name);
aml_invalid_port_list[i].warned = 1;
}
return false; /* invalid */
}
}
return true; /* valid */
}
#else
static inline bool valid_aml_io_address(uint address, uint length) { return true; }
#endif
/******************************************************************************
*
* FUNCTION: acpi_os_validate_address
......@@ -1394,8 +1346,6 @@ acpi_os_validate_address (
switch (space_id) {
case ACPI_ADR_SPACE_SYSTEM_IO:
if (!valid_aml_io_address(address, length))
return AE_AML_ILLEGAL_ADDRESS;
case ACPI_ADR_SPACE_SYSTEM_MEMORY:
/* Only interference checks against SystemIO and SytemMemory
are needed */
......
......@@ -378,6 +378,22 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
},
},
{
.callback = init_old_suspend_ordering,
.ident = "Asus Pundit P1-AH2 (M2N8L motherboard)",
.matches = {
DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTek Computer INC."),
DMI_MATCH(DMI_BOARD_NAME, "M2N8L"),
},
},
{
.callback = init_set_sci_en_on_resume,
.ident = "Toshiba Satellite L300",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
},
},
{},
};
#endif /* CONFIG_SUSPEND */
......
......@@ -9,6 +9,7 @@ obj-$(CONFIG_MAC_FLOPPY) += swim3.o
obj-$(CONFIG_BLK_DEV_FD) += floppy.o
obj-$(CONFIG_AMIGA_FLOPPY) += amiflop.o
obj-$(CONFIG_PS3_DISK) += ps3disk.o
obj-$(CONFIG_PS3_VRAM) += ps3vram.o
obj-$(CONFIG_ATARI_FLOPPY) += ataflop.o
obj-$(CONFIG_AMIGA_Z2RAM) += z2ram.o
obj-$(CONFIG_BLK_DEV_RAM) += brd.o
......
......@@ -306,7 +306,7 @@ static int hiddev_open(struct inode *inode, struct file *file)
return 0;
bail:
file->private_data = NULL;
kfree(list->hiddev);
kfree(list);
return res;
}
......@@ -323,7 +323,7 @@ static ssize_t hiddev_write(struct file * file, const char __user * buffer, size
*/
static ssize_t hiddev_read(struct file * file, char __user * buffer, size_t count, loff_t *ppos)
{
DECLARE_WAITQUEUE(wait, current);
DEFINE_WAIT(wait);
struct hiddev_list *list = file->private_data;
int event_size;
int retval;
......
......@@ -60,6 +60,7 @@ struct dm_crypt_io {
};
struct dm_crypt_request {
struct convert_context *ctx;
struct scatterlist sg_in;
struct scatterlist sg_out;
};
......@@ -335,6 +336,18 @@ static void crypt_convert_init(struct crypt_config *cc,
init_completion(&ctx->restart);
}
static struct dm_crypt_request *dmreq_of_req(struct crypt_config *cc,
struct ablkcipher_request *req)
{
return (struct dm_crypt_request *)((char *)req + cc->dmreq_start);
}
static struct ablkcipher_request *req_of_dmreq(struct crypt_config *cc,
struct dm_crypt_request *dmreq)
{
return (struct ablkcipher_request *)((char *)dmreq - cc->dmreq_start);
}
static int crypt_convert_block(struct crypt_config *cc,
struct convert_context *ctx,
struct ablkcipher_request *req)
......@@ -345,10 +358,11 @@ static int crypt_convert_block(struct crypt_config *cc,
u8 *iv;
int r = 0;
dmreq = (struct dm_crypt_request *)((char *)req + cc->dmreq_start);
dmreq = dmreq_of_req(cc, req);
iv = (u8 *)ALIGN((unsigned long)(dmreq + 1),
crypto_ablkcipher_alignmask(cc->tfm) + 1);
dmreq->ctx = ctx;
sg_init_table(&dmreq->sg_in, 1);
sg_set_page(&dmreq->sg_in, bv_in->bv_page, 1 << SECTOR_SHIFT,
bv_in->bv_offset + ctx->offset_in);
......@@ -396,7 +410,8 @@ static void crypt_alloc_req(struct crypt_config *cc,
ablkcipher_request_set_tfm(cc->req, cc->tfm);
ablkcipher_request_set_callback(cc->req, CRYPTO_TFM_REQ_MAY_BACKLOG |
CRYPTO_TFM_REQ_MAY_SLEEP,
kcryptd_async_done, ctx);
kcryptd_async_done,
dmreq_of_req(cc, cc->req));
}
/*
......@@ -553,19 +568,22 @@ static void crypt_inc_pending(struct dm_crypt_io *io)
static void crypt_dec_pending(struct dm_crypt_io *io)
{
struct crypt_config *cc = io->target->private;
struct bio *base_bio = io->base_bio;
struct dm_crypt_io *base_io = io->base_io;
int error = io->error;
if (!atomic_dec_and_test(&io->pending))
return;
if (likely(!io->base_io))
bio_endio(io->base_bio, io->error);
mempool_free(io, cc->io_pool);
if (likely(!base_io))
bio_endio(base_bio, error);
else {
if (io->error && !io->base_io->error)
io->base_io->error = io->error;
crypt_dec_pending(io->base_io);
if (error && !base_io->error)
base_io->error = error;
crypt_dec_pending(base_io);
}
mempool_free(io, cc->io_pool);
}
/*
......@@ -821,7 +839,8 @@ static void kcryptd_crypt_read_convert(struct dm_crypt_io *io)
static void kcryptd_async_done(struct crypto_async_request *async_req,
int error)
{
struct convert_context *ctx = async_req->data;
struct dm_crypt_request *dmreq = async_req->data;
struct convert_context *ctx = dmreq->ctx;
struct dm_crypt_io *io = container_of(ctx, struct dm_crypt_io, ctx);
struct crypt_config *cc = io->target->private;
......@@ -830,7 +849,7 @@ static void kcryptd_async_done(struct crypto_async_request *async_req,
return;
}
mempool_free(ablkcipher_request_cast(async_req), cc->req_pool);
mempool_free(req_of_dmreq(cc, dmreq), cc->req_pool);
if (!atomic_dec_and_test(&ctx->pending))
return;
......
......@@ -292,6 +292,8 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
(PAGE_SIZE >> SECTOR_SHIFT));
num_bvecs = 1 + min_t(int, bio_get_nr_vecs(where->bdev),
num_bvecs);
if (unlikely(num_bvecs > BIO_MAX_PAGES))
num_bvecs = BIO_MAX_PAGES;
bio = bio_alloc_bioset(GFP_NOIO, num_bvecs, io->client->bios);
bio->bi_sector = where->sector + (where->count - remaining);
bio->bi_bdev = where->bdev;
......
......@@ -704,7 +704,8 @@ static int dev_rename(struct dm_ioctl *param, size_t param_size)
char *new_name = (char *) param + param->data_start;
if (new_name < param->data ||
invalid_str(new_name, (void *) param + param_size)) {
invalid_str(new_name, (void *) param + param_size) ||
strlen(new_name) > DM_NAME_LEN - 1) {
DMWARN("Invalid new logical volume name supplied.");
return -EINVAL;
}
......@@ -1063,7 +1064,7 @@ static int table_load(struct dm_ioctl *param, size_t param_size)
r = populate_table(t, param, param_size);
if (r) {
dm_table_put(t);
dm_table_destroy(t);
goto out;
}
......@@ -1071,7 +1072,7 @@ static int table_load(struct dm_ioctl *param, size_t param_size)
hc = dm_get_mdptr(md);
if (!hc || hc->md != md) {
DMWARN("device has been removed from the dev hash table.");
dm_table_put(t);
dm_table_destroy(t);
up_write(&_hash_lock);
r = -ENXIO;
goto out;
......
......@@ -525,9 +525,12 @@ static int __noflush_suspending(struct mapped_device *md)
static void dec_pending(struct dm_io *io, int error)
{
unsigned long flags;
int io_error;
struct bio *bio;
struct mapped_device *md = io->md;
/* Push-back supersedes any I/O errors */
if (error && !(io->error > 0 && __noflush_suspending(io->md)))
if (error && !(io->error > 0 && __noflush_suspending(md)))
io->error = error;
if (atomic_dec_and_test(&io->io_count)) {
......@@ -537,24 +540,27 @@ static void dec_pending(struct dm_io *io, int error)
* This must be handled before the sleeper on
* suspend queue merges the pushback list.
*/
spin_lock_irqsave(&io->md->pushback_lock, flags);
if (__noflush_suspending(io->md))
bio_list_add(&io->md->pushback, io->bio);
spin_lock_irqsave(&md->pushback_lock, flags);
if (__noflush_suspending(md))
bio_list_add(&md->pushback, io->bio);
else
/* noflush suspend was interrupted. */
io->error = -EIO;
spin_unlock_irqrestore(&io->md->pushback_lock, flags);
spin_unlock_irqrestore(&md->pushback_lock, flags);
}
end_io_acct(io);
if (io->error != DM_ENDIO_REQUEUE) {
trace_block_bio_complete(io->md->queue, io->bio);
io_error = io->error;
bio = io->bio;
bio_endio(io->bio, io->error);
}
free_io(md, io);
free_io(io->md, io);
if (io_error != DM_ENDIO_REQUEUE) {
trace_block_bio_complete(md->queue, bio);
bio_endio(bio, io_error);
}
}
}
......@@ -562,6 +568,7 @@ static void clone_endio(struct bio *bio, int error)
{
int r = 0;
struct dm_target_io *tio = bio->bi_private;
struct dm_io *io = tio->io;
struct mapped_device *md = tio->io->md;
dm_endio_fn endio = tio->ti->type->end_io;
......@@ -585,15 +592,14 @@ static void clone_endio(struct bio *bio, int error)
}
}
dec_pending(tio->io, error);
/*
* Store md for cleanup instead of tio which is about to get freed.
*/
bio->bi_private = md->bs;
bio_put(bio);
free_tio(md, tio);
bio_put(bio);
dec_pending(io, error);
}
static sector_t max_io_len(struct mapped_device *md,
......
......@@ -120,13 +120,6 @@ config MTD_PHRAM
doesn't have access to, memory beyond the mem=xxx limit, nvram,
memory on the video card, etc...
config MTD_PS3VRAM
tristate "PS3 video RAM"
depends on FB_PS3
help
This driver allows you to use excess PS3 video RAM as volatile
storage or system swap.
config MTD_LART
tristate "28F160xx flash driver for LART"
depends on SA1100_LART
......
......@@ -16,4 +16,3 @@ obj-$(CONFIG_MTD_LART) += lart.o
obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o
obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o
obj-$(CONFIG_MTD_M25P80) += m25p80.o
obj-$(CONFIG_MTD_PS3VRAM) += ps3vram.o
......@@ -1040,6 +1040,17 @@ config NI65
To compile this driver as a module, choose M here. The module
will be called ni65.
config DNET
tristate "Dave ethernet support (DNET)"
depends on NET_ETHERNET
select PHYLIB
help
The Dave ethernet interface (DNET) is found on Qong Board FPGA.
Say Y to include support for the DNET chip.
To compile this driver as a module, choose M here: the module
will be called dnet.
source "drivers/net/tulip/Kconfig"
config AT1700
......@@ -2619,6 +2630,8 @@ config QLGE
source "drivers/net/sfc/Kconfig"
source "drivers/net/benet/Kconfig"
endif # NETDEV_10000
source "drivers/net/tokenring/Kconfig"
......
......@@ -22,6 +22,7 @@ obj-$(CONFIG_GIANFAR) += gianfar_driver.o
obj-$(CONFIG_TEHUTI) += tehuti.o
obj-$(CONFIG_ENIC) += enic/
obj-$(CONFIG_JME) += jme.o
obj-$(CONFIG_BE2NET) += benet/
gianfar_driver-objs := gianfar.o \
gianfar_ethtool.o \
......@@ -231,6 +232,7 @@ obj-$(CONFIG_ENC28J60) += enc28j60.o
obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o
obj-$(CONFIG_DNET) += dnet.o
obj-$(CONFIG_MACB) += macb.o
obj-$(CONFIG_ARM) += arm/
......
config BE2NET
tristate "ServerEngines' 10Gbps NIC - BladeEngine 2"
depends on PCI && INET
select INET_LRO
help
This driver implements the NIC functionality for ServerEngines'
10Gbps network adapter - BladeEngine 2.
#
# Makefile to build the network driver for ServerEngine's BladeEngine.
#
obj-$(CONFIG_BE2NET) += be2net.o
be2net-y := be_main.o be_cmds.o be_ethtool.o
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/*
* Copyright (C) 2005 - 2009 ServerEngines
* All rights reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License version 2
* as published by the Free Software Foundation. The full GNU General
* Public License is included in this distribution in the file called COPYING.
*
* Contact Information:
* linux-drivers@serverengines.com
*
* ServerEngines
* 209 N. Fair Oaks Ave
* Sunnyvale, CA 94085
*/
/********* Mailbox door bell *************/
/* Used for driver communication with the FW.
* The software must write this register twice to post any command. First,
* it writes the register with hi=1 and the upper bits of the physical address
* for the MAILBOX structure. Software must poll the ready bit until this
* is acknowledged. Then, sotware writes the register with hi=0 with the lower
* bits in the address. It must poll the ready bit until the command is
* complete. Upon completion, the MAILBOX will contain a valid completion
* queue entry.
*/
#define MPU_MAILBOX_DB_OFFSET 0x160
#define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */
#define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */
#define MPU_EP_CONTROL 0
/********** MPU semphore ******************/
#define MPU_EP_SEMAPHORE_OFFSET 0xac
#define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF
#define EP_SEMAPHORE_POST_ERR_MASK 0x1
#define EP_SEMAPHORE_POST_ERR_SHIFT 31
/* MPU semphore POST stage values */
#define POST_STAGE_AWAITING_HOST_RDY 0x1 /* FW awaiting goahead from host */
#define POST_STAGE_HOST_RDY 0x2 /* Host has given go-ahed to FW */
#define POST_STAGE_BE_RESET 0x3 /* Host wants to reset chip */
#define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */
/********* Memory BAR register ************/
#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
/* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
* Disable" may still globally block interrupts in addition to individual
* interrupt masks; a mechanism for the device driver to block all interrupts
* atomically without having to arbitrate for the PCI Interrupt Disable bit
* with the OS.
*/
#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */
/* PCI physical function number */
#define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK 0x7 /* bits 26 - 28 */
#define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT 26
/********* Event Q door bell *************/
#define DB_EQ_OFFSET DB_CQ_OFFSET
#define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
/* Clear the interrupt for this eq */
#define DB_EQ_CLR_SHIFT (9) /* bit 9 */
/* Must be 1 */
#define DB_EQ_EVNT_SHIFT (10) /* bit 10 */
/* Number of event entries processed */
#define DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
/* Rearm bit */
#define DB_EQ_REARM_SHIFT (29) /* bit 29 */
/********* Compl Q door bell *************/
#define DB_CQ_OFFSET 0x120
#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
/* Number of event entries processed */
#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
/* Rearm bit */
#define DB_CQ_REARM_SHIFT (29) /* bit 29 */
/********** TX ULP door bell *************/
#define DB_TXULP1_OFFSET 0x60
#define DB_TXULP_RING_ID_MASK 0x7FF /* bits 0 - 10 */
/* Number of tx entries posted */
#define DB_TXULP_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */
#define DB_TXULP_NUM_POSTED_MASK 0x3FFF /* bits 16 - 29 */
/********** RQ(erx) door bell ************/
#define DB_RQ_OFFSET 0x100
#define DB_RQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
/* Number of rx frags posted */
#define DB_RQ_NUM_POSTED_SHIFT (24) /* bits 24 - 31 */
/*
* BE descriptors: host memory data structures whose formats
* are hardwired in BE silicon.
*/
/* Event Queue Descriptor */
#define EQ_ENTRY_VALID_MASK 0x1 /* bit 0 */
#define EQ_ENTRY_RES_ID_MASK 0xFFFF /* bits 16 - 31 */
#define EQ_ENTRY_RES_ID_SHIFT 16
struct be_eq_entry {
u32 evt;
};
/* TX Queue Descriptor */
#define ETH_WRB_FRAG_LEN_MASK 0xFFFF
struct be_eth_wrb {
u32 frag_pa_hi; /* dword 0 */
u32 frag_pa_lo; /* dword 1 */
u32 rsvd0; /* dword 2 */
u32 frag_len; /* dword 3: bits 0 - 15 */
} __packed;
/* Pseudo amap definition for eth_hdr_wrb in which each bit of the
* actual structure is defined as a byte : used to calculate
* offset/shift/mask of each field */
struct amap_eth_hdr_wrb {
u8 rsvd0[32]; /* dword 0 */
u8 rsvd1[32]; /* dword 1 */
u8 complete; /* dword 2 */
u8 event;
u8 crc;
u8 forward;
u8 ipsec;
u8 mgmt;
u8 ipcs;
u8 udpcs;
u8 tcpcs;
u8 lso;
u8 vlan;
u8 gso[2];
u8 num_wrb[5];
u8 lso_mss[14];
u8 len[16]; /* dword 3 */
u8 vlan_tag[16];
} __packed;
struct be_eth_hdr_wrb {
u32 dw[4];
};
/* TX Compl Queue Descriptor */
/* Pseudo amap definition for eth_tx_compl in which each bit of the
* actual structure is defined as a byte: used to calculate
* offset/shift/mask of each field */
struct amap_eth_tx_compl {
u8 wrb_index[16]; /* dword 0 */
u8 ct[2]; /* dword 0 */
u8 port[2]; /* dword 0 */
u8 rsvd0[8]; /* dword 0 */
u8 status[4]; /* dword 0 */
u8 user_bytes[16]; /* dword 1 */
u8 nwh_bytes[8]; /* dword 1 */
u8 lso; /* dword 1 */
u8 cast_enc[2]; /* dword 1 */
u8 rsvd1[5]; /* dword 1 */
u8 rsvd2[32]; /* dword 2 */
u8 pkts[16]; /* dword 3 */
u8 ringid[11]; /* dword 3 */
u8 hash_val[4]; /* dword 3 */
u8 valid; /* dword 3 */
} __packed;
struct be_eth_tx_compl {
u32 dw[4];
};
/* RX Queue Descriptor */
struct be_eth_rx_d {
u32 fragpa_hi;
u32 fragpa_lo;
};
/* RX Compl Queue Descriptor */
/* Pseudo amap definition for eth_rx_compl in which each bit of the
* actual structure is defined as a byte: used to calculate
* offset/shift/mask of each field */
struct amap_eth_rx_compl {
u8 vlan_tag[16]; /* dword 0 */
u8 pktsize[14]; /* dword 0 */
u8 port; /* dword 0 */
u8 ip_opt; /* dword 0 */
u8 err; /* dword 1 */
u8 rsshp; /* dword 1 */
u8 ipf; /* dword 1 */
u8 tcpf; /* dword 1 */
u8 udpf; /* dword 1 */
u8 ipcksm; /* dword 1 */
u8 l4_cksm; /* dword 1 */
u8 ip_version; /* dword 1 */
u8 macdst[6]; /* dword 1 */
u8 vtp; /* dword 1 */
u8 rsvd0; /* dword 1 */
u8 fragndx[10]; /* dword 1 */
u8 ct[2]; /* dword 1 */
u8 sw; /* dword 1 */
u8 numfrags[3]; /* dword 1 */
u8 rss_flush; /* dword 2 */
u8 cast_enc[2]; /* dword 2 */
u8 qnq; /* dword 2 */
u8 rss_bank; /* dword 2 */
u8 rsvd1[23]; /* dword 2 */
u8 lro_pkt; /* dword 2 */
u8 rsvd2[2]; /* dword 2 */
u8 valid; /* dword 2 */
u8 rsshash[32]; /* dword 3 */
} __packed;
struct be_eth_rx_compl {
u32 dw[4];
};
This diff is collapsed.
......@@ -152,7 +152,7 @@ struct sw_rx_page {
#define PAGES_PER_SGE (1 << PAGES_PER_SGE_SHIFT)
#define SGE_PAGE_SIZE PAGE_SIZE
#define SGE_PAGE_SHIFT PAGE_SHIFT
#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN(addr)
#define SGE_PAGE_ALIGN(addr) PAGE_ALIGN((typeof(PAGE_SIZE))addr)
#define BCM_RX_ETH_PAYLOAD_ALIGN 64
......
......@@ -150,7 +150,6 @@ static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data,
static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
{
#ifdef USE_DMAE
int offset = 0;
if (bp->dmae_ready) {
......@@ -164,9 +163,6 @@ static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
addr + offset, len);
} else
bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
#else
bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
#endif
}
static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
......
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......@@ -2594,6 +2594,9 @@ static int __devinit emac_init_config(struct emac_instance *dev)
if (of_device_is_compatible(np, "ibm,emac-460ex") ||
of_device_is_compatible(np, "ibm,emac-460gt"))
dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;
if (of_device_is_compatible(np, "ibm,emac-405ex") ||
of_device_is_compatible(np, "ibm,emac-405exr"))
dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
} else if (of_device_is_compatible(np, "ibm,emac4")) {
dev->features |= EMAC_FTR_EMAC4;
if (of_device_is_compatible(np, "ibm,emac-440gx"))
......
......@@ -1023,11 +1023,10 @@ static int __devinit igb_probe(struct pci_dev *pdev,
struct net_device *netdev;
struct igb_adapter *adapter;
struct e1000_hw *hw;
struct pci_dev *us_dev;
const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
unsigned long mmio_start, mmio_len;
int i, err, pci_using_dac, pos;
u16 eeprom_data = 0, state = 0;
int i, err, pci_using_dac;
u16 eeprom_data = 0;
u16 eeprom_apme_mask = IGB_EEPROM_APME;
u32 part_num;
int bars, need_ioport;
......@@ -1062,27 +1061,6 @@ static int __devinit igb_probe(struct pci_dev *pdev,
}
}
/* 82575 requires that the pci-e link partner disable the L0s state */
switch (pdev->device) {
case E1000_DEV_ID_82575EB_COPPER:
case E1000_DEV_ID_82575EB_FIBER_SERDES:
case E1000_DEV_ID_82575GB_QUAD_COPPER:
us_dev = pdev->bus->self;
pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
if (pos) {
pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
&state);
state &= ~PCIE_LINK_STATE_L0S;
pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
state);
dev_info(&pdev->dev,
"Disabling ASPM L0s upstream switch port %s\n",
pci_name(us_dev));
}
default:
break;
}
err = pci_request_selected_regions(pdev, bars, igb_driver_name);
if (err)
goto err_pci_reg;
......
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