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Commit b481de9c authored by Zhu Yi's avatar Zhu Yi Committed by David S. Miller
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[IWLWIFI]: add iwlwifi wireless drivers 

This patch adds the mac80211 based wireless drivers for the Intel
PRO/Wireless 3945ABG/BG Network Connection and Intel Wireless WiFi
Link AGN (4965) adapters.

[ Move driver into it's own directory -DaveM ]
Signed-off-by: default avatarZhu Yi <yi.zhu@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 75388acd
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MAINTAINERS
View file @ b481de9c
......@@ -2080,6 +2080,15 @@ L: http://lists.sourceforge.net/mailman/listinfo/ipw2100-devel
W: http://ipw2200.sourceforge.net
S: Supported
INTEL WIRELESS WIFI LINK (iwlwifi)
P: Zhu Yi
M: yi.zhu@intel.com
L: linux-wireless@vger.kernel.org
L: ipw3945-devel@lists.sourceforge.net
W: http://intellinuxwireless.org
T: git git://intellinuxwireless.org/repos/iwlwifi
S: Supported
IOC3 ETHERNET DRIVER
P: Ralf Baechle
M: ralf@linux-mips.org
......
drivers/net/wireless/Kconfig
View file @ b481de9c
......@@ -577,6 +577,7 @@ config ADM8211
Thanks to Infineon-ADMtek for their support of this driver.
source "drivers/net/wireless/iwlwifi/Kconfig"
source "drivers/net/wireless/hostap/Kconfig"
source "drivers/net/wireless/bcm43xx/Kconfig"
source "drivers/net/wireless/b43/Kconfig"
......
drivers/net/wireless/Makefile
View file @ b481de9c
......@@ -51,3 +51,5 @@ rtl8187-objs := rtl8187_dev.o rtl8187_rtl8225.o
obj-$(CONFIG_RTL8187) += rtl8187.o
obj-$(CONFIG_ADM8211) += adm8211.o
obj-$(CONFIG_IWLWIFI) += iwlwifi/
drivers/net/wireless/iwlwifi/Kconfig 0 → 100644
View file @ b481de9c
config IWLWIFI
bool "Intel Wireless WiFi Link Drivers"
depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
select FW_LOADER
default n
---help---
Select to enable drivers based on the iwlwifi project. This
project provides a common foundation for Intel's wireless
drivers designed to use the mac80211 subsystem.
See <file:Documentation/networking/README.iwlwifi> for
information on the capabilities currently enabled in this
driver and for tips for debugging issues and problems.
config IWLWIFI_DEBUG
bool "Enable full debugging output in iwlwifi drivers"
depends on IWLWIFI
default y
---help---
This option will enable debug tracing output for the iwlwifi
drivers.
This will result in the kernel module being ~100k larger. You can
control which debug output is sent to the kernel log by setting the
value in
/sys/bus/pci/drivers/${DRIVER}/debug_level
This entry will only exist if this option is enabled.
To set a value, simply echo an 8-byte hex value to the same file:
% echo 0x43fff > /sys/bus/pci/drivers/${DRIVER}/debug_level
You can find the list of debug mask values in:
drivers/net/wireless/mac80211/iwlwifi/iwl-debug.h
If this is your first time using this driver, you should say Y here
as the debug information can assist others in helping you resolve
any problems you may encounter.
config IWLWIFI_SENSITIVITY
bool "Enable Sensitivity Calibration in iwlwifi drivers"
depends on IWLWIFI
default y
---help---
This option will enable sensitivity calibration for the iwlwifi
drivers.
config IWLWIFI_SPECTRUM_MEASUREMENT
bool "Enable Spectrum Measurement in iwlwifi drivers"
depends on IWLWIFI
default y
---help---
This option will enable spectrum measurement for the iwlwifi drivers.
config IWLWIFI_QOS
bool "Enable Wireless QoS in iwlwifi drivers"
depends on IWLWIFI
default y
---help---
This option will enable wireless quality of service (QoS) for the
iwlwifi drivers.
config IWLWIFI_HT
bool "Enable 802.11n HT features in iwlwifi drivers"
depends on EXPERIMENTAL
depends on IWLWIFI && MAC80211_HT
default n
---help---
This option enables IEEE 802.11n High Throughput features
for the iwlwifi drivers.
config IWL4965
tristate "Intel Wireless WiFi 4965AGN"
depends on m && IWLWIFI && EXPERIMENTAL
default m
---help---
Select to build the driver supporting the:
Intel Wireless WiFi Link 4965AGN
This driver uses the kernel's mac80211 subsystem.
See <file:Documentation/networking/README.iwlwifi> for
information on the capabilities currently enabled in this
driver and for tips for debugging any issues or problems.
In order to use this driver, you will need a microcode (uCode)
image for it. You can obtain the microcode from:
<http://intellinuxwireless.org/>.
See the above referenced README.iwlwifi for information on where
to install the microcode images.
If you want to compile the driver as a module ( = code which can be
inserted in and remvoed from the running kernel whenever you want),
say M here and read <file:Documentation/modules.txt>. The module
will be called iwl4965.ko.
config IWL3945
tristate "Intel PRO/Wireless 3945ABG/BG Network Connection"
depends on m && IWLWIFI && EXPERIMENTAL
default m
---help---
Select to build the driver supporting the:
Intel PRO/Wireless 3945ABG/BG Network Connection
This driver uses the kernel's mac80211 subsystem.
See <file:Documentation/networking/README.iwlwifi> for
information on the capabilities currently enabled in this
driver and for tips for debugging any issues or problems.
In order to use this driver, you will need a microcode (uCode)
image for it. You can obtain the microcode from:
<http://intellinuxwireless.org/>.
See the above referenced README.iwlwifi for information on where
to install the microcode images.
If you want to compile the driver as a module ( = code which can be
inserted in and remvoed from the running kernel whenever you want),
say M here and read <file:Documentation/modules.txt>. The module
will be called iwl3945.ko.
drivers/net/wireless/iwlwifi/Makefile 0 → 100644
View file @ b481de9c
obj-$(CONFIG_IWL3945) += iwl3945.o
iwl3945-objs = iwl3945-base.o iwl-3945.o iwl-3945-rs.o
CFLAGS_iwl3945-base.o = -DIWL=3945
CFLAGS_iwl-3945.o = -DIWL=3945
CFLAGS_iwl-3945-rs.o = -DIWL=3945
obj-$(CONFIG_IWL4965) += iwl4965.o
iwl4965-objs = iwl4965-base.o iwl-4965.o iwl-4965-rs.o
CFLAGS_iwl4965-base.o = -DIWL=4965
CFLAGS_iwl-4965.o = -DIWL=4965
CFLAGS_iwl-4965-rs.o = -DIWL=4965
drivers/net/wireless/iwlwifi/iwl-3945-hw.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU Geeral Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
* USA
*
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
* BSD LICENSE
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef __iwl_3945_hw__
#define __iwl_3945_hw__
#define IWL_RX_BUF_SIZE 3000
/* card static random access memory (SRAM) for processor data and instructs */
#define ALM_RTC_INST_UPPER_BOUND (0x014000)
#define ALM_RTC_DATA_UPPER_BOUND (0x808000)
#define ALM_RTC_INST_SIZE (ALM_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
#define ALM_RTC_DATA_SIZE (ALM_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
#define IWL_MAX_BSM_SIZE ALM_RTC_INST_SIZE
#define IWL_MAX_INST_SIZE ALM_RTC_INST_SIZE
#define IWL_MAX_DATA_SIZE ALM_RTC_DATA_SIZE
#define IWL_MAX_NUM_QUEUES 8
static inline int iwl_hw_valid_rtc_data_addr(u32 addr)
{
return (addr >= RTC_DATA_LOWER_BOUND) &&
(addr < ALM_RTC_DATA_UPPER_BOUND);
}
/* Base physical address of iwl_shared is provided to FH_TSSR_CBB_BASE
* and &iwl_shared.rx_read_ptr[0] is provided to FH_RCSR_RPTR_ADDR(0) */
struct iwl_shared {
__le32 tx_base_ptr[8];
__le32 rx_read_ptr[3];
} __attribute__ ((packed));
struct iwl_tfd_frame_data {
__le32 addr;
__le32 len;
} __attribute__ ((packed));
struct iwl_tfd_frame {
__le32 control_flags;
struct iwl_tfd_frame_data pa[4];
u8 reserved[28];
} __attribute__ ((packed));
static inline u8 iwl_hw_get_rate(__le16 rate_n_flags)
{
return le16_to_cpu(rate_n_flags) & 0xFF;
}
static inline u16 iwl_hw_get_rate_n_flags(__le16 rate_n_flags)
{
return le16_to_cpu(rate_n_flags);
}
static inline __le16 iwl_hw_set_rate_n_flags(u8 rate, u16 flags)
{
return cpu_to_le16((u16)rate|flags);
}
#endif
drivers/net/wireless/iwlwifi/iwl-3945-rs.c 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/skbuff.h>
#include <linux/wireless.h>
#include <net/mac80211.h>
#include <net/ieee80211.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
#include <linux/workqueue.h>
#include <net/mac80211.h>
#include <linux/wireless.h>
#include "../net/mac80211/ieee80211_rate.h"
#include "iwlwifi.h"
#define RS_NAME "iwl-3945-rs"
struct iwl_rate_scale_data {
u64 data;
s32 success_counter;
s32 success_ratio;
s32 counter;
s32 average_tpt;
unsigned long stamp;
};
struct iwl_rate_scale_priv {
spinlock_t lock;
s32 *expected_tpt;
unsigned long last_partial_flush;
unsigned long last_flush;
u32 flush_time;
u32 last_tx_packets;
u32 tx_packets;
u8 tgg;
u8 flush_pending;
u8 start_rate;
u8 ibss_sta_added;
struct timer_list rate_scale_flush;
struct iwl_rate_scale_data win[IWL_RATE_COUNT];
};
static s32 iwl_expected_tpt_g[IWL_RATE_COUNT] = {
0, 0, 76, 104, 130, 168, 191, 202, 7, 13, 35, 58
};
static s32 iwl_expected_tpt_g_prot[IWL_RATE_COUNT] = {
0, 0, 0, 80, 93, 113, 123, 125, 7, 13, 35, 58
};
static s32 iwl_expected_tpt_a[IWL_RATE_COUNT] = {
40, 57, 72, 98, 121, 154, 177, 186, 0, 0, 0, 0
};
static s32 iwl_expected_tpt_b[IWL_RATE_COUNT] = {
0, 0, 0, 0, 0, 0, 0, 0, 7, 13, 35, 58
};
struct iwl_tpt_entry {
s8 min_rssi;
u8 index;
};
static struct iwl_tpt_entry iwl_tpt_table_a[] = {
{-60, IWL_RATE_54M_INDEX},
{-64, IWL_RATE_48M_INDEX},
{-72, IWL_RATE_36M_INDEX},
{-80, IWL_RATE_24M_INDEX},
{-84, IWL_RATE_18M_INDEX},
{-85, IWL_RATE_12M_INDEX},
{-87, IWL_RATE_9M_INDEX},
{-89, IWL_RATE_6M_INDEX}
};
static struct iwl_tpt_entry iwl_tpt_table_b[] = {
{-86, IWL_RATE_11M_INDEX},
{-88, IWL_RATE_5M_INDEX},
{-90, IWL_RATE_2M_INDEX},
{-92, IWL_RATE_1M_INDEX}
};
static struct iwl_tpt_entry iwl_tpt_table_g[] = {
{-60, IWL_RATE_54M_INDEX},
{-64, IWL_RATE_48M_INDEX},
{-68, IWL_RATE_36M_INDEX},
{-80, IWL_RATE_24M_INDEX},
{-84, IWL_RATE_18M_INDEX},
{-85, IWL_RATE_12M_INDEX},
{-86, IWL_RATE_11M_INDEX},
{-88, IWL_RATE_5M_INDEX},
{-90, IWL_RATE_2M_INDEX},
{-92, IWL_RATE_1M_INDEX}
};
#define IWL_RATE_MAX_WINDOW 62
#define IWL_RATE_FLUSH (3*HZ/10)
#define IWL_RATE_WIN_FLUSH (HZ/2)
#define IWL_RATE_HIGH_TH 11520
#define IWL_RATE_MIN_FAILURE_TH 8
#define IWL_RATE_MIN_SUCCESS_TH 8
#define IWL_RATE_DECREASE_TH 1920
static u8 iwl_get_rate_index_by_rssi(s32 rssi, u8 mode)
{
u32 index = 0;
u32 table_size = 0;
struct iwl_tpt_entry *tpt_table = NULL;
if ((rssi < IWL_MIN_RSSI_VAL) || (rssi > IWL_MAX_RSSI_VAL))
rssi = IWL_MIN_RSSI_VAL;
switch (mode) {
case MODE_IEEE80211G:
tpt_table = iwl_tpt_table_g;
table_size = ARRAY_SIZE(iwl_tpt_table_g);
break;
case MODE_IEEE80211A:
tpt_table = iwl_tpt_table_a;
table_size = ARRAY_SIZE(iwl_tpt_table_a);
break;
default:
case MODE_IEEE80211B:
tpt_table = iwl_tpt_table_b;
table_size = ARRAY_SIZE(iwl_tpt_table_b);
break;
}
while ((index < table_size) && (rssi < tpt_table[index].min_rssi))
index++;
index = min(index, (table_size - 1));
return tpt_table[index].index;
}
static void iwl_clear_window(struct iwl_rate_scale_data *window)
{
window->data = 0;
window->success_counter = 0;
window->success_ratio = IWL_INVALID_VALUE;
window->counter = 0;
window->average_tpt = IWL_INVALID_VALUE;
window->stamp = 0;
}
/**
* iwl_rate_scale_flush_windows - flush out the rate scale windows
*
* Returns the number of windows that have gathered data but were
* not flushed. If there were any that were not flushed, then
* reschedule the rate flushing routine.
*/
static int iwl_rate_scale_flush_windows(struct iwl_rate_scale_priv *rs_priv)
{
int unflushed = 0;
int i;
unsigned long flags;
/*
* For each rate, if we have collected data on that rate
* and it has been more than IWL_RATE_WIN_FLUSH
* since we flushed, clear out the gathered statistics
*/
for (i = 0; i < IWL_RATE_COUNT; i++) {
if (!rs_priv->win[i].counter)
continue;
spin_lock_irqsave(&rs_priv->lock, flags);
if (time_after(jiffies, rs_priv->win[i].stamp +
IWL_RATE_WIN_FLUSH)) {
IWL_DEBUG_RATE("flushing %d samples of rate "
"index %d\n",
rs_priv->win[i].counter, i);
iwl_clear_window(&rs_priv->win[i]);
} else
unflushed++;
spin_unlock_irqrestore(&rs_priv->lock, flags);
}
return unflushed;
}
#define IWL_RATE_FLUSH_MAX 5000 /* msec */
#define IWL_RATE_FLUSH_MIN 50 /* msec */
static void iwl_bg_rate_scale_flush(unsigned long data)
{
struct iwl_rate_scale_priv *rs_priv = (void *)data;
int unflushed = 0;
unsigned long flags;
u32 packet_count, duration, pps;
IWL_DEBUG_RATE("enter\n");
unflushed = iwl_rate_scale_flush_windows(rs_priv);
spin_lock_irqsave(&rs_priv->lock, flags);
rs_priv->flush_pending = 0;
/* Number of packets Rx'd since last time this timer ran */
packet_count = (rs_priv->tx_packets - rs_priv->last_tx_packets) + 1;
rs_priv->last_tx_packets = rs_priv->tx_packets + 1;
if (unflushed) {
duration =
jiffies_to_msecs(jiffies - rs_priv->last_partial_flush);
/* duration = jiffies_to_msecs(rs_priv->flush_time); */
IWL_DEBUG_RATE("Tx'd %d packets in %dms\n",
packet_count, duration);
/* Determine packets per second */
if (duration)
pps = (packet_count * 1000) / duration;
else
pps = 0;
if (pps) {
duration = IWL_RATE_FLUSH_MAX / pps;
if (duration < IWL_RATE_FLUSH_MIN)
duration = IWL_RATE_FLUSH_MIN;
} else
duration = IWL_RATE_FLUSH_MAX;
rs_priv->flush_time = msecs_to_jiffies(duration);
IWL_DEBUG_RATE("new flush period: %d msec ave %d\n",
duration, packet_count);
mod_timer(&rs_priv->rate_scale_flush, jiffies +
rs_priv->flush_time);
rs_priv->last_partial_flush = jiffies;
}
/* If there weren't any unflushed entries, we don't schedule the timer
* to run again */
rs_priv->last_flush = jiffies;
spin_unlock_irqrestore(&rs_priv->lock, flags);
IWL_DEBUG_RATE("leave\n");
}
/**
* iwl_collect_tx_data - Update the success/failure sliding window
*
* We keep a sliding window of the last 64 packets transmitted
* at this rate. window->data contains the bitmask of successful
* packets.
*/
static void iwl_collect_tx_data(struct iwl_rate_scale_priv *rs_priv,
struct iwl_rate_scale_data *window,
int success, int retries)
{
unsigned long flags;
if (!retries) {
IWL_DEBUG_RATE("leave: retries == 0 -- should be at least 1\n");
return;
}
while (retries--) {
spin_lock_irqsave(&rs_priv->lock, flags);
/* If we have filled up the window then subtract one from the
* success counter if the high-bit is counting toward
* success */
if (window->counter == IWL_RATE_MAX_WINDOW) {
if (window->data & (1ULL << (IWL_RATE_MAX_WINDOW - 1)))
window->success_counter--;
} else
window->counter++;
/* Slide the window to the left one bit */
window->data = (window->data << 1);
/* If this packet was a success then set the low bit high */
if (success) {
window->success_counter++;
window->data |= 1;
}
/* window->counter can't be 0 -- it is either >0 or
* IWL_RATE_MAX_WINDOW */
window->success_ratio = 12800 * window->success_counter /
window->counter;
/* Tag this window as having been updated */
window->stamp = jiffies;
spin_unlock_irqrestore(&rs_priv->lock, flags);
}
}
static void rs_rate_init(void *priv_rate, void *priv_sta,
struct ieee80211_local *local, struct sta_info *sta)
{
int i;
IWL_DEBUG_RATE("enter\n");
/* TODO: what is a good starting rate for STA? About middle? Maybe not
* the lowest or the highest rate.. Could consider using RSSI from
* previous packets? Need to have IEEE 802.1X auth succeed immediately
* after assoc.. */
for (i = IWL_RATE_COUNT - 1; i >= 0; i--) {
if (sta->supp_rates & (1 << i)) {
sta->txrate = i;
break;
}
}
sta->last_txrate = sta->txrate;
IWL_DEBUG_RATE("leave\n");
}
static void *rs_alloc(struct ieee80211_local *local)
{
return local->hw.priv;
}
/* rate scale requires free function to be implmented */
static void rs_free(void *priv)
{
return;
}
static void rs_clear(void *priv)
{
return;
}
static void *rs_alloc_sta(void *priv, gfp_t gfp)
{
struct iwl_rate_scale_priv *rs_priv;
int i;
IWL_DEBUG_RATE("enter\n");
rs_priv = kzalloc(sizeof(struct iwl_rate_scale_priv), gfp);
if (!rs_priv) {
IWL_DEBUG_RATE("leave: ENOMEM\n");
return NULL;
}
spin_lock_init(&rs_priv->lock);
rs_priv->start_rate = IWL_RATE_INVALID;
/* default to just 802.11b */
rs_priv->expected_tpt = iwl_expected_tpt_b;
rs_priv->last_partial_flush = jiffies;
rs_priv->last_flush = jiffies;
rs_priv->flush_time = IWL_RATE_FLUSH;
rs_priv->last_tx_packets = 0;
rs_priv->ibss_sta_added = 0;
init_timer(&rs_priv->rate_scale_flush);
rs_priv->rate_scale_flush.data = (unsigned long)rs_priv;
rs_priv->rate_scale_flush.function = &iwl_bg_rate_scale_flush;
for (i = 0; i < IWL_RATE_COUNT; i++)
iwl_clear_window(&rs_priv->win[i]);
IWL_DEBUG_RATE("leave\n");
return rs_priv;
}
static void rs_free_sta(void *priv, void *priv_sta)
{
struct iwl_rate_scale_priv *rs_priv = priv_sta;
IWL_DEBUG_RATE("enter\n");
del_timer_sync(&rs_priv->rate_scale_flush);
kfree(rs_priv);
IWL_DEBUG_RATE("leave\n");
}
/**
* rs_tx_status - Update rate control values based on Tx results
*
* NOTE: Uses iwl_priv->retry_rate for the # of retries attempted by
* the hardware for each rate.
*/
static void rs_tx_status(void *priv_rate,
struct net_device *dev,
struct sk_buff *skb,
struct ieee80211_tx_status *tx_resp)
{
u8 retries, current_count;
int scale_rate_index, first_index, last_index;
unsigned long flags;
struct sta_info *sta;
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
struct iwl_priv *priv = (struct iwl_priv *)priv_rate;
struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr);
struct iwl_rate_scale_priv *rs_priv;
IWL_DEBUG_RATE("enter\n");
retries = tx_resp->retry_count;
first_index = tx_resp->control.tx_rate;
if ((first_index < 0) || (first_index >= IWL_RATE_COUNT)) {
IWL_DEBUG_RATE("leave: Rate out of bounds: %0x for %d\n",
tx_resp->control.tx_rate, first_index);
return;
}
sta = sta_info_get(local, hdr->addr1);
if (!sta || !sta->rate_ctrl_priv) {
if (sta)
sta_info_put(sta);
IWL_DEBUG_RATE("leave: No STA priv data to update!\n");
return;
}
rs_priv = (void *)sta->rate_ctrl_priv;
rs_priv->tx_packets++;
scale_rate_index = first_index;
last_index = first_index;
/*
* Update the window for each rate. We determine which rates
* were Tx'd based on the total number of retries vs. the number
* of retries configured for each rate -- currently set to the
* priv value 'retry_rate' vs. rate specific
*
* On exit from this while loop last_index indicates the rate
* at which the frame was finally transmitted (or failed if no
* ACK)
*/
while (retries > 0) {
if (retries < priv->retry_rate) {
current_count = retries;
last_index = scale_rate_index;
} else {
current_count = priv->retry_rate;
last_index = iwl_get_prev_ieee_rate(scale_rate_index);
}
/* Update this rate accounting for as many retries
* as was used for it (per current_count) */
iwl_collect_tx_data(rs_priv,
&rs_priv->win[scale_rate_index],
0, current_count);
IWL_DEBUG_RATE("Update rate %d for %d retries.\n",
scale_rate_index, current_count);
retries -= current_count;
if (retries)
scale_rate_index =
iwl_get_prev_ieee_rate(scale_rate_index);
}
/* Update the last index window with success/failure based on ACK */
IWL_DEBUG_RATE("Update rate %d with %s.\n",
last_index,
(tx_resp->flags & IEEE80211_TX_STATUS_ACK) ?
"success" : "failure");
iwl_collect_tx_data(rs_priv,
&rs_priv->win[last_index],
tx_resp->flags & IEEE80211_TX_STATUS_ACK, 1);
/* We updated the rate scale window -- if its been more than
* flush_time since the last run, schedule the flush
* again */
spin_lock_irqsave(&rs_priv->lock, flags);
if (!rs_priv->flush_pending &&
time_after(jiffies, rs_priv->last_partial_flush +
rs_priv->flush_time)) {
rs_priv->flush_pending = 1;
mod_timer(&rs_priv->rate_scale_flush,
jiffies + rs_priv->flush_time);
}
spin_unlock_irqrestore(&rs_priv->lock, flags);
sta_info_put(sta);
IWL_DEBUG_RATE("leave\n");
return;
}
static struct ieee80211_rate *iwl_get_lowest_rate(struct ieee80211_local
*local)
{
struct ieee80211_hw_mode *mode = local->oper_hw_mode;
int i;
for (i = 0; i < mode->num_rates; i++) {
struct ieee80211_rate *rate = &mode->rates[i];
if (rate->flags & IEEE80211_RATE_SUPPORTED)
return rate;
}
return &mode->rates[0];
}
static u16 iwl_get_adjacent_rate(struct iwl_rate_scale_priv *rs_priv,
u8 index, u16 rate_mask, int phymode)
{
u8 high = IWL_RATE_INVALID;
u8 low = IWL_RATE_INVALID;
/* 802.11A walks to the next literal adjascent rate in
* the rate table */
if (unlikely(phymode == MODE_IEEE80211A)) {
int i;
u32 mask;
/* Find the previous rate that is in the rate mask */
i = index - 1;
for (mask = (1 << i); i >= 0; i--, mask >>= 1) {
if (rate_mask & mask) {
low = i;
break;
}
}
/* Find the next rate that is in the rate mask */
i = index + 1;
for (mask = (1 << i); i < IWL_RATE_COUNT; i++, mask <<= 1) {
if (rate_mask & mask) {
high = i;
break;
}
}
return (high << 8) | low;
}
low = index;
while (low != IWL_RATE_INVALID) {
if (rs_priv->tgg)
low = iwl_rates[low].prev_rs_tgg;
else
low = iwl_rates[low].prev_rs;
if (low == IWL_RATE_INVALID)
break;
if (rate_mask & (1 << low))
break;
IWL_DEBUG_RATE("Skipping masked lower rate: %d\n", low);
}
high = index;
while (high != IWL_RATE_INVALID) {
if (rs_priv->tgg)
high = iwl_rates[high].next_rs_tgg;
else
high = iwl_rates[high].next_rs;
if (high == IWL_RATE_INVALID)
break;
if (rate_mask & (1 << high))
break;
IWL_DEBUG_RATE("Skipping masked higher rate: %d\n", high);
}
return (high << 8) | low;
}
/**
* rs_get_rate - find the rate for the requested packet
*
* Returns the ieee80211_rate structure allocated by the driver.
*
* The rate control algorithm has no internal mapping between hw_mode's
* rate ordering and the rate ordering used by the rate control algorithm.
*
* The rate control algorithm uses a single table of rates that goes across
* the entire A/B/G spectrum vs. being limited to just one particular
* hw_mode.
*
* As such, we can't convert the index obtained below into the hw_mode's
* rate table and must reference the driver allocated rate table
*
*/
static struct ieee80211_rate *rs_get_rate(void *priv_rate,
struct net_device *dev,
struct sk_buff *skb,
struct rate_control_extra *extra)
{
u8 low = IWL_RATE_INVALID;
u8 high = IWL_RATE_INVALID;
u16 high_low;
int index;
struct iwl_rate_scale_priv *rs_priv;
struct iwl_rate_scale_data *window = NULL;
int current_tpt = IWL_INVALID_VALUE;
int low_tpt = IWL_INVALID_VALUE;
int high_tpt = IWL_INVALID_VALUE;
u32 fail_count;
s8 scale_action = 0;
unsigned long flags;
struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr);
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
struct sta_info *sta;
u16 fc, rate_mask;
struct iwl_priv *priv = (struct iwl_priv *)priv_rate;
IWL_DEBUG_RATE("enter\n");
memset(extra, 0, sizeof(*extra));
fc = le16_to_cpu(hdr->frame_control);
if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
(is_multicast_ether_addr(hdr->addr1))) {
/* Send management frames and broadcast/multicast data using
* lowest rate. */
/* TODO: this could probably be improved.. */
IWL_DEBUG_RATE("leave: lowest rate (not data or is "
"multicast)\n");
return iwl_get_lowest_rate(local);
}
sta = sta_info_get(local, hdr->addr1);
if (!sta || !sta->rate_ctrl_priv) {
IWL_DEBUG_RATE("leave: No STA priv data to update!\n");
if (sta)
sta_info_put(sta);
return NULL;
}
rate_mask = sta->supp_rates;
index = min(sta->txrate & 0xffff, IWL_RATE_COUNT - 1);
rs_priv = (void *)sta->rate_ctrl_priv;
if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
!rs_priv->ibss_sta_added) {
u8 sta_id = iwl_hw_find_station(priv, hdr->addr1);
if (sta_id == IWL_INVALID_STATION) {
IWL_DEBUG_RATE("LQ: ADD station " MAC_FMT "\n",
MAC_ARG(hdr->addr1));
sta_id = iwl_add_station(priv,
hdr->addr1, 0, CMD_ASYNC);
}
if (sta_id != IWL_INVALID_STATION)
rs_priv->ibss_sta_added = 1;
}
spin_lock_irqsave(&rs_priv->lock, flags);
if (rs_priv->start_rate != IWL_RATE_INVALID) {
index = rs_priv->start_rate;
rs_priv->start_rate = IWL_RATE_INVALID;
}
window = &(rs_priv->win[index]);
fail_count = window->counter - window->success_counter;
if (((fail_count <= IWL_RATE_MIN_FAILURE_TH) &&
(window->success_counter < IWL_RATE_MIN_SUCCESS_TH))) {
window->average_tpt = IWL_INVALID_VALUE;
spin_unlock_irqrestore(&rs_priv->lock, flags);
IWL_DEBUG_RATE("Invalid average_tpt on rate %d: "
"counter: %d, success_counter: %d, "
"expected_tpt is %sNULL\n",
index,
window->counter,
window->success_counter,
rs_priv->expected_tpt ? "not " : "");
goto out;
}
window->average_tpt = ((window->success_ratio *
rs_priv->expected_tpt[index] + 64) / 128);
current_tpt = window->average_tpt;
high_low = iwl_get_adjacent_rate(rs_priv, index, rate_mask,
local->hw.conf.phymode);
low = high_low & 0xff;
high = (high_low >> 8) & 0xff;
if (low != IWL_RATE_INVALID)
low_tpt = rs_priv->win[low].average_tpt;
if (high != IWL_RATE_INVALID)
high_tpt = rs_priv->win[high].average_tpt;
spin_unlock_irqrestore(&rs_priv->lock, flags);
scale_action = 1;
if ((window->success_ratio < IWL_RATE_DECREASE_TH) || !current_tpt) {
IWL_DEBUG_RATE("decrease rate because of low success_ratio\n");
scale_action = -1;
} else if ((low_tpt == IWL_INVALID_VALUE) &&
(high_tpt == IWL_INVALID_VALUE))
scale_action = 1;
else if ((low_tpt != IWL_INVALID_VALUE) &&
(high_tpt != IWL_INVALID_VALUE)
&& (low_tpt < current_tpt)
&& (high_tpt < current_tpt)) {
IWL_DEBUG_RATE("No action -- low [%d] & high [%d] < "
"current_tpt [%d]\n",
low_tpt, high_tpt, current_tpt);
scale_action = 0;
} else {
if (high_tpt != IWL_INVALID_VALUE) {
if (high_tpt > current_tpt)
scale_action = 1;
else {
IWL_DEBUG_RATE
("decrease rate because of high tpt\n");
scale_action = -1;
}
} else if (low_tpt != IWL_INVALID_VALUE) {
if (low_tpt > current_tpt) {
IWL_DEBUG_RATE
("decrease rate because of low tpt\n");
scale_action = -1;
} else
scale_action = 1;
}
}
if ((window->success_ratio > IWL_RATE_HIGH_TH) ||
(current_tpt > window->average_tpt)) {
IWL_DEBUG_RATE("No action -- success_ratio [%d] > HIGH_TH or "
"current_tpt [%d] > average_tpt [%d]\n",
window->success_ratio,
current_tpt, window->average_tpt);
scale_action = 0;
}
switch (scale_action) {
case -1:
if (low != IWL_RATE_INVALID)
index = low;
break;
case 1:
if (high != IWL_RATE_INVALID)
index = high;
break;
case 0:
default:
break;
}
IWL_DEBUG_RATE("Selected %d (action %d) - low %d high %d\n",
index, scale_action, low, high);
out:
sta->last_txrate = index;
sta->txrate = sta->last_txrate;
sta_info_put(sta);
IWL_DEBUG_RATE("leave: %d\n", index);
return &priv->ieee_rates[index];
}
static struct rate_control_ops rs_ops = {
.module = NULL,
.name = RS_NAME,
.tx_status = rs_tx_status,
.get_rate = rs_get_rate,
.rate_init = rs_rate_init,
.clear = rs_clear,
.alloc = rs_alloc,
.free = rs_free,
.alloc_sta = rs_alloc_sta,
.free_sta = rs_free_sta,
};
int iwl_fill_rs_info(struct ieee80211_hw *hw, char *buf, u8 sta_id)
{
struct ieee80211_local *local = hw_to_local(hw);
struct iwl_priv *priv = hw->priv;
struct iwl_rate_scale_priv *rs_priv;
struct sta_info *sta;
unsigned long flags;
int count = 0, i;
u32 samples = 0, success = 0, good = 0;
unsigned long now = jiffies;
u32 max_time = 0;
sta = sta_info_get(local, priv->stations[sta_id].sta.sta.addr);
if (!sta || !sta->rate_ctrl_priv) {
if (sta) {
sta_info_put(sta);
IWL_DEBUG_RATE("leave - no private rate data!\n");
} else
IWL_DEBUG_RATE("leave - no station!\n");
return sprintf(buf, "station %d not found\n", sta_id);
}
rs_priv = (void *)sta->rate_ctrl_priv;
spin_lock_irqsave(&rs_priv->lock, flags);
i = IWL_RATE_54M_INDEX;
while (1) {
u64 mask;
int j;
count +=
sprintf(&buf[count], " %2dMbs: ", iwl_rates[i].ieee / 2);
mask = (1ULL << (IWL_RATE_MAX_WINDOW - 1));
for (j = 0; j < IWL_RATE_MAX_WINDOW; j++, mask >>= 1)
buf[count++] =
(rs_priv->win[i].data & mask) ? '1' : '0';
samples += rs_priv->win[i].counter;
good += rs_priv->win[i].success_counter;
success += rs_priv->win[i].success_counter * iwl_rates[i].ieee;
if (rs_priv->win[i].stamp) {
int delta =
jiffies_to_msecs(now - rs_priv->win[i].stamp);
if (delta > max_time)
max_time = delta;
count += sprintf(&buf[count], "%5dms\n", delta);
} else
buf[count++] = '\n';
j = iwl_get_prev_ieee_rate(i);
if (j == i)
break;
i = j;
}
spin_unlock_irqrestore(&rs_priv->lock, flags);
sta_info_put(sta);
/* Display the average rate of all samples taken.
*
* NOTE: We multiple # of samples by 2 since the IEEE measurement
* added from iwl_rates is actually 2X the rate */
if (samples)
count += sprintf(
&buf[count],
"\nAverage rate is %3d.%02dMbs over last %4dms\n"
"%3d%% success (%d good packets over %d tries)\n",
success / (2 * samples), (success * 5 / samples) % 10,
max_time, good * 100 / samples, good, samples);
else
count += sprintf(&buf[count], "\nAverage rate: 0Mbs\n");
return count;
}
void iwl_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id)
{
struct iwl_priv *priv = hw->priv;
s32 rssi = 0;
unsigned long flags;
struct ieee80211_local *local = hw_to_local(hw);
struct iwl_rate_scale_priv *rs_priv;
struct sta_info *sta;
IWL_DEBUG_RATE("enter\n");
if (!local->rate_ctrl->ops->name ||
strcmp(local->rate_ctrl->ops->name, RS_NAME)) {
IWL_WARNING("iwl-3945-rs not selected as rate control algo!\n");
IWL_DEBUG_RATE("leave - mac80211 picked the wrong RC algo.\n");
return;
}
sta = sta_info_get(local, priv->stations[sta_id].sta.sta.addr);
if (!sta || !sta->rate_ctrl_priv) {
if (sta)
sta_info_put(sta);
IWL_DEBUG_RATE("leave - no private rate data!\n");
return;
}
rs_priv = (void *)sta->rate_ctrl_priv;
spin_lock_irqsave(&rs_priv->lock, flags);
rs_priv->tgg = 0;
switch (priv->phymode) {
case MODE_IEEE80211G:
if (priv->active_rxon.flags & RXON_FLG_TGG_PROTECT_MSK) {
rs_priv->tgg = 1;
rs_priv->expected_tpt = iwl_expected_tpt_g_prot;
} else
rs_priv->expected_tpt = iwl_expected_tpt_g;
break;
case MODE_IEEE80211A:
rs_priv->expected_tpt = iwl_expected_tpt_a;
break;
default:
IWL_WARNING("Invalid phymode. Defaulting to 802.11b\n");
case MODE_IEEE80211B:
rs_priv->expected_tpt = iwl_expected_tpt_b;
break;
}
sta_info_put(sta);
spin_unlock_irqrestore(&rs_priv->lock, flags);
rssi = priv->last_rx_rssi;
if (rssi == 0)
rssi = IWL_MIN_RSSI_VAL;
IWL_DEBUG(IWL_DL_INFO | IWL_DL_RATE, "Network RSSI: %d\n", rssi);
rs_priv->start_rate = iwl_get_rate_index_by_rssi(rssi, priv->phymode);
IWL_DEBUG_RATE("leave: rssi %d assign rate index: "
"%d (plcp 0x%x)\n", rssi, rs_priv->start_rate,
iwl_rates[rs_priv->start_rate].plcp);
}
void iwl_rate_control_register(struct ieee80211_hw *hw)
{
ieee80211_rate_control_register(&rs_ops);
}
void iwl_rate_control_unregister(struct ieee80211_hw *hw)
{
ieee80211_rate_control_unregister(&rs_ops);
}
drivers/net/wireless/iwlwifi/iwl-3945-rs.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_3945_rs_h__
#define __iwl_3945_rs_h__
struct iwl_rate_info {
u8 plcp;
u8 ieee;
u8 prev_ieee; /* previous rate in IEEE speeds */
u8 next_ieee; /* next rate in IEEE speeds */
u8 prev_rs; /* previous rate used in rs algo */
u8 next_rs; /* next rate used in rs algo */
u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
u8 next_rs_tgg; /* next rate used in TGG rs algo */
};
enum {
IWL_RATE_6M_INDEX = 0,
IWL_RATE_9M_INDEX,
IWL_RATE_12M_INDEX,
IWL_RATE_18M_INDEX,
IWL_RATE_24M_INDEX,
IWL_RATE_36M_INDEX,
IWL_RATE_48M_INDEX,
IWL_RATE_54M_INDEX,
IWL_RATE_1M_INDEX,
IWL_RATE_2M_INDEX,
IWL_RATE_5M_INDEX,
IWL_RATE_11M_INDEX,
IWL_RATE_COUNT,
IWL_RATE_INVM_INDEX,
IWL_RATE_INVALID = IWL_RATE_INVM_INDEX
};
enum {
IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
IWL_LAST_OFDM_RATE = IWL_RATE_54M_INDEX,
IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
};
/* #define vs. enum to keep from defaulting to 'large integer' */
#define IWL_RATE_6M_MASK (1<<IWL_RATE_6M_INDEX)
#define IWL_RATE_9M_MASK (1<<IWL_RATE_9M_INDEX)
#define IWL_RATE_12M_MASK (1<<IWL_RATE_12M_INDEX)
#define IWL_RATE_18M_MASK (1<<IWL_RATE_18M_INDEX)
#define IWL_RATE_24M_MASK (1<<IWL_RATE_24M_INDEX)
#define IWL_RATE_36M_MASK (1<<IWL_RATE_36M_INDEX)
#define IWL_RATE_48M_MASK (1<<IWL_RATE_48M_INDEX)
#define IWL_RATE_54M_MASK (1<<IWL_RATE_54M_INDEX)
#define IWL_RATE_1M_MASK (1<<IWL_RATE_1M_INDEX)
#define IWL_RATE_2M_MASK (1<<IWL_RATE_2M_INDEX)
#define IWL_RATE_5M_MASK (1<<IWL_RATE_5M_INDEX)
#define IWL_RATE_11M_MASK (1<<IWL_RATE_11M_INDEX)
enum {
IWL_RATE_6M_PLCP = 13,
IWL_RATE_9M_PLCP = 15,
IWL_RATE_12M_PLCP = 5,
IWL_RATE_18M_PLCP = 7,
IWL_RATE_24M_PLCP = 9,
IWL_RATE_36M_PLCP = 11,
IWL_RATE_48M_PLCP = 1,
IWL_RATE_54M_PLCP = 3,
IWL_RATE_1M_PLCP = 10,
IWL_RATE_2M_PLCP = 20,
IWL_RATE_5M_PLCP = 55,
IWL_RATE_11M_PLCP = 110,
};
enum {
IWL_RATE_6M_IEEE = 12,
IWL_RATE_9M_IEEE = 18,
IWL_RATE_12M_IEEE = 24,
IWL_RATE_18M_IEEE = 36,
IWL_RATE_24M_IEEE = 48,
IWL_RATE_36M_IEEE = 72,
IWL_RATE_48M_IEEE = 96,
IWL_RATE_54M_IEEE = 108,
IWL_RATE_1M_IEEE = 2,
IWL_RATE_2M_IEEE = 4,
IWL_RATE_5M_IEEE = 11,
IWL_RATE_11M_IEEE = 22,
};
#define IWL_CCK_BASIC_RATES_MASK \
(IWL_RATE_1M_MASK | \
IWL_RATE_2M_MASK)
#define IWL_CCK_RATES_MASK \
(IWL_BASIC_RATES_MASK | \
IWL_RATE_5M_MASK | \
IWL_RATE_11M_MASK)
#define IWL_OFDM_BASIC_RATES_MASK \
(IWL_RATE_6M_MASK | \
IWL_RATE_12M_MASK | \
IWL_RATE_24M_MASK)
#define IWL_OFDM_RATES_MASK \
(IWL_OFDM_BASIC_RATES_MASK | \
IWL_RATE_9M_MASK | \
IWL_RATE_18M_MASK | \
IWL_RATE_36M_MASK | \
IWL_RATE_48M_MASK | \
IWL_RATE_54M_MASK)
#define IWL_BASIC_RATES_MASK \
(IWL_OFDM_BASIC_RATES_MASK | \
IWL_CCK_BASIC_RATES_MASK)
#define IWL_RATES_MASK ((1<<IWL_RATE_COUNT)-1)
#define IWL_INVALID_VALUE -1
#define IWL_MIN_RSSI_VAL -100
#define IWL_MAX_RSSI_VAL 0
extern const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT];
static inline u8 iwl_get_prev_ieee_rate(u8 rate_index)
{
u8 rate = iwl_rates[rate_index].prev_ieee;
if (rate == IWL_RATE_INVALID)
rate = rate_index;
return rate;
}
/**
* iwl_fill_rs_info - Fill an output text buffer with the rate representation
*
* NOTE: This is provided as a quick mechanism for a user to visualize
* the performance of the rate control alogirthm and is not meant to be
* parsed software.
*/
extern int iwl_fill_rs_info(struct ieee80211_hw *, char *buf, u8 sta_id);
/**
* iwl_rate_scale_init - Initialize the rate scale table based on assoc info
*
* The specific througput table used is based on the type of network
* the associated with, including A, B, G, and G w/ TGG protection
*/
extern void iwl_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id);
/**
* iwl_rate_control_register - Register the rate control algorithm callbacks
*
* Since the rate control algorithm is hardware specific, there is no need
* or reason to place it as a stand alone module. The driver can call
* iwl_rate_control_register in order to register the rate control callbacks
* with the mac80211 subsystem. This should be performed prior to calling
* ieee80211_register_hw
*
*/
extern void iwl_rate_control_register(struct ieee80211_hw *hw);
/**
* iwl_rate_control_unregister - Unregister the rate control callbacks
*
* This should be called after calling ieee80211_unregister_hw, but before
* the driver is unloaded.
*/
extern void iwl_rate_control_unregister(struct ieee80211_hw *hw);
#endif
drivers/net/wireless/iwlwifi/iwl-3945.c 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/version.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/wireless.h>
#include <linux/firmware.h>
#include <net/mac80211.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
#include "iwlwifi.h"
#include "iwl-helpers.h"
#include "iwl-3945.h"
#include "iwl-3945-rs.h"
#define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
[IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
IWL_RATE_##r##M_IEEE, \
IWL_RATE_##ip##M_INDEX, \
IWL_RATE_##in##M_INDEX, \
IWL_RATE_##rp##M_INDEX, \
IWL_RATE_##rn##M_INDEX, \
IWL_RATE_##pp##M_INDEX, \
IWL_RATE_##np##M_INDEX }
/*
* Parameter order:
* rate, prev rate, next rate, prev tgg rate, next tgg rate
*
* If there isn't a valid next or previous rate then INV is used which
* maps to IWL_RATE_INVALID
*
*/
const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11), /* 6mbps */
IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11), /* 9mbps */
IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18), /* 12mbps */
IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24), /* 18mbps */
IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36), /* 24mbps */
IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48), /* 36mbps */
IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54), /* 48mbps */
IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2), /* 1mbps */
IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5), /* 2mbps */
IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11), /*5.5mbps */
IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18), /* 11mbps */
};
/* 1 = enable the iwl_disable_events() function */
#define IWL_EVT_DISABLE (0)
#define IWL_EVT_DISABLE_SIZE (1532/32)
/**
* iwl_disable_events - Disable selected events in uCode event log
*
* Disable an event by writing "1"s into "disable"
* bitmap in SRAM. Bit position corresponds to Event # (id/type).
* Default values of 0 enable uCode events to be logged.
* Use for only special debugging. This function is just a placeholder as-is,
* you'll need to provide the special bits! ...
* ... and set IWL_EVT_DISABLE to 1. */
void iwl_disable_events(struct iwl_priv *priv)
{
int rc;
int i;
u32 base; /* SRAM address of event log header */
u32 disable_ptr; /* SRAM address of event-disable bitmap array */
u32 array_size; /* # of u32 entries in array */
u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
0x00000000, /* 31 - 0 Event id numbers */
0x00000000, /* 63 - 32 */
0x00000000, /* 95 - 64 */
0x00000000, /* 127 - 96 */
0x00000000, /* 159 - 128 */
0x00000000, /* 191 - 160 */
0x00000000, /* 223 - 192 */
0x00000000, /* 255 - 224 */
0x00000000, /* 287 - 256 */
0x00000000, /* 319 - 288 */
0x00000000, /* 351 - 320 */
0x00000000, /* 383 - 352 */
0x00000000, /* 415 - 384 */
0x00000000, /* 447 - 416 */
0x00000000, /* 479 - 448 */
0x00000000, /* 511 - 480 */
0x00000000, /* 543 - 512 */
0x00000000, /* 575 - 544 */
0x00000000, /* 607 - 576 */
0x00000000, /* 639 - 608 */
0x00000000, /* 671 - 640 */
0x00000000, /* 703 - 672 */
0x00000000, /* 735 - 704 */
0x00000000, /* 767 - 736 */
0x00000000, /* 799 - 768 */
0x00000000, /* 831 - 800 */
0x00000000, /* 863 - 832 */
0x00000000, /* 895 - 864 */
0x00000000, /* 927 - 896 */
0x00000000, /* 959 - 928 */
0x00000000, /* 991 - 960 */
0x00000000, /* 1023 - 992 */
0x00000000, /* 1055 - 1024 */
0x00000000, /* 1087 - 1056 */
0x00000000, /* 1119 - 1088 */
0x00000000, /* 1151 - 1120 */
0x00000000, /* 1183 - 1152 */
0x00000000, /* 1215 - 1184 */
0x00000000, /* 1247 - 1216 */
0x00000000, /* 1279 - 1248 */
0x00000000, /* 1311 - 1280 */
0x00000000, /* 1343 - 1312 */
0x00000000, /* 1375 - 1344 */
0x00000000, /* 1407 - 1376 */
0x00000000, /* 1439 - 1408 */
0x00000000, /* 1471 - 1440 */
0x00000000, /* 1503 - 1472 */
};
base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
if (!iwl_hw_valid_rtc_data_addr(base)) {
IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
return;
}
rc = iwl_grab_restricted_access(priv);
if (rc) {
IWL_WARNING("Can not read from adapter at this time.\n");
return;
}
disable_ptr = iwl_read_restricted_mem(priv, base + (4 * sizeof(u32)));
array_size = iwl_read_restricted_mem(priv, base + (5 * sizeof(u32)));
iwl_release_restricted_access(priv);
if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
disable_ptr);
rc = iwl_grab_restricted_access(priv);
for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
iwl_write_restricted_mem(priv,
disable_ptr +
(i * sizeof(u32)),
evt_disable[i]);
iwl_release_restricted_access(priv);
} else {
IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
IWL_DEBUG_INFO(" by writing \"1\"s into disable bitmap\n");
IWL_DEBUG_INFO(" in SRAM at 0x%x, size %d u32s\n",
disable_ptr, array_size);
}
}
/**
* iwl3945_get_antenna_flags - Get antenna flags for RXON command
* @priv: eeprom and antenna fields are used to determine antenna flags
*
* priv->eeprom is used to determine if antenna AUX/MAIN are reversed
* priv->antenna specifies the antenna diversity mode:
*
* IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
* IWL_ANTENNA_MAIN - Force MAIN antenna
* IWL_ANTENNA_AUX - Force AUX antenna
*/
__le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
{
switch (priv->antenna) {
case IWL_ANTENNA_DIVERSITY:
return 0;
case IWL_ANTENNA_MAIN:
if (priv->eeprom.antenna_switch_type)
return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
case IWL_ANTENNA_AUX:
if (priv->eeprom.antenna_switch_type)
return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
}
/* bad antenna selector value */
IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
return 0; /* "diversity" is default if error */
}
/*****************************************************************************
*
* Intel PRO/Wireless 3945ABG/BG Network Connection
*
* RX handler implementations
*
* Used by iwl-base.c
*
*****************************************************************************/
void iwl_hw_rx_statistics(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
{
struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
(int)sizeof(struct iwl_notif_statistics),
le32_to_cpu(pkt->len));
memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
priv->last_statistics_time = jiffies;
}
static void iwl3945_handle_data_packet(struct iwl_priv *priv, int is_data,
struct iwl_rx_mem_buffer *rxb,
struct ieee80211_rx_status *stats,
u16 phy_flags)
{
struct ieee80211_hdr *hdr;
struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
short len = le16_to_cpu(rx_hdr->len);
/* We received data from the HW, so stop the watchdog */
if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
IWL_DEBUG_DROP("Corruption detected!\n");
return;
}
/* We only process data packets if the interface is open */
if (unlikely(!priv->is_open)) {
IWL_DEBUG_DROP_LIMIT
("Dropping packet while interface is not open.\n");
return;
}
if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
if (iwl_param_hwcrypto)
iwl_set_decrypted_flag(priv, rxb->skb,
le32_to_cpu(rx_end->status),
stats);
iwl_handle_data_packet_monitor(priv, rxb, IWL_RX_DATA(pkt),
len, stats, phy_flags);
return;
}
skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
/* Set the size of the skb to the size of the frame */
skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
hdr = (void *)rxb->skb->data;
if (iwl_param_hwcrypto)
iwl_set_decrypted_flag(priv, rxb->skb,
le32_to_cpu(rx_end->status), stats);
ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
rxb->skb = NULL;
}
static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
struct iwl_rx_mem_buffer *rxb)
{
struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
struct ieee80211_hdr *header;
u16 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
struct ieee80211_rx_status stats = {
.mactime = le64_to_cpu(rx_end->timestamp),
.freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
.channel = le16_to_cpu(rx_hdr->channel),
.phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
MODE_IEEE80211G : MODE_IEEE80211A,
.antenna = 0,
.rate = rx_hdr->rate,
.flag = 0,
};
u8 network_packet;
int snr;
if ((unlikely(rx_stats->phy_count > 20))) {
IWL_DEBUG_DROP
("dsp size out of range [0,20]: "
"%d/n", rx_stats->phy_count);
return;
}
if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
|| !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
return;
}
if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
iwl3945_handle_data_packet(priv, 1, rxb, &stats, phy_flags);
return;
}
/* Convert 3945's rssi indicator to dBm */
stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
/* Set default noise value to -127 */
if (priv->last_rx_noise == 0)
priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
/* 3945 provides noise info for OFDM frames only.
* sig_avg and noise_diff are measured by the 3945's digital signal
* processor (DSP), and indicate linear levels of signal level and
* distortion/noise within the packet preamble after
* automatic gain control (AGC). sig_avg should stay fairly
* constant if the radio's AGC is working well.
* Since these values are linear (not dB or dBm), linear
* signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
* Convert linear SNR to dB SNR, then subtract that from rssi dBm
* to obtain noise level in dBm.
* Calculate stats.signal (quality indicator in %) based on SNR. */
if (rx_stats_noise_diff) {
snr = rx_stats_sig_avg / rx_stats_noise_diff;
stats.noise = stats.ssi - iwl_calc_db_from_ratio(snr);
stats.signal = iwl_calc_sig_qual(stats.ssi, stats.noise);
/* If noise info not available, calculate signal quality indicator (%)
* using just the dBm signal level. */
} else {
stats.noise = priv->last_rx_noise;
stats.signal = iwl_calc_sig_qual(stats.ssi, 0);
}
IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
stats.ssi, stats.noise, stats.signal,
rx_stats_sig_avg, rx_stats_noise_diff);
stats.freq = ieee80211chan2mhz(stats.channel);
/* can be covered by iwl_report_frame() in most cases */
/* IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
network_packet = iwl_is_network_packet(priv, header);
#ifdef CONFIG_IWLWIFI_DEBUG
if (iwl_debug_level & IWL_DL_STATS && net_ratelimit())
IWL_DEBUG_STATS
("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
network_packet ? '*' : ' ',
stats.channel, stats.ssi, stats.ssi,
stats.ssi, stats.rate);
if (iwl_debug_level & (IWL_DL_RX))
/* Set "1" to report good data frames in groups of 100 */
iwl_report_frame(priv, pkt, header, 1);
#endif
if (network_packet) {
priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
priv->last_tsf = le64_to_cpu(rx_end->timestamp);
priv->last_rx_rssi = stats.ssi;
priv->last_rx_noise = stats.noise;
}
switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
case IEEE80211_FTYPE_MGMT:
switch (le16_to_cpu(header->frame_control) &
IEEE80211_FCTL_STYPE) {
case IEEE80211_STYPE_PROBE_RESP:
case IEEE80211_STYPE_BEACON:{
/* If this is a beacon or probe response for
* our network then cache the beacon
* timestamp */
if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
&& !compare_ether_addr(header->addr2,
priv->bssid)) ||
((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
&& !compare_ether_addr(header->addr3,
priv->bssid)))) {
struct ieee80211_mgmt *mgmt =
(struct ieee80211_mgmt *)header;
__le32 *pos;
pos =
(__le32 *) & mgmt->u.beacon.
timestamp;
priv->timestamp0 = le32_to_cpu(pos[0]);
priv->timestamp1 = le32_to_cpu(pos[1]);
priv->beacon_int = le16_to_cpu(
mgmt->u.beacon.beacon_int);
if (priv->call_post_assoc_from_beacon &&
(priv->iw_mode ==
IEEE80211_IF_TYPE_STA))
queue_work(priv->workqueue,
&priv->post_associate.work);
priv->call_post_assoc_from_beacon = 0;
}
break;
}
case IEEE80211_STYPE_ACTION:
/* TODO: Parse 802.11h frames for CSA... */
break;
/*
* TODO: There is no callback function from upper
* stack to inform us when associated status. this
* work around to sniff assoc_resp management frame
* and finish the association process.
*/
case IEEE80211_STYPE_ASSOC_RESP:
case IEEE80211_STYPE_REASSOC_RESP:{
struct ieee80211_mgmt *mgnt =
(struct ieee80211_mgmt *)header;
priv->assoc_id = (~((1 << 15) | (1 << 14)) &
le16_to_cpu(mgnt->u.
assoc_resp.aid));
priv->assoc_capability =
le16_to_cpu(mgnt->u.assoc_resp.capab_info);
if (priv->beacon_int)
queue_work(priv->workqueue,
&priv->post_associate.work);
else
priv->call_post_assoc_from_beacon = 1;
break;
}
case IEEE80211_STYPE_PROBE_REQ:{
if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
IWL_DEBUG_DROP
("Dropping (non network): " MAC_FMT
", " MAC_FMT ", " MAC_FMT "\n",
MAC_ARG(header->addr1),
MAC_ARG(header->addr2),
MAC_ARG(header->addr3));
return;
}
}
iwl3945_handle_data_packet(priv, 0, rxb, &stats, phy_flags);
break;
case IEEE80211_FTYPE_CTL:
break;
case IEEE80211_FTYPE_DATA:
if (unlikely(is_duplicate_packet(priv, header)))
IWL_DEBUG_DROP("Dropping (dup): " MAC_FMT ", "
MAC_FMT ", " MAC_FMT "\n",
MAC_ARG(header->addr1),
MAC_ARG(header->addr2),
MAC_ARG(header->addr3));
else
iwl3945_handle_data_packet(priv, 1, rxb, &stats,
phy_flags);
break;
}
}
int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
dma_addr_t addr, u16 len)
{
int count;
u32 pad;
struct iwl_tfd_frame *tfd = (struct iwl_tfd_frame *)ptr;
count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
IWL_ERROR("Error can not send more than %d chunks\n",
NUM_TFD_CHUNKS);
return -EINVAL;
}
tfd->pa[count].addr = cpu_to_le32(addr);
tfd->pa[count].len = cpu_to_le32(len);
count++;
tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
TFD_CTL_PAD_SET(pad));
return 0;
}
/**
* iwl_hw_txq_free_tfd - Free one TFD, those at index [txq->q.last_used]
*
* Does NOT advance any indexes
*/
int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
{
struct iwl_tfd_frame *bd_tmp = (struct iwl_tfd_frame *)&txq->bd[0];
struct iwl_tfd_frame *bd = &bd_tmp[txq->q.last_used];
struct pci_dev *dev = priv->pci_dev;
int i;
int counter;
/* classify bd */
if (txq->q.id == IWL_CMD_QUEUE_NUM)
/* nothing to cleanup after for host commands */
return 0;
/* sanity check */
counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
if (counter > NUM_TFD_CHUNKS) {
IWL_ERROR("Too many chunks: %i\n", counter);
/* @todo issue fatal error, it is quite serious situation */
return 0;
}
/* unmap chunks if any */
for (i = 1; i < counter; i++) {
pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
if (txq->txb[txq->q.last_used].skb[0]) {
struct sk_buff *skb = txq->txb[txq->q.last_used].skb[0];
if (txq->txb[txq->q.last_used].skb[0]) {
/* Can be called from interrupt context */
dev_kfree_skb_any(skb);
txq->txb[txq->q.last_used].skb[0] = NULL;
}
}
}
return 0;
}
u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *addr)
{
int i;
int ret = IWL_INVALID_STATION;
unsigned long flags;
spin_lock_irqsave(&priv->sta_lock, flags);
for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
if ((priv->stations[i].used) &&
(!compare_ether_addr
(priv->stations[i].sta.sta.addr, addr))) {
ret = i;
goto out;
}
IWL_DEBUG_INFO("can not find STA " MAC_FMT " (total %d)\n",
MAC_ARG(addr), priv->num_stations);
out:
spin_unlock_irqrestore(&priv->sta_lock, flags);
return ret;
}
/**
* iwl_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
*
*/
void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
struct iwl_cmd *cmd,
struct ieee80211_tx_control *ctrl,
struct ieee80211_hdr *hdr, int sta_id, int tx_id)
{
unsigned long flags;
u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
u16 rate_mask;
int rate;
u8 rts_retry_limit;
u8 data_retry_limit;
__le32 tx_flags;
u16 fc = le16_to_cpu(hdr->frame_control);
rate = iwl_rates[rate_index].plcp;
tx_flags = cmd->cmd.tx.tx_flags;
/* We need to figure out how to get the sta->supp_rates while
* in this running context; perhaps encoding into ctrl->tx_rate? */
rate_mask = IWL_RATES_MASK;
spin_lock_irqsave(&priv->sta_lock, flags);
priv->stations[sta_id].current_rate.rate_n_flags = rate;
if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
(sta_id != IWL3945_BROADCAST_ID) &&
(sta_id != IWL_MULTICAST_ID))
priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
spin_unlock_irqrestore(&priv->sta_lock, flags);
if (tx_id >= IWL_CMD_QUEUE_NUM)
rts_retry_limit = 3;
else
rts_retry_limit = 7;
if (ieee80211_is_probe_response(fc)) {
data_retry_limit = 3;
if (data_retry_limit < rts_retry_limit)
rts_retry_limit = data_retry_limit;
} else
data_retry_limit = IWL_DEFAULT_TX_RETRY;
if (priv->data_retry_limit != -1)
data_retry_limit = priv->data_retry_limit;
if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
switch (fc & IEEE80211_FCTL_STYPE) {
case IEEE80211_STYPE_AUTH:
case IEEE80211_STYPE_DEAUTH:
case IEEE80211_STYPE_ASSOC_REQ:
case IEEE80211_STYPE_REASSOC_REQ:
if (tx_flags & TX_CMD_FLG_RTS_MSK) {
tx_flags &= ~TX_CMD_FLG_RTS_MSK;
tx_flags |= TX_CMD_FLG_CTS_MSK;
}
break;
default:
break;
}
}
cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
cmd->cmd.tx.data_retry_limit = data_retry_limit;
cmd->cmd.tx.rate = rate;
cmd->cmd.tx.tx_flags = tx_flags;
/* OFDM */
cmd->cmd.tx.supp_rates[0] = rate_mask & IWL_OFDM_RATES_MASK;
/* CCK */
cmd->cmd.tx.supp_rates[1] = (rate_mask >> 8) & 0xF;
IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
"cck/ofdm mask: 0x%x/0x%x\n", sta_id,
cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
}
u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
{
unsigned long flags_spin;
struct iwl_station_entry *station;
if (sta_id == IWL_INVALID_STATION)
return IWL_INVALID_STATION;
spin_lock_irqsave(&priv->sta_lock, flags_spin);
station = &priv->stations[sta_id];
station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
station->sta.rate_n_flags = cpu_to_le16(tx_rate);
station->current_rate.rate_n_flags = tx_rate;
station->sta.mode = STA_CONTROL_MODIFY_MSK;
spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
iwl_send_add_station(priv, &station->sta, flags);
IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
sta_id, tx_rate);
return sta_id;
}
void iwl_hw_card_show_info(struct iwl_priv *priv)
{
IWL_DEBUG_INFO("3945ABG HW Version %u.%u.%u\n",
((priv->eeprom.board_revision >> 8) & 0x0F),
((priv->eeprom.board_revision >> 8) >> 4),
(priv->eeprom.board_revision & 0x00FF));
IWL_DEBUG_INFO("3945ABG PBA Number %.*s\n",
(int)sizeof(priv->eeprom.board_pba_number),
priv->eeprom.board_pba_number);
IWL_DEBUG_INFO("EEPROM_ANTENNA_SWITCH_TYPE is 0x%02X\n",
priv->eeprom.antenna_switch_type);
}
static int iwl3945_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
{
int rc;
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl_grab_restricted_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
if (!pwr_max) {
u32 val;
rc = pci_read_config_dword(priv->pci_dev,
PCI_POWER_SOURCE, &val);
if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
~APMG_PS_CTRL_MSK_PWR_SRC);
iwl_release_restricted_access(priv);
iwl_poll_bit(priv, CSR_GPIO_IN,
CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
CSR_GPIO_IN_BIT_AUX_POWER, 5000);
} else
iwl_release_restricted_access(priv);
} else {
iwl_set_bits_mask_restricted_reg(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
~APMG_PS_CTRL_MSK_PWR_SRC);
iwl_release_restricted_access(priv);
iwl_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
CSR_GPIO_IN_BIT_AUX_POWER, 5000); /* uS */
}
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
static int iwl3945_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
{
int rc;
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl_grab_restricted_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
iwl_write_restricted(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
iwl_write_restricted(priv, FH_RCSR_RPTR_ADDR(0),
priv->hw_setting.shared_phys +
offsetof(struct iwl_shared, rx_read_ptr[0]));
iwl_write_restricted(priv, FH_RCSR_WPTR(0), 0);
iwl_write_restricted(priv, FH_RCSR_CONFIG(0),
ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
(RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
(1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
/* fake read to flush all prev I/O */
iwl_read_restricted(priv, FH_RSSR_CTRL);
iwl_release_restricted_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
}
static int iwl3945_tx_reset(struct iwl_priv *priv)
{
int rc;
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl_grab_restricted_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
/* bypass mode */
iwl_write_restricted_reg(priv, SCD_MODE_REG, 0x2);
/* RA 0 is active */
iwl_write_restricted_reg(priv, SCD_ARASTAT_REG, 0x01);
/* all 6 fifo are active */
iwl_write_restricted_reg(priv, SCD_TXFACT_REG, 0x3f);
iwl_write_restricted_reg(priv, SCD_SBYP_MODE_1_REG, 0x010000);
iwl_write_restricted_reg(priv, SCD_SBYP_MODE_2_REG, 0x030002);
iwl_write_restricted_reg(priv, SCD_TXF4MF_REG, 0x000004);
iwl_write_restricted_reg(priv, SCD_TXF5MF_REG, 0x000005);
iwl_write_restricted(priv, FH_TSSR_CBB_BASE,
priv->hw_setting.shared_phys);
iwl_write_restricted(priv, FH_TSSR_MSG_CONFIG,
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
iwl_release_restricted_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
}
/**
* iwl3945_txq_ctx_reset - Reset TX queue context
*
* Destroys all DMA structures and initialize them again
*/
static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
{
int rc;
int txq_id, slots_num;
iwl_hw_txq_ctx_free(priv);
/* Tx CMD queue */
rc = iwl3945_tx_reset(priv);
if (rc)
goto error;
/* Tx queue(s) */
for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
rc = iwl_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
txq_id);
if (rc) {
IWL_ERROR("Tx %d queue init failed\n", txq_id);
goto error;
}
}
return rc;
error:
iwl_hw_txq_ctx_free(priv);
return rc;
}
int iwl_hw_nic_init(struct iwl_priv *priv)
{
u8 rev_id;
int rc;
unsigned long flags;
struct iwl_rx_queue *rxq = &priv->rxq;
iwl_power_init_handle(priv);
spin_lock_irqsave(&priv->lock, flags);
iwl_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
if (rc < 0) {
spin_unlock_irqrestore(&priv->lock, flags);
IWL_DEBUG_INFO("Failed to init the card\n");
return rc;
}
rc = iwl_grab_restricted_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
APMG_CLK_VAL_DMA_CLK_RQT |
APMG_CLK_VAL_BSM_CLK_RQT);
udelay(20);
iwl_set_bits_restricted_reg(priv, APMG_PCIDEV_STT_REG,
APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
iwl_release_restricted_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
/* Determine HW type */
rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
if (rc)
return rc;
IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
iwl3945_nic_set_pwr_src(priv, 1);
spin_lock_irqsave(&priv->lock, flags);
if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
IWL_DEBUG_INFO("RTP type \n");
else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
IWL_DEBUG_INFO("ALM-MB type\n");
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
} else {
IWL_DEBUG_INFO("ALM-MM type\n");
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
}
spin_unlock_irqrestore(&priv->lock, flags);
/* Initialize the EEPROM */
rc = iwl_eeprom_init(priv);
if (rc)
return rc;
spin_lock_irqsave(&priv->lock, flags);
if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
IWL_DEBUG_INFO("SKU OP mode is mrc\n");
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
} else
IWL_DEBUG_INFO("SKU OP mode is basic\n");
if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
priv->eeprom.board_revision);
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
} else {
IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
priv->eeprom.board_revision);
iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
}
if (priv->eeprom.almgor_m_version <= 1) {
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
priv->eeprom.almgor_m_version);
} else {
IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
priv->eeprom.almgor_m_version);
iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
}
spin_unlock_irqrestore(&priv->lock, flags);
if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
/* Allocate the RX queue, or reset if it is already allocated */
if (!rxq->bd) {
rc = iwl_rx_queue_alloc(priv);
if (rc) {
IWL_ERROR("Unable to initialize Rx queue\n");
return -ENOMEM;
}
} else
iwl_rx_queue_reset(priv, rxq);
iwl_rx_replenish(priv);
iwl3945_rx_init(priv, rxq);
spin_lock_irqsave(&priv->lock, flags);
/* Look at using this instead:
rxq->need_update = 1;
iwl_rx_queue_update_write_ptr(priv, rxq);
*/
rc = iwl_grab_restricted_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
iwl_write_restricted(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
iwl_release_restricted_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
rc = iwl3945_txq_ctx_reset(priv);
if (rc)
return rc;
set_bit(STATUS_INIT, &priv->status);
return 0;
}
/**
* iwl_hw_txq_ctx_free - Free TXQ Context
*
* Destroy all TX DMA queues and structures
*/
void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
{
int txq_id;
/* Tx queues */
for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
iwl_tx_queue_free(priv, &priv->txq[txq_id]);
}
void iwl_hw_txq_ctx_stop(struct iwl_priv *priv)
{
int queue;
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
if (iwl_grab_restricted_access(priv)) {
spin_unlock_irqrestore(&priv->lock, flags);
iwl_hw_txq_ctx_free(priv);
return;
}
/* stop SCD */
iwl_write_restricted_reg(priv, SCD_MODE_REG, 0);
/* reset TFD queues */
for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
iwl_write_restricted(priv, FH_TCSR_CONFIG(queue), 0x0);
iwl_poll_restricted_bit(priv, FH_TSSR_TX_STATUS,
ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1000);
}
iwl_release_restricted_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
iwl_hw_txq_ctx_free(priv);
}
int iwl_hw_nic_stop_master(struct iwl_priv *priv)
{
int rc = 0;
u32 reg_val;
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
/* set stop master bit */
iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
reg_val = iwl_read32(priv, CSR_GP_CNTRL);
if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
(reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
IWL_DEBUG_INFO("Card in power save, master is already "
"stopped\n");
else {
rc = iwl_poll_bit(priv, CSR_RESET,
CSR_RESET_REG_FLAG_MASTER_DISABLED,
CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
if (rc < 0) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
}
spin_unlock_irqrestore(&priv->lock, flags);
IWL_DEBUG_INFO("stop master\n");
return rc;
}
int iwl_hw_nic_reset(struct iwl_priv *priv)
{
int rc;
unsigned long flags;
iwl_hw_nic_stop_master(priv);
spin_lock_irqsave(&priv->lock, flags);
iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
rc = iwl_grab_restricted_access(priv);
if (!rc) {
iwl_write_restricted_reg(priv, APMG_CLK_CTRL_REG,
APMG_CLK_VAL_BSM_CLK_RQT);
udelay(10);
iwl_set_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
iwl_write_restricted_reg(priv, APMG_RTC_INT_MSK_REG, 0x0);
iwl_write_restricted_reg(priv, APMG_RTC_INT_STT_REG,
0xFFFFFFFF);
/* enable DMA */
iwl_write_restricted_reg(priv, APMG_CLK_EN_REG,
APMG_CLK_VAL_DMA_CLK_RQT |
APMG_CLK_VAL_BSM_CLK_RQT);
udelay(10);
iwl_set_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_RESET_REQ);
udelay(5);
iwl_clear_bits_restricted_reg(priv, APMG_PS_CTRL_REG,
APMG_PS_CTRL_VAL_RESET_REQ);
iwl_release_restricted_access(priv);
}
/* Clear the 'host command active' bit... */
clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
wake_up_interruptible(&priv->wait_command_queue);
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
/**
* iwl_hw_reg_adjust_power_by_temp - return index delta into power gain settings table
*/
static int iwl_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
{
return (new_reading - old_reading) * (-11) / 100;
}
/**
* iwl_hw_reg_temp_out_of_range - Keep temperature in sane range
*/
static inline int iwl_hw_reg_temp_out_of_range(int temperature)
{
return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
}
int iwl_hw_get_temperature(struct iwl_priv *priv)
{
return iwl_read32(priv, CSR_UCODE_DRV_GP2);
}
/**
* iwl_hw_reg_txpower_get_temperature - get current temperature by reading from NIC
*/
static int iwl_hw_reg_txpower_get_temperature(struct iwl_priv *priv)
{
int temperature;
temperature = iwl_hw_get_temperature(priv);
/* driver's okay range is -260 to +25.
* human readable okay range is 0 to +285 */
IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
/* handle insane temp reading */
if (iwl_hw_reg_temp_out_of_range(temperature)) {
IWL_ERROR("Error bad temperature value %d\n", temperature);
/* if really really hot(?),
* substitute the 3rd band/group's temp measured at factory */
if (priv->last_temperature > 100)
temperature = priv->eeprom.groups[2].temperature;
else /* else use most recent "sane" value from driver */
temperature = priv->last_temperature;
}
return temperature; /* raw, not "human readable" */
}
/* Adjust Txpower only if temperature variance is greater than threshold.
*
* Both are lower than older versions' 9 degrees */
#define IWL_TEMPERATURE_LIMIT_TIMER 6
/**
* is_temp_calib_needed - determines if new calibration is needed
*
* records new temperature in tx_mgr->temperature.
* replaces tx_mgr->last_temperature *only* if calib needed
* (assumes caller will actually do the calibration!). */
static int is_temp_calib_needed(struct iwl_priv *priv)
{
int temp_diff;
priv->temperature = iwl_hw_reg_txpower_get_temperature(priv);
temp_diff = priv->temperature - priv->last_temperature;
/* get absolute value */
if (temp_diff < 0) {
IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
temp_diff = -temp_diff;
} else if (temp_diff == 0)
IWL_DEBUG_POWER("Same temp,\n");
else
IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
/* if we don't need calibration, *don't* update last_temperature */
if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
IWL_DEBUG_POWER("Timed thermal calib not needed\n");
return 0;
}
IWL_DEBUG_POWER("Timed thermal calib needed\n");
/* assume that caller will actually do calib ...
* update the "last temperature" value */
priv->last_temperature = priv->temperature;
return 1;
}
#define IWL_MAX_GAIN_ENTRIES 78
#define IWL_CCK_FROM_OFDM_POWER_DIFF -5
#define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
/* radio and DSP power table, each step is 1/2 dB.
* 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
static struct iwl_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
{
{251, 127}, /* 2.4 GHz, highest power */
{251, 127},
{251, 127},
{251, 127},
{251, 125},
{251, 110},
{251, 105},
{251, 98},
{187, 125},
{187, 115},
{187, 108},
{187, 99},
{243, 119},
{243, 111},
{243, 105},
{243, 97},
{243, 92},
{211, 106},
{211, 100},
{179, 120},
{179, 113},
{179, 107},
{147, 125},
{147, 119},
{147, 112},
{147, 106},
{147, 101},
{147, 97},
{147, 91},
{115, 107},
{235, 121},
{235, 115},
{235, 109},
{203, 127},
{203, 121},
{203, 115},
{203, 108},
{203, 102},
{203, 96},
{203, 92},
{171, 110},
{171, 104},
{171, 98},
{139, 116},
{227, 125},
{227, 119},
{227, 113},
{227, 107},
{227, 101},
{227, 96},
{195, 113},
{195, 106},
{195, 102},
{195, 95},
{163, 113},
{163, 106},
{163, 102},
{163, 95},
{131, 113},
{131, 106},
{131, 102},
{131, 95},
{99, 113},
{99, 106},
{99, 102},
{99, 95},
{67, 113},
{67, 106},
{67, 102},
{67, 95},
{35, 113},
{35, 106},
{35, 102},
{35, 95},
{3, 113},
{3, 106},
{3, 102},
{3, 95} }, /* 2.4 GHz, lowest power */
{
{251, 127}, /* 5.x GHz, highest power */
{251, 120},
{251, 114},
{219, 119},
{219, 101},
{187, 113},
{187, 102},
{155, 114},
{155, 103},
{123, 117},
{123, 107},
{123, 99},
{123, 92},
{91, 108},
{59, 125},
{59, 118},
{59, 109},
{59, 102},
{59, 96},
{59, 90},
{27, 104},
{27, 98},
{27, 92},
{115, 118},
{115, 111},
{115, 104},
{83, 126},
{83, 121},
{83, 113},
{83, 105},
{83, 99},
{51, 118},
{51, 111},
{51, 104},
{51, 98},
{19, 116},
{19, 109},
{19, 102},
{19, 98},
{19, 93},
{171, 113},
{171, 107},
{171, 99},
{139, 120},
{139, 113},
{139, 107},
{139, 99},
{107, 120},
{107, 113},
{107, 107},
{107, 99},
{75, 120},
{75, 113},
{75, 107},
{75, 99},
{43, 120},
{43, 113},
{43, 107},
{43, 99},
{11, 120},
{11, 113},
{11, 107},
{11, 99},
{131, 107},
{131, 99},
{99, 120},
{99, 113},
{99, 107},
{99, 99},
{67, 120},
{67, 113},
{67, 107},
{67, 99},
{35, 120},
{35, 113},
{35, 107},
{35, 99},
{3, 120} } /* 5.x GHz, lowest power */
};
static inline u8 iwl_hw_reg_fix_power_index(int index)
{
if (index < 0)
return 0;
if (index >= IWL_MAX_GAIN_ENTRIES)
return IWL_MAX_GAIN_ENTRIES - 1;
return (u8) index;
}
/* Kick off thermal recalibration check every 60 seconds */
#define REG_RECALIB_PERIOD (60)
/**
* iwl_hw_reg_set_scan_power - Set Tx power for scan probe requests
*
* Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
* or 6 Mbit (OFDM) rates.
*/
static void iwl_hw_reg_set_scan_power(struct iwl_priv *priv, u32 scan_tbl_index,
s32 rate_index, const s8 *clip_pwrs,
struct iwl_channel_info *ch_info,
int band_index)
{
struct iwl_scan_power_info *scan_power_info;
s8 power;
u8 power_index;
scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
/* use this channel group's 6Mbit clipping/saturation pwr,
* but cap at regulatory scan power restriction (set during init
* based on eeprom channel data) for this channel. */
power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX]);
/* further limit to user's max power preference.
* FIXME: Other spectrum management power limitations do not
* seem to apply?? */
power = min(power, priv->user_txpower_limit);
scan_power_info->requested_power = power;
/* find difference between new scan *power* and current "normal"
* Tx *power* for 6Mb. Use this difference (x2) to adjust the
* current "normal" temperature-compensated Tx power *index* for
* this rate (1Mb or 6Mb) to yield new temp-compensated scan power
* *index*. */
power_index = ch_info->power_info[rate_index].power_table_index
- (power - ch_info->power_info
[IWL_RATE_6M_INDEX].requested_power) * 2;
/* store reference index that we use when adjusting *all* scan
* powers. So we can accommodate user (all channel) or spectrum
* management (single channel) power changes "between" temperature
* feedback compensation procedures.
* don't force fit this reference index into gain table; it may be a
* negative number. This will help avoid errors when we're at
* the lower bounds (highest gains, for warmest temperatures)
* of the table. */
/* don't exceed table bounds for "real" setting */
power_index = iwl_hw_reg_fix_power_index(power_index);
scan_power_info->power_table_index = power_index;
scan_power_info->tpc.tx_gain =
power_gain_table[band_index][power_index].tx_gain;
scan_power_info->tpc.dsp_atten =
power_gain_table[band_index][power_index].dsp_atten;
}
/**
* iwl_hw_reg_send_txpower - fill in Tx Power command with gain settings
*
* Configures power settings for all rates for the current channel,
* using values from channel info struct, and send to NIC
*/
int iwl_hw_reg_send_txpower(struct iwl_priv *priv)
{
int rate_idx;
const struct iwl_channel_info *ch_info = NULL;
struct iwl_txpowertable_cmd txpower = {
.channel = priv->active_rxon.channel,
};
txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
ch_info = iwl_get_channel_info(priv,
priv->phymode,
le16_to_cpu(priv->active_rxon.channel));
if (!ch_info) {
IWL_ERROR
("Failed to get channel info for channel %d [%d]\n",
le16_to_cpu(priv->active_rxon.channel), priv->phymode);
return -EINVAL;
}
if (!is_channel_valid(ch_info)) {
IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
"non-Tx channel.\n");
return 0;
}
/* fill cmd with power settings for all rates for current channel */
for (rate_idx = 0; rate_idx < IWL_RATE_COUNT; rate_idx++) {
txpower.power[rate_idx].tpc = ch_info->power_info[rate_idx].tpc;
txpower.power[rate_idx].rate = iwl_rates[rate_idx].plcp;
IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
le16_to_cpu(txpower.channel),
txpower.band,
txpower.power[rate_idx].tpc.tx_gain,
txpower.power[rate_idx].tpc.dsp_atten,
txpower.power[rate_idx].rate);
}
return iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
sizeof(struct iwl_txpowertable_cmd), &txpower);
}
/**
* iwl_hw_reg_set_new_power - Configures power tables at new levels
* @ch_info: Channel to update. Uses power_info.requested_power.
*
* Replace requested_power and base_power_index ch_info fields for
* one channel.
*
* Called if user or spectrum management changes power preferences.
* Takes into account h/w and modulation limitations (clip power).
*
* This does *not* send anything to NIC, just sets up ch_info for one channel.
*
* NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
* properly fill out the scan powers, and actual h/w gain settings,
* and send changes to NIC
*/
static int iwl_hw_reg_set_new_power(struct iwl_priv *priv,
struct iwl_channel_info *ch_info)
{
struct iwl_channel_power_info *power_info;
int power_changed = 0;
int i;
const s8 *clip_pwrs;
int power;
/* Get this chnlgrp's rate-to-max/clip-powers table */
clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
/* Get this channel's rate-to-current-power settings table */
power_info = ch_info->power_info;
/* update OFDM Txpower settings */
for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE;
i++, ++power_info) {
int delta_idx;
/* limit new power to be no more than h/w capability */
power = min(ch_info->curr_txpow, clip_pwrs[i]);
if (power == power_info->requested_power)
continue;
/* find difference between old and new requested powers,
* update base (non-temp-compensated) power index */
delta_idx = (power - power_info->requested_power) * 2;
power_info->base_power_index -= delta_idx;
/* save new requested power value */
power_info->requested_power = power;
power_changed = 1;
}
/* update CCK Txpower settings, based on OFDM 12M setting ...
* ... all CCK power settings for a given channel are the *same*. */
if (power_changed) {
power =
ch_info->power_info[IWL_RATE_12M_INDEX].
requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
/* do all CCK rates' iwl_channel_power_info structures */
for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++) {
power_info->requested_power = power;
power_info->base_power_index =
ch_info->power_info[IWL_RATE_12M_INDEX].
base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
++power_info;
}
}
return 0;
}
/**
* iwl_hw_reg_get_ch_txpower_limit - returns new power limit for channel
*
* NOTE: Returned power limit may be less (but not more) than requested,
* based strictly on regulatory (eeprom and spectrum mgt) limitations
* (no consideration for h/w clipping limitations).
*/
static int iwl_hw_reg_get_ch_txpower_limit(struct iwl_channel_info *ch_info)
{
s8 max_power;
#if 0
/* if we're using TGd limits, use lower of TGd or EEPROM */
if (ch_info->tgd_data.max_power != 0)
max_power = min(ch_info->tgd_data.max_power,
ch_info->eeprom.max_power_avg);
/* else just use EEPROM limits */
else
#endif
max_power = ch_info->eeprom.max_power_avg;
return min(max_power, ch_info->max_power_avg);
}
/**
* iwl_hw_reg_comp_txpower_temp - Compensate for temperature
*
* Compensate txpower settings of *all* channels for temperature.
* This only accounts for the difference between current temperature
* and the factory calibration temperatures, and bases the new settings
* on the channel's base_power_index.
*
* If RxOn is "associated", this sends the new Txpower to NIC!
*/
static int iwl_hw_reg_comp_txpower_temp(struct iwl_priv *priv)
{
struct iwl_channel_info *ch_info = NULL;
int delta_index;
const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
u8 a_band;
u8 rate_index;
u8 scan_tbl_index;
u8 i;
int ref_temp;
int temperature = priv->temperature;
/* set up new Tx power info for each and every channel, 2.4 and 5.x */
for (i = 0; i < priv->channel_count; i++) {
ch_info = &priv->channel_info[i];
a_band = is_channel_a_band(ch_info);
/* Get this chnlgrp's factory calibration temperature */
ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
temperature;
/* get power index adjustment based on curr and factory
* temps */
delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
ref_temp);
/* set tx power value for all rates, OFDM and CCK */
for (rate_index = 0; rate_index < IWL_RATE_COUNT;
rate_index++) {
int power_idx =
ch_info->power_info[rate_index].base_power_index;
/* temperature compensate */
power_idx += delta_index;
/* stay within table range */
power_idx = iwl_hw_reg_fix_power_index(power_idx);
ch_info->power_info[rate_index].
power_table_index = (u8) power_idx;
ch_info->power_info[rate_index].tpc =
power_gain_table[a_band][power_idx];
}
/* Get this chnlgrp's rate-to-max/clip-powers table */
clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
/* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
for (scan_tbl_index = 0;
scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
s32 actual_index = (scan_tbl_index == 0) ?
IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
actual_index, clip_pwrs,
ch_info, a_band);
}
}
/* send Txpower command for current channel to ucode */
return iwl_hw_reg_send_txpower(priv);
}
int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
{
struct iwl_channel_info *ch_info;
s8 max_power;
u8 a_band;
u8 i;
if (priv->user_txpower_limit == power) {
IWL_DEBUG_POWER("Requested Tx power same as current "
"limit: %ddBm.\n", power);
return 0;
}
IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
priv->user_txpower_limit = power;
/* set up new Tx powers for each and every channel, 2.4 and 5.x */
for (i = 0; i < priv->channel_count; i++) {
ch_info = &priv->channel_info[i];
a_band = is_channel_a_band(ch_info);
/* find minimum power of all user and regulatory constraints
* (does not consider h/w clipping limitations) */
max_power = iwl_hw_reg_get_ch_txpower_limit(ch_info);
max_power = min(power, max_power);
if (max_power != ch_info->curr_txpow) {
ch_info->curr_txpow = max_power;
/* this considers the h/w clipping limitations */
iwl_hw_reg_set_new_power(priv, ch_info);
}
}
/* update txpower settings for all channels,
* send to NIC if associated. */
is_temp_calib_needed(priv);
iwl_hw_reg_comp_txpower_temp(priv);
return 0;
}
/* will add 3945 channel switch cmd handling later */
int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel)
{
return 0;
}
/**
* iwl3945_reg_txpower_periodic - called when time to check our temperature.
*
* -- reset periodic timer
* -- see if temp has changed enough to warrant re-calibration ... if so:
* -- correct coeffs for temp (can reset temp timer)
* -- save this temp as "last",
* -- send new set of gain settings to NIC
* NOTE: This should continue working, even when we're not associated,
* so we can keep our internal table of scan powers current. */
void iwl3945_reg_txpower_periodic(struct iwl_priv *priv)
{
/* This will kick in the "brute force"
* iwl_hw_reg_comp_txpower_temp() below */
if (!is_temp_calib_needed(priv))
goto reschedule;
/* Set up a new set of temp-adjusted TxPowers, send to NIC.
* This is based *only* on current temperature,
* ignoring any previous power measurements */
iwl_hw_reg_comp_txpower_temp(priv);
reschedule:
queue_delayed_work(priv->workqueue,
&priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
}
void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
{
struct iwl_priv *priv = container_of(work, struct iwl_priv,
thermal_periodic.work);
if (test_bit(STATUS_EXIT_PENDING, &priv->status))
return;
mutex_lock(&priv->mutex);
iwl3945_reg_txpower_periodic(priv);
mutex_unlock(&priv->mutex);
}
/**
* iwl_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
* for the channel.
*
* This function is used when initializing channel-info structs.
*
* NOTE: These channel groups do *NOT* match the bands above!
* These channel groups are based on factory-tested channels;
* on A-band, EEPROM's "group frequency" entries represent the top
* channel in each group 1-4. Group 5 All B/G channels are in group 0.
*/
static u16 iwl_hw_reg_get_ch_grp_index(struct iwl_priv *priv,
const struct iwl_channel_info *ch_info)
{
struct iwl_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
u8 group;
u16 group_index = 0; /* based on factory calib frequencies */
u8 grp_channel;
/* Find the group index for the channel ... don't use index 1(?) */
if (is_channel_a_band(ch_info)) {
for (group = 1; group < 5; group++) {
grp_channel = ch_grp[group].group_channel;
if (ch_info->channel <= grp_channel) {
group_index = group;
break;
}
}
/* group 4 has a few channels *above* its factory cal freq */
if (group == 5)
group_index = 4;
} else
group_index = 0; /* 2.4 GHz, group 0 */
IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
group_index);
return group_index;
}
/**
* iwl_hw_reg_get_matched_power_index - Interpolate to get nominal index
*
* Interpolate to get nominal (i.e. at factory calibration temperature) index
* into radio/DSP gain settings table for requested power.
*/
static int iwl_hw_reg_get_matched_power_index(struct iwl_priv *priv,
s8 requested_power,
s32 setting_index, s32 *new_index)
{
const struct iwl_eeprom_txpower_group *chnl_grp = NULL;
s32 index0, index1;
s32 power = 2 * requested_power;
s32 i;
const struct iwl_eeprom_txpower_sample *samples;
s32 gains0, gains1;
s32 res;
s32 denominator;
chnl_grp = &priv->eeprom.groups[setting_index];
samples = chnl_grp->samples;
for (i = 0; i < 5; i++) {
if (power == samples[i].power) {
*new_index = samples[i].gain_index;
return 0;
}
}
if (power > samples[1].power) {
index0 = 0;
index1 = 1;
} else if (power > samples[2].power) {
index0 = 1;
index1 = 2;
} else if (power > samples[3].power) {
index0 = 2;
index1 = 3;
} else {
index0 = 3;
index1 = 4;
}
denominator = (s32) samples[index1].power - (s32) samples[index0].power;
if (denominator == 0)
return -EINVAL;
gains0 = (s32) samples[index0].gain_index * (1 << 19);
gains1 = (s32) samples[index1].gain_index * (1 << 19);
res = gains0 + (gains1 - gains0) *
((s32) power - (s32) samples[index0].power) / denominator +
(1 << 18);
*new_index = res >> 19;
return 0;
}
static void iwl_hw_reg_init_channel_groups(struct iwl_priv *priv)
{
u32 i;
s32 rate_index;
const struct iwl_eeprom_txpower_group *group;
IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
s8 *clip_pwrs; /* table of power levels for each rate */
s8 satur_pwr; /* saturation power for each chnl group */
group = &priv->eeprom.groups[i];
/* sanity check on factory saturation power value */
if (group->saturation_power < 40) {
IWL_WARNING("Error: saturation power is %d, "
"less than minimum expected 40\n",
group->saturation_power);
return;
}
/*
* Derive requested power levels for each rate, based on
* hardware capabilities (saturation power for band).
* Basic value is 3dB down from saturation, with further
* power reductions for highest 3 data rates. These
* backoffs provide headroom for high rate modulation
* power peaks, without too much distortion (clipping).
*/
/* we'll fill in this array with h/w max power levels */
clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
/* divide factory saturation power by 2 to find -3dB level */
satur_pwr = (s8) (group->saturation_power >> 1);
/* fill in channel group's nominal powers for each rate */
for (rate_index = 0;
rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
switch (rate_index) {
case IWL_RATE_36M_INDEX:
if (i == 0) /* B/G */
*clip_pwrs = satur_pwr;
else /* A */
*clip_pwrs = satur_pwr - 5;
break;
case IWL_RATE_48M_INDEX:
if (i == 0)
*clip_pwrs = satur_pwr - 7;
else
*clip_pwrs = satur_pwr - 10;
break;
case IWL_RATE_54M_INDEX:
if (i == 0)
*clip_pwrs = satur_pwr - 9;
else
*clip_pwrs = satur_pwr - 12;
break;
default:
*clip_pwrs = satur_pwr;
break;
}
}
}
}
/**
* iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
*
* Second pass (during init) to set up priv->channel_info
*
* Set up Tx-power settings in our channel info database for each VALID
* (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
* and current temperature.
*
* Since this is based on current temperature (at init time), these values may
* not be valid for very long, but it gives us a starting/default point,
* and allows us to active (i.e. using Tx) scan.
*
* This does *not* write values to NIC, just sets up our internal table.
*/
int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv)
{
struct iwl_channel_info *ch_info = NULL;
struct iwl_channel_power_info *pwr_info;
int delta_index;
u8 rate_index;
u8 scan_tbl_index;
const s8 *clip_pwrs; /* array of power levels for each rate */
u8 gain, dsp_atten;
s8 power;
u8 pwr_index, base_pwr_index, a_band;
u8 i;
int temperature;
/* save temperature reference,
* so we can determine next time to calibrate */
temperature = iwl_hw_reg_txpower_get_temperature(priv);
priv->last_temperature = temperature;
iwl_hw_reg_init_channel_groups(priv);
/* initialize Tx power info for each and every channel, 2.4 and 5.x */
for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
i++, ch_info++) {
a_band = is_channel_a_band(ch_info);
if (!is_channel_valid(ch_info))
continue;
/* find this channel's channel group (*not* "band") index */
ch_info->group_index =
iwl_hw_reg_get_ch_grp_index(priv, ch_info);
/* Get this chnlgrp's rate->max/clip-powers table */
clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
/* calculate power index *adjustment* value according to
* diff between current temperature and factory temperature */
delta_index = iwl_hw_reg_adjust_power_by_temp(temperature,
priv->eeprom.groups[ch_info->group_index].
temperature);
IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
ch_info->channel, delta_index, temperature +
IWL_TEMP_CONVERT);
/* set tx power value for all OFDM rates */
for (rate_index = 0; rate_index < IWL_OFDM_RATES;
rate_index++) {
s32 power_idx;
int rc;
/* use channel group's clip-power table,
* but don't exceed channel's max power */
s8 pwr = min(ch_info->max_power_avg,
clip_pwrs[rate_index]);
pwr_info = &ch_info->power_info[rate_index];
/* get base (i.e. at factory-measured temperature)
* power table index for this rate's power */
rc = iwl_hw_reg_get_matched_power_index(priv, pwr,
ch_info->group_index,
&power_idx);
if (rc) {
IWL_ERROR("Invalid power index\n");
return rc;
}
pwr_info->base_power_index = (u8) power_idx;
/* temperature compensate */
power_idx += delta_index;
/* stay within range of gain table */
power_idx = iwl_hw_reg_fix_power_index(power_idx);
/* fill 1 OFDM rate's iwl_channel_power_info struct */
pwr_info->requested_power = pwr;
pwr_info->power_table_index = (u8) power_idx;
pwr_info->tpc.tx_gain =
power_gain_table[a_band][power_idx].tx_gain;
pwr_info->tpc.dsp_atten =
power_gain_table[a_band][power_idx].dsp_atten;
}
/* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX];
power = pwr_info->requested_power +
IWL_CCK_FROM_OFDM_POWER_DIFF;
pwr_index = pwr_info->power_table_index +
IWL_CCK_FROM_OFDM_INDEX_DIFF;
base_pwr_index = pwr_info->base_power_index +
IWL_CCK_FROM_OFDM_INDEX_DIFF;
/* stay within table range */
pwr_index = iwl_hw_reg_fix_power_index(pwr_index);
gain = power_gain_table[a_band][pwr_index].tx_gain;
dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
/* fill each CCK rate's iwl_channel_power_info structure
* NOTE: All CCK-rate Txpwrs are the same for a given chnl!
* NOTE: CCK rates start at end of OFDM rates! */
for (rate_index = IWL_OFDM_RATES;
rate_index < IWL_RATE_COUNT; rate_index++) {
pwr_info = &ch_info->power_info[rate_index];
pwr_info->requested_power = power;
pwr_info->power_table_index = pwr_index;
pwr_info->base_power_index = base_pwr_index;
pwr_info->tpc.tx_gain = gain;
pwr_info->tpc.dsp_atten = dsp_atten;
}
/* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
for (scan_tbl_index = 0;
scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
s32 actual_index = (scan_tbl_index == 0) ?
IWL_RATE_1M_INDEX : IWL_RATE_6M_INDEX;
iwl_hw_reg_set_scan_power(priv, scan_tbl_index,
actual_index, clip_pwrs, ch_info, a_band);
}
}
return 0;
}
int iwl_hw_rxq_stop(struct iwl_priv *priv)
{
int rc;
unsigned long flags;
spin_lock_irqsave(&priv->lock, flags);
rc = iwl_grab_restricted_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
iwl_write_restricted(priv, FH_RCSR_CONFIG(0), 0);
rc = iwl_poll_restricted_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
if (rc < 0)
IWL_ERROR("Can't stop Rx DMA.\n");
iwl_release_restricted_access(priv);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
}
int iwl_hw_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq)
{
int rc;
unsigned long flags;
int txq_id = txq->q.id;
struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
spin_lock_irqsave(&priv->lock, flags);
rc = iwl_grab_restricted_access(priv);
if (rc) {
spin_unlock_irqrestore(&priv->lock, flags);
return rc;
}
iwl_write_restricted(priv, FH_CBCC_CTRL(txq_id), 0);
iwl_write_restricted(priv, FH_CBCC_BASE(txq_id), 0);
iwl_write_restricted(priv, FH_TCSR_CONFIG(txq_id),
ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
iwl_release_restricted_access(priv);
/* fake read to flush all prev. writes */
iwl_read32(priv, FH_TSSR_CBB_BASE);
spin_unlock_irqrestore(&priv->lock, flags);
return 0;
}
int iwl_hw_get_rx_read(struct iwl_priv *priv)
{
struct iwl_shared *shared_data = priv->hw_setting.shared_virt;
return le32_to_cpu(shared_data->rx_read_ptr[0]);
}
/**
* iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
*/
int iwl3945_init_hw_rate_table(struct iwl_priv *priv)
{
int rc, i;
struct iwl_rate_scaling_cmd rate_cmd = {
.reserved = {0, 0, 0},
};
struct iwl_rate_scaling_info *table = rate_cmd.table;
for (i = 0; i < ARRAY_SIZE(iwl_rates); i++) {
table[i].rate_n_flags =
iwl_hw_set_rate_n_flags(iwl_rates[i].plcp, 0);
table[i].try_cnt = priv->retry_rate;
table[i].next_rate_index = iwl_get_prev_ieee_rate(i);
}
switch (priv->phymode) {
case MODE_IEEE80211A:
IWL_DEBUG_RATE("Select A mode rate scale\n");
/* If one of the following CCK rates is used,
* have it fall back to the 6M OFDM rate */
for (i = IWL_FIRST_CCK_RATE; i <= IWL_LAST_CCK_RATE; i++)
table[i].next_rate_index = IWL_FIRST_OFDM_RATE;
/* Don't fall back to CCK rates */
table[IWL_RATE_12M_INDEX].next_rate_index = IWL_RATE_9M_INDEX;
/* Don't drop out of OFDM rates */
table[IWL_FIRST_OFDM_RATE].next_rate_index =
IWL_FIRST_OFDM_RATE;
break;
case MODE_IEEE80211B:
IWL_DEBUG_RATE("Select B mode rate scale\n");
/* If an OFDM rate is used, have it fall back to the
* 1M CCK rates */
for (i = IWL_FIRST_OFDM_RATE; i <= IWL_LAST_OFDM_RATE; i++)
table[i].next_rate_index = IWL_FIRST_CCK_RATE;
/* CCK shouldn't fall back to OFDM... */
table[IWL_RATE_11M_INDEX].next_rate_index = IWL_RATE_5M_INDEX;
break;
default:
IWL_DEBUG_RATE("Select G mode rate scale\n");
break;
}
/* Update the rate scaling for control frame Tx */
rate_cmd.table_id = 0;
rc = iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
&rate_cmd);
if (rc)
return rc;
/* Update the rate scaling for data frame Tx */
rate_cmd.table_id = 1;
return iwl_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
&rate_cmd);
}
int iwl_hw_set_hw_setting(struct iwl_priv *priv)
{
memset((void *)&priv->hw_setting, 0,
sizeof(struct iwl_driver_hw_info));
priv->hw_setting.shared_virt =
pci_alloc_consistent(priv->pci_dev,
sizeof(struct iwl_shared),
&priv->hw_setting.shared_phys);
if (!priv->hw_setting.shared_virt) {
IWL_ERROR("failed to allocate pci memory\n");
mutex_unlock(&priv->mutex);
return -ENOMEM;
}
priv->hw_setting.ac_queue_count = AC_NUM;
priv->hw_setting.rx_buffer_size = IWL_RX_BUF_SIZE;
priv->hw_setting.tx_cmd_len = sizeof(struct iwl_tx_cmd);
priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
priv->hw_setting.cck_flag = 0;
priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
return 0;
}
unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
struct iwl_frame *frame, u8 rate)
{
struct iwl_tx_beacon_cmd *tx_beacon_cmd;
unsigned int frame_size;
tx_beacon_cmd = (struct iwl_tx_beacon_cmd *)&frame->u;
memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
frame_size = iwl_fill_beacon_frame(priv,
tx_beacon_cmd->frame,
BROADCAST_ADDR,
sizeof(frame->u) - sizeof(*tx_beacon_cmd));
BUG_ON(frame_size > MAX_MPDU_SIZE);
tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
tx_beacon_cmd->tx.rate = rate;
tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
TX_CMD_FLG_TSF_MSK);
/* supp_rates[0] == OFDM */
tx_beacon_cmd->tx.supp_rates[0] = IWL_OFDM_BASIC_RATES_MASK;
/* supp_rates[1] == CCK
*
* NOTE: IWL_*_RATES_MASK are not in the order that supp_rates
* expects so we have to shift them around.
*
* supp_rates expects:
* CCK rates are bit0..3
*
* However IWL_*_RATES_MASK has:
* CCK rates are bit8..11
*/
tx_beacon_cmd->tx.supp_rates[1] =
(IWL_CCK_BASIC_RATES_MASK >> 8) & 0xF;
return (sizeof(struct iwl_tx_beacon_cmd) + frame_size);
}
void iwl_hw_rx_handler_setup(struct iwl_priv *priv)
{
priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
}
void iwl_hw_setup_deferred_work(struct iwl_priv *priv)
{
INIT_DELAYED_WORK(&priv->thermal_periodic,
iwl3945_bg_reg_txpower_periodic);
}
void iwl_hw_cancel_deferred_work(struct iwl_priv *priv)
{
cancel_delayed_work(&priv->thermal_periodic);
}
struct pci_device_id iwl_hw_card_ids[] = {
{0x8086, 0x4222, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0x8086, 0x4227, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
{0}
};
inline int iwl_eeprom_aqcuire_semaphore(struct iwl_priv *priv)
{
_iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
return 0;
}
MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
drivers/net/wireless/iwlwifi/iwl-3945.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_3945_h__
#define __iwl_3945_h__
/*
* Forward declare iwl-3945.c functions for iwl-base.c
*/
extern int iwl_eeprom_aqcuire_semaphore(struct iwl_priv *priv);
extern __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv);
extern int iwl3945_init_hw_rate_table(struct iwl_priv *priv);
extern void iwl3945_reg_txpower_periodic(struct iwl_priv *priv);
extern void iwl3945_bg_reg_txpower_periodic(struct work_struct *work);
extern int iwl3945_txpower_set_from_eeprom(struct iwl_priv *priv);
extern u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id,
u16 tx_rate, u8 flags);
#endif
drivers/net/wireless/iwlwifi/iwl-4965-hw.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU Geeral Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
* USA
*
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
* BSD LICENSE
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef __iwl_4965_hw_h__
#define __iwl_4965_hw_h__
#define IWL_RX_BUF_SIZE (4 * 1024)
#define IWL_MAX_BSM_SIZE BSM_SRAM_SIZE
#define KDR_RTC_INST_UPPER_BOUND (0x018000)
#define KDR_RTC_DATA_UPPER_BOUND (0x80A000)
#define KDR_RTC_INST_SIZE (KDR_RTC_INST_UPPER_BOUND - RTC_INST_LOWER_BOUND)
#define KDR_RTC_DATA_SIZE (KDR_RTC_DATA_UPPER_BOUND - RTC_DATA_LOWER_BOUND)
#define IWL_MAX_INST_SIZE KDR_RTC_INST_SIZE
#define IWL_MAX_DATA_SIZE KDR_RTC_DATA_SIZE
static inline int iwl_hw_valid_rtc_data_addr(u32 addr)
{
return (addr >= RTC_DATA_LOWER_BOUND) &&
(addr < KDR_RTC_DATA_UPPER_BOUND);
}
/********************* START TXPOWER *****************************************/
enum {
HT_IE_EXT_CHANNEL_NONE = 0,
HT_IE_EXT_CHANNEL_ABOVE,
HT_IE_EXT_CHANNEL_INVALID,
HT_IE_EXT_CHANNEL_BELOW,
HT_IE_EXT_CHANNEL_MAX
};
enum {
CALIB_CH_GROUP_1 = 0,
CALIB_CH_GROUP_2 = 1,
CALIB_CH_GROUP_3 = 2,
CALIB_CH_GROUP_4 = 3,
CALIB_CH_GROUP_5 = 4,
CALIB_CH_GROUP_MAX
};
/* Temperature calibration offset is 3% 0C in Kelvin */
#define TEMPERATURE_CALIB_KELVIN_OFFSET 8
#define TEMPERATURE_CALIB_A_VAL 259
#define IWL_TX_POWER_TEMPERATURE_MIN (263)
#define IWL_TX_POWER_TEMPERATURE_MAX (410)
#define IWL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(t) \
(((t) < IWL_TX_POWER_TEMPERATURE_MIN) || \
((t) > IWL_TX_POWER_TEMPERATURE_MAX))
#define IWL_TX_POWER_ILLEGAL_TEMPERATURE (300)
#define IWL_TX_POWER_TEMPERATURE_DIFFERENCE (2)
#define IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION (6)
#define IWL_TX_POWER_TARGET_POWER_MIN (0) /* 0 dBm = 1 milliwatt */
#define IWL_TX_POWER_TARGET_POWER_MAX (16) /* 16 dBm */
/* timeout equivalent to 3 minutes */
#define IWL_TX_POWER_TIMELIMIT_NOCALIB 1800000000
#define IWL_TX_POWER_CCK_COMPENSATION (9)
#define MIN_TX_GAIN_INDEX (0)
#define MIN_TX_GAIN_INDEX_52GHZ_EXT (-9)
#define MAX_TX_GAIN_INDEX_52GHZ (98)
#define MIN_TX_GAIN_52GHZ (98)
#define MAX_TX_GAIN_INDEX_24GHZ (98)
#define MIN_TX_GAIN_24GHZ (98)
#define MAX_TX_GAIN (0)
#define MAX_TX_GAIN_52GHZ_EXT (-9)
#define IWL_TX_POWER_DEFAULT_REGULATORY_24 (34)
#define IWL_TX_POWER_DEFAULT_REGULATORY_52 (34)
#define IWL_TX_POWER_REGULATORY_MIN (0)
#define IWL_TX_POWER_REGULATORY_MAX (34)
#define IWL_TX_POWER_DEFAULT_SATURATION_24 (38)
#define IWL_TX_POWER_DEFAULT_SATURATION_52 (38)
#define IWL_TX_POWER_SATURATION_MIN (20)
#define IWL_TX_POWER_SATURATION_MAX (50)
/* dv *0.4 = dt; so that 5 degrees temperature diff equals
* 12.5 in voltage diff */
#define IWL_TX_TEMPERATURE_UPDATE_LIMIT 9
#define IWL_INVALID_CHANNEL (0xffffffff)
#define IWL_TX_POWER_REGITRY_BIT (2)
#define MIN_IWL_TX_POWER_CALIB_DUR (100)
#define IWL_CCK_FROM_OFDM_POWER_DIFF (-5)
#define IWL_CCK_FROM_OFDM_INDEX_DIFF (9)
/* Number of entries in the gain table */
#define POWER_GAIN_NUM_ENTRIES 78
#define TX_POW_MAX_SESSION_NUM 5
/* timeout equivalent to 3 minutes */
#define TX_IWL_TIMELIMIT_NOCALIB 1800000000
/* Kedron TX_CALIB_STATES */
#define IWL_TX_CALIB_STATE_SEND_TX 0x00000001
#define IWL_TX_CALIB_WAIT_TX_RESPONSE 0x00000002
#define IWL_TX_CALIB_ENABLED 0x00000004
#define IWL_TX_CALIB_XVT_ON 0x00000008
#define IWL_TX_CALIB_TEMPERATURE_CORRECT 0x00000010
#define IWL_TX_CALIB_WORKING_WITH_XVT 0x00000020
#define IWL_TX_CALIB_XVT_PERIODICAL 0x00000040
#define NUM_IWL_TX_CALIB_SETTINS 5 /* Number of tx correction groups */
#define IWL_MIN_POWER_IN_VP_TABLE 1 /* 0.5dBm multiplied by 2 */
#define IWL_MAX_POWER_IN_VP_TABLE 40 /* 20dBm - multiplied by 2 (because
* entries are for each 0.5dBm) */
#define IWL_STEP_IN_VP_TABLE 1 /* 0.5dB - multiplied by 2 */
#define IWL_NUM_POINTS_IN_VPTABLE \
(1 + IWL_MAX_POWER_IN_VP_TABLE - IWL_MIN_POWER_IN_VP_TABLE)
#define MIN_TX_GAIN_INDEX (0)
#define MAX_TX_GAIN_INDEX_52GHZ (98)
#define MIN_TX_GAIN_52GHZ (98)
#define MAX_TX_GAIN_INDEX_24GHZ (98)
#define MIN_TX_GAIN_24GHZ (98)
#define MAX_TX_GAIN (0)
/* First and last channels of all groups */
#define CALIB_IWL_TX_ATTEN_GR1_FCH 34
#define CALIB_IWL_TX_ATTEN_GR1_LCH 43
#define CALIB_IWL_TX_ATTEN_GR2_FCH 44
#define CALIB_IWL_TX_ATTEN_GR2_LCH 70
#define CALIB_IWL_TX_ATTEN_GR3_FCH 71
#define CALIB_IWL_TX_ATTEN_GR3_LCH 124
#define CALIB_IWL_TX_ATTEN_GR4_FCH 125
#define CALIB_IWL_TX_ATTEN_GR4_LCH 200
#define CALIB_IWL_TX_ATTEN_GR5_FCH 1
#define CALIB_IWL_TX_ATTEN_GR5_LCH 20
union iwl_tx_power_dual_stream {
struct {
u8 radio_tx_gain[2];
u8 dsp_predis_atten[2];
} s;
u32 dw;
};
/********************* END TXPOWER *****************************************/
/* HT flags */
#define RXON_FLG_CTRL_CHANNEL_LOC_POS (22)
#define RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK __constant_cpu_to_le32(0x1<<22)
#define RXON_FLG_HT_OPERATING_MODE_POS (23)
#define RXON_FLG_HT_PROT_MSK __constant_cpu_to_le32(0x1<<23)
#define RXON_FLG_FAT_PROT_MSK __constant_cpu_to_le32(0x2<<23)
#define RXON_FLG_CHANNEL_MODE_POS (25)
#define RXON_FLG_CHANNEL_MODE_MSK __constant_cpu_to_le32(0x3<<25)
#define RXON_FLG_CHANNEL_MODE_PURE_40_MSK __constant_cpu_to_le32(0x1<<25)
#define RXON_FLG_CHANNEL_MODE_MIXED_MSK __constant_cpu_to_le32(0x2<<25)
#define RXON_RX_CHAIN_DRIVER_FORCE_MSK __constant_cpu_to_le16(0x1<<0)
#define RXON_RX_CHAIN_VALID_MSK __constant_cpu_to_le16(0x7<<1)
#define RXON_RX_CHAIN_VALID_POS (1)
#define RXON_RX_CHAIN_FORCE_SEL_MSK __constant_cpu_to_le16(0x7<<4)
#define RXON_RX_CHAIN_FORCE_SEL_POS (4)
#define RXON_RX_CHAIN_FORCE_MIMO_SEL_MSK __constant_cpu_to_le16(0x7<<7)
#define RXON_RX_CHAIN_FORCE_MIMO_SEL_POS (7)
#define RXON_RX_CHAIN_CNT_MSK __constant_cpu_to_le16(0x3<<10)
#define RXON_RX_CHAIN_CNT_POS (10)
#define RXON_RX_CHAIN_MIMO_CNT_MSK __constant_cpu_to_le16(0x3<<12)
#define RXON_RX_CHAIN_MIMO_CNT_POS (12)
#define RXON_RX_CHAIN_MIMO_FORCE_MSK __constant_cpu_to_le16(0x1<<14)
#define RXON_RX_CHAIN_MIMO_FORCE_POS (14)
#define MCS_DUP_6M_PLCP 0x20
/* OFDM HT rate masks */
/* ***************************************** */
#define R_MCS_6M_MSK 0x1
#define R_MCS_12M_MSK 0x2
#define R_MCS_18M_MSK 0x4
#define R_MCS_24M_MSK 0x8
#define R_MCS_36M_MSK 0x10
#define R_MCS_48M_MSK 0x20
#define R_MCS_54M_MSK 0x40
#define R_MCS_60M_MSK 0x80
#define R_MCS_12M_DUAL_MSK 0x100
#define R_MCS_24M_DUAL_MSK 0x200
#define R_MCS_36M_DUAL_MSK 0x400
#define R_MCS_48M_DUAL_MSK 0x800
#define is_legacy(tbl) (((tbl) == LQ_G) || ((tbl) == LQ_A))
#define is_siso(tbl) (((tbl) == LQ_SISO))
#define is_mimo(tbl) (((tbl) == LQ_MIMO))
#define is_Ht(tbl) (is_siso(tbl) || is_mimo(tbl))
#define is_a_band(tbl) (((tbl) == LQ_A))
#define is_g_and(tbl) (((tbl) == LQ_G))
/* Flow Handler Definitions */
/**********************/
/* Addresses */
/**********************/
#define FH_MEM_LOWER_BOUND (0x1000)
#define FH_MEM_UPPER_BOUND (0x1EF0)
#define IWL_FH_REGS_LOWER_BOUND (0x1000)
#define IWL_FH_REGS_UPPER_BOUND (0x2000)
#define IWL_FH_KW_MEM_ADDR_REG (FH_MEM_LOWER_BOUND + 0x97C)
/* CBBC Area - Circular buffers base address cache pointers table */
#define FH_MEM_CBBC_LOWER_BOUND (FH_MEM_LOWER_BOUND + 0x9D0)
#define FH_MEM_CBBC_UPPER_BOUND (FH_MEM_LOWER_BOUND + 0xA10)
/* queues 0 - 15 */
#define FH_MEM_CBBC_QUEUE(x) (FH_MEM_CBBC_LOWER_BOUND + (x) * 0x4)
/* RSCSR Area */
#define FH_MEM_RSCSR_LOWER_BOUND (FH_MEM_LOWER_BOUND + 0xBC0)
#define FH_MEM_RSCSR_UPPER_BOUND (FH_MEM_LOWER_BOUND + 0xC00)
#define FH_MEM_RSCSR_CHNL0 (FH_MEM_RSCSR_LOWER_BOUND)
#define FH_RSCSR_CHNL0_STTS_WPTR_REG (FH_MEM_RSCSR_CHNL0)
#define FH_RSCSR_CHNL0_RBDCB_BASE_REG (FH_MEM_RSCSR_CHNL0 + 0x004)
#define FH_RSCSR_CHNL0_RBDCB_WPTR_REG (FH_MEM_RSCSR_CHNL0 + 0x008)
/* RCSR Area - Registers address map */
#define FH_MEM_RCSR_LOWER_BOUND (FH_MEM_LOWER_BOUND + 0xC00)
#define FH_MEM_RCSR_UPPER_BOUND (FH_MEM_LOWER_BOUND + 0xCC0)
#define FH_MEM_RCSR_CHNL0 (FH_MEM_RCSR_LOWER_BOUND)
#define FH_MEM_RCSR_CHNL0_CONFIG_REG (FH_MEM_RCSR_CHNL0)
/* RSSR Area - Rx shared ctrl & status registers */
#define FH_MEM_RSSR_LOWER_BOUND (FH_MEM_LOWER_BOUND + 0xC40)
#define FH_MEM_RSSR_UPPER_BOUND (FH_MEM_LOWER_BOUND + 0xD00)
#define FH_MEM_RSSR_SHARED_CTRL_REG (FH_MEM_RSSR_LOWER_BOUND)
#define FH_MEM_RSSR_RX_STATUS_REG (FH_MEM_RSSR_LOWER_BOUND + 0x004)
#define FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV (FH_MEM_RSSR_LOWER_BOUND + 0x008)
/* TCSR */
#define IWL_FH_TCSR_LOWER_BOUND (IWL_FH_REGS_LOWER_BOUND + 0xD00)
#define IWL_FH_TCSR_UPPER_BOUND (IWL_FH_REGS_LOWER_BOUND + 0xE60)
#define IWL_FH_TCSR_CHNL_NUM (7)
#define IWL_FH_TCSR_CHNL_TX_CONFIG_REG(_chnl) \
(IWL_FH_TCSR_LOWER_BOUND + 0x20 * _chnl)
/* TSSR Area - Tx shared status registers */
/* TSSR */
#define IWL_FH_TSSR_LOWER_BOUND (IWL_FH_REGS_LOWER_BOUND + 0xEA0)
#define IWL_FH_TSSR_UPPER_BOUND (IWL_FH_REGS_LOWER_BOUND + 0xEC0)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG (IWL_FH_TSSR_LOWER_BOUND + 0x008)
#define IWL_FH_TSSR_TX_STATUS_REG (IWL_FH_TSSR_LOWER_BOUND + 0x010)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON (0xFF000000)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON (0x00FF0000)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_64B (0x00000000)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B (0x00000400)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_256B (0x00000800)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_512B (0x00000C00)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON (0x00000100)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON (0x00000080)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH (0x00000020)
#define IWL_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH (0x00000005)
#define IWL_FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_chnl) \
((1 << (_chnl)) << 24)
#define IWL_FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_chnl) \
((1 << (_chnl)) << 16)
#define IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(_chnl) \
(IWL_FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_chnl) | \
IWL_FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_chnl))
/* TCSR: tx_config register values */
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF (0x00000000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_DRIVER (0x00000001)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_ARC (0x00000002)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE_VAL (0x00000000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL (0x00000008)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_NOINT (0x00000000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD (0x00100000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD (0x00200000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT (0x00000000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_ENDTFD (0x00400000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_IFTFD (0x00800000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE (0x00000000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE_EOF (0x40000000)
#define IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE (0x80000000)
#define IWL_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_EMPTY (0x00000000)
#define IWL_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_WAIT (0x00002000)
#define IWL_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID (0x00000003)
#define IWL_FH_TCSR_CHNL_TX_BUF_STS_REG_BIT_TFDB_WPTR (0x00000001)
#define IWL_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM (20)
#define IWL_FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX (12)
/* RCSR: channel 0 rx_config register defines */
#define FH_RCSR_CHNL0_RX_CONFIG_DMA_CHNL_EN_MASK (0xC0000000) /* bits 30-31 */
#define FH_RCSR_CHNL0_RX_CONFIG_RBDBC_SIZE_MASK (0x00F00000) /* bits 20-23 */
#define FH_RCSR_CHNL0_RX_CONFIG_RB_SIZE_MASK (0x00030000) /* bits 16-17 */
#define FH_RCSR_CHNL0_RX_CONFIG_SINGLE_FRAME_MASK (0x00008000) /* bit 15 */
#define FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_MASK (0x00001000) /* bit 12 */
#define FH_RCSR_CHNL0_RX_CONFIG_RB_TIMEOUT_MASK (0x00000FF0) /* bit 4-11 */
#define FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT (20)
#define FH_RCSR_RX_CONFIG_RB_SIZE_BITSHIFT (16)
/* RCSR: rx_config register values */
#define FH_RCSR_RX_CONFIG_CHNL_EN_PAUSE_VAL (0x00000000)
#define FH_RCSR_RX_CONFIG_CHNL_EN_PAUSE_EOF_VAL (0x40000000)
#define FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL (0x80000000)
#define IWL_FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K (0x00000000)
/* RCSR channel 0 config register values */
#define FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_NO_INT_VAL (0x00000000)
#define FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL (0x00001000)
/* RSCSR: defs used in normal mode */
#define FH_RSCSR_CHNL0_RBDCB_WPTR_MASK (0x00000FFF) /* bits 0-11 */
#define SCD_WIN_SIZE 64
#define SCD_FRAME_LIMIT 64
/* memory mapped registers */
#define SCD_START_OFFSET 0xa02c00
#define SCD_SRAM_BASE_ADDR (SCD_START_OFFSET + 0x0)
#define SCD_EMPTY_BITS (SCD_START_OFFSET + 0x4)
#define SCD_DRAM_BASE_ADDR (SCD_START_OFFSET + 0x10)
#define SCD_AIT (SCD_START_OFFSET + 0x18)
#define SCD_TXFACT (SCD_START_OFFSET + 0x1c)
#define SCD_QUEUE_WRPTR(x) (SCD_START_OFFSET + 0x24 + (x) * 4)
#define SCD_QUEUE_RDPTR(x) (SCD_START_OFFSET + 0x64 + (x) * 4)
#define SCD_SETQUEUENUM (SCD_START_OFFSET + 0xa4)
#define SCD_SET_TXSTAT_TXED (SCD_START_OFFSET + 0xa8)
#define SCD_SET_TXSTAT_DONE (SCD_START_OFFSET + 0xac)
#define SCD_SET_TXSTAT_NOT_SCHD (SCD_START_OFFSET + 0xb0)
#define SCD_DECREASE_CREDIT (SCD_START_OFFSET + 0xb4)
#define SCD_DECREASE_SCREDIT (SCD_START_OFFSET + 0xb8)
#define SCD_LOAD_CREDIT (SCD_START_OFFSET + 0xbc)
#define SCD_LOAD_SCREDIT (SCD_START_OFFSET + 0xc0)
#define SCD_BAR (SCD_START_OFFSET + 0xc4)
#define SCD_BAR_DW0 (SCD_START_OFFSET + 0xc8)
#define SCD_BAR_DW1 (SCD_START_OFFSET + 0xcc)
#define SCD_QUEUECHAIN_SEL (SCD_START_OFFSET + 0xd0)
#define SCD_QUERY_REQ (SCD_START_OFFSET + 0xd8)
#define SCD_QUERY_RES (SCD_START_OFFSET + 0xdc)
#define SCD_PENDING_FRAMES (SCD_START_OFFSET + 0xe0)
#define SCD_INTERRUPT_MASK (SCD_START_OFFSET + 0xe4)
#define SCD_INTERRUPT_THRESHOLD (SCD_START_OFFSET + 0xe8)
#define SCD_QUERY_MIN_FRAME_SIZE (SCD_START_OFFSET + 0x100)
#define SCD_QUEUE_STATUS_BITS(x) (SCD_START_OFFSET + 0x104 + (x) * 4)
/* SRAM structures */
#define SCD_CONTEXT_DATA_OFFSET 0x380
#define SCD_TX_STTS_BITMAP_OFFSET 0x400
#define SCD_TRANSLATE_TBL_OFFSET 0x500
#define SCD_CONTEXT_QUEUE_OFFSET(x) (SCD_CONTEXT_DATA_OFFSET + ((x) * 8))
#define SCD_TRANSLATE_TBL_OFFSET_QUEUE(x) \
((SCD_TRANSLATE_TBL_OFFSET + ((x) * 2)) & 0xfffffffc)
#define SCD_TXFACT_REG_TXFIFO_MASK(lo, hi) \
((1<<(hi))|((1<<(hi))-(1<<(lo))))
#define SCD_MODE_REG_BIT_SEARCH_MODE (1<<0)
#define SCD_MODE_REG_BIT_SBYP_MODE (1<<1)
#define SCD_TXFIFO_POS_TID (0)
#define SCD_TXFIFO_POS_RA (4)
#define SCD_QUEUE_STTS_REG_POS_ACTIVE (0)
#define SCD_QUEUE_STTS_REG_POS_TXF (1)
#define SCD_QUEUE_STTS_REG_POS_WSL (5)
#define SCD_QUEUE_STTS_REG_POS_SCD_ACK (8)
#define SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN (10)
#define SCD_QUEUE_STTS_REG_MSK (0x0007FC00)
#define SCD_QUEUE_RA_TID_MAP_RATID_MSK (0x01FF)
#define SCD_QUEUE_CTX_REG1_WIN_SIZE_POS (0)
#define SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK (0x0000007F)
#define SCD_QUEUE_CTX_REG1_CREDIT_POS (8)
#define SCD_QUEUE_CTX_REG1_CREDIT_MSK (0x00FFFF00)
#define SCD_QUEUE_CTX_REG1_SUPER_CREDIT_POS (24)
#define SCD_QUEUE_CTX_REG1_SUPER_CREDIT_MSK (0xFF000000)
#define SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS (16)
#define SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK (0x007F0000)
#define CSR_HW_IF_CONFIG_REG_BIT_KEDRON_R (0x00000010)
#define CSR_HW_IF_CONFIG_REG_MSK_BOARD_VER (0x00000C00)
#define CSR_HW_IF_CONFIG_REG_BIT_MAC_SI (0x00000100)
#define CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI (0x00000200)
static inline u8 iwl_hw_get_rate(__le32 rate_n_flags)
{
return le32_to_cpu(rate_n_flags) & 0xFF;
}
static inline u16 iwl_hw_get_rate_n_flags(__le32 rate_n_flags)
{
return le32_to_cpu(rate_n_flags) & 0xFFFF;
}
static inline __le32 iwl_hw_set_rate_n_flags(u8 rate, u16 flags)
{
return cpu_to_le32(flags|(u16)rate);
}
struct iwl_tfd_frame_data {
__le32 tb1_addr;
__le32 val1;
/* __le32 ptb1_32_35:4; */
#define IWL_tb1_addr_hi_POS 0
#define IWL_tb1_addr_hi_LEN 4
#define IWL_tb1_addr_hi_SYM val1
/* __le32 tb_len1:12; */
#define IWL_tb1_len_POS 4
#define IWL_tb1_len_LEN 12
#define IWL_tb1_len_SYM val1
/* __le32 ptb2_0_15:16; */
#define IWL_tb2_addr_lo16_POS 16
#define IWL_tb2_addr_lo16_LEN 16
#define IWL_tb2_addr_lo16_SYM val1
__le32 val2;
/* __le32 ptb2_16_35:20; */
#define IWL_tb2_addr_hi20_POS 0
#define IWL_tb2_addr_hi20_LEN 20
#define IWL_tb2_addr_hi20_SYM val2
/* __le32 tb_len2:12; */
#define IWL_tb2_len_POS 20
#define IWL_tb2_len_LEN 12
#define IWL_tb2_len_SYM val2
} __attribute__ ((packed));
struct iwl_tfd_frame {
__le32 val0;
/* __le32 rsvd1:24; */
/* __le32 num_tbs:5; */
#define IWL_num_tbs_POS 24
#define IWL_num_tbs_LEN 5
#define IWL_num_tbs_SYM val0
/* __le32 rsvd2:1; */
/* __le32 padding:2; */
struct iwl_tfd_frame_data pa[10];
__le32 reserved;
} __attribute__ ((packed));
#define IWL4965_MAX_WIN_SIZE 64
#define IWL4965_QUEUE_SIZE 256
#define IWL4965_NUM_FIFOS 7
#define IWL_MAX_NUM_QUEUES 16
struct iwl4965_queue_byte_cnt_entry {
__le16 val;
/* __le16 byte_cnt:12; */
#define IWL_byte_cnt_POS 0
#define IWL_byte_cnt_LEN 12
#define IWL_byte_cnt_SYM val
/* __le16 rsvd:4; */
} __attribute__ ((packed));
struct iwl4965_sched_queue_byte_cnt_tbl {
struct iwl4965_queue_byte_cnt_entry tfd_offset[IWL4965_QUEUE_SIZE +
IWL4965_MAX_WIN_SIZE];
u8 dont_care[1024 -
(IWL4965_QUEUE_SIZE + IWL4965_MAX_WIN_SIZE) *
sizeof(__le16)];
} __attribute__ ((packed));
/* Base physical address of iwl_shared is provided to SCD_DRAM_BASE_ADDR
* and &iwl_shared.val0 is provided to FH_RSCSR_CHNL0_STTS_WPTR_REG */
struct iwl_shared {
struct iwl4965_sched_queue_byte_cnt_tbl
queues_byte_cnt_tbls[IWL_MAX_NUM_QUEUES];
__le32 val0;
/* __le32 rb_closed_stts_rb_num:12; */
#define IWL_rb_closed_stts_rb_num_POS 0
#define IWL_rb_closed_stts_rb_num_LEN 12
#define IWL_rb_closed_stts_rb_num_SYM val0
/* __le32 rsrv1:4; */
/* __le32 rb_closed_stts_rx_frame_num:12; */
#define IWL_rb_closed_stts_rx_frame_num_POS 16
#define IWL_rb_closed_stts_rx_frame_num_LEN 12
#define IWL_rb_closed_stts_rx_frame_num_SYM val0
/* __le32 rsrv2:4; */
__le32 val1;
/* __le32 frame_finished_stts_rb_num:12; */
#define IWL_frame_finished_stts_rb_num_POS 0
#define IWL_frame_finished_stts_rb_num_LEN 12
#define IWL_frame_finished_stts_rb_num_SYM val1
/* __le32 rsrv3:4; */
/* __le32 frame_finished_stts_rx_frame_num:12; */
#define IWL_frame_finished_stts_rx_frame_num_POS 16
#define IWL_frame_finished_stts_rx_frame_num_LEN 12
#define IWL_frame_finished_stts_rx_frame_num_SYM val1
/* __le32 rsrv4:4; */
__le32 padding1; /* so that allocation will be aligned to 16B */
__le32 padding2;
} __attribute__ ((packed));
#endif /* __iwl_4965_hw_h__ */
drivers/net/wireless/iwlwifi/iwl-4965-rs.c 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/skbuff.h>
#include <linux/wireless.h>
#include <net/mac80211.h>
#include <net/ieee80211.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
#include <linux/workqueue.h>
#include <net/mac80211.h>
#include <linux/wireless.h>
#include "../net/mac80211/ieee80211_rate.h"
#include "iwlwifi.h"
#include "iwl-helpers.h"
#define RS_NAME "iwl-4965-rs"
#define NUM_TRY_BEFORE_ANTENNA_TOGGLE 1
#define IWL_NUMBER_TRY 1
#define IWL_HT_NUMBER_TRY 3
#define IWL_RATE_MAX_WINDOW 62
#define IWL_RATE_HIGH_TH 10880
#define IWL_RATE_MIN_FAILURE_TH 6
#define IWL_RATE_MIN_SUCCESS_TH 8
#define IWL_RATE_DECREASE_TH 1920
#define IWL_RATE_INCREASE_TH 8960
#define IWL_RATE_SCALE_FLUSH_INTVL (2*HZ) /*2 seconds */
static u8 rs_ht_to_legacy[] = {
IWL_RATE_6M_INDEX, IWL_RATE_6M_INDEX,
IWL_RATE_6M_INDEX, IWL_RATE_6M_INDEX,
IWL_RATE_6M_INDEX,
IWL_RATE_6M_INDEX, IWL_RATE_9M_INDEX,
IWL_RATE_12M_INDEX, IWL_RATE_18M_INDEX,
IWL_RATE_24M_INDEX, IWL_RATE_36M_INDEX,
IWL_RATE_48M_INDEX, IWL_RATE_54M_INDEX
};
struct iwl_rate {
u32 rate_n_flags;
} __attribute__ ((packed));
struct iwl_rate_scale_data {
u64 data;
s32 success_counter;
s32 success_ratio;
s32 counter;
s32 average_tpt;
unsigned long stamp;
};
struct iwl_scale_tbl_info {
enum iwl_table_type lq_type;
enum iwl_antenna_type antenna_type;
u8 is_SGI;
u8 is_fat;
u8 is_dup;
u8 action;
s32 *expected_tpt;
struct iwl_rate current_rate;
struct iwl_rate_scale_data win[IWL_RATE_COUNT];
};
struct iwl_rate_scale_priv {
u8 active_tbl;
u8 enable_counter;
u8 stay_in_tbl;
u8 search_better_tbl;
s32 last_tpt;
u32 table_count_limit;
u32 max_failure_limit;
u32 max_success_limit;
u32 table_count;
u32 total_failed;
u32 total_success;
u32 flush_timer;
u8 action_counter;
u8 antenna;
u8 valid_antenna;
u8 is_green;
u8 is_dup;
u8 phymode;
u8 ibss_sta_added;
u16 active_rate;
u16 active_siso_rate;
u16 active_mimo_rate;
u16 active_rate_basic;
struct iwl_link_quality_cmd lq;
struct iwl_scale_tbl_info lq_info[LQ_SIZE];
};
static void rs_rate_scale_perform(struct iwl_priv *priv,
struct net_device *dev,
struct ieee80211_hdr *hdr,
struct sta_info *sta);
static int rs_fill_link_cmd(struct iwl_rate_scale_priv *lq_data,
struct iwl_rate *tx_mcs,
struct iwl_link_quality_cmd *tbl,
struct sta_info *sta);
static s32 expected_tpt_A[IWL_RATE_COUNT] = {
0, 0, 0, 0, 40, 57, 72, 98, 121, 154, 177, 186, 186
};
static s32 expected_tpt_G[IWL_RATE_COUNT] = {
7, 13, 35, 58, 40, 57, 72, 98, 121, 154, 177, 186, 186
};
static s32 expected_tpt_siso20MHz[IWL_RATE_COUNT] = {
0, 0, 0, 0, 42, 42, 76, 102, 124, 159, 183, 193, 202
};
static s32 expected_tpt_siso20MHzSGI[IWL_RATE_COUNT] = {
0, 0, 0, 0, 46, 46, 82, 110, 132, 168, 192, 202, 211
};
static s32 expected_tpt_mimo20MHz[IWL_RATE_COUNT] = {
0, 0, 0, 0, 74, 74, 123, 155, 179, 214, 236, 244, 251
};
static s32 expected_tpt_mimo20MHzSGI[IWL_RATE_COUNT] = {
0, 0, 0, 0, 81, 81, 131, 164, 188, 222, 243, 251, 257
};
static s32 expected_tpt_siso40MHz[IWL_RATE_COUNT] = {
0, 0, 0, 0, 77, 77, 127, 160, 184, 220, 242, 250, 257
};
static s32 expected_tpt_siso40MHzSGI[IWL_RATE_COUNT] = {
0, 0, 0, 0, 83, 83, 135, 169, 193, 229, 250, 257, 264
};
static s32 expected_tpt_mimo40MHz[IWL_RATE_COUNT] = {
0, 0, 0, 0, 123, 123, 182, 214, 235, 264, 279, 285, 289
};
static s32 expected_tpt_mimo40MHzSGI[IWL_RATE_COUNT] = {
0, 0, 0, 0, 131, 131, 191, 222, 242, 270, 284, 289, 293
};
static int iwl_lq_sync_callback(struct iwl_priv *priv,
struct iwl_cmd *cmd, struct sk_buff *skb)
{
/*We didn't cache the SKB; let the caller free it */
return 1;
}
static inline u8 iwl_rate_get_rate(u32 rate_n_flags)
{
return (u8)(rate_n_flags & 0xFF);
}
static int rs_send_lq_cmd(struct iwl_priv *priv,
struct iwl_link_quality_cmd *lq, u8 flags)
{
#ifdef CONFIG_IWLWIFI_DEBUG
int i;
#endif
int rc = -1;
struct iwl_host_cmd cmd = {
.id = REPLY_TX_LINK_QUALITY_CMD,
.len = sizeof(struct iwl_link_quality_cmd),
.meta.flags = flags,
.data = lq,
};
if ((lq->sta_id == 0xFF) &&
(priv->iw_mode == IEEE80211_IF_TYPE_IBSS))
return rc;
if (lq->sta_id == 0xFF)
lq->sta_id = IWL_AP_ID;
IWL_DEBUG_RATE("lq station id 0x%x\n", lq->sta_id);
IWL_DEBUG_RATE("lq dta 0x%X 0x%X\n",
lq->general_params.single_stream_ant_msk,
lq->general_params.dual_stream_ant_msk);
#ifdef CONFIG_IWLWIFI_DEBUG
for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
IWL_DEBUG_RATE("lq index %d 0x%X\n",
i, lq->rs_table[i].rate_n_flags);
#endif
if (flags & CMD_ASYNC)
cmd.meta.u.callback = iwl_lq_sync_callback;
if (iwl_is_associated(priv) && priv->assoc_station_added &&
priv->lq_mngr.lq_ready)
rc = iwl_send_cmd(priv, &cmd);
return rc;
}
static int rs_rate_scale_clear_window(struct iwl_rate_scale_data *window)
{
window->data = 0;
window->success_counter = 0;
window->success_ratio = IWL_INVALID_VALUE;
window->counter = 0;
window->average_tpt = IWL_INVALID_VALUE;
window->stamp = 0;
return 0;
}
static int rs_collect_tx_data(struct iwl_rate_scale_data *windows,
int scale_index, s32 tpt, u32 status)
{
int rc = 0;
struct iwl_rate_scale_data *window = NULL;
u64 mask;
u8 win_size = IWL_RATE_MAX_WINDOW;
s32 fail_count;
if (scale_index < 0)
return -1;
if (scale_index >= IWL_RATE_COUNT)
return -1;
window = &(windows[scale_index]);
if (window->counter >= win_size) {
window->counter = win_size - 1;
mask = 1;
mask = (mask << (win_size - 1));
if ((window->data & mask)) {
window->data &= ~mask;
window->success_counter = window->success_counter - 1;
}
}
window->counter = window->counter + 1;
mask = window->data;
window->data = (mask << 1);
if (status != 0) {
window->success_counter = window->success_counter + 1;
window->data |= 0x1;
}
if (window->counter > 0)
window->success_ratio = 128 * (100 * window->success_counter)
/ window->counter;
else
window->success_ratio = IWL_INVALID_VALUE;
fail_count = window->counter - window->success_counter;
if ((fail_count >= IWL_RATE_MIN_FAILURE_TH) ||
(window->success_counter >= IWL_RATE_MIN_SUCCESS_TH))
window->average_tpt = (window->success_ratio * tpt + 64) / 128;
else
window->average_tpt = IWL_INVALID_VALUE;
window->stamp = jiffies;
return rc;
}
int static rs_mcs_from_tbl(struct iwl_rate *mcs_rate,
struct iwl_scale_tbl_info *tbl,
int index, u8 use_green)
{
int rc = 0;
if (is_legacy(tbl->lq_type)) {
mcs_rate->rate_n_flags = iwl_rates[index].plcp;
if (index >= IWL_FIRST_CCK_RATE && index <= IWL_LAST_CCK_RATE)
mcs_rate->rate_n_flags |= RATE_MCS_CCK_MSK;
} else if (is_siso(tbl->lq_type)) {
if (index > IWL_LAST_OFDM_RATE)
index = IWL_LAST_OFDM_RATE;
mcs_rate->rate_n_flags = iwl_rates[index].plcp_siso |
RATE_MCS_HT_MSK;
} else {
if (index > IWL_LAST_OFDM_RATE)
index = IWL_LAST_OFDM_RATE;
mcs_rate->rate_n_flags = iwl_rates[index].plcp_mimo |
RATE_MCS_HT_MSK;
}
switch (tbl->antenna_type) {
case ANT_BOTH:
mcs_rate->rate_n_flags |= RATE_MCS_ANT_AB_MSK;
break;
case ANT_MAIN:
mcs_rate->rate_n_flags |= RATE_MCS_ANT_A_MSK;
break;
case ANT_AUX:
mcs_rate->rate_n_flags |= RATE_MCS_ANT_B_MSK;
break;
case ANT_NONE:
break;
}
if (is_legacy(tbl->lq_type))
return rc;
if (tbl->is_fat) {
if (tbl->is_dup)
mcs_rate->rate_n_flags |= RATE_MCS_DUP_MSK;
else
mcs_rate->rate_n_flags |= RATE_MCS_FAT_MSK;
}
if (tbl->is_SGI)
mcs_rate->rate_n_flags |= RATE_MCS_SGI_MSK;
if (use_green) {
mcs_rate->rate_n_flags |= RATE_MCS_GF_MSK;
if (is_siso(tbl->lq_type))
mcs_rate->rate_n_flags &= ~RATE_MCS_SGI_MSK;
}
return rc;
}
static int rs_get_tbl_info_from_mcs(const struct iwl_rate *mcs_rate,
int phymode, struct iwl_scale_tbl_info *tbl,
int *rate_idx)
{
int index;
u32 ant_msk;
index = iwl_rate_index_from_plcp(mcs_rate->rate_n_flags);
if (index == IWL_RATE_INVALID) {
*rate_idx = -1;
return -1;
}
tbl->is_SGI = 0;
tbl->is_fat = 0;
tbl->is_dup = 0;
tbl->antenna_type = ANT_BOTH;
if (!(mcs_rate->rate_n_flags & RATE_MCS_HT_MSK)) {
ant_msk = (mcs_rate->rate_n_flags & RATE_MCS_ANT_AB_MSK);
if (ant_msk == RATE_MCS_ANT_AB_MSK)
tbl->lq_type = LQ_NONE;
else {
if (phymode == MODE_IEEE80211A)
tbl->lq_type = LQ_A;
else
tbl->lq_type = LQ_G;
if (mcs_rate->rate_n_flags & RATE_MCS_ANT_A_MSK)
tbl->antenna_type = ANT_MAIN;
else
tbl->antenna_type = ANT_AUX;
}
*rate_idx = index;
} else if (iwl_rate_get_rate(mcs_rate->rate_n_flags)
<= IWL_RATE_SISO_60M_PLCP) {
tbl->lq_type = LQ_SISO;
ant_msk = (mcs_rate->rate_n_flags & RATE_MCS_ANT_AB_MSK);
if (ant_msk == RATE_MCS_ANT_AB_MSK)
tbl->lq_type = LQ_NONE;
else {
if (mcs_rate->rate_n_flags & RATE_MCS_ANT_A_MSK)
tbl->antenna_type = ANT_MAIN;
else
tbl->antenna_type = ANT_AUX;
}
if (mcs_rate->rate_n_flags & RATE_MCS_SGI_MSK)
tbl->is_SGI = 1;
if ((mcs_rate->rate_n_flags & RATE_MCS_FAT_MSK) ||
(mcs_rate->rate_n_flags & RATE_MCS_DUP_MSK))
tbl->is_fat = 1;
if (mcs_rate->rate_n_flags & RATE_MCS_DUP_MSK)
tbl->is_dup = 1;
*rate_idx = index;
} else {
tbl->lq_type = LQ_MIMO;
if (mcs_rate->rate_n_flags & RATE_MCS_SGI_MSK)
tbl->is_SGI = 1;
if ((mcs_rate->rate_n_flags & RATE_MCS_FAT_MSK) ||
(mcs_rate->rate_n_flags & RATE_MCS_DUP_MSK))
tbl->is_fat = 1;
if (mcs_rate->rate_n_flags & RATE_MCS_DUP_MSK)
tbl->is_dup = 1;
*rate_idx = index;
}
return 0;
}
static inline void rs_toggle_antenna(struct iwl_rate *new_rate,
struct iwl_scale_tbl_info *tbl)
{
if (tbl->antenna_type == ANT_AUX) {
tbl->antenna_type = ANT_MAIN;
new_rate->rate_n_flags &= ~RATE_MCS_ANT_B_MSK;
new_rate->rate_n_flags |= RATE_MCS_ANT_A_MSK;
} else {
tbl->antenna_type = ANT_AUX;
new_rate->rate_n_flags &= ~RATE_MCS_ANT_A_MSK;
new_rate->rate_n_flags |= RATE_MCS_ANT_B_MSK;
}
}
static inline s8 rs_use_green(struct iwl_priv *priv)
{
s8 rc = 0;
#ifdef CONFIG_IWLWIFI_HT
if (!priv->is_ht_enabled || !priv->current_assoc_ht.is_ht)
return 0;
if ((priv->current_assoc_ht.is_green_field) &&
!(priv->current_assoc_ht.operating_mode & 0x4))
rc = 1;
#endif /*CONFIG_IWLWIFI_HT */
return rc;
}
/**
* rs_get_supported_rates - get the available rates
*
* if management frame or broadcast frame only return
* basic available rates.
*
*/
static void rs_get_supported_rates(struct iwl_rate_scale_priv *lq_data,
struct ieee80211_hdr *hdr,
enum iwl_table_type rate_type,
u16 *data_rate)
{
if (is_legacy(rate_type))
*data_rate = lq_data->active_rate;
else {
if (is_siso(rate_type))
*data_rate = lq_data->active_siso_rate;
else
*data_rate = lq_data->active_mimo_rate;
}
if (hdr && is_multicast_ether_addr(hdr->addr1) &&
lq_data->active_rate_basic)
*data_rate = lq_data->active_rate_basic;
}
static u16 rs_get_adjacent_rate(u8 index, u16 rate_mask, int rate_type)
{
u8 high = IWL_RATE_INVALID;
u8 low = IWL_RATE_INVALID;
/* 802.11A or ht walks to the next literal adjascent rate in
* the rate table */
if (is_a_band(rate_type) || !is_legacy(rate_type)) {
int i;
u32 mask;
/* Find the previous rate that is in the rate mask */
i = index - 1;
for (mask = (1 << i); i >= 0; i--, mask >>= 1) {
if (rate_mask & mask) {
low = i;
break;
}
}
/* Find the next rate that is in the rate mask */
i = index + 1;
for (mask = (1 << i); i < IWL_RATE_COUNT; i++, mask <<= 1) {
if (rate_mask & mask) {
high = i;
break;
}
}
return (high << 8) | low;
}
low = index;
while (low != IWL_RATE_INVALID) {
low = iwl_rates[low].prev_rs;
if (low == IWL_RATE_INVALID)
break;
if (rate_mask & (1 << low))
break;
IWL_DEBUG_RATE("Skipping masked lower rate: %d\n", low);
}
high = index;
while (high != IWL_RATE_INVALID) {
high = iwl_rates[high].next_rs;
if (high == IWL_RATE_INVALID)
break;
if (rate_mask & (1 << high))
break;
IWL_DEBUG_RATE("Skipping masked higher rate: %d\n", high);
}
return (high << 8) | low;
}
static int rs_get_lower_rate(struct iwl_rate_scale_priv *lq_data,
struct iwl_scale_tbl_info *tbl, u8 scale_index,
u8 ht_possible, struct iwl_rate *mcs_rate,
struct sta_info *sta)
{
u8 is_green = lq_data->is_green;
s32 low;
u16 rate_mask;
u16 high_low;
u8 switch_to_legacy = 0;
/* check if we need to switch from HT to legacy rates.
* assumption is that mandatory rates (1Mbps or 6Mbps)
* are always supported (spec demand) */
if (!is_legacy(tbl->lq_type) && (!ht_possible || !scale_index)) {
switch_to_legacy = 1;
scale_index = rs_ht_to_legacy[scale_index];
if (lq_data->phymode == MODE_IEEE80211A)
tbl->lq_type = LQ_A;
else
tbl->lq_type = LQ_G;
if ((tbl->antenna_type == ANT_BOTH) ||
(tbl->antenna_type == ANT_NONE))
tbl->antenna_type = ANT_MAIN;
tbl->is_fat = 0;
tbl->is_SGI = 0;
}
rs_get_supported_rates(lq_data, NULL, tbl->lq_type, &rate_mask);
/* mask with station rate restriction */
if (is_legacy(tbl->lq_type)) {
if (lq_data->phymode == (u8) MODE_IEEE80211A)
rate_mask = (u16)(rate_mask &
(sta->supp_rates << IWL_FIRST_OFDM_RATE));
else
rate_mask = (u16)(rate_mask & sta->supp_rates);
}
/* if we did switched from HT to legacy check current rate */
if ((switch_to_legacy) &&
(rate_mask & (1 << scale_index))) {
rs_mcs_from_tbl(mcs_rate, tbl, scale_index, is_green);
return 0;
}
high_low = rs_get_adjacent_rate(scale_index, rate_mask, tbl->lq_type);
low = high_low & 0xff;
if (low != IWL_RATE_INVALID)
rs_mcs_from_tbl(mcs_rate, tbl, low, is_green);
else
rs_mcs_from_tbl(mcs_rate, tbl, scale_index, is_green);
return 0;
}
static void rs_tx_status(void *priv_rate,
struct net_device *dev,
struct sk_buff *skb,
struct ieee80211_tx_status *tx_resp)
{
int status;
u8 retries;
int rs_index, index = 0;
struct iwl_rate_scale_priv *lq;
struct iwl_link_quality_cmd *table;
struct sta_info *sta;
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
struct iwl_priv *priv = (struct iwl_priv *)priv_rate;
struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr);
struct iwl_rate_scale_data *window = NULL;
struct iwl_rate_scale_data *search_win = NULL;
struct iwl_rate tx_mcs;
struct iwl_scale_tbl_info tbl_type;
struct iwl_scale_tbl_info *curr_tbl, *search_tbl;
u8 active_index = 0;
u16 fc = le16_to_cpu(hdr->frame_control);
s32 tpt = 0;
IWL_DEBUG_RATE("get frame ack response, update rate scale window\n");
if (!ieee80211_is_data(fc) || is_multicast_ether_addr(hdr->addr1))
return;
retries = tx_resp->retry_count;
if (retries > 15)
retries = 15;
sta = sta_info_get(local, hdr->addr1);
if (!sta || !sta->rate_ctrl_priv) {
if (sta)
sta_info_put(sta);
return;
}
lq = (struct iwl_rate_scale_priv *)sta->rate_ctrl_priv;
if (!priv->lq_mngr.lq_ready)
return;
if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && !lq->ibss_sta_added)
return;
table = &lq->lq;
active_index = lq->active_tbl;
lq->antenna = (lq->valid_antenna & local->hw.conf.antenna_sel_tx);
if (!lq->antenna)
lq->antenna = lq->valid_antenna;
lq->antenna = lq->valid_antenna;
curr_tbl = &(lq->lq_info[active_index]);
search_tbl = &(lq->lq_info[(1 - active_index)]);
window = (struct iwl_rate_scale_data *)
&(curr_tbl->win[0]);
search_win = (struct iwl_rate_scale_data *)
&(search_tbl->win[0]);
tx_mcs.rate_n_flags = tx_resp->control.tx_rate;
rs_get_tbl_info_from_mcs(&tx_mcs, priv->phymode,
&tbl_type, &rs_index);
if ((rs_index < 0) || (rs_index >= IWL_RATE_COUNT)) {
IWL_DEBUG_RATE("bad rate index at: %d rate 0x%X\n",
rs_index, tx_mcs.rate_n_flags);
sta_info_put(sta);
return;
}
if (retries &&
(tx_mcs.rate_n_flags !=
le32_to_cpu(table->rs_table[0].rate_n_flags))) {
IWL_DEBUG_RATE("initial rate does not match 0x%x 0x%x\n",
tx_mcs.rate_n_flags,
le32_to_cpu(table->rs_table[0].rate_n_flags));
sta_info_put(sta);
return;
}
while (retries) {
tx_mcs.rate_n_flags =
le32_to_cpu(table->rs_table[index].rate_n_flags);
rs_get_tbl_info_from_mcs(&tx_mcs, priv->phymode,
&tbl_type, &rs_index);
if ((tbl_type.lq_type == search_tbl->lq_type) &&
(tbl_type.antenna_type == search_tbl->antenna_type) &&
(tbl_type.is_SGI == search_tbl->is_SGI)) {
if (search_tbl->expected_tpt)
tpt = search_tbl->expected_tpt[rs_index];
else
tpt = 0;
rs_collect_tx_data(search_win,
rs_index, tpt, 0);
} else if ((tbl_type.lq_type == curr_tbl->lq_type) &&
(tbl_type.antenna_type == curr_tbl->antenna_type) &&
(tbl_type.is_SGI == curr_tbl->is_SGI)) {
if (curr_tbl->expected_tpt)
tpt = curr_tbl->expected_tpt[rs_index];
else
tpt = 0;
rs_collect_tx_data(window, rs_index, tpt, 0);
}
if (lq->stay_in_tbl)
lq->total_failed++;
--retries;
index++;
}
if (!tx_resp->retry_count)
tx_mcs.rate_n_flags = tx_resp->control.tx_rate;
else
tx_mcs.rate_n_flags =
le32_to_cpu(table->rs_table[index].rate_n_flags);
rs_get_tbl_info_from_mcs(&tx_mcs, priv->phymode,
&tbl_type, &rs_index);
if (tx_resp->flags & IEEE80211_TX_STATUS_ACK)
status = 1;
else
status = 0;
if ((tbl_type.lq_type == search_tbl->lq_type) &&
(tbl_type.antenna_type == search_tbl->antenna_type) &&
(tbl_type.is_SGI == search_tbl->is_SGI)) {
if (search_tbl->expected_tpt)
tpt = search_tbl->expected_tpt[rs_index];
else
tpt = 0;
rs_collect_tx_data(search_win,
rs_index, tpt, status);
} else if ((tbl_type.lq_type == curr_tbl->lq_type) &&
(tbl_type.antenna_type == curr_tbl->antenna_type) &&
(tbl_type.is_SGI == curr_tbl->is_SGI)) {
if (curr_tbl->expected_tpt)
tpt = curr_tbl->expected_tpt[rs_index];
else
tpt = 0;
rs_collect_tx_data(window, rs_index, tpt, status);
}
if (lq->stay_in_tbl) {
if (status)
lq->total_success++;
else
lq->total_failed++;
}
rs_rate_scale_perform(priv, dev, hdr, sta);
sta_info_put(sta);
return;
}
static u8 rs_is_ant_connected(u8 valid_antenna,
enum iwl_antenna_type antenna_type)
{
if (antenna_type == ANT_AUX)
return ((valid_antenna & 0x2) ? 1:0);
else if (antenna_type == ANT_MAIN)
return ((valid_antenna & 0x1) ? 1:0);
else if (antenna_type == ANT_BOTH) {
if ((valid_antenna & 0x3) == 0x3)
return 1;
else
return 0;
}
return 1;
}
static u8 rs_is_other_ant_connected(u8 valid_antenna,
enum iwl_antenna_type antenna_type)
{
if (antenna_type == ANT_AUX)
return (rs_is_ant_connected(valid_antenna, ANT_MAIN));
else
return (rs_is_ant_connected(valid_antenna, ANT_AUX));
return 0;
}
static void rs_set_stay_in_table(u8 is_legacy,
struct iwl_rate_scale_priv *lq_data)
{
IWL_DEBUG_HT("we are staying in the same table\n");
lq_data->stay_in_tbl = 1;
if (is_legacy) {
lq_data->table_count_limit = IWL_LEGACY_TABLE_COUNT;
lq_data->max_failure_limit = IWL_LEGACY_FAILURE_LIMIT;
lq_data->max_success_limit = IWL_LEGACY_TABLE_COUNT;
} else {
lq_data->table_count_limit = IWL_NONE_LEGACY_TABLE_COUNT;
lq_data->max_failure_limit = IWL_NONE_LEGACY_FAILURE_LIMIT;
lq_data->max_success_limit = IWL_NONE_LEGACY_SUCCESS_LIMIT;
}
lq_data->table_count = 0;
lq_data->total_failed = 0;
lq_data->total_success = 0;
}
static void rs_get_expected_tpt_table(struct iwl_rate_scale_priv *lq_data,
struct iwl_scale_tbl_info *tbl)
{
if (is_legacy(tbl->lq_type)) {
if (!is_a_band(tbl->lq_type))
tbl->expected_tpt = expected_tpt_G;
else
tbl->expected_tpt = expected_tpt_A;
} else if (is_siso(tbl->lq_type)) {
if (tbl->is_fat && !lq_data->is_dup)
if (tbl->is_SGI)
tbl->expected_tpt = expected_tpt_siso40MHzSGI;
else
tbl->expected_tpt = expected_tpt_siso40MHz;
else if (tbl->is_SGI)
tbl->expected_tpt = expected_tpt_siso20MHzSGI;
else
tbl->expected_tpt = expected_tpt_siso20MHz;
} else if (is_mimo(tbl->lq_type)) {
if (tbl->is_fat && !lq_data->is_dup)
if (tbl->is_SGI)
tbl->expected_tpt = expected_tpt_mimo40MHzSGI;
else
tbl->expected_tpt = expected_tpt_mimo40MHz;
else if (tbl->is_SGI)
tbl->expected_tpt = expected_tpt_mimo20MHzSGI;
else
tbl->expected_tpt = expected_tpt_mimo20MHz;
} else
tbl->expected_tpt = expected_tpt_G;
}
#ifdef CONFIG_IWLWIFI_HT
static s32 rs_get_best_rate(struct iwl_priv *priv,
struct iwl_rate_scale_priv *lq_data,
struct iwl_scale_tbl_info *tbl,
u16 rate_mask, s8 index, s8 rate)
{
struct iwl_scale_tbl_info *active_tbl =
&(lq_data->lq_info[lq_data->active_tbl]);
s32 new_rate, high, low, start_hi;
s32 active_sr = active_tbl->win[index].success_ratio;
s32 *tpt_tbl = tbl->expected_tpt;
s32 active_tpt = active_tbl->expected_tpt[index];
u16 high_low;
new_rate = high = low = start_hi = IWL_RATE_INVALID;
for (; ;) {
high_low = rs_get_adjacent_rate(rate, rate_mask, tbl->lq_type);
low = high_low & 0xff;
high = (high_low >> 8) & 0xff;
if ((((100 * tpt_tbl[rate]) > lq_data->last_tpt) &&
((active_sr > IWL_RATE_DECREASE_TH) &&
(active_sr <= IWL_RATE_HIGH_TH) &&
(tpt_tbl[rate] <= active_tpt))) ||
((active_sr >= IWL_RATE_SCALE_SWITCH) &&
(tpt_tbl[rate] > active_tpt))) {
if (start_hi != IWL_RATE_INVALID) {
new_rate = start_hi;
break;
}
new_rate = rate;
if (low != IWL_RATE_INVALID)
rate = low;
else
break;
} else {
if (new_rate != IWL_RATE_INVALID)
break;
else if (high != IWL_RATE_INVALID) {
start_hi = high;
rate = high;
} else {
new_rate = rate;
break;
}
}
}
return new_rate;
}
#endif /* CONFIG_IWLWIFI_HT */
static inline u8 rs_is_both_ant_supp(u8 valid_antenna)
{
return (rs_is_ant_connected(valid_antenna, ANT_BOTH));
}
static int rs_switch_to_mimo(struct iwl_priv *priv,
struct iwl_rate_scale_priv *lq_data,
struct iwl_scale_tbl_info *tbl, int index)
{
int rc = -1;
#ifdef CONFIG_IWLWIFI_HT
u16 rate_mask;
s32 rate;
s8 is_green = lq_data->is_green;
if (!priv->is_ht_enabled || !priv->current_assoc_ht.is_ht)
return -1;
IWL_DEBUG_HT("LQ: try to switch to MIMO\n");
tbl->lq_type = LQ_MIMO;
rs_get_supported_rates(lq_data, NULL, tbl->lq_type,
&rate_mask);
if (priv->current_assoc_ht.tx_mimo_ps_mode == IWL_MIMO_PS_STATIC)
return -1;
if (!rs_is_both_ant_supp(lq_data->antenna))
return -1;
rc = 0;
tbl->is_dup = lq_data->is_dup;
tbl->action = 0;
if (priv->current_channel_width == IWL_CHANNEL_WIDTH_40MHZ)
tbl->is_fat = 1;
else
tbl->is_fat = 0;
if (tbl->is_fat) {
if (priv->current_assoc_ht.sgf & HT_SHORT_GI_40MHZ_ONLY)
tbl->is_SGI = 1;
else
tbl->is_SGI = 0;
} else if (priv->current_assoc_ht.sgf & HT_SHORT_GI_20MHZ_ONLY)
tbl->is_SGI = 1;
else
tbl->is_SGI = 0;
rs_get_expected_tpt_table(lq_data, tbl);
rate = rs_get_best_rate(priv, lq_data, tbl, rate_mask, index, index);
IWL_DEBUG_HT("LQ: MIMO best rate %d mask %X\n", rate, rate_mask);
if ((rate == IWL_RATE_INVALID) || !((1 << rate) & rate_mask))
return -1;
rs_mcs_from_tbl(&tbl->current_rate, tbl, rate, is_green);
IWL_DEBUG_HT("LQ: Switch to new mcs %X index is green %X\n",
tbl->current_rate.rate_n_flags, is_green);
#endif /*CONFIG_IWLWIFI_HT */
return rc;
}
static int rs_switch_to_siso(struct iwl_priv *priv,
struct iwl_rate_scale_priv *lq_data,
struct iwl_scale_tbl_info *tbl, int index)
{
int rc = -1;
#ifdef CONFIG_IWLWIFI_HT
u16 rate_mask;
u8 is_green = lq_data->is_green;
s32 rate;
IWL_DEBUG_HT("LQ: try to switch to SISO\n");
if (!priv->is_ht_enabled || !priv->current_assoc_ht.is_ht)
return -1;
rc = 0;
tbl->is_dup = lq_data->is_dup;
tbl->lq_type = LQ_SISO;
tbl->action = 0;
rs_get_supported_rates(lq_data, NULL, tbl->lq_type,
&rate_mask);
if (priv->current_channel_width == IWL_CHANNEL_WIDTH_40MHZ)
tbl->is_fat = 1;
else
tbl->is_fat = 0;
if (tbl->is_fat) {
if (priv->current_assoc_ht.sgf & HT_SHORT_GI_40MHZ_ONLY)
tbl->is_SGI = 1;
else
tbl->is_SGI = 0;
} else if (priv->current_assoc_ht.sgf & HT_SHORT_GI_20MHZ_ONLY)
tbl->is_SGI = 1;
else
tbl->is_SGI = 0;
if (is_green)
tbl->is_SGI = 0;
rs_get_expected_tpt_table(lq_data, tbl);
rate = rs_get_best_rate(priv, lq_data, tbl, rate_mask, index, index);
IWL_DEBUG_HT("LQ: get best rate %d mask %X\n", rate, rate_mask);
if ((rate == IWL_RATE_INVALID) || !((1 << rate) & rate_mask)) {
IWL_DEBUG_HT("can not switch with index %d rate mask %x\n",
rate, rate_mask);
return -1;
}
rs_mcs_from_tbl(&tbl->current_rate, tbl, rate, is_green);
IWL_DEBUG_HT("LQ: Switch to new mcs %X index is green %X\n",
tbl->current_rate.rate_n_flags, is_green);
#endif /*CONFIG_IWLWIFI_HT */
return rc;
}
static int rs_move_legacy_other(struct iwl_priv *priv,
struct iwl_rate_scale_priv *lq_data,
int index)
{
int rc = 0;
struct iwl_scale_tbl_info *tbl =
&(lq_data->lq_info[lq_data->active_tbl]);
struct iwl_scale_tbl_info *search_tbl =
&(lq_data->lq_info[(1 - lq_data->active_tbl)]);
struct iwl_rate_scale_data *window = &(tbl->win[index]);
u32 sz = (sizeof(struct iwl_scale_tbl_info) -
(sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT));
u8 start_action = tbl->action;
for (; ;) {
switch (tbl->action) {
case IWL_LEGACY_SWITCH_ANTENNA:
IWL_DEBUG_HT("LQ Legacy switch Antenna\n");
search_tbl->lq_type = LQ_NONE;
lq_data->action_counter++;
if (window->success_ratio >= IWL_RS_GOOD_RATIO)
break;
if (!rs_is_other_ant_connected(lq_data->antenna,
tbl->antenna_type))
break;
memcpy(search_tbl, tbl, sz);
rs_toggle_antenna(&(search_tbl->current_rate),
search_tbl);
rs_get_expected_tpt_table(lq_data, search_tbl);
lq_data->search_better_tbl = 1;
goto out;
case IWL_LEGACY_SWITCH_SISO:
IWL_DEBUG_HT("LQ: Legacy switch to SISO\n");
memcpy(search_tbl, tbl, sz);
search_tbl->lq_type = LQ_SISO;
search_tbl->is_SGI = 0;
search_tbl->is_fat = 0;
rc = rs_switch_to_siso(priv, lq_data, search_tbl,
index);
if (!rc) {
lq_data->search_better_tbl = 1;
lq_data->action_counter = 0;
}
if (!rc)
goto out;
break;
case IWL_LEGACY_SWITCH_MIMO:
IWL_DEBUG_HT("LQ: Legacy switch MIMO\n");
memcpy(search_tbl, tbl, sz);
search_tbl->lq_type = LQ_MIMO;
search_tbl->is_SGI = 0;
search_tbl->is_fat = 0;
search_tbl->antenna_type = ANT_BOTH;
rc = rs_switch_to_mimo(priv, lq_data, search_tbl,
index);
if (!rc) {
lq_data->search_better_tbl = 1;
lq_data->action_counter = 0;
}
if (!rc)
goto out;
break;
}
tbl->action++;
if (tbl->action > IWL_LEGACY_SWITCH_MIMO)
tbl->action = IWL_LEGACY_SWITCH_ANTENNA;
if (tbl->action == start_action)
break;
}
return 0;
out:
tbl->action++;
if (tbl->action > IWL_LEGACY_SWITCH_MIMO)
tbl->action = IWL_LEGACY_SWITCH_ANTENNA;
return 0;
}
static int rs_move_siso_to_other(struct iwl_priv *priv,
struct iwl_rate_scale_priv *lq_data,
int index)
{
int rc = -1;
u8 is_green = lq_data->is_green;
struct iwl_scale_tbl_info *tbl =
&(lq_data->lq_info[lq_data->active_tbl]);
struct iwl_scale_tbl_info *search_tbl =
&(lq_data->lq_info[(1 - lq_data->active_tbl)]);
struct iwl_rate_scale_data *window = &(tbl->win[index]);
u32 sz = (sizeof(struct iwl_scale_tbl_info) -
(sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT));
u8 start_action = tbl->action;
for (;;) {
lq_data->action_counter++;
switch (tbl->action) {
case IWL_SISO_SWITCH_ANTENNA:
IWL_DEBUG_HT("LQ: SISO SWITCH ANTENNA SISO\n");
search_tbl->lq_type = LQ_NONE;
if (window->success_ratio >= IWL_RS_GOOD_RATIO)
break;
if (!rs_is_other_ant_connected(lq_data->antenna,
tbl->antenna_type))
break;
memcpy(search_tbl, tbl, sz);
search_tbl->action = IWL_SISO_SWITCH_MIMO;
rs_toggle_antenna(&(search_tbl->current_rate),
search_tbl);
lq_data->search_better_tbl = 1;
goto out;
case IWL_SISO_SWITCH_MIMO:
IWL_DEBUG_HT("LQ: SISO SWITCH TO MIMO FROM SISO\n");
memcpy(search_tbl, tbl, sz);
search_tbl->lq_type = LQ_MIMO;
search_tbl->is_SGI = 0;
search_tbl->is_fat = 0;
search_tbl->antenna_type = ANT_BOTH;
rc = rs_switch_to_mimo(priv, lq_data, search_tbl,
index);
if (!rc)
lq_data->search_better_tbl = 1;
if (!rc)
goto out;
break;
case IWL_SISO_SWITCH_GI:
IWL_DEBUG_HT("LQ: SISO SWITCH TO GI\n");
memcpy(search_tbl, tbl, sz);
search_tbl->action = 0;
if (search_tbl->is_SGI)
search_tbl->is_SGI = 0;
else if (!is_green)
search_tbl->is_SGI = 1;
else
break;
lq_data->search_better_tbl = 1;
if ((tbl->lq_type == LQ_SISO) &&
(tbl->is_SGI)) {
s32 tpt = lq_data->last_tpt / 100;
if (((!tbl->is_fat) &&
(tpt >= expected_tpt_siso20MHz[index])) ||
((tbl->is_fat) &&
(tpt >= expected_tpt_siso40MHz[index])))
lq_data->search_better_tbl = 0;
}
rs_get_expected_tpt_table(lq_data, search_tbl);
rs_mcs_from_tbl(&search_tbl->current_rate,
search_tbl, index, is_green);
goto out;
}
tbl->action++;
if (tbl->action > IWL_SISO_SWITCH_GI)
tbl->action = IWL_SISO_SWITCH_ANTENNA;
if (tbl->action == start_action)
break;
}
return 0;
out:
tbl->action++;
if (tbl->action > IWL_SISO_SWITCH_GI)
tbl->action = IWL_SISO_SWITCH_ANTENNA;
return 0;
}
static int rs_move_mimo_to_other(struct iwl_priv *priv,
struct iwl_rate_scale_priv *lq_data,
int index)
{
int rc = -1;
s8 is_green = lq_data->is_green;
struct iwl_scale_tbl_info *tbl =
&(lq_data->lq_info[lq_data->active_tbl]);
struct iwl_scale_tbl_info *search_tbl =
&(lq_data->lq_info[(1 - lq_data->active_tbl)]);
u32 sz = (sizeof(struct iwl_scale_tbl_info) -
(sizeof(struct iwl_rate_scale_data) * IWL_RATE_COUNT));
u8 start_action = tbl->action;
for (;;) {
lq_data->action_counter++;
switch (tbl->action) {
case IWL_MIMO_SWITCH_ANTENNA_A:
case IWL_MIMO_SWITCH_ANTENNA_B:
IWL_DEBUG_HT("LQ: MIMO SWITCH TO SISO\n");
memcpy(search_tbl, tbl, sz);
search_tbl->lq_type = LQ_SISO;
search_tbl->is_SGI = 0;
search_tbl->is_fat = 0;
if (tbl->action == IWL_MIMO_SWITCH_ANTENNA_A)
search_tbl->antenna_type = ANT_MAIN;
else
search_tbl->antenna_type = ANT_AUX;
rc = rs_switch_to_siso(priv, lq_data, search_tbl,
index);
if (!rc) {
lq_data->search_better_tbl = 1;
goto out;
}
break;
case IWL_MIMO_SWITCH_GI:
IWL_DEBUG_HT("LQ: MIMO SWITCH TO GI\n");
memcpy(search_tbl, tbl, sz);
search_tbl->lq_type = LQ_MIMO;
search_tbl->antenna_type = ANT_BOTH;
search_tbl->action = 0;
if (search_tbl->is_SGI)
search_tbl->is_SGI = 0;
else
search_tbl->is_SGI = 1;
lq_data->search_better_tbl = 1;
if ((tbl->lq_type == LQ_MIMO) &&
(tbl->is_SGI)) {
s32 tpt = lq_data->last_tpt / 100;
if (((!tbl->is_fat) &&
(tpt >= expected_tpt_mimo20MHz[index])) ||
((tbl->is_fat) &&
(tpt >= expected_tpt_mimo40MHz[index])))
lq_data->search_better_tbl = 0;
}
rs_get_expected_tpt_table(lq_data, search_tbl);
rs_mcs_from_tbl(&search_tbl->current_rate,
search_tbl, index, is_green);
goto out;
}
tbl->action++;
if (tbl->action > IWL_MIMO_SWITCH_GI)
tbl->action = IWL_MIMO_SWITCH_ANTENNA_A;
if (tbl->action == start_action)
break;
}
return 0;
out:
tbl->action++;
if (tbl->action > IWL_MIMO_SWITCH_GI)
tbl->action = IWL_MIMO_SWITCH_ANTENNA_A;
return 0;
}
static void rs_stay_in_table(struct iwl_rate_scale_priv *lq_data)
{
struct iwl_scale_tbl_info *tbl;
int i;
int active_tbl;
int flush_interval_passed = 0;
active_tbl = lq_data->active_tbl;
tbl = &(lq_data->lq_info[active_tbl]);
if (lq_data->stay_in_tbl) {
if (lq_data->flush_timer)
flush_interval_passed =
time_after(jiffies,
(unsigned long)(lq_data->flush_timer +
IWL_RATE_SCALE_FLUSH_INTVL));
flush_interval_passed = 0;
if ((lq_data->total_failed > lq_data->max_failure_limit) ||
(lq_data->total_success > lq_data->max_success_limit) ||
((!lq_data->search_better_tbl) && (lq_data->flush_timer)
&& (flush_interval_passed))) {
IWL_DEBUG_HT("LQ: stay is expired %d %d %d\n:",
lq_data->total_failed,
lq_data->total_success,
flush_interval_passed);
lq_data->stay_in_tbl = 0;
lq_data->total_failed = 0;
lq_data->total_success = 0;
lq_data->flush_timer = 0;
} else if (lq_data->table_count > 0) {
lq_data->table_count++;
if (lq_data->table_count >=
lq_data->table_count_limit) {
lq_data->table_count = 0;
IWL_DEBUG_HT("LQ: stay in table clear win\n");
for (i = 0; i < IWL_RATE_COUNT; i++)
rs_rate_scale_clear_window(
&(tbl->win[i]));
}
}
if (!lq_data->stay_in_tbl) {
for (i = 0; i < IWL_RATE_COUNT; i++)
rs_rate_scale_clear_window(&(tbl->win[i]));
}
}
}
static void rs_rate_scale_perform(struct iwl_priv *priv,
struct net_device *dev,
struct ieee80211_hdr *hdr,
struct sta_info *sta)
{
int low = IWL_RATE_INVALID;
int high = IWL_RATE_INVALID;
int index;
int i;
struct iwl_rate_scale_data *window = NULL;
int current_tpt = IWL_INVALID_VALUE;
int low_tpt = IWL_INVALID_VALUE;
int high_tpt = IWL_INVALID_VALUE;
u32 fail_count;
s8 scale_action = 0;
u16 fc, rate_mask;
u8 update_lq = 0;
struct iwl_rate_scale_priv *lq_data;
struct iwl_scale_tbl_info *tbl, *tbl1;
u16 rate_scale_index_msk = 0;
struct iwl_rate mcs_rate;
u8 is_green = 0;
u8 active_tbl = 0;
u8 done_search = 0;
u16 high_low;
IWL_DEBUG_RATE("rate scale calculate new rate for skb\n");
fc = le16_to_cpu(hdr->frame_control);
if (!ieee80211_is_data(fc) || is_multicast_ether_addr(hdr->addr1)) {
/* Send management frames and broadcast/multicast data using
* lowest rate. */
/* TODO: this could probably be improved.. */
return;
}
if (!sta || !sta->rate_ctrl_priv)
return;
if (!priv->lq_mngr.lq_ready) {
IWL_DEBUG_RATE("still rate scaling not ready\n");
return;
}
lq_data = (struct iwl_rate_scale_priv *)sta->rate_ctrl_priv;
if (!lq_data->search_better_tbl)
active_tbl = lq_data->active_tbl;
else
active_tbl = 1 - lq_data->active_tbl;
tbl = &(lq_data->lq_info[active_tbl]);
is_green = lq_data->is_green;
index = sta->last_txrate;
IWL_DEBUG_RATE("Rate scale index %d for type %d\n", index,
tbl->lq_type);
rs_get_supported_rates(lq_data, hdr, tbl->lq_type,
&rate_mask);
IWL_DEBUG_RATE("mask 0x%04X \n", rate_mask);
/* mask with station rate restriction */
if (is_legacy(tbl->lq_type)) {
if (lq_data->phymode == (u8) MODE_IEEE80211A)
rate_scale_index_msk = (u16) (rate_mask &
(sta->supp_rates << IWL_FIRST_OFDM_RATE));
else
rate_scale_index_msk = (u16) (rate_mask &
sta->supp_rates);
} else
rate_scale_index_msk = rate_mask;
if (!rate_scale_index_msk)
rate_scale_index_msk = rate_mask;
if (index < 0 || !((1 << index) & rate_scale_index_msk)) {
index = IWL_INVALID_VALUE;
update_lq = 1;
/* get the lowest availabe rate */
for (i = 0; i <= IWL_RATE_COUNT; i++) {
if ((1 << i) & rate_scale_index_msk)
index = i;
}
if (index == IWL_INVALID_VALUE) {
IWL_WARNING("Can not find a suitable rate\n");
return;
}
}
if (!tbl->expected_tpt)
rs_get_expected_tpt_table(lq_data, tbl);
window = &(tbl->win[index]);
fail_count = window->counter - window->success_counter;
if (((fail_count < IWL_RATE_MIN_FAILURE_TH) &&
(window->success_counter < IWL_RATE_MIN_SUCCESS_TH))
|| (tbl->expected_tpt == NULL)) {
IWL_DEBUG_RATE("LQ: still below TH succ %d total %d "
"for index %d\n",
window->success_counter, window->counter, index);
window->average_tpt = IWL_INVALID_VALUE;
rs_stay_in_table(lq_data);
if (update_lq) {
rs_mcs_from_tbl(&mcs_rate, tbl, index, is_green);
rs_fill_link_cmd(lq_data, &mcs_rate, &lq_data->lq, sta);
rs_send_lq_cmd(priv, &lq_data->lq, CMD_ASYNC);
}
goto out;
} else
window->average_tpt = ((window->success_ratio *
tbl->expected_tpt[index] + 64) / 128);
if (lq_data->search_better_tbl) {
int success_limit = IWL_RATE_SCALE_SWITCH;
if ((window->success_ratio > success_limit) ||
(window->average_tpt > lq_data->last_tpt)) {
if (!is_legacy(tbl->lq_type)) {
IWL_DEBUG_HT("LQ: we are switching to HT"
" rate suc %d current tpt %d"
" old tpt %d\n",
window->success_ratio,
window->average_tpt,
lq_data->last_tpt);
lq_data->enable_counter = 1;
}
lq_data->active_tbl = active_tbl;
current_tpt = window->average_tpt;
} else {
tbl->lq_type = LQ_NONE;
active_tbl = lq_data->active_tbl;
tbl = &(lq_data->lq_info[active_tbl]);
index = iwl_rate_index_from_plcp(
tbl->current_rate.rate_n_flags);
update_lq = 1;
current_tpt = lq_data->last_tpt;
IWL_DEBUG_HT("XXY GO BACK TO OLD TABLE\n");
}
lq_data->search_better_tbl = 0;
done_search = 1;
goto lq_update;
}
high_low = rs_get_adjacent_rate(index, rate_scale_index_msk,
tbl->lq_type);
low = high_low & 0xff;
high = (high_low >> 8) & 0xff;
current_tpt = window->average_tpt;
if (low != IWL_RATE_INVALID)
low_tpt = tbl->win[low].average_tpt;
if (high != IWL_RATE_INVALID)
high_tpt = tbl->win[high].average_tpt;
scale_action = 1;
if ((window->success_ratio <= IWL_RATE_DECREASE_TH) ||
(current_tpt == 0)) {
IWL_DEBUG_RATE("decrease rate because of low success_ratio\n");
scale_action = -1;
} else if ((low_tpt == IWL_INVALID_VALUE) &&
(high_tpt == IWL_INVALID_VALUE))
scale_action = 1;
else if ((low_tpt != IWL_INVALID_VALUE) &&
(high_tpt != IWL_INVALID_VALUE) &&
(low_tpt < current_tpt) &&
(high_tpt < current_tpt))
scale_action = 0;
else {
if (high_tpt != IWL_INVALID_VALUE) {
if (high_tpt > current_tpt)
scale_action = 1;
else {
IWL_DEBUG_RATE
("decrease rate because of high tpt\n");
scale_action = -1;
}
} else if (low_tpt != IWL_INVALID_VALUE) {
if (low_tpt > current_tpt) {
IWL_DEBUG_RATE
("decrease rate because of low tpt\n");
scale_action = -1;
} else
scale_action = 1;
}
}
if (scale_action == -1) {
if ((low != IWL_RATE_INVALID) &&
((window->success_ratio > IWL_RATE_HIGH_TH) ||
(current_tpt > (100 * tbl->expected_tpt[low]))))
scale_action = 0;
} else if ((scale_action == 1) &&
(window->success_ratio < IWL_RATE_INCREASE_TH))
scale_action = 0;
switch (scale_action) {
case -1:
if (low != IWL_RATE_INVALID) {
update_lq = 1;
index = low;
}
break;
case 1:
if (high != IWL_RATE_INVALID) {
update_lq = 1;
index = high;
}
break;
case 0:
default:
break;
}
IWL_DEBUG_HT("choose rate scale index %d action %d low %d "
"high %d type %d\n",
index, scale_action, low, high, tbl->lq_type);
lq_update:
if (update_lq) {
rs_mcs_from_tbl(&mcs_rate, tbl, index, is_green);
rs_fill_link_cmd(lq_data, &mcs_rate, &lq_data->lq, sta);
rs_send_lq_cmd(priv, &lq_data->lq, CMD_ASYNC);
}
rs_stay_in_table(lq_data);
if (!update_lq && !done_search && !lq_data->stay_in_tbl) {
lq_data->last_tpt = current_tpt;
if (is_legacy(tbl->lq_type))
rs_move_legacy_other(priv, lq_data, index);
else if (is_siso(tbl->lq_type))
rs_move_siso_to_other(priv, lq_data, index);
else
rs_move_mimo_to_other(priv, lq_data, index);
if (lq_data->search_better_tbl) {
tbl = &(lq_data->lq_info[(1 - lq_data->active_tbl)]);
for (i = 0; i < IWL_RATE_COUNT; i++)
rs_rate_scale_clear_window(&(tbl->win[i]));
index = iwl_rate_index_from_plcp(
tbl->current_rate.rate_n_flags);
IWL_DEBUG_HT("Switch current mcs: %X index: %d\n",
tbl->current_rate.rate_n_flags, index);
rs_fill_link_cmd(lq_data, &tbl->current_rate,
&(lq_data->lq), sta);
rs_send_lq_cmd(priv, &lq_data->lq, CMD_ASYNC);
}
tbl1 = &(lq_data->lq_info[lq_data->active_tbl]);
if (is_legacy(tbl1->lq_type) &&
#ifdef CONFIG_IWLWIFI_HT
!priv->current_assoc_ht.is_ht &&
#endif
(lq_data->action_counter >= 1)) {
lq_data->action_counter = 0;
IWL_DEBUG_HT("LQ: STAY in legacy table\n");
rs_set_stay_in_table(1, lq_data);
}
if (lq_data->enable_counter &&
(lq_data->action_counter >= IWL_ACTION_LIMIT)) {
#ifdef CONFIG_IWLWIFI_HT_AGG
if ((lq_data->last_tpt > TID_AGG_TPT_THREHOLD) &&
(priv->lq_mngr.agg_ctrl.auto_agg)) {
priv->lq_mngr.agg_ctrl.tid_retry =
TID_ALL_SPECIFIED;
schedule_work(&priv->agg_work);
}
#endif /*CONFIG_IWLWIFI_HT_AGG */
lq_data->action_counter = 0;
rs_set_stay_in_table(0, lq_data);
}
} else {
if ((!update_lq) && (!done_search) && (!lq_data->flush_timer))
lq_data->flush_timer = jiffies;
}
out:
rs_mcs_from_tbl(&tbl->current_rate, tbl, index, is_green);
i = index;
sta->last_txrate = i;
/* sta->txrate is an index to A mode rates which start
* at IWL_FIRST_OFDM_RATE
*/
if (lq_data->phymode == (u8) MODE_IEEE80211A)
sta->txrate = i - IWL_FIRST_OFDM_RATE;
else
sta->txrate = i;
return;
}
static void rs_initialize_lq(struct iwl_priv *priv,
struct sta_info *sta)
{
int i;
struct iwl_rate_scale_priv *lq;
struct iwl_scale_tbl_info *tbl;
u8 active_tbl = 0;
int rate_idx;
u8 use_green = rs_use_green(priv);
struct iwl_rate mcs_rate;
if (!sta || !sta->rate_ctrl_priv)
goto out;
lq = (struct iwl_rate_scale_priv *)sta->rate_ctrl_priv;
i = sta->last_txrate;
if ((lq->lq.sta_id == 0xff) &&
(priv->iw_mode == IEEE80211_IF_TYPE_IBSS))
goto out;
if (!lq->search_better_tbl)
active_tbl = lq->active_tbl;
else
active_tbl = 1 - lq->active_tbl;
tbl = &(lq->lq_info[active_tbl]);
if ((i < 0) || (i >= IWL_RATE_COUNT))
i = 0;
mcs_rate.rate_n_flags = iwl_rates[i].plcp ;
mcs_rate.rate_n_flags |= RATE_MCS_ANT_B_MSK;
mcs_rate.rate_n_flags &= ~RATE_MCS_ANT_A_MSK;
if (i >= IWL_FIRST_CCK_RATE && i <= IWL_LAST_CCK_RATE)
mcs_rate.rate_n_flags |= RATE_MCS_CCK_MSK;
tbl->antenna_type = ANT_AUX;
rs_get_tbl_info_from_mcs(&mcs_rate, priv->phymode, tbl, &rate_idx);
if (!rs_is_ant_connected(priv->valid_antenna, tbl->antenna_type))
rs_toggle_antenna(&mcs_rate, tbl),
rs_mcs_from_tbl(&mcs_rate, tbl, rate_idx, use_green);
tbl->current_rate.rate_n_flags = mcs_rate.rate_n_flags;
rs_get_expected_tpt_table(lq, tbl);
rs_fill_link_cmd(lq, &mcs_rate, &(lq->lq), sta);
rs_send_lq_cmd(priv, &lq->lq, CMD_ASYNC);
out:
return;
}
static struct ieee80211_rate *rs_get_lowest_rate(struct ieee80211_local
*local)
{
struct ieee80211_hw_mode *mode = local->oper_hw_mode;
int i;
for (i = 0; i < mode->num_rates; i++) {
struct ieee80211_rate *rate = &mode->rates[i];
if (rate->flags & IEEE80211_RATE_SUPPORTED)
return rate;
}
return &mode->rates[0];
}
static struct ieee80211_rate *rs_get_rate(void *priv_rate,
struct net_device *dev,
struct sk_buff *skb,
struct rate_control_extra
*extra)
{
int i;
struct ieee80211_local *local = wdev_priv(dev->ieee80211_ptr);
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
struct sta_info *sta;
u16 fc;
struct iwl_priv *priv = (struct iwl_priv *)priv_rate;
struct iwl_rate_scale_priv *lq;
IWL_DEBUG_RATE("rate scale calculate new rate for skb\n");
memset(extra, 0, sizeof(*extra));
fc = le16_to_cpu(hdr->frame_control);
if (!ieee80211_is_data(fc) || is_multicast_ether_addr(hdr->addr1)) {
/* Send management frames and broadcast/multicast data using
* lowest rate. */
/* TODO: this could probably be improved.. */
return rs_get_lowest_rate(local);
}
sta = sta_info_get(local, hdr->addr1);
if (!sta || !sta->rate_ctrl_priv) {
if (sta)
sta_info_put(sta);
return rs_get_lowest_rate(local);
}
lq = (struct iwl_rate_scale_priv *)sta->rate_ctrl_priv;
i = sta->last_txrate;
if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) && !lq->ibss_sta_added) {
u8 sta_id = iwl_hw_find_station(priv, hdr->addr1);
if (sta_id == IWL_INVALID_STATION) {
IWL_DEBUG_RATE("LQ: ADD station " MAC_FMT "\n",
MAC_ARG(hdr->addr1));
sta_id = iwl_add_station(priv,
hdr->addr1, 0, CMD_ASYNC);
}
if ((sta_id != IWL_INVALID_STATION)) {
lq->lq.sta_id = sta_id;
lq->lq.rs_table[0].rate_n_flags = 0;
lq->ibss_sta_added = 1;
rs_initialize_lq(priv, sta);
}
if (!lq->ibss_sta_added)
goto done;
}
done:
sta_info_put(sta);
if ((i < 0) || (i > IWL_RATE_COUNT))
return rs_get_lowest_rate(local);
return &priv->ieee_rates[i];
}
static void *rs_alloc_sta(void *priv, gfp_t gfp)
{
struct iwl_rate_scale_priv *crl;
int i, j;
IWL_DEBUG_RATE("create station rate scale window\n");
crl = kzalloc(sizeof(struct iwl_rate_scale_priv), gfp);
if (crl == NULL)
return NULL;
memset(crl, 0, sizeof(struct iwl_rate_scale_priv));
crl->lq.sta_id = 0xff;
for (j = 0; j < LQ_SIZE; j++)
for (i = 0; i < IWL_RATE_COUNT; i++)
rs_rate_scale_clear_window(&(crl->lq_info[j].win[i]));
return crl;
}
static void rs_rate_init(void *priv_rate, void *priv_sta,
struct ieee80211_local *local,
struct sta_info *sta)
{
int i, j;
struct ieee80211_hw_mode *mode = local->oper_hw_mode;
struct iwl_priv *priv = (struct iwl_priv *)priv_rate;
struct iwl_rate_scale_priv *crl = priv_sta;
memset(crl, 0, sizeof(struct iwl_rate_scale_priv));
crl->lq.sta_id = 0xff;
crl->flush_timer = 0;
sta->txrate = 3;
for (j = 0; j < LQ_SIZE; j++)
for (i = 0; i < IWL_RATE_COUNT; i++)
rs_rate_scale_clear_window(&(crl->lq_info[j].win[i]));
IWL_DEBUG_RATE("rate scale global init\n");
/* TODO: what is a good starting rate for STA? About middle? Maybe not
* the lowest or the highest rate.. Could consider using RSSI from
* previous packets? Need to have IEEE 802.1X auth succeed immediately
* after assoc.. */
crl->ibss_sta_added = 0;
if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
u8 sta_id = iwl_hw_find_station(priv, sta->addr);
/* for IBSS the call are from tasklet */
IWL_DEBUG_HT("LQ: ADD station " MAC_FMT " \n",
MAC_ARG(sta->addr));
if (sta_id == IWL_INVALID_STATION) {
IWL_DEBUG_RATE("LQ: ADD station " MAC_FMT "\n",
MAC_ARG(sta->addr));
sta_id = iwl_add_station(priv,
sta->addr, 0, CMD_ASYNC);
}
if ((sta_id != IWL_INVALID_STATION)) {
crl->lq.sta_id = sta_id;
crl->lq.rs_table[0].rate_n_flags = 0;
}
/* FIXME: this is w/a remove it later */
priv->assoc_station_added = 1;
}
for (i = 0; i < mode->num_rates; i++) {
if ((sta->supp_rates & BIT(i)) &&
(mode->rates[i].flags & IEEE80211_RATE_SUPPORTED))
sta->txrate = i;
}
sta->last_txrate = sta->txrate;
/* For MODE_IEEE80211A mode cck rate are at end
* rate table
*/
if (local->hw.conf.phymode == MODE_IEEE80211A)
sta->last_txrate += IWL_FIRST_OFDM_RATE;
crl->is_dup = priv->is_dup;
crl->valid_antenna = priv->valid_antenna;
crl->antenna = priv->antenna;
crl->is_green = rs_use_green(priv);
crl->active_rate = priv->active_rate;
crl->active_rate &= ~(0x1000);
crl->active_rate_basic = priv->active_rate_basic;
crl->phymode = priv->phymode;
#ifdef CONFIG_IWLWIFI_HT
crl->active_siso_rate = (priv->current_assoc_ht.supp_rates[0] << 1);
crl->active_siso_rate |= (priv->current_assoc_ht.supp_rates[0] & 0x1);
crl->active_siso_rate &= ~((u16)0x2);
crl->active_siso_rate = crl->active_siso_rate << IWL_FIRST_OFDM_RATE;
crl->active_mimo_rate = (priv->current_assoc_ht.supp_rates[1] << 1);
crl->active_mimo_rate |= (priv->current_assoc_ht.supp_rates[1] & 0x1);
crl->active_mimo_rate &= ~((u16)0x2);
crl->active_mimo_rate = crl->active_mimo_rate << IWL_FIRST_OFDM_RATE;
IWL_DEBUG_HT("MIMO RATE 0x%X SISO MASK 0x%X\n", crl->active_siso_rate,
crl->active_mimo_rate);
#endif /*CONFIG_IWLWIFI_HT*/
if (priv->assoc_station_added)
priv->lq_mngr.lq_ready = 1;
rs_initialize_lq(priv, sta);
}
static int rs_fill_link_cmd(struct iwl_rate_scale_priv *lq_data,
struct iwl_rate *tx_mcs,
struct iwl_link_quality_cmd *lq_cmd,
struct sta_info *sta)
{
int index = 0;
int rc = 0;
int rate_idx;
u8 ant_toggle_count = 0;
u8 use_ht_possible = 1;
u8 repeat_cur_rate = 0;
struct iwl_rate new_rate;
struct iwl_scale_tbl_info tbl_type = { 0 };
rs_get_tbl_info_from_mcs(tx_mcs, lq_data->phymode,
&tbl_type, &rate_idx);
if (is_legacy(tbl_type.lq_type)) {
ant_toggle_count = 1;
repeat_cur_rate = IWL_NUMBER_TRY;
} else
repeat_cur_rate = IWL_HT_NUMBER_TRY;
lq_cmd->general_params.mimo_delimiter =
is_mimo(tbl_type.lq_type) ? 1 : 0;
lq_cmd->rs_table[index].rate_n_flags =
cpu_to_le32(tx_mcs->rate_n_flags);
new_rate.rate_n_flags = tx_mcs->rate_n_flags;
if (is_mimo(tbl_type.lq_type) || (tbl_type.antenna_type == ANT_MAIN))
lq_cmd->general_params.single_stream_ant_msk = 1;
else
lq_cmd->general_params.single_stream_ant_msk = 2;
index++;
repeat_cur_rate--;
while (index < LINK_QUAL_MAX_RETRY_NUM) {
while (repeat_cur_rate && (index < LINK_QUAL_MAX_RETRY_NUM)) {
if (is_legacy(tbl_type.lq_type)) {
if (ant_toggle_count <
NUM_TRY_BEFORE_ANTENNA_TOGGLE)
ant_toggle_count++;
else {
rs_toggle_antenna(&new_rate, &tbl_type);
ant_toggle_count = 1;
}
}
lq_cmd->rs_table[index].rate_n_flags =
cpu_to_le32(new_rate.rate_n_flags);
repeat_cur_rate--;
index++;
}
rs_get_tbl_info_from_mcs(&new_rate, lq_data->phymode, &tbl_type,
&rate_idx);
if (is_mimo(tbl_type.lq_type))
lq_cmd->general_params.mimo_delimiter = index;
rs_get_lower_rate(lq_data, &tbl_type, rate_idx,
use_ht_possible, &new_rate, sta);
if (is_legacy(tbl_type.lq_type)) {
if (ant_toggle_count < NUM_TRY_BEFORE_ANTENNA_TOGGLE)
ant_toggle_count++;
else {
rs_toggle_antenna(&new_rate, &tbl_type);
ant_toggle_count = 1;
}
repeat_cur_rate = IWL_NUMBER_TRY;
} else
repeat_cur_rate = IWL_HT_NUMBER_TRY;
use_ht_possible = 0;
lq_cmd->rs_table[index].rate_n_flags =
cpu_to_le32(new_rate.rate_n_flags);
/* lq_cmd->rs_table[index].rate_n_flags = 0x800d; */
index++;
repeat_cur_rate--;
}
/* lq_cmd->rs_table[0].rate_n_flags = 0x800d; */
lq_cmd->general_params.dual_stream_ant_msk = 3;
lq_cmd->agg_params.agg_dis_start_th = 3;
lq_cmd->agg_params.agg_time_limit = cpu_to_le16(4000);
return rc;
}
static void *rs_alloc(struct ieee80211_local *local)
{
return local->hw.priv;
}
/* rate scale requires free function to be implemented */
static void rs_free(void *priv_rate)
{
return;
}
static void rs_clear(void *priv_rate)
{
struct iwl_priv *priv = (struct iwl_priv *) priv_rate;
IWL_DEBUG_RATE("enter\n");
priv->lq_mngr.lq_ready = 0;
#ifdef CONFIG_IWLWIFI_HT
#ifdef CONFIG_IWLWIFI_HT_AGG
if (priv->lq_mngr.agg_ctrl.granted_ba)
iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);
#endif /*CONFIG_IWLWIFI_HT_AGG */
#endif /* CONFIG_IWLWIFI_HT */
IWL_DEBUG_RATE("leave\n");
}
static void rs_free_sta(void *priv, void *priv_sta)
{
struct iwl_rate_scale_priv *rs_priv = priv_sta;
IWL_DEBUG_RATE("enter\n");
kfree(rs_priv);
IWL_DEBUG_RATE("leave\n");
}
static struct rate_control_ops rs_ops = {
.module = NULL,
.name = RS_NAME,
.tx_status = rs_tx_status,
.get_rate = rs_get_rate,
.rate_init = rs_rate_init,
.clear = rs_clear,
.alloc = rs_alloc,
.free = rs_free,
.alloc_sta = rs_alloc_sta,
.free_sta = rs_free_sta,
};
int iwl_fill_rs_info(struct ieee80211_hw *hw, char *buf, u8 sta_id)
{
struct ieee80211_local *local = hw_to_local(hw);
struct iwl_priv *priv = hw->priv;
struct iwl_rate_scale_priv *rs_priv;
struct sta_info *sta;
int count = 0, i;
u32 samples = 0, success = 0, good = 0;
unsigned long now = jiffies;
u32 max_time = 0;
u8 lq_type, antenna;
sta = sta_info_get(local, priv->stations[sta_id].sta.sta.addr);
if (!sta || !sta->rate_ctrl_priv) {
if (sta) {
sta_info_put(sta);
IWL_DEBUG_RATE("leave - no private rate data!\n");
} else
IWL_DEBUG_RATE("leave - no station!\n");
return sprintf(buf, "station %d not found\n", sta_id);
}
rs_priv = (void *)sta->rate_ctrl_priv;
lq_type = rs_priv->lq_info[rs_priv->active_tbl].lq_type;
antenna = rs_priv->lq_info[rs_priv->active_tbl].antenna_type;
if (is_legacy(lq_type))
i = IWL_RATE_54M_INDEX;
else
i = IWL_RATE_60M_INDEX;
while (1) {
u64 mask;
int j;
int active = rs_priv->active_tbl;
count +=
sprintf(&buf[count], " %2dMbs: ", iwl_rates[i].ieee / 2);
mask = (1ULL << (IWL_RATE_MAX_WINDOW - 1));
for (j = 0; j < IWL_RATE_MAX_WINDOW; j++, mask >>= 1)
buf[count++] =
(rs_priv->lq_info[active].win[i].data & mask)
? '1' : '0';
samples += rs_priv->lq_info[active].win[i].counter;
good += rs_priv->lq_info[active].win[i].success_counter;
success += rs_priv->lq_info[active].win[i].success_counter *
iwl_rates[i].ieee;
if (rs_priv->lq_info[active].win[i].stamp) {
int delta =
jiffies_to_msecs(now -
rs_priv->lq_info[active].win[i].stamp);
if (delta > max_time)
max_time = delta;
count += sprintf(&buf[count], "%5dms\n", delta);
} else
buf[count++] = '\n';
j = iwl_get_prev_ieee_rate(i);
if (j == i)
break;
i = j;
}
/* Display the average rate of all samples taken.
*
* NOTE: We multiple # of samples by 2 since the IEEE measurement
* added from iwl_rates is actually 2X the rate */
if (samples)
count += sprintf(&buf[count],
"\nAverage rate is %3d.%02dMbs over last %4dms\n"
"%3d%% success (%d good packets over %d tries)\n",
success / (2 * samples), (success * 5 / samples) % 10,
max_time, good * 100 / samples, good, samples);
else
count += sprintf(&buf[count], "\nAverage rate: 0Mbs\n");
count += sprintf(&buf[count], "\nrate scale type %d anntena %d "
"active_search %d rate index %d\n", lq_type, antenna,
rs_priv->search_better_tbl, sta->last_txrate);
sta_info_put(sta);
return count;
}
void iwl_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id)
{
struct iwl_priv *priv = hw->priv;
priv->lq_mngr.lq_ready = 1;
}
void iwl_rate_control_register(struct ieee80211_hw *hw)
{
ieee80211_rate_control_register(&rs_ops);
}
void iwl_rate_control_unregister(struct ieee80211_hw *hw)
{
ieee80211_rate_control_unregister(&rs_ops);
}
drivers/net/wireless/iwlwifi/iwl-4965-rs.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_4965_rs_h__
#define __iwl_4965_rs_h__
#include "iwl-4965.h"
struct iwl_rate_info {
u8 plcp;
u8 plcp_siso;
u8 plcp_mimo;
u8 ieee;
u8 prev_ieee; /* previous rate in IEEE speeds */
u8 next_ieee; /* next rate in IEEE speeds */
u8 prev_rs; /* previous rate used in rs algo */
u8 next_rs; /* next rate used in rs algo */
u8 prev_rs_tgg; /* previous rate used in TGG rs algo */
u8 next_rs_tgg; /* next rate used in TGG rs algo */
};
enum {
IWL_RATE_1M_INDEX = 0,
IWL_RATE_2M_INDEX,
IWL_RATE_5M_INDEX,
IWL_RATE_11M_INDEX,
IWL_RATE_6M_INDEX,
IWL_RATE_9M_INDEX,
IWL_RATE_12M_INDEX,
IWL_RATE_18M_INDEX,
IWL_RATE_24M_INDEX,
IWL_RATE_36M_INDEX,
IWL_RATE_48M_INDEX,
IWL_RATE_54M_INDEX,
IWL_RATE_60M_INDEX,
IWL_RATE_COUNT,
IWL_RATE_INVM_INDEX = IWL_RATE_COUNT,
IWL_RATE_INVALID = IWL_RATE_INVM_INDEX
};
enum {
IWL_FIRST_OFDM_RATE = IWL_RATE_6M_INDEX,
IWL_LAST_OFDM_RATE = IWL_RATE_60M_INDEX,
IWL_FIRST_CCK_RATE = IWL_RATE_1M_INDEX,
IWL_LAST_CCK_RATE = IWL_RATE_11M_INDEX,
};
/* #define vs. enum to keep from defaulting to 'large integer' */
#define IWL_RATE_6M_MASK (1<<IWL_RATE_6M_INDEX)
#define IWL_RATE_9M_MASK (1<<IWL_RATE_9M_INDEX)
#define IWL_RATE_12M_MASK (1<<IWL_RATE_12M_INDEX)
#define IWL_RATE_18M_MASK (1<<IWL_RATE_18M_INDEX)
#define IWL_RATE_24M_MASK (1<<IWL_RATE_24M_INDEX)
#define IWL_RATE_36M_MASK (1<<IWL_RATE_36M_INDEX)
#define IWL_RATE_48M_MASK (1<<IWL_RATE_48M_INDEX)
#define IWL_RATE_54M_MASK (1<<IWL_RATE_54M_INDEX)
#define IWL_RATE_60M_MASK (1<<IWL_RATE_60M_INDEX)
#define IWL_RATE_1M_MASK (1<<IWL_RATE_1M_INDEX)
#define IWL_RATE_2M_MASK (1<<IWL_RATE_2M_INDEX)
#define IWL_RATE_5M_MASK (1<<IWL_RATE_5M_INDEX)
#define IWL_RATE_11M_MASK (1<<IWL_RATE_11M_INDEX)
enum {
IWL_RATE_6M_PLCP = 13,
IWL_RATE_9M_PLCP = 15,
IWL_RATE_12M_PLCP = 5,
IWL_RATE_18M_PLCP = 7,
IWL_RATE_24M_PLCP = 9,
IWL_RATE_36M_PLCP = 11,
IWL_RATE_48M_PLCP = 1,
IWL_RATE_54M_PLCP = 3,
IWL_RATE_60M_PLCP = 3,
IWL_RATE_1M_PLCP = 10,
IWL_RATE_2M_PLCP = 20,
IWL_RATE_5M_PLCP = 55,
IWL_RATE_11M_PLCP = 110,
};
/* OFDM HT rate plcp */
enum {
IWL_RATE_SISO_6M_PLCP = 0,
IWL_RATE_SISO_12M_PLCP = 1,
IWL_RATE_SISO_18M_PLCP = 2,
IWL_RATE_SISO_24M_PLCP = 3,
IWL_RATE_SISO_36M_PLCP = 4,
IWL_RATE_SISO_48M_PLCP = 5,
IWL_RATE_SISO_54M_PLCP = 6,
IWL_RATE_SISO_60M_PLCP = 7,
IWL_RATE_MIMO_6M_PLCP = 0x8,
IWL_RATE_MIMO_12M_PLCP = 0x9,
IWL_RATE_MIMO_18M_PLCP = 0xa,
IWL_RATE_MIMO_24M_PLCP = 0xb,
IWL_RATE_MIMO_36M_PLCP = 0xc,
IWL_RATE_MIMO_48M_PLCP = 0xd,
IWL_RATE_MIMO_54M_PLCP = 0xe,
IWL_RATE_MIMO_60M_PLCP = 0xf,
IWL_RATE_SISO_INVM_PLCP,
IWL_RATE_MIMO_INVM_PLCP = IWL_RATE_SISO_INVM_PLCP,
};
enum {
IWL_RATE_6M_IEEE = 12,
IWL_RATE_9M_IEEE = 18,
IWL_RATE_12M_IEEE = 24,
IWL_RATE_18M_IEEE = 36,
IWL_RATE_24M_IEEE = 48,
IWL_RATE_36M_IEEE = 72,
IWL_RATE_48M_IEEE = 96,
IWL_RATE_54M_IEEE = 108,
IWL_RATE_60M_IEEE = 120,
IWL_RATE_1M_IEEE = 2,
IWL_RATE_2M_IEEE = 4,
IWL_RATE_5M_IEEE = 11,
IWL_RATE_11M_IEEE = 22,
};
#define IWL_CCK_BASIC_RATES_MASK \
(IWL_RATE_1M_MASK | \
IWL_RATE_2M_MASK)
#define IWL_CCK_RATES_MASK \
(IWL_BASIC_RATES_MASK | \
IWL_RATE_5M_MASK | \
IWL_RATE_11M_MASK)
#define IWL_OFDM_BASIC_RATES_MASK \
(IWL_RATE_6M_MASK | \
IWL_RATE_12M_MASK | \
IWL_RATE_24M_MASK)
#define IWL_OFDM_RATES_MASK \
(IWL_OFDM_BASIC_RATES_MASK | \
IWL_RATE_9M_MASK | \
IWL_RATE_18M_MASK | \
IWL_RATE_36M_MASK | \
IWL_RATE_48M_MASK | \
IWL_RATE_54M_MASK)
#define IWL_BASIC_RATES_MASK \
(IWL_OFDM_BASIC_RATES_MASK | \
IWL_CCK_BASIC_RATES_MASK)
#define IWL_RATES_MASK ((1<<IWL_RATE_COUNT)-1)
#define IWL_INVALID_VALUE -1
#define IWL_MIN_RSSI_VAL -100
#define IWL_MAX_RSSI_VAL 0
#define IWL_LEGACY_SWITCH_ANTENNA 0
#define IWL_LEGACY_SWITCH_SISO 1
#define IWL_LEGACY_SWITCH_MIMO 2
#define IWL_RS_GOOD_RATIO 12800
#define IWL_ACTION_LIMIT 3
#define IWL_LEGACY_FAILURE_LIMIT 160
#define IWL_LEGACY_SUCCESS_LIMIT 480
#define IWL_LEGACY_TABLE_COUNT 160
#define IWL_NONE_LEGACY_FAILURE_LIMIT 400
#define IWL_NONE_LEGACY_SUCCESS_LIMIT 4500
#define IWL_NONE_LEGACY_TABLE_COUNT 1500
#define IWL_RATE_SCALE_SWITCH (10880)
#define IWL_SISO_SWITCH_ANTENNA 0
#define IWL_SISO_SWITCH_MIMO 1
#define IWL_SISO_SWITCH_GI 2
#define IWL_MIMO_SWITCH_ANTENNA_A 0
#define IWL_MIMO_SWITCH_ANTENNA_B 1
#define IWL_MIMO_SWITCH_GI 2
#define LQ_SIZE 2
extern const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT];
enum iwl_table_type {
LQ_NONE,
LQ_G,
LQ_A,
LQ_SISO,
LQ_MIMO,
LQ_MAX,
};
enum iwl_antenna_type {
ANT_NONE,
ANT_MAIN,
ANT_AUX,
ANT_BOTH,
};
static inline u8 iwl_get_prev_ieee_rate(u8 rate_index)
{
u8 rate = iwl_rates[rate_index].prev_ieee;
if (rate == IWL_RATE_INVALID)
rate = rate_index;
return rate;
}
extern int iwl_rate_index_from_plcp(int plcp);
/**
* iwl_fill_rs_info - Fill an output text buffer with the rate representation
*
* NOTE: This is provided as a quick mechanism for a user to visualize
* the performance of the rate control alogirthm and is not meant to be
* parsed software.
*/
extern int iwl_fill_rs_info(struct ieee80211_hw *, char *buf, u8 sta_id);
/**
* iwl_rate_scale_init - Initialize the rate scale table based on assoc info
*
* The specific througput table used is based on the type of network
* the associated with, including A, B, G, and G w/ TGG protection
*/
extern void iwl_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id);
/**
* iwl_rate_control_register - Register the rate control algorithm callbacks
*
* Since the rate control algorithm is hardware specific, there is no need
* or reason to place it as a stand alone module. The driver can call
* iwl_rate_control_register in order to register the rate control callbacks
* with the mac80211 subsystem. This should be performed prior to calling
* ieee80211_register_hw
*
*/
extern void iwl_rate_control_register(struct ieee80211_hw *hw);
/**
* iwl_rate_control_unregister - Unregister the rate control callbacks
*
* This should be called after calling ieee80211_unregister_hw, but before
* the driver is unloaded.
*/
extern void iwl_rate_control_unregister(struct ieee80211_hw *hw);
#endif
drivers/net/wireless/iwlwifi/iwl-4965.c 0 → 100644
View file @ b481de9c
This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/net/wireless/iwlwifi/iwl-4965.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_4965_h__
#define __iwl_4965_h__
struct iwl_priv;
struct sta_ht_info;
/*
* Forward declare iwl-4965.c functions for iwl-base.c
*/
extern int iwl_eeprom_aqcuire_semaphore(struct iwl_priv *priv);
extern void iwl_eeprom_release_semaphore(struct iwl_priv *priv);
extern int iwl4965_tx_queue_update_wr_ptr(struct iwl_priv *priv,
struct iwl_tx_queue *txq,
u16 byte_cnt);
extern void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr,
int is_ap);
extern void iwl4965_set_rxon_ht(struct iwl_priv *priv,
struct sta_ht_info *ht_info);
extern void iwl4965_set_rxon_chain(struct iwl_priv *priv);
extern int iwl4965_tx_cmd(struct iwl_priv *priv, struct iwl_cmd *out_cmd,
u8 sta_id, dma_addr_t txcmd_phys,
struct ieee80211_hdr *hdr, u8 hdr_len,
struct ieee80211_tx_control *ctrl, void *sta_in);
extern int iwl4965_init_hw_rates(struct iwl_priv *priv,
struct ieee80211_rate *rates);
extern int iwl4965_alive_notify(struct iwl_priv *priv);
extern void iwl4965_update_rate_scaling(struct iwl_priv *priv, u8 mode);
extern void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index);
extern void iwl4965_chain_noise_reset(struct iwl_priv *priv);
extern void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags,
u8 force);
extern int iwl4965_set_fat_chan_info(struct iwl_priv *priv, int phymode,
u16 channel,
const struct iwl_eeprom_channel *eeprom_ch,
u8 fat_extension_channel);
extern void iwl4965_rf_kill_ct_config(struct iwl_priv *priv);
#ifdef CONFIG_IWLWIFI_HT
#ifdef CONFIG_IWLWIFI_HT_AGG
extern int iwl_mac_ht_tx_agg_start(struct ieee80211_hw *hw, u8 *da,
u16 tid, u16 *start_seq_num);
extern int iwl_mac_ht_rx_agg_start(struct ieee80211_hw *hw, u8 *da,
u16 tid, u16 start_seq_num);
extern int iwl_mac_ht_rx_agg_stop(struct ieee80211_hw *hw, u8 *da,
u16 tid, int generator);
extern int iwl_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, u8 *da,
u16 tid, int generator);
extern void iwl4965_turn_off_agg(struct iwl_priv *priv, u8 tid);
#endif /* CONFIG_IWLWIFI_HT_AGG */
#endif /*CONFIG_IWLWIFI_HT */
/* Structures, enum, and defines specific to the 4965 */
#define IWL4965_KW_SIZE 0x1000 /*4k */
struct iwl_kw {
dma_addr_t dma_addr;
void *v_addr;
size_t size;
};
#define TID_QUEUE_CELL_SPACING 50 /*mS */
#define TID_QUEUE_MAX_SIZE 20
#define TID_ROUND_VALUE 5 /* mS */
#define TID_MAX_LOAD_COUNT 8
#define TID_MAX_TIME_DIFF ((TID_QUEUE_MAX_SIZE - 1) * TID_QUEUE_CELL_SPACING)
#define TIME_WRAP_AROUND(x, y) (((y) > (x)) ? (y) - (x) : (0-(x)) + (y))
#define TID_ALL_ENABLED 0x7f
#define TID_ALL_SPECIFIED 0xff
#define TID_AGG_TPT_THREHOLD 0x0
#define IWL_CHANNEL_WIDTH_20MHZ 0
#define IWL_CHANNEL_WIDTH_40MHZ 1
#define IWL_MIMO_PS_STATIC 0
#define IWL_MIMO_PS_NONE 3
#define IWL_MIMO_PS_DYNAMIC 1
#define IWL_MIMO_PS_INVALID 2
#define IWL_OPERATION_MODE_AUTO 0
#define IWL_OPERATION_MODE_HT_ONLY 1
#define IWL_OPERATION_MODE_MIXED 2
#define IWL_OPERATION_MODE_20MHZ 3
#define IWL_EXT_CHANNEL_OFFSET_AUTO 0
#define IWL_EXT_CHANNEL_OFFSET_ABOVE 1
#define IWL_EXT_CHANNEL_OFFSET_ 2
#define IWL_EXT_CHANNEL_OFFSET_BELOW 3
#define IWL_EXT_CHANNEL_OFFSET_MAX 4
#define NRG_NUM_PREV_STAT_L 20
#define NUM_RX_CHAINS (3)
#define TX_POWER_IWL_ILLEGAL_VDET -100000
#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
#define TX_POWER_IWL_CLOSED_LOOP_MIN_POWER 18
#define TX_POWER_IWL_CLOSED_LOOP_MAX_POWER 34
#define TX_POWER_IWL_VDET_SLOPE_BELOW_NOMINAL 17
#define TX_POWER_IWL_VDET_SLOPE_ABOVE_NOMINAL 20
#define TX_POWER_IWL_NOMINAL_POWER 26
#define TX_POWER_IWL_CLOSED_LOOP_ITERATION_LIMIT 1
#define TX_POWER_IWL_VOLTAGE_CODES_PER_03V 7
#define TX_POWER_IWL_DEGREES_PER_VDET_CODE 11
#define IWL_TX_POWER_MAX_NUM_PA_MEASUREMENTS 1
#define IWL_TX_POWER_CCK_COMPENSATION_B_STEP (9)
#define IWL_TX_POWER_CCK_COMPENSATION_C_STEP (5)
struct iwl_traffic_load {
unsigned long time_stamp;
u32 packet_count[TID_QUEUE_MAX_SIZE];
u8 queue_count;
u8 head;
u32 total;
};
#ifdef CONFIG_IWLWIFI_HT_AGG
struct iwl_agg_control {
unsigned long next_retry;
u32 wait_for_agg_status;
u32 tid_retry;
u32 requested_ba;
u32 granted_ba;
u8 auto_agg;
u32 tid_traffic_load_threshold;
u32 ba_timeout;
struct iwl_traffic_load traffic_load[TID_MAX_LOAD_COUNT];
};
#endif /*CONFIG_IWLWIFI_HT_AGG */
struct iwl_lq_mngr {
#ifdef CONFIG_IWLWIFI_HT_AGG
struct iwl_agg_control agg_ctrl;
#endif
spinlock_t lock;
s32 max_window_size;
s32 *expected_tpt;
u8 *next_higher_rate;
u8 *next_lower_rate;
unsigned long stamp;
unsigned long stamp_last;
u32 flush_time;
u32 tx_packets;
u8 lq_ready;
};
/* Sensitivity and chain noise calibration */
#define INTERFERENCE_DATA_AVAILABLE __constant_cpu_to_le32(1)
#define INITIALIZATION_VALUE 0xFFFF
#define CAL_NUM_OF_BEACONS 20
#define MAXIMUM_ALLOWED_PATHLOSS 15
/* Param table within SENSITIVITY_CMD */
#define HD_MIN_ENERGY_CCK_DET_INDEX (0)
#define HD_MIN_ENERGY_OFDM_DET_INDEX (1)
#define HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX (2)
#define HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX (3)
#define HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX (4)
#define HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX (5)
#define HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX (6)
#define HD_BARKER_CORR_TH_ADD_MIN_INDEX (7)
#define HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX (8)
#define HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX (9)
#define HD_OFDM_ENERGY_TH_IN_INDEX (10)
#define SENSITIVITY_CMD_CONTROL_DEFAULT_TABLE __constant_cpu_to_le16(0)
#define SENSITIVITY_CMD_CONTROL_WORK_TABLE __constant_cpu_to_le16(1)
#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
#define MAX_FA_OFDM 50
#define MIN_FA_OFDM 5
#define MAX_FA_CCK 50
#define MIN_FA_CCK 5
#define NRG_MIN_CCK 97
#define NRG_MAX_CCK 0
#define AUTO_CORR_MIN_OFDM 85
#define AUTO_CORR_MIN_OFDM_MRC 170
#define AUTO_CORR_MIN_OFDM_X1 105
#define AUTO_CORR_MIN_OFDM_MRC_X1 220
#define AUTO_CORR_MAX_OFDM 120
#define AUTO_CORR_MAX_OFDM_MRC 210
#define AUTO_CORR_MAX_OFDM_X1 140
#define AUTO_CORR_MAX_OFDM_MRC_X1 270
#define AUTO_CORR_STEP_OFDM 1
#define AUTO_CORR_MIN_CCK (125)
#define AUTO_CORR_MAX_CCK (200)
#define AUTO_CORR_MIN_CCK_MRC 200
#define AUTO_CORR_MAX_CCK_MRC 400
#define AUTO_CORR_STEP_CCK 3
#define AUTO_CORR_MAX_TH_CCK 160
#define NRG_ALG 0
#define AUTO_CORR_ALG 1
#define NRG_DIFF 2
#define NRG_STEP_CCK 2
#define NRG_MARGIN 8
#define MAX_NUMBER_CCK_NO_FA 100
#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
#define CHAIN_A 0
#define CHAIN_B 1
#define CHAIN_C 2
#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
#define ALL_BAND_FILTER 0xFF00
#define IN_BAND_FILTER 0xFF
#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
enum iwl_false_alarm_state {
IWL_FA_TOO_MANY = 0,
IWL_FA_TOO_FEW = 1,
IWL_FA_GOOD_RANGE = 2,
};
enum iwl_chain_noise_state {
IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
IWL_CHAIN_NOISE_ACCUMULATE = 1,
IWL_CHAIN_NOISE_CALIBRATED = 2,
};
enum iwl_sensitivity_state {
IWL_SENS_CALIB_ALLOWED = 0,
IWL_SENS_CALIB_NEED_REINIT = 1,
};
enum iwl_calib_enabled_state {
IWL_CALIB_DISABLED = 0, /* must be 0 */
IWL_CALIB_ENABLED = 1,
};
struct statistics_general_data {
u32 beacon_silence_rssi_a;
u32 beacon_silence_rssi_b;
u32 beacon_silence_rssi_c;
u32 beacon_energy_a;
u32 beacon_energy_b;
u32 beacon_energy_c;
};
/* Sensitivity calib data */
struct iwl_sensitivity_data {
u32 auto_corr_ofdm;
u32 auto_corr_ofdm_mrc;
u32 auto_corr_ofdm_x1;
u32 auto_corr_ofdm_mrc_x1;
u32 auto_corr_cck;
u32 auto_corr_cck_mrc;
u32 last_bad_plcp_cnt_ofdm;
u32 last_fa_cnt_ofdm;
u32 last_bad_plcp_cnt_cck;
u32 last_fa_cnt_cck;
u32 nrg_curr_state;
u32 nrg_prev_state;
u32 nrg_value[10];
u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
u32 nrg_silence_ref;
u32 nrg_energy_idx;
u32 nrg_silence_idx;
u32 nrg_th_cck;
s32 nrg_auto_corr_silence_diff;
u32 num_in_cck_no_fa;
u32 nrg_th_ofdm;
u8 state;
};
/* Chain noise (differential Rx gain) calib data */
struct iwl_chain_noise_data {
u8 state;
u16 beacon_count;
u32 chain_noise_a;
u32 chain_noise_b;
u32 chain_noise_c;
u32 chain_signal_a;
u32 chain_signal_b;
u32 chain_signal_c;
u8 disconn_array[NUM_RX_CHAINS];
u8 delta_gain_code[NUM_RX_CHAINS];
u8 radio_write;
};
/* IWL4965 */
#define RATE_MCS_CODE_MSK 0x7
#define RATE_MCS_MIMO_POS 3
#define RATE_MCS_MIMO_MSK 0x8
#define RATE_MCS_HT_DUP_POS 5
#define RATE_MCS_HT_DUP_MSK 0x20
#define RATE_MCS_FLAGS_POS 8
#define RATE_MCS_HT_POS 8
#define RATE_MCS_HT_MSK 0x100
#define RATE_MCS_CCK_POS 9
#define RATE_MCS_CCK_MSK 0x200
#define RATE_MCS_GF_POS 10
#define RATE_MCS_GF_MSK 0x400
#define RATE_MCS_FAT_POS 11
#define RATE_MCS_FAT_MSK 0x800
#define RATE_MCS_DUP_POS 12
#define RATE_MCS_DUP_MSK 0x1000
#define RATE_MCS_SGI_POS 13
#define RATE_MCS_SGI_MSK 0x2000
#define EEPROM_SEM_TIMEOUT 10
#define EEPROM_SEM_RETRY_LIMIT 1000
#endif /* __iwl_4965_h__ */
drivers/net/wireless/iwlwifi/iwl-channel.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_channel_h__
#define __iwl_channel_h__
#define IWL_NUM_SCAN_RATES (2)
struct iwl_channel_tgd_info {
u8 type;
s8 max_power;
};
struct iwl_channel_tgh_info {
s64 last_radar_time;
};
/* current Tx power values to use, one for each rate for each channel.
* requested power is limited by:
* -- regulatory EEPROM limits for this channel
* -- hardware capabilities (clip-powers)
* -- spectrum management
* -- user preference (e.g. iwconfig)
* when requested power is set, base power index must also be set. */
struct iwl_channel_power_info {
struct iwl_tx_power tpc; /* actual radio and DSP gain settings */
s8 power_table_index; /* actual (compenst'd) index into gain table */
s8 base_power_index; /* gain index for power at factory temp. */
s8 requested_power; /* power (dBm) requested for this chnl/rate */
};
/* current scan Tx power values to use, one for each scan rate for each
* channel. */
struct iwl_scan_power_info {
struct iwl_tx_power tpc; /* actual radio and DSP gain settings */
s8 power_table_index; /* actual (compenst'd) index into gain table */
s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
};
/* Channel unlock period is 15 seconds. If no beacon or probe response
* has been received within 15 seconds on a locked channel then the channel
* remains locked. */
#define TX_UNLOCK_PERIOD 15
/* CSA lock period is 15 seconds. If a CSA has been received on a channel in
* the last 15 seconds, the channel is locked */
#define CSA_LOCK_PERIOD 15
/*
* One for each channel, holds all channel setup data
* Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
* with one another!
*/
#define IWL4965_MAX_RATE (33)
struct iwl_channel_info {
struct iwl_channel_tgd_info tgd;
struct iwl_channel_tgh_info tgh;
struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
struct iwl_eeprom_channel fat_eeprom; /* EEPROM regulatory limit for
* FAT channel */
u8 channel; /* channel number */
u8 flags; /* flags copied from EEPROM */
s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
s8 min_power; /* always 0 */
s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
u8 phymode; /* MODE_IEEE80211{A,B,G} */
/* Radio/DSP gain settings for each "normal" data Tx rate.
* These include, in addition to RF and DSP gain, a few fields for
* remembering/modifying gain settings (indexes). */
struct iwl_channel_power_info power_info[IWL4965_MAX_RATE];
#if IWL == 4965
/* FAT channel info */
s8 fat_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
s8 fat_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
s8 fat_min_power; /* always 0 */
s8 fat_scan_power; /* (dBm) eeprom, direct scans, any rate */
u8 fat_flags; /* flags copied from EEPROM */
u8 fat_extension_channel;
#endif
/* Radio/DSP gain settings for each scan rate, for directed scans. */
struct iwl_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
};
struct iwl_clip_group {
/* maximum power level to prevent clipping for each rate, derived by
* us from this band's saturation power in EEPROM */
const s8 clip_powers[IWL_MAX_RATES];
};
static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
{
if (ch_info == NULL)
return 0;
return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
}
static inline int is_channel_narrow(const struct iwl_channel_info *ch_info)
{
return (ch_info->flags & EEPROM_CHANNEL_NARROW) ? 1 : 0;
}
static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
{
return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
}
static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
{
return ch_info->phymode == MODE_IEEE80211A;
}
static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
{
return ((ch_info->phymode == MODE_IEEE80211B) ||
(ch_info->phymode == MODE_IEEE80211G));
}
static inline int is_channel_passive(const struct iwl_channel_info *ch)
{
return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
}
static inline int is_channel_ibss(const struct iwl_channel_info *ch)
{
return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
}
extern const struct iwl_channel_info *iwl_get_channel_info(
const struct iwl_priv *priv, int phymode, u16 channel);
#endif
drivers/net/wireless/iwlwifi/iwl-commands.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU Geeral Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
* USA
*
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
* BSD LICENSE
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef __iwl_commands_h__
#define __iwl_commands_h__
enum {
REPLY_ALIVE = 0x1,
REPLY_ERROR = 0x2,
/* RXON and QOS commands */
REPLY_RXON = 0x10,
REPLY_RXON_ASSOC = 0x11,
REPLY_QOS_PARAM = 0x13,
REPLY_RXON_TIMING = 0x14,
/* Multi-Station support */
REPLY_ADD_STA = 0x18,
REPLY_REMOVE_STA = 0x19, /* not used */
REPLY_REMOVE_ALL_STA = 0x1a, /* not used */
/* RX, TX, LEDs */
#if IWL == 3945
REPLY_3945_RX = 0x1b, /* 3945 only */
#endif
REPLY_TX = 0x1c,
REPLY_RATE_SCALE = 0x47, /* 3945 only */
REPLY_LEDS_CMD = 0x48,
REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* 4965 only */
/* 802.11h related */
RADAR_NOTIFICATION = 0x70, /* not used */
REPLY_QUIET_CMD = 0x71, /* not used */
REPLY_CHANNEL_SWITCH = 0x72,
CHANNEL_SWITCH_NOTIFICATION = 0x73,
REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74,
SPECTRUM_MEASURE_NOTIFICATION = 0x75,
/* Power Management */
POWER_TABLE_CMD = 0x77,
PM_SLEEP_NOTIFICATION = 0x7A,
PM_DEBUG_STATISTIC_NOTIFIC = 0x7B,
/* Scan commands and notifications */
REPLY_SCAN_CMD = 0x80,
REPLY_SCAN_ABORT_CMD = 0x81,
SCAN_START_NOTIFICATION = 0x82,
SCAN_RESULTS_NOTIFICATION = 0x83,
SCAN_COMPLETE_NOTIFICATION = 0x84,
/* IBSS/AP commands */
BEACON_NOTIFICATION = 0x90,
REPLY_TX_BEACON = 0x91,
WHO_IS_AWAKE_NOTIFICATION = 0x94, /* not used */
/* Miscellaneous commands */
QUIET_NOTIFICATION = 0x96, /* not used */
REPLY_TX_PWR_TABLE_CMD = 0x97,
MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
/* BT config command */
REPLY_BT_CONFIG = 0x9b,
/* 4965 Statistics */
REPLY_STATISTICS_CMD = 0x9c,
STATISTICS_NOTIFICATION = 0x9d,
/* RF-KILL commands and notifications */
REPLY_CARD_STATE_CMD = 0xa0,
CARD_STATE_NOTIFICATION = 0xa1,
/* Missed beacons notification */
MISSED_BEACONS_NOTIFICATION = 0xa2,
#if IWL == 4965
REPLY_CT_KILL_CONFIG_CMD = 0xa4,
SENSITIVITY_CMD = 0xa8,
REPLY_PHY_CALIBRATION_CMD = 0xb0,
REPLY_RX_PHY_CMD = 0xc0,
REPLY_RX_MPDU_CMD = 0xc1,
REPLY_4965_RX = 0xc3,
REPLY_COMPRESSED_BA = 0xc5,
#endif
REPLY_MAX = 0xff
};
/******************************************************************************
* (0)
* Header
*
*****************************************************************************/
#define IWL_CMD_FAILED_MSK 0x40
struct iwl_cmd_header {
u8 cmd;
u8 flags;
/* We have 15 LSB to use as we please (MSB indicates
* a frame Rx'd from the HW). We encode the following
* information into the sequence field:
*
* 0:7 index in fifo
* 8:13 fifo selection
* 14:14 bit indicating if this packet references the 'extra'
* storage at the end of the memory queue
* 15:15 (Rx indication)
*
*/
__le16 sequence;
/* command data follows immediately */
u8 data[0];
} __attribute__ ((packed));
/******************************************************************************
* (0a)
* Alive and Error Commands & Responses:
*
*****************************************************************************/
#define UCODE_VALID_OK __constant_cpu_to_le32(0x1)
#define INITIALIZE_SUBTYPE (9)
/*
* REPLY_ALIVE = 0x1 (response only, not a command)
*/
struct iwl_alive_resp {
u8 ucode_minor;
u8 ucode_major;
__le16 reserved1;
u8 sw_rev[8];
u8 ver_type;
u8 ver_subtype;
__le16 reserved2;
__le32 log_event_table_ptr;
__le32 error_event_table_ptr;
__le32 timestamp;
__le32 is_valid;
} __attribute__ ((packed));
struct iwl_init_alive_resp {
u8 ucode_minor;
u8 ucode_major;
__le16 reserved1;
u8 sw_rev[8];
u8 ver_type;
u8 ver_subtype;
__le16 reserved2;
__le32 log_event_table_ptr;
__le32 error_event_table_ptr;
__le32 timestamp;
__le32 is_valid;
#if IWL == 4965
/* calibration values from "initialize" uCode */
__le32 voltage; /* signed */
__le32 therm_r1[2]; /* signed 1st for normal, 2nd for FAT channel */
__le32 therm_r2[2]; /* signed */
__le32 therm_r3[2]; /* signed */
__le32 therm_r4[2]; /* signed */
__le32 tx_atten[5][2]; /* signed MIMO gain comp, 5 freq groups,
* 2 Tx chains */
#endif
} __attribute__ ((packed));
union tsf {
u8 byte[8];
__le16 word[4];
__le32 dw[2];
};
/*
* REPLY_ERROR = 0x2 (response only, not a command)
*/
struct iwl_error_resp {
__le32 error_type;
u8 cmd_id;
u8 reserved1;
__le16 bad_cmd_seq_num;
#if IWL == 3945
__le16 reserved2;
#endif
__le32 error_info;
union tsf timestamp;
} __attribute__ ((packed));
/******************************************************************************
* (1)
* RXON Commands & Responses:
*
*****************************************************************************/
/*
* Rx config defines & structure
*/
/* rx_config device types */
enum {
RXON_DEV_TYPE_AP = 1,
RXON_DEV_TYPE_ESS = 3,
RXON_DEV_TYPE_IBSS = 4,
RXON_DEV_TYPE_SNIFFER = 6,
};
/* rx_config flags */
/* band & modulation selection */
#define RXON_FLG_BAND_24G_MSK __constant_cpu_to_le32(1 << 0)
#define RXON_FLG_CCK_MSK __constant_cpu_to_le32(1 << 1)
/* auto detection enable */
#define RXON_FLG_AUTO_DETECT_MSK __constant_cpu_to_le32(1 << 2)
/* TGg protection when tx */
#define RXON_FLG_TGG_PROTECT_MSK __constant_cpu_to_le32(1 << 3)
/* cck short slot & preamble */
#define RXON_FLG_SHORT_SLOT_MSK __constant_cpu_to_le32(1 << 4)
#define RXON_FLG_SHORT_PREAMBLE_MSK __constant_cpu_to_le32(1 << 5)
/* antenna selection */
#define RXON_FLG_DIS_DIV_MSK __constant_cpu_to_le32(1 << 7)
#define RXON_FLG_ANT_SEL_MSK __constant_cpu_to_le32(0x0f00)
#define RXON_FLG_ANT_A_MSK __constant_cpu_to_le32(1 << 8)
#define RXON_FLG_ANT_B_MSK __constant_cpu_to_le32(1 << 9)
/* radar detection enable */
#define RXON_FLG_RADAR_DETECT_MSK __constant_cpu_to_le32(1 << 12)
#define RXON_FLG_TGJ_NARROW_BAND_MSK __constant_cpu_to_le32(1 << 13)
/* rx response to host with 8-byte TSF
* (according to ON_AIR deassertion) */
#define RXON_FLG_TSF2HOST_MSK __constant_cpu_to_le32(1 << 15)
/* rx_config filter flags */
/* accept all data frames */
#define RXON_FILTER_PROMISC_MSK __constant_cpu_to_le32(1 << 0)
/* pass control & management to host */
#define RXON_FILTER_CTL2HOST_MSK __constant_cpu_to_le32(1 << 1)
/* accept multi-cast */
#define RXON_FILTER_ACCEPT_GRP_MSK __constant_cpu_to_le32(1 << 2)
/* don't decrypt uni-cast frames */
#define RXON_FILTER_DIS_DECRYPT_MSK __constant_cpu_to_le32(1 << 3)
/* don't decrypt multi-cast frames */
#define RXON_FILTER_DIS_GRP_DECRYPT_MSK __constant_cpu_to_le32(1 << 4)
/* STA is associated */
#define RXON_FILTER_ASSOC_MSK __constant_cpu_to_le32(1 << 5)
/* transfer to host non bssid beacons in associated state */
#define RXON_FILTER_BCON_AWARE_MSK __constant_cpu_to_le32(1 << 6)
/*
* REPLY_RXON = 0x10 (command, has simple generic response)
*/
struct iwl_rxon_cmd {
u8 node_addr[6];
__le16 reserved1;
u8 bssid_addr[6];
__le16 reserved2;
u8 wlap_bssid_addr[6];
__le16 reserved3;
u8 dev_type;
u8 air_propagation;
#if IWL == 3945
__le16 reserved4;
#elif IWL == 4965
__le16 rx_chain;
#endif
u8 ofdm_basic_rates;
u8 cck_basic_rates;
__le16 assoc_id;
__le32 flags;
__le32 filter_flags;
__le16 channel;
#if IWL == 3945
__le16 reserved5;
#elif IWL == 4965
u8 ofdm_ht_single_stream_basic_rates;
u8 ofdm_ht_dual_stream_basic_rates;
#endif
} __attribute__ ((packed));
/*
* REPLY_RXON_ASSOC = 0x11 (command, has simple generic response)
*/
struct iwl_rxon_assoc_cmd {
__le32 flags;
__le32 filter_flags;
u8 ofdm_basic_rates;
u8 cck_basic_rates;
#if IWL == 4965
u8 ofdm_ht_single_stream_basic_rates;
u8 ofdm_ht_dual_stream_basic_rates;
__le16 rx_chain_select_flags;
#endif
__le16 reserved;
} __attribute__ ((packed));
/*
* REPLY_RXON_TIMING = 0x14 (command, has simple generic response)
*/
struct iwl_rxon_time_cmd {
union tsf timestamp;
__le16 beacon_interval;
__le16 atim_window;
__le32 beacon_init_val;
__le16 listen_interval;
__le16 reserved;
} __attribute__ ((packed));
struct iwl_tx_power {
u8 tx_gain; /* gain for analog radio */
u8 dsp_atten; /* gain for DSP */
} __attribute__ ((packed));
#if IWL == 3945
struct iwl_power_per_rate {
u8 rate; /* plcp */
struct iwl_tx_power tpc;
u8 reserved;
} __attribute__ ((packed));
#elif IWL == 4965
#define POWER_TABLE_NUM_ENTRIES 33
#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
#define POWER_TABLE_CCK_ENTRY 32
struct tx_power_dual_stream {
__le32 dw;
} __attribute__ ((packed));
struct iwl_tx_power_db {
struct tx_power_dual_stream power_tbl[POWER_TABLE_NUM_ENTRIES];
} __attribute__ ((packed));
#endif
/*
* REPLY_CHANNEL_SWITCH = 0x72 (command, has simple generic response)
*/
struct iwl_channel_switch_cmd {
u8 band;
u8 expect_beacon;
__le16 channel;
__le32 rxon_flags;
__le32 rxon_filter_flags;
__le32 switch_time;
#if IWL == 3945
struct iwl_power_per_rate power[IWL_MAX_RATES];
#elif IWL == 4965
struct iwl_tx_power_db tx_power;
#endif
} __attribute__ ((packed));
/*
* CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
*/
struct iwl_csa_notification {
__le16 band;
__le16 channel;
__le32 status; /* 0 - OK, 1 - fail */
} __attribute__ ((packed));
/******************************************************************************
* (2)
* Quality-of-Service (QOS) Commands & Responses:
*
*****************************************************************************/
struct iwl_ac_qos {
__le16 cw_min;
__le16 cw_max;
u8 aifsn;
u8 reserved1;
__le16 edca_txop;
} __attribute__ ((packed));
/* QoS flags defines */
#define QOS_PARAM_FLG_UPDATE_EDCA_MSK __constant_cpu_to_le32(0x01)
#define QOS_PARAM_FLG_TGN_MSK __constant_cpu_to_le32(0x02)
#define QOS_PARAM_FLG_TXOP_TYPE_MSK __constant_cpu_to_le32(0x10)
/*
* TXFIFO Queue number defines
*/
/* number of Access categories (AC) (EDCA), queues 0..3 */
#define AC_NUM 4
/*
* REPLY_QOS_PARAM = 0x13 (command, has simple generic response)
*/
struct iwl_qosparam_cmd {
__le32 qos_flags;
struct iwl_ac_qos ac[AC_NUM];
} __attribute__ ((packed));
/******************************************************************************
* (3)
* Add/Modify Stations Commands & Responses:
*
*****************************************************************************/
/*
* Multi station support
*/
#define IWL_AP_ID 0
#define IWL_MULTICAST_ID 1
#define IWL_STA_ID 2
#define IWL3945_BROADCAST_ID 24
#define IWL3945_STATION_COUNT 25
#define IWL4965_BROADCAST_ID 31
#define IWL4965_STATION_COUNT 32
#define IWL_STATION_COUNT 32 /* MAX(3945,4965)*/
#define IWL_INVALID_STATION 255
#if IWL == 3945
#define STA_FLG_TX_RATE_MSK __constant_cpu_to_le32(1<<2);
#endif
#define STA_FLG_PWR_SAVE_MSK __constant_cpu_to_le32(1<<8);
#define STA_CONTROL_MODIFY_MSK 0x01
/* key flags __le16*/
#define STA_KEY_FLG_ENCRYPT_MSK __constant_cpu_to_le16(0x7)
#define STA_KEY_FLG_NO_ENC __constant_cpu_to_le16(0x0)
#define STA_KEY_FLG_WEP __constant_cpu_to_le16(0x1)
#define STA_KEY_FLG_CCMP __constant_cpu_to_le16(0x2)
#define STA_KEY_FLG_TKIP __constant_cpu_to_le16(0x3)
#define STA_KEY_FLG_KEYID_POS 8
#define STA_KEY_FLG_INVALID __constant_cpu_to_le16(0x0800)
/* modify flags */
#define STA_MODIFY_KEY_MASK 0x01
#define STA_MODIFY_TID_DISABLE_TX 0x02
#define STA_MODIFY_TX_RATE_MSK 0x04
#define STA_MODIFY_ADDBA_TID_MSK 0x08
#define STA_MODIFY_DELBA_TID_MSK 0x10
#define BUILD_RAxTID(sta_id, tid) (((sta_id) << 4) + (tid))
/*
* Antenna masks:
* bit14:15 01 B inactive, A active
* 10 B active, A inactive
* 11 Both active
*/
#define RATE_MCS_ANT_A_POS 14
#define RATE_MCS_ANT_B_POS 15
#define RATE_MCS_ANT_A_MSK 0x4000
#define RATE_MCS_ANT_B_MSK 0x8000
#define RATE_MCS_ANT_AB_MSK 0xc000
struct iwl_keyinfo {
__le16 key_flags;
u8 tkip_rx_tsc_byte2; /* TSC[2] for key mix ph1 detection */
u8 reserved1;
__le16 tkip_rx_ttak[5]; /* 10-byte unicast TKIP TTAK */
__le16 reserved2;
u8 key[16]; /* 16-byte unicast decryption key */
} __attribute__ ((packed));
struct sta_id_modify {
u8 addr[ETH_ALEN];
__le16 reserved1;
u8 sta_id;
u8 modify_mask;
__le16 reserved2;
} __attribute__ ((packed));
/*
* REPLY_ADD_STA = 0x18 (command)
*/
struct iwl_addsta_cmd {
u8 mode;
u8 reserved[3];
struct sta_id_modify sta;
struct iwl_keyinfo key;
__le32 station_flags;
__le32 station_flags_msk;
__le16 tid_disable_tx;
#if IWL == 3945
__le16 rate_n_flags;
#else
__le16 reserved1;
#endif
u8 add_immediate_ba_tid;
u8 remove_immediate_ba_tid;
__le16 add_immediate_ba_ssn;
#if IWL == 4965
__le32 reserved2;
#endif
} __attribute__ ((packed));
/*
* REPLY_ADD_STA = 0x18 (response)
*/
struct iwl_add_sta_resp {
u8 status;
} __attribute__ ((packed));
#define ADD_STA_SUCCESS_MSK 0x1
/******************************************************************************
* (4)
* Rx Responses:
*
*****************************************************************************/
struct iwl_rx_frame_stats {
u8 phy_count;
u8 id;
u8 rssi;
u8 agc;
__le16 sig_avg;
__le16 noise_diff;
u8 payload[0];
} __attribute__ ((packed));
struct iwl_rx_frame_hdr {
__le16 channel;
__le16 phy_flags;
u8 reserved1;
u8 rate;
__le16 len;
u8 payload[0];
} __attribute__ ((packed));
#define RX_RES_STATUS_NO_CRC32_ERROR __constant_cpu_to_le32(1 << 0)
#define RX_RES_STATUS_NO_RXE_OVERFLOW __constant_cpu_to_le32(1 << 1)
#define RX_RES_PHY_FLAGS_BAND_24_MSK __constant_cpu_to_le16(1 << 0)
#define RX_RES_PHY_FLAGS_MOD_CCK_MSK __constant_cpu_to_le16(1 << 1)
#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK __constant_cpu_to_le16(1 << 2)
#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK __constant_cpu_to_le16(1 << 3)
#define RX_RES_PHY_FLAGS_ANTENNA_MSK __constant_cpu_to_le16(0xf0)
#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
#define RX_RES_STATUS_SEC_TYPE_NONE (0x0 << 8)
#define RX_RES_STATUS_SEC_TYPE_WEP (0x1 << 8)
#define RX_RES_STATUS_SEC_TYPE_CCMP (0x2 << 8)
#define RX_RES_STATUS_SEC_TYPE_TKIP (0x3 << 8)
#define RX_RES_STATUS_DECRYPT_TYPE_MSK (0x3 << 11)
#define RX_RES_STATUS_NOT_DECRYPT (0x0 << 11)
#define RX_RES_STATUS_DECRYPT_OK (0x3 << 11)
#define RX_RES_STATUS_BAD_ICV_MIC (0x1 << 11)
#define RX_RES_STATUS_BAD_KEY_TTAK (0x2 << 11)
struct iwl_rx_frame_end {
__le32 status;
__le64 timestamp;
__le32 beacon_timestamp;
} __attribute__ ((packed));
/*
* REPLY_3945_RX = 0x1b (response only, not a command)
*
* NOTE: DO NOT dereference from casts to this structure
* It is provided only for calculating minimum data set size.
* The actual offsets of the hdr and end are dynamic based on
* stats.phy_count
*/
struct iwl_rx_frame {
struct iwl_rx_frame_stats stats;
struct iwl_rx_frame_hdr hdr;
struct iwl_rx_frame_end end;
} __attribute__ ((packed));
/* Fixed (non-configurable) rx data from phy */
#define RX_PHY_FLAGS_ANTENNAE_OFFSET (4)
#define RX_PHY_FLAGS_ANTENNAE_MASK (0x70)
#define IWL_AGC_DB_MASK (0x3f80) /* MASK(7,13) */
#define IWL_AGC_DB_POS (7)
struct iwl4965_rx_non_cfg_phy {
__le16 ant_selection; /* ant A bit 4, ant B bit 5, ant C bit 6 */
__le16 agc_info; /* agc code 0:6, agc dB 7:13, reserved 14:15 */
u8 rssi_info[6]; /* we use even entries, 0/2/4 for A/B/C rssi */
u8 pad[0];
} __attribute__ ((packed));
/*
* REPLY_4965_RX = 0xc3 (response only, not a command)
* Used only for legacy (non 11n) frames.
*/
#define RX_RES_PHY_CNT 14
struct iwl4965_rx_phy_res {
u8 non_cfg_phy_cnt; /* non configurable DSP phy data byte count */
u8 cfg_phy_cnt; /* configurable DSP phy data byte count */
u8 stat_id; /* configurable DSP phy data set ID */
u8 reserved1;
__le64 timestamp; /* TSF at on air rise */
__le32 beacon_time_stamp; /* beacon at on-air rise */
__le16 phy_flags; /* general phy flags: band, modulation, ... */
__le16 channel; /* channel number */
__le16 non_cfg_phy[RX_RES_PHY_CNT]; /* upto 14 phy entries */
__le32 reserved2;
__le32 rate_n_flags;
__le16 byte_count; /* frame's byte-count */
__le16 reserved3;
} __attribute__ ((packed));
struct iwl4965_rx_mpdu_res_start {
__le16 byte_count;
__le16 reserved;
} __attribute__ ((packed));
/******************************************************************************
* (5)
* Tx Commands & Responses:
*
*****************************************************************************/
/* Tx flags */
#define TX_CMD_FLG_RTS_MSK __constant_cpu_to_le32(1 << 1)
#define TX_CMD_FLG_CTS_MSK __constant_cpu_to_le32(1 << 2)
#define TX_CMD_FLG_ACK_MSK __constant_cpu_to_le32(1 << 3)
#define TX_CMD_FLG_STA_RATE_MSK __constant_cpu_to_le32(1 << 4)
#define TX_CMD_FLG_IMM_BA_RSP_MASK __constant_cpu_to_le32(1 << 6)
#define TX_CMD_FLG_FULL_TXOP_PROT_MSK __constant_cpu_to_le32(1 << 7)
#define TX_CMD_FLG_ANT_SEL_MSK __constant_cpu_to_le32(0xf00)
#define TX_CMD_FLG_ANT_A_MSK __constant_cpu_to_le32(1 << 8)
#define TX_CMD_FLG_ANT_B_MSK __constant_cpu_to_le32(1 << 9)
/* ucode ignores BT priority for this frame */
#define TX_CMD_FLG_BT_DIS_MSK __constant_cpu_to_le32(1 << 12)
/* ucode overrides sequence control */
#define TX_CMD_FLG_SEQ_CTL_MSK __constant_cpu_to_le32(1 << 13)
/* signal that this frame is non-last MPDU */
#define TX_CMD_FLG_MORE_FRAG_MSK __constant_cpu_to_le32(1 << 14)
/* calculate TSF in outgoing frame */
#define TX_CMD_FLG_TSF_MSK __constant_cpu_to_le32(1 << 16)
/* activate TX calibration. */
#define TX_CMD_FLG_CALIB_MSK __constant_cpu_to_le32(1 << 17)
/* signals that 2 bytes pad was inserted
after the MAC header */
#define TX_CMD_FLG_MH_PAD_MSK __constant_cpu_to_le32(1 << 20)
/* HCCA-AP - disable duration overwriting. */
#define TX_CMD_FLG_DUR_MSK __constant_cpu_to_le32(1 << 25)
/*
* TX command security control
*/
#define TX_CMD_SEC_WEP 0x01
#define TX_CMD_SEC_CCM 0x02
#define TX_CMD_SEC_TKIP 0x03
#define TX_CMD_SEC_MSK 0x03
#define TX_CMD_SEC_SHIFT 6
#define TX_CMD_SEC_KEY128 0x08
/*
* TX command Frame life time
*/
struct iwl_dram_scratch {
u8 try_cnt;
u8 bt_kill_cnt;
__le16 reserved;
} __attribute__ ((packed));
/*
* REPLY_TX = 0x1c (command)
*/
struct iwl_tx_cmd {
__le16 len;
__le16 next_frame_len;
__le32 tx_flags;
#if IWL == 3945
u8 rate;
u8 sta_id;
u8 tid_tspec;
#elif IWL == 4965
struct iwl_dram_scratch scratch;
__le32 rate_n_flags;
u8 sta_id;
#endif
u8 sec_ctl;
#if IWL == 4965
u8 initial_rate_index;
u8 reserved;
#endif
u8 key[16];
#if IWL == 3945
union {
u8 byte[8];
__le16 word[4];
__le32 dw[2];
} tkip_mic;
__le32 next_frame_info;
#elif IWL == 4965
__le16 next_frame_flags;
__le16 reserved2;
#endif
union {
__le32 life_time;
__le32 attempt;
} stop_time;
#if IWL == 3945
u8 supp_rates[2];
#elif IWL == 4965
__le32 dram_lsb_ptr;
u8 dram_msb_ptr;
#endif
u8 rts_retry_limit; /*byte 50 */
u8 data_retry_limit; /*byte 51 */
#if IWL == 4965
u8 tid_tspec;
#endif
union {
__le16 pm_frame_timeout;
__le16 attempt_duration;
} timeout;
__le16 driver_txop;
u8 payload[0];
struct ieee80211_hdr hdr[0];
} __attribute__ ((packed));
/* TX command response is sent after *all* transmission attempts.
*
* NOTES:
*
* TX_STATUS_FAIL_NEXT_FRAG
*
* If the fragment flag in the MAC header for the frame being transmitted
* is set and there is insufficient time to transmit the next frame, the
* TX status will be returned with 'TX_STATUS_FAIL_NEXT_FRAG'.
*
* TX_STATUS_FIFO_UNDERRUN
*
* Indicates the host did not provide bytes to the FIFO fast enough while
* a TX was in progress.
*
* TX_STATUS_FAIL_MGMNT_ABORT
*
* This status is only possible if the ABORT ON MGMT RX parameter was
* set to true with the TX command.
*
* If the MSB of the status parameter is set then an abort sequence is
* required. This sequence consists of the host activating the TX Abort
* control line, and then waiting for the TX Abort command response. This
* indicates that a the device is no longer in a transmit state, and that the
* command FIFO has been cleared. The host must then deactivate the TX Abort
* control line. Receiving is still allowed in this case.
*/
enum {
TX_STATUS_SUCCESS = 0x01,
TX_STATUS_DIRECT_DONE = 0x02,
TX_STATUS_FAIL_SHORT_LIMIT = 0x82,
TX_STATUS_FAIL_LONG_LIMIT = 0x83,
TX_STATUS_FAIL_FIFO_UNDERRUN = 0x84,
TX_STATUS_FAIL_MGMNT_ABORT = 0x85,
TX_STATUS_FAIL_NEXT_FRAG = 0x86,
TX_STATUS_FAIL_LIFE_EXPIRE = 0x87,
TX_STATUS_FAIL_DEST_PS = 0x88,
TX_STATUS_FAIL_ABORTED = 0x89,
TX_STATUS_FAIL_BT_RETRY = 0x8a,
TX_STATUS_FAIL_STA_INVALID = 0x8b,
TX_STATUS_FAIL_FRAG_DROPPED = 0x8c,
TX_STATUS_FAIL_TID_DISABLE = 0x8d,
TX_STATUS_FAIL_FRAME_FLUSHED = 0x8e,
TX_STATUS_FAIL_INSUFFICIENT_CF_POLL = 0x8f,
TX_STATUS_FAIL_TX_LOCKED = 0x90,
TX_STATUS_FAIL_NO_BEACON_ON_RADAR = 0x91,
};
#define TX_PACKET_MODE_REGULAR 0x0000
#define TX_PACKET_MODE_BURST_SEQ 0x0100
#define TX_PACKET_MODE_BURST_FIRST 0x0200
enum {
TX_POWER_PA_NOT_ACTIVE = 0x0,
};
enum {
TX_STATUS_MSK = 0x000000ff, /* bits 0:7 */
TX_STATUS_DELAY_MSK = 0x00000040,
TX_STATUS_ABORT_MSK = 0x00000080,
TX_PACKET_MODE_MSK = 0x0000ff00, /* bits 8:15 */
TX_FIFO_NUMBER_MSK = 0x00070000, /* bits 16:18 */
TX_RESERVED = 0x00780000, /* bits 19:22 */
TX_POWER_PA_DETECT_MSK = 0x7f800000, /* bits 23:30 */
TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
};
/* *******************************
* TX aggregation state
******************************* */
enum {
AGG_TX_STATE_TRANSMITTED = 0x00,
AGG_TX_STATE_UNDERRUN_MSK = 0x01,
AGG_TX_STATE_BT_PRIO_MSK = 0x02,
AGG_TX_STATE_FEW_BYTES_MSK = 0x04,
AGG_TX_STATE_ABORT_MSK = 0x08,
AGG_TX_STATE_LAST_SENT_TTL_MSK = 0x10,
AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK = 0x20,
AGG_TX_STATE_LAST_SENT_BT_KILL_MSK = 0x40,
AGG_TX_STATE_SCD_QUERY_MSK = 0x80,
AGG_TX_STATE_TEST_BAD_CRC32_MSK = 0x100,
AGG_TX_STATE_RESPONSE_MSK = 0x1ff,
AGG_TX_STATE_DUMP_TX_MSK = 0x200,
AGG_TX_STATE_DELAY_TX_MSK = 0x400
};
#define AGG_TX_STATE_LAST_SENT_MSK \
(AGG_TX_STATE_LAST_SENT_TTL_MSK | \
AGG_TX_STATE_LAST_SENT_TRY_CNT_MSK | \
AGG_TX_STATE_LAST_SENT_BT_KILL_MSK)
#define AGG_TX_STATE_TRY_CNT_POS 12
#define AGG_TX_STATE_TRY_CNT_MSK 0xf000
#define AGG_TX_STATE_SEQ_NUM_POS 16
#define AGG_TX_STATE_SEQ_NUM_MSK 0xffff0000
/*
* REPLY_TX = 0x1c (response)
*/
#if IWL == 4965
struct iwl_tx_resp {
u8 frame_count; /* 1 no aggregation, >1 aggregation */
u8 bt_kill_count;
u8 failure_rts;
u8 failure_frame;
__le32 rate_n_flags;
__le16 wireless_media_time;
__le16 reserved;
__le32 pa_power1;
__le32 pa_power2;
__le32 status; /* TX status (for aggregation status of 1st frame) */
} __attribute__ ((packed));
#elif IWL == 3945
struct iwl_tx_resp {
u8 failure_rts;
u8 failure_frame;
u8 bt_kill_count;
u8 rate;
__le32 wireless_media_time;
__le32 status; /* TX status (for aggregation status of 1st frame) */
} __attribute__ ((packed));
#endif
/*
* REPLY_COMPRESSED_BA = 0xc5 (response only, not a command)
*/
struct iwl_compressed_ba_resp {
__le32 sta_addr_lo32;
__le16 sta_addr_hi16;
__le16 reserved;
u8 sta_id;
u8 tid;
__le16 ba_seq_ctl;
__le32 ba_bitmap0;
__le32 ba_bitmap1;
__le16 scd_flow;
__le16 scd_ssn;
} __attribute__ ((packed));
/*
* REPLY_TX_PWR_TABLE_CMD = 0x97 (command, has simple generic response)
*/
struct iwl_txpowertable_cmd {
u8 band; /* 0: 5 GHz, 1: 2.4 GHz */
u8 reserved;
__le16 channel;
#if IWL == 3945
struct iwl_power_per_rate power[IWL_MAX_RATES];
#elif IWL == 4965
struct iwl_tx_power_db tx_power;
#endif
} __attribute__ ((packed));
#if IWL == 3945
struct iwl_rate_scaling_info {
__le16 rate_n_flags;
u8 try_cnt;
u8 next_rate_index;
} __attribute__ ((packed));
/**
* struct iwl_rate_scaling_cmd - Rate Scaling Command & Response
*
* REPLY_RATE_SCALE = 0x47 (command, has simple generic response)
*
* NOTE: The table of rates passed to the uCode via the
* RATE_SCALE command sets up the corresponding order of
* rates used for all related commands, including rate
* masks, etc.
*
* For example, if you set 9MB (PLCP 0x0f) as the first
* rate in the rate table, the bit mask for that rate
* when passed through ofdm_basic_rates on the REPLY_RXON
* command would be bit 0 (1<<0)
*/
struct iwl_rate_scaling_cmd {
u8 table_id;
u8 reserved[3];
struct iwl_rate_scaling_info table[IWL_MAX_RATES];
} __attribute__ ((packed));
#elif IWL == 4965
/*RS_NEW_API: only TLC_RTS remains and moved to bit 0 */
#define LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK (1<<0)
#define LINK_QUAL_AC_NUM AC_NUM
#define LINK_QUAL_MAX_RETRY_NUM 16
#define LINK_QUAL_ANT_A_MSK (1<<0)
#define LINK_QUAL_ANT_B_MSK (1<<1)
#define LINK_QUAL_ANT_MSK (LINK_QUAL_ANT_A_MSK|LINK_QUAL_ANT_B_MSK)
struct iwl_link_qual_general_params {
u8 flags;
u8 mimo_delimiter;
u8 single_stream_ant_msk;
u8 dual_stream_ant_msk;
u8 start_rate_index[LINK_QUAL_AC_NUM];
} __attribute__ ((packed));
struct iwl_link_qual_agg_params {
__le16 agg_time_limit;
u8 agg_dis_start_th;
u8 agg_frame_cnt_limit;
__le32 reserved;
} __attribute__ ((packed));
/*
* REPLY_TX_LINK_QUALITY_CMD = 0x4e (command, has simple generic response)
*/
struct iwl_link_quality_cmd {
u8 sta_id;
u8 reserved1;
__le16 control;
struct iwl_link_qual_general_params general_params;
struct iwl_link_qual_agg_params agg_params;
struct {
__le32 rate_n_flags;
} rs_table[LINK_QUAL_MAX_RETRY_NUM];
__le32 reserved2;
} __attribute__ ((packed));
#endif
/*
* REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
*/
struct iwl_bt_cmd {
u8 flags;
u8 lead_time;
u8 max_kill;
u8 reserved;
__le32 kill_ack_mask;
__le32 kill_cts_mask;
} __attribute__ ((packed));
/******************************************************************************
* (6)
* Spectrum Management (802.11h) Commands, Responses, Notifications:
*
*****************************************************************************/
/*
* Spectrum Management
*/
#define MEASUREMENT_FILTER_FLAG (RXON_FILTER_PROMISC_MSK | \
RXON_FILTER_CTL2HOST_MSK | \
RXON_FILTER_ACCEPT_GRP_MSK | \
RXON_FILTER_DIS_DECRYPT_MSK | \
RXON_FILTER_DIS_GRP_DECRYPT_MSK | \
RXON_FILTER_ASSOC_MSK | \
RXON_FILTER_BCON_AWARE_MSK)
struct iwl_measure_channel {
__le32 duration; /* measurement duration in extended beacon
* format */
u8 channel; /* channel to measure */
u8 type; /* see enum iwl_measure_type */
__le16 reserved;
} __attribute__ ((packed));
/*
* REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (command)
*/
struct iwl_spectrum_cmd {
__le16 len; /* number of bytes starting from token */
u8 token; /* token id */
u8 id; /* measurement id -- 0 or 1 */
u8 origin; /* 0 = TGh, 1 = other, 2 = TGk */
u8 periodic; /* 1 = periodic */
__le16 path_loss_timeout;
__le32 start_time; /* start time in extended beacon format */
__le32 reserved2;
__le32 flags; /* rxon flags */
__le32 filter_flags; /* rxon filter flags */
__le16 channel_count; /* minimum 1, maximum 10 */
__le16 reserved3;
struct iwl_measure_channel channels[10];
} __attribute__ ((packed));
/*
* REPLY_SPECTRUM_MEASUREMENT_CMD = 0x74 (response)
*/
struct iwl_spectrum_resp {
u8 token;
u8 id; /* id of the prior command replaced, or 0xff */
__le16 status; /* 0 - command will be handled
* 1 - cannot handle (conflicts with another
* measurement) */
} __attribute__ ((packed));
enum iwl_measurement_state {
IWL_MEASUREMENT_START = 0,
IWL_MEASUREMENT_STOP = 1,
};
enum iwl_measurement_status {
IWL_MEASUREMENT_OK = 0,
IWL_MEASUREMENT_CONCURRENT = 1,
IWL_MEASUREMENT_CSA_CONFLICT = 2,
IWL_MEASUREMENT_TGH_CONFLICT = 3,
/* 4-5 reserved */
IWL_MEASUREMENT_STOPPED = 6,
IWL_MEASUREMENT_TIMEOUT = 7,
IWL_MEASUREMENT_PERIODIC_FAILED = 8,
};
#define NUM_ELEMENTS_IN_HISTOGRAM 8
struct iwl_measurement_histogram {
__le32 ofdm[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 0.8usec counts */
__le32 cck[NUM_ELEMENTS_IN_HISTOGRAM]; /* in 1usec counts */
} __attribute__ ((packed));
/* clear channel availability counters */
struct iwl_measurement_cca_counters {
__le32 ofdm;
__le32 cck;
} __attribute__ ((packed));
enum iwl_measure_type {
IWL_MEASURE_BASIC = (1 << 0),
IWL_MEASURE_CHANNEL_LOAD = (1 << 1),
IWL_MEASURE_HISTOGRAM_RPI = (1 << 2),
IWL_MEASURE_HISTOGRAM_NOISE = (1 << 3),
IWL_MEASURE_FRAME = (1 << 4),
/* bits 5:6 are reserved */
IWL_MEASURE_IDLE = (1 << 7),
};
/*
* SPECTRUM_MEASURE_NOTIFICATION = 0x75 (notification only, not a command)
*/
struct iwl_spectrum_notification {
u8 id; /* measurement id -- 0 or 1 */
u8 token;
u8 channel_index; /* index in measurement channel list */
u8 state; /* 0 - start, 1 - stop */
__le32 start_time; /* lower 32-bits of TSF */
u8 band; /* 0 - 5.2GHz, 1 - 2.4GHz */
u8 channel;
u8 type; /* see enum iwl_measurement_type */
u8 reserved1;
/* NOTE: cca_ofdm, cca_cck, basic_type, and histogram are only only
* valid if applicable for measurement type requested. */
__le32 cca_ofdm; /* cca fraction time in 40Mhz clock periods */
__le32 cca_cck; /* cca fraction time in 44Mhz clock periods */
__le32 cca_time; /* channel load time in usecs */
u8 basic_type; /* 0 - bss, 1 - ofdm preamble, 2 -
* unidentified */
u8 reserved2[3];
struct iwl_measurement_histogram histogram;
__le32 stop_time; /* lower 32-bits of TSF */
__le32 status; /* see iwl_measurement_status */
} __attribute__ ((packed));
/******************************************************************************
* (7)
* Power Management Commands, Responses, Notifications:
*
*****************************************************************************/
/**
* struct iwl_powertable_cmd - Power Table Command
* @flags: See below:
*
* POWER_TABLE_CMD = 0x77 (command, has simple generic response)
*
* PM allow:
* bit 0 - '0' Driver not allow power management
* '1' Driver allow PM (use rest of parameters)
* uCode send sleep notifications:
* bit 1 - '0' Don't send sleep notification
* '1' send sleep notification (SEND_PM_NOTIFICATION)
* Sleep over DTIM
* bit 2 - '0' PM have to walk up every DTIM
* '1' PM could sleep over DTIM till listen Interval.
* PCI power managed
* bit 3 - '0' (PCI_LINK_CTRL & 0x1)
* '1' !(PCI_LINK_CTRL & 0x1)
* Force sleep Modes
* bit 31/30- '00' use both mac/xtal sleeps
* '01' force Mac sleep
* '10' force xtal sleep
* '11' Illegal set
*
* NOTE: if sleep_interval[SLEEP_INTRVL_TABLE_SIZE-1] > DTIM period then
* ucode assume sleep over DTIM is allowed and we don't need to wakeup
* for every DTIM.
*/
#define IWL_POWER_VEC_SIZE 5
#if IWL == 3945
#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK __constant_cpu_to_le32(1<<0)
#define IWL_POWER_SLEEP_OVER_DTIM_MSK __constant_cpu_to_le32(1<<2)
#define IWL_POWER_PCI_PM_MSK __constant_cpu_to_le32(1<<3)
struct iwl_powertable_cmd {
__le32 flags;
__le32 rx_data_timeout;
__le32 tx_data_timeout;
__le32 sleep_interval[IWL_POWER_VEC_SIZE];
} __attribute__((packed));
#elif IWL == 4965
#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK __constant_cpu_to_le16(1<<0)
#define IWL_POWER_SLEEP_OVER_DTIM_MSK __constant_cpu_to_le16(1<<2)
#define IWL_POWER_PCI_PM_MSK __constant_cpu_to_le16(1<<3)
struct iwl_powertable_cmd {
__le16 flags;
u8 keep_alive_seconds;
u8 debug_flags;
__le32 rx_data_timeout;
__le32 tx_data_timeout;
__le32 sleep_interval[IWL_POWER_VEC_SIZE];
__le32 keep_alive_beacons;
} __attribute__ ((packed));
#endif
/*
* PM_SLEEP_NOTIFICATION = 0x7A (notification only, not a command)
* 3945 and 4965 identical.
*/
struct iwl_sleep_notification {
u8 pm_sleep_mode;
u8 pm_wakeup_src;
__le16 reserved;
__le32 sleep_time;
__le32 tsf_low;
__le32 bcon_timer;
} __attribute__ ((packed));
/* Sleep states. 3945 and 4965 identical. */
enum {
IWL_PM_NO_SLEEP = 0,
IWL_PM_SLP_MAC = 1,
IWL_PM_SLP_FULL_MAC_UNASSOCIATE = 2,
IWL_PM_SLP_FULL_MAC_CARD_STATE = 3,
IWL_PM_SLP_PHY = 4,
IWL_PM_SLP_REPENT = 5,
IWL_PM_WAKEUP_BY_TIMER = 6,
IWL_PM_WAKEUP_BY_DRIVER = 7,
IWL_PM_WAKEUP_BY_RFKILL = 8,
/* 3 reserved */
IWL_PM_NUM_OF_MODES = 12,
};
/*
* REPLY_CARD_STATE_CMD = 0xa0 (command, has simple generic response)
*/
#define CARD_STATE_CMD_DISABLE 0x00 /* Put card to sleep */
#define CARD_STATE_CMD_ENABLE 0x01 /* Wake up card */
#define CARD_STATE_CMD_HALT 0x02 /* Power down permanently */
struct iwl_card_state_cmd {
__le32 status; /* CARD_STATE_CMD_* request new power state */
} __attribute__ ((packed));
/*
* CARD_STATE_NOTIFICATION = 0xa1 (notification only, not a command)
*/
struct iwl_card_state_notif {
__le32 flags;
} __attribute__ ((packed));
#define HW_CARD_DISABLED 0x01
#define SW_CARD_DISABLED 0x02
#define RF_CARD_DISABLED 0x04
#define RXON_CARD_DISABLED 0x10
struct iwl_ct_kill_config {
__le32 reserved;
__le32 critical_temperature_M;
__le32 critical_temperature_R;
} __attribute__ ((packed));
/******************************************************************************
* (8)
* Scan Commands, Responses, Notifications:
*
*****************************************************************************/
struct iwl_scan_channel {
/* type is defined as:
* 0:0 active (0 - passive)
* 1:4 SSID direct
* If 1 is set then corresponding SSID IE is transmitted in probe
* 5:7 reserved
*/
u8 type;
u8 channel;
struct iwl_tx_power tpc;
__le16 active_dwell;
__le16 passive_dwell;
} __attribute__ ((packed));
struct iwl_ssid_ie {
u8 id;
u8 len;
u8 ssid[32];
} __attribute__ ((packed));
#define PROBE_OPTION_MAX 0x4
#define TX_CMD_LIFE_TIME_INFINITE __constant_cpu_to_le32(0xFFFFFFFF)
#define IWL_GOOD_CRC_TH __constant_cpu_to_le16(1)
#define IWL_MAX_SCAN_SIZE 1024
/*
* REPLY_SCAN_CMD = 0x80 (command)
*/
struct iwl_scan_cmd {
__le16 len;
u8 reserved0;
u8 channel_count;
__le16 quiet_time; /* dwell only this long on quiet chnl
* (active scan) */
__le16 quiet_plcp_th; /* quiet chnl is < this # pkts (typ. 1) */
__le16 good_CRC_th; /* passive -> active promotion threshold */
#if IWL == 3945
__le16 reserved1;
#elif IWL == 4965
__le16 rx_chain;
#endif
__le32 max_out_time; /* max usec to be out of associated (service)
* chnl */
__le32 suspend_time; /* pause scan this long when returning to svc
* chnl.
* 3945 -- 31:24 # beacons, 19:0 additional usec,
* 4965 -- 31:22 # beacons, 21:0 additional usec.
*/
__le32 flags;
__le32 filter_flags;
struct iwl_tx_cmd tx_cmd;
struct iwl_ssid_ie direct_scan[PROBE_OPTION_MAX];
u8 data[0];
/*
* The channels start after the probe request payload and are of type:
*
* struct iwl_scan_channel channels[0];
*
* NOTE: Only one band of channels can be scanned per pass. You
* can not mix 2.4GHz channels and 5.2GHz channels and must
* request a scan multiple times (not concurrently)
*
*/
} __attribute__ ((packed));
/* Can abort will notify by complete notification with abort status. */
#define CAN_ABORT_STATUS __constant_cpu_to_le32(0x1)
/* complete notification statuses */
#define ABORT_STATUS 0x2
/*
* REPLY_SCAN_CMD = 0x80 (response)
*/
struct iwl_scanreq_notification {
__le32 status; /* 1: okay, 2: cannot fulfill request */
} __attribute__ ((packed));
/*
* SCAN_START_NOTIFICATION = 0x82 (notification only, not a command)
*/
struct iwl_scanstart_notification {
__le32 tsf_low;
__le32 tsf_high;
__le32 beacon_timer;
u8 channel;
u8 band;
u8 reserved[2];
__le32 status;
} __attribute__ ((packed));
#define SCAN_OWNER_STATUS 0x1;
#define MEASURE_OWNER_STATUS 0x2;
#define NUMBER_OF_STATISTICS 1 /* first __le32 is good CRC */
/*
* SCAN_RESULTS_NOTIFICATION = 0x83 (notification only, not a command)
*/
struct iwl_scanresults_notification {
u8 channel;
u8 band;
u8 reserved[2];
__le32 tsf_low;
__le32 tsf_high;
__le32 statistics[NUMBER_OF_STATISTICS];
} __attribute__ ((packed));
/*
* SCAN_COMPLETE_NOTIFICATION = 0x84 (notification only, not a command)
*/
struct iwl_scancomplete_notification {
u8 scanned_channels;
u8 status;
u8 reserved;
u8 last_channel;
__le32 tsf_low;
__le32 tsf_high;
} __attribute__ ((packed));
/******************************************************************************
* (9)
* IBSS/AP Commands and Notifications:
*
*****************************************************************************/
/*
* BEACON_NOTIFICATION = 0x90 (notification only, not a command)
*/
struct iwl_beacon_notif {
struct iwl_tx_resp beacon_notify_hdr;
__le32 low_tsf;
__le32 high_tsf;
__le32 ibss_mgr_status;
} __attribute__ ((packed));
/*
* REPLY_TX_BEACON = 0x91 (command, has simple generic response)
*/
struct iwl_tx_beacon_cmd {
struct iwl_tx_cmd tx;
__le16 tim_idx;
u8 tim_size;
u8 reserved1;
struct ieee80211_hdr frame[0]; /* beacon frame */
} __attribute__ ((packed));
/******************************************************************************
* (10)
* Statistics Commands and Notifications:
*
*****************************************************************************/
#define IWL_TEMP_CONVERT 260
#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
/* Used for passing to driver number of successes and failures per rate */
struct rate_histogram {
union {
__le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
__le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
__le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
} success;
union {
__le32 a[SUP_RATE_11A_MAX_NUM_CHANNELS];
__le32 b[SUP_RATE_11B_MAX_NUM_CHANNELS];
__le32 g[SUP_RATE_11G_MAX_NUM_CHANNELS];
} failed;
} __attribute__ ((packed));
/* statistics command response */
struct statistics_rx_phy {
__le32 ina_cnt;
__le32 fina_cnt;
__le32 plcp_err;
__le32 crc32_err;
__le32 overrun_err;
__le32 early_overrun_err;
__le32 crc32_good;
__le32 false_alarm_cnt;
__le32 fina_sync_err_cnt;
__le32 sfd_timeout;
__le32 fina_timeout;
__le32 unresponded_rts;
__le32 rxe_frame_limit_overrun;
__le32 sent_ack_cnt;
__le32 sent_cts_cnt;
#if IWL == 4965
__le32 sent_ba_rsp_cnt;
__le32 dsp_self_kill;
__le32 mh_format_err;
__le32 re_acq_main_rssi_sum;
__le32 reserved3;
#endif
} __attribute__ ((packed));
#if IWL == 4965
struct statistics_rx_ht_phy {
__le32 plcp_err;
__le32 overrun_err;
__le32 early_overrun_err;
__le32 crc32_good;
__le32 crc32_err;
__le32 mh_format_err;
__le32 agg_crc32_good;
__le32 agg_mpdu_cnt;
__le32 agg_cnt;
__le32 reserved2;
} __attribute__ ((packed));
#endif
struct statistics_rx_non_phy {
__le32 bogus_cts; /* CTS received when not expecting CTS */
__le32 bogus_ack; /* ACK received when not expecting ACK */
__le32 non_bssid_frames; /* number of frames with BSSID that
* doesn't belong to the STA BSSID */
__le32 filtered_frames; /* count frames that were dumped in the
* filtering process */
__le32 non_channel_beacons; /* beacons with our bss id but not on
* our serving channel */
#if IWL == 4965
__le32 channel_beacons; /* beacons with our bss id and in our
* serving channel */
__le32 num_missed_bcon; /* number of missed beacons */
__le32 adc_rx_saturation_time; /* count in 0.8us units the time the
* ADC was in saturation */
__le32 ina_detection_search_time;/* total time (in 0.8us) searched
* for INA */
__le32 beacon_silence_rssi_a; /* RSSI silence after beacon frame */
__le32 beacon_silence_rssi_b; /* RSSI silence after beacon frame */
__le32 beacon_silence_rssi_c; /* RSSI silence after beacon frame */
__le32 interference_data_flag; /* flag for interference data
* availability. 1 when data is
* available. */
__le32 channel_load; /* counts RX Enable time */
__le32 dsp_false_alarms; /* DSP false alarm (both OFDM
* and CCK) counter */
__le32 beacon_rssi_a;
__le32 beacon_rssi_b;
__le32 beacon_rssi_c;
__le32 beacon_energy_a;
__le32 beacon_energy_b;
__le32 beacon_energy_c;
#endif
} __attribute__ ((packed));
struct statistics_rx {
struct statistics_rx_phy ofdm;
struct statistics_rx_phy cck;
struct statistics_rx_non_phy general;
#if IWL == 4965
struct statistics_rx_ht_phy ofdm_ht;
#endif
} __attribute__ ((packed));
#if IWL == 4965
struct statistics_tx_non_phy_agg {
__le32 ba_timeout;
__le32 ba_reschedule_frames;
__le32 scd_query_agg_frame_cnt;
__le32 scd_query_no_agg;
__le32 scd_query_agg;
__le32 scd_query_mismatch;
__le32 frame_not_ready;
__le32 underrun;
__le32 bt_prio_kill;
__le32 rx_ba_rsp_cnt;
__le32 reserved2;
__le32 reserved3;
} __attribute__ ((packed));
#endif
struct statistics_tx {
__le32 preamble_cnt;
__le32 rx_detected_cnt;
__le32 bt_prio_defer_cnt;
__le32 bt_prio_kill_cnt;
__le32 few_bytes_cnt;
__le32 cts_timeout;
__le32 ack_timeout;
__le32 expected_ack_cnt;
__le32 actual_ack_cnt;
#if IWL == 4965
__le32 dump_msdu_cnt;
__le32 burst_abort_next_frame_mismatch_cnt;
__le32 burst_abort_missing_next_frame_cnt;
__le32 cts_timeout_collision;
__le32 ack_or_ba_timeout_collision;
struct statistics_tx_non_phy_agg agg;
#endif
} __attribute__ ((packed));
struct statistics_dbg {
__le32 burst_check;
__le32 burst_count;
__le32 reserved[4];
} __attribute__ ((packed));
struct statistics_div {
__le32 tx_on_a;
__le32 tx_on_b;
__le32 exec_time;
__le32 probe_time;
#if IWL == 4965
__le32 reserved1;
__le32 reserved2;
#endif
} __attribute__ ((packed));
struct statistics_general {
__le32 temperature;
#if IWL == 4965
__le32 temperature_m;
#endif
struct statistics_dbg dbg;
__le32 sleep_time;
__le32 slots_out;
__le32 slots_idle;
__le32 ttl_timestamp;
struct statistics_div div;
#if IWL == 4965
__le32 rx_enable_counter;
__le32 reserved1;
__le32 reserved2;
__le32 reserved3;
#endif
} __attribute__ ((packed));
/*
* REPLY_STATISTICS_CMD = 0x9c,
* 3945 and 4965 identical.
*
* This command triggers an immediate response containing uCode statistics.
* The response is in the same format as STATISTICS_NOTIFICATION 0x9d, below.
*
* If the CLEAR_STATS configuration flag is set, uCode will clear its
* internal copy of the statistics (counters) after issuing the response.
* This flag does not affect STATISTICS_NOTIFICATIONs after beacons (see below).
*
* If the DISABLE_NOTIF configuration flag is set, uCode will not issue
* STATISTICS_NOTIFICATIONs after received beacons (see below). This flag
* does not affect the response to the REPLY_STATISTICS_CMD 0x9c itself.
*/
#define IWL_STATS_CONF_CLEAR_STATS __constant_cpu_to_le32(0x1) /* see above */
#define IWL_STATS_CONF_DISABLE_NOTIF __constant_cpu_to_le32(0x2)/* see above */
struct iwl_statistics_cmd {
__le32 configuration_flags; /* IWL_STATS_CONF_* */
} __attribute__ ((packed));
/*
* STATISTICS_NOTIFICATION = 0x9d (notification only, not a command)
*
* By default, uCode issues this notification after receiving a beacon
* while associated. To disable this behavior, set DISABLE_NOTIF flag in the
* REPLY_STATISTICS_CMD 0x9c, above.
*
* Statistics counters continue to increment beacon after beacon, but are
* cleared when changing channels or when driver issues REPLY_STATISTICS_CMD
* 0x9c with CLEAR_STATS bit set (see above).
*
* uCode also issues this notification during scans. uCode clears statistics
* appropriately so that each notification contains statistics for only the
* one channel that has just been scanned.
*/
#define STATISTICS_REPLY_FLG_BAND_24G_MSK __constant_cpu_to_le32(0x2)
#define STATISTICS_REPLY_FLG_FAT_MODE_MSK __constant_cpu_to_le32(0x8)
struct iwl_notif_statistics {
__le32 flag;
struct statistics_rx rx;
struct statistics_tx tx;
struct statistics_general general;
} __attribute__ ((packed));
/*
* MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
*/
/* if ucode missed CONSECUTIVE_MISSED_BCONS_TH beacons in a row,
* then this notification will be sent. */
#define CONSECUTIVE_MISSED_BCONS_TH 20
struct iwl_missed_beacon_notif {
__le32 consequtive_missed_beacons;
__le32 total_missed_becons;
__le32 num_expected_beacons;
__le32 num_recvd_beacons;
} __attribute__ ((packed));
/******************************************************************************
* (11)
* Rx Calibration Commands:
*
*****************************************************************************/
#define PHY_CALIBRATE_DIFF_GAIN_CMD (7)
#define HD_TABLE_SIZE (11)
struct iwl_sensitivity_cmd {
__le16 control;
__le16 table[HD_TABLE_SIZE];
} __attribute__ ((packed));
struct iwl_calibration_cmd {
u8 opCode;
u8 flags;
__le16 reserved;
s8 diff_gain_a;
s8 diff_gain_b;
s8 diff_gain_c;
u8 reserved1;
} __attribute__ ((packed));
/******************************************************************************
* (12)
* Miscellaneous Commands:
*
*****************************************************************************/
/*
* LEDs Command & Response
* REPLY_LEDS_CMD = 0x48 (command, has simple generic response)
*
* For each of 3 possible LEDs (Activity/Link/Tech, selected by "id" field),
* this command turns it on or off, or sets up a periodic blinking cycle.
*/
struct iwl_led_cmd {
__le32 interval; /* "interval" in uSec */
u8 id; /* 1: Activity, 2: Link, 3: Tech */
u8 off; /* # intervals off while blinking;
* "0", with >0 "on" value, turns LED on */
u8 on; /* # intervals on while blinking;
* "0", regardless of "off", turns LED off */
u8 reserved;
} __attribute__ ((packed));
/******************************************************************************
* (13)
* Union of all expected notifications/responses:
*
*****************************************************************************/
struct iwl_rx_packet {
__le32 len;
struct iwl_cmd_header hdr;
union {
struct iwl_alive_resp alive_frame;
struct iwl_rx_frame rx_frame;
struct iwl_tx_resp tx_resp;
struct iwl_spectrum_notification spectrum_notif;
struct iwl_csa_notification csa_notif;
struct iwl_error_resp err_resp;
struct iwl_card_state_notif card_state_notif;
struct iwl_beacon_notif beacon_status;
struct iwl_add_sta_resp add_sta;
struct iwl_sleep_notification sleep_notif;
struct iwl_spectrum_resp spectrum;
struct iwl_notif_statistics stats;
#if IWL == 4965
struct iwl_compressed_ba_resp compressed_ba;
struct iwl_missed_beacon_notif missed_beacon;
#endif
__le32 status;
u8 raw[0];
} u;
} __attribute__ ((packed));
#define IWL_RX_FRAME_SIZE (4 + sizeof(struct iwl_rx_frame))
#endif /* __iwl_commands_h__ */
drivers/net/wireless/iwlwifi/iwl-debug.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* Portions of this file are derived from the ipw3945 project.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_debug_h__
#define __iwl_debug_h__
#ifdef CONFIG_IWLWIFI_DEBUG
extern u32 iwl_debug_level;
#define IWL_DEBUG(level, fmt, args...) \
do { if (iwl_debug_level & (level)) \
printk(KERN_ERR DRV_NAME": %c %s " fmt, \
in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0)
#define IWL_DEBUG_LIMIT(level, fmt, args...) \
do { if ((iwl_debug_level & (level)) && net_ratelimit()) \
printk(KERN_ERR DRV_NAME": %c %s " fmt, \
in_interrupt() ? 'I' : 'U', __FUNCTION__ , ## args); } while (0)
#else
static inline void IWL_DEBUG(int level, const char *fmt, ...)
{
}
static inline void IWL_DEBUG_LIMIT(int level, const char *fmt, ...)
{
}
#endif /* CONFIG_IWLWIFI_DEBUG */
/*
* To use the debug system;
*
* If you are defining a new debug classification, simply add it to the #define
* list here in the form of:
*
* #define IWL_DL_xxxx VALUE
*
* shifting value to the left one bit from the previous entry. xxxx should be
* the name of the classification (for example, WEP)
*
* You then need to either add a IWL_xxxx_DEBUG() macro definition for your
* classification, or use IWL_DEBUG(IWL_DL_xxxx, ...) whenever you want
* to send output to that classification.
*
* To add your debug level to the list of levels seen when you perform
*
* % cat /proc/net/iwl/debug_level
*
* you simply need to add your entry to the iwl_debug_levels array.
*
* If you do not see debug_level in /proc/net/iwl then you do not have
* CONFIG_IWLWIFI_DEBUG defined in your kernel configuration
*
*/
#define IWL_DL_INFO (1<<0)
#define IWL_DL_MAC80211 (1<<1)
#define IWL_DL_HOST_COMMAND (1<<2)
#define IWL_DL_STATE (1<<3)
#define IWL_DL_RADIO (1<<7)
#define IWL_DL_POWER (1<<8)
#define IWL_DL_TEMP (1<<9)
#define IWL_DL_NOTIF (1<<10)
#define IWL_DL_SCAN (1<<11)
#define IWL_DL_ASSOC (1<<12)
#define IWL_DL_DROP (1<<13)
#define IWL_DL_TXPOWER (1<<14)
#define IWL_DL_AP (1<<15)
#define IWL_DL_FW (1<<16)
#define IWL_DL_RF_KILL (1<<17)
#define IWL_DL_FW_ERRORS (1<<18)
#define IWL_DL_LED (1<<19)
#define IWL_DL_RATE (1<<20)
#define IWL_DL_CALIB (1<<21)
#define IWL_DL_WEP (1<<22)
#define IWL_DL_TX (1<<23)
#define IWL_DL_RX (1<<24)
#define IWL_DL_ISR (1<<25)
#define IWL_DL_HT (1<<26)
#define IWL_DL_IO (1<<27)
#define IWL_DL_11H (1<<28)
#define IWL_DL_STATS (1<<29)
#define IWL_DL_TX_REPLY (1<<30)
#define IWL_DL_QOS (1<<31)
#define IWL_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
#define IWL_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
#define IWL_DEBUG_INFO(f, a...) IWL_DEBUG(IWL_DL_INFO, f, ## a)
#define IWL_DEBUG_MAC80211(f, a...) IWL_DEBUG(IWL_DL_MAC80211, f, ## a)
#define IWL_DEBUG_TEMP(f, a...) IWL_DEBUG(IWL_DL_TEMP, f, ## a)
#define IWL_DEBUG_SCAN(f, a...) IWL_DEBUG(IWL_DL_SCAN, f, ## a)
#define IWL_DEBUG_RX(f, a...) IWL_DEBUG(IWL_DL_RX, f, ## a)
#define IWL_DEBUG_TX(f, a...) IWL_DEBUG(IWL_DL_TX, f, ## a)
#define IWL_DEBUG_ISR(f, a...) IWL_DEBUG(IWL_DL_ISR, f, ## a)
#define IWL_DEBUG_LED(f, a...) IWL_DEBUG(IWL_DL_LED, f, ## a)
#define IWL_DEBUG_WEP(f, a...) IWL_DEBUG(IWL_DL_WEP, f, ## a)
#define IWL_DEBUG_HC(f, a...) IWL_DEBUG(IWL_DL_HOST_COMMAND, f, ## a)
#define IWL_DEBUG_CALIB(f, a...) IWL_DEBUG(IWL_DL_CALIB, f, ## a)
#define IWL_DEBUG_FW(f, a...) IWL_DEBUG(IWL_DL_FW, f, ## a)
#define IWL_DEBUG_RF_KILL(f, a...) IWL_DEBUG(IWL_DL_RF_KILL, f, ## a)
#define IWL_DEBUG_DROP(f, a...) IWL_DEBUG(IWL_DL_DROP, f, ## a)
#define IWL_DEBUG_DROP_LIMIT(f, a...) IWL_DEBUG_LIMIT(IWL_DL_DROP, f, ## a)
#define IWL_DEBUG_AP(f, a...) IWL_DEBUG(IWL_DL_AP, f, ## a)
#define IWL_DEBUG_TXPOWER(f, a...) IWL_DEBUG(IWL_DL_TXPOWER, f, ## a)
#define IWL_DEBUG_IO(f, a...) IWL_DEBUG(IWL_DL_IO, f, ## a)
#define IWL_DEBUG_RATE(f, a...) IWL_DEBUG(IWL_DL_RATE, f, ## a)
#define IWL_DEBUG_NOTIF(f, a...) IWL_DEBUG(IWL_DL_NOTIF, f, ## a)
#define IWL_DEBUG_ASSOC(f, a...) IWL_DEBUG(IWL_DL_ASSOC | IWL_DL_INFO, f, ## a)
#define IWL_DEBUG_HT(f, a...) IWL_DEBUG(IWL_DL_HT, f, ## a)
#define IWL_DEBUG_STATS(f, a...) IWL_DEBUG(IWL_DL_STATS, f, ## a)
#define IWL_DEBUG_TX_REPLY(f, a...) IWL_DEBUG(IWL_DL_TX_REPLY, f, ## a)
#define IWL_DEBUG_QOS(f, a...) IWL_DEBUG(IWL_DL_QOS, f, ## a)
#define IWL_DEBUG_RADIO(f, a...) IWL_DEBUG(IWL_DL_RADIO, f, ## a)
#define IWL_DEBUG_POWER(f, a...) IWL_DEBUG(IWL_DL_POWER, f, ## a)
#define IWL_DEBUG_11H(f, a...) IWL_DEBUG(IWL_DL_11H, f, ## a)
#endif
drivers/net/wireless/iwlwifi/iwl-eeprom.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU Geeral Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
* USA
*
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
* BSD LICENSE
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*****************************************************************************/
#ifndef __iwl_eeprom_h__
#define __iwl_eeprom_h__
/*
* This file defines EEPROM related constants, enums, and inline functions.
*
*/
#define IWL_EEPROM_ACCESS_TIMEOUT 5000 /* uSec */
#define IWL_EEPROM_ACCESS_DELAY 10 /* uSec */
/* EEPROM field values */
#define ANTENNA_SWITCH_NORMAL 0
#define ANTENNA_SWITCH_INVERSE 1
enum {
EEPROM_CHANNEL_VALID = (1 << 0), /* usable for this SKU/geo */
EEPROM_CHANNEL_IBSS = (1 << 1), /* usable as an IBSS channel */
/* Bit 2 Reserved */
EEPROM_CHANNEL_ACTIVE = (1 << 3), /* active scanning allowed */
EEPROM_CHANNEL_RADAR = (1 << 4), /* radar detection required */
EEPROM_CHANNEL_WIDE = (1 << 5),
EEPROM_CHANNEL_NARROW = (1 << 6),
EEPROM_CHANNEL_DFS = (1 << 7), /* dynamic freq selection candidate */
};
/* EEPROM field lengths */
#define EEPROM_BOARD_PBA_NUMBER_LENGTH 11
/* EEPROM field lengths */
#define EEPROM_BOARD_PBA_NUMBER_LENGTH 11
#define EEPROM_REGULATORY_SKU_ID_LENGTH 4
#define EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH 14
#define EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH 13
#define EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH 12
#define EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH 11
#define EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH 6
#if IWL == 3945
#define EEPROM_REGULATORY_CHANNELS_LENGTH ( \
EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH)
#elif IWL == 4965
#define EEPROM_REGULATORY_BAND_24_FAT_CHANNELS_LENGTH 7
#define EEPROM_REGULATORY_BAND_52_FAT_CHANNELS_LENGTH 11
#define EEPROM_REGULATORY_CHANNELS_LENGTH ( \
EEPROM_REGULATORY_BAND1_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND2_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND3_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND4_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND5_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND_24_FAT_CHANNELS_LENGTH + \
EEPROM_REGULATORY_BAND_52_FAT_CHANNELS_LENGTH)
#endif
#define EEPROM_REGULATORY_NUMBER_OF_BANDS 5
/* SKU Capabilities */
#define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
#define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
#define EEPROM_SKU_CAP_OP_MODE_MRC (1 << 7)
/* *regulatory* channel data from eeprom, one for each channel */
struct iwl_eeprom_channel {
u8 flags; /* flags copied from EEPROM */
s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
} __attribute__ ((packed));
/*
* Mapping of a Tx power level, at factory calibration temperature,
* to a radio/DSP gain table index.
* One for each of 5 "sample" power levels in each band.
* v_det is measured at the factory, using the 3945's built-in power amplifier
* (PA) output voltage detector. This same detector is used during Tx of
* long packets in normal operation to provide feedback as to proper output
* level.
* Data copied from EEPROM.
*/
struct iwl_eeprom_txpower_sample {
u8 gain_index; /* index into power (gain) setup table ... */
s8 power; /* ... for this pwr level for this chnl group */
u16 v_det; /* PA output voltage */
} __attribute__ ((packed));
/*
* Mappings of Tx power levels -> nominal radio/DSP gain table indexes.
* One for each channel group (a.k.a. "band") (1 for BG, 4 for A).
* Tx power setup code interpolates between the 5 "sample" power levels
* to determine the nominal setup for a requested power level.
* Data copied from EEPROM.
* DO NOT ALTER THIS STRUCTURE!!!
*/
struct iwl_eeprom_txpower_group {
struct iwl_eeprom_txpower_sample samples[5]; /* 5 power levels */
s32 a, b, c, d, e; /* coefficients for voltage->power
* formula (signed) */
s32 Fa, Fb, Fc, Fd, Fe; /* these modify coeffs based on
* frequency (signed) */
s8 saturation_power; /* highest power possible by h/w in this
* band */
u8 group_channel; /* "representative" channel # in this band */
s16 temperature; /* h/w temperature at factory calib this band
* (signed) */
} __attribute__ ((packed));
/*
* Temperature-based Tx-power compensation data, not band-specific.
* These coefficients are use to modify a/b/c/d/e coeffs based on
* difference between current temperature and factory calib temperature.
* Data copied from EEPROM.
*/
struct iwl_eeprom_temperature_corr {
u32 Ta;
u32 Tb;
u32 Tc;
u32 Td;
u32 Te;
} __attribute__ ((packed));
#if IWL == 4965
#define EEPROM_TX_POWER_TX_CHAINS (2)
#define EEPROM_TX_POWER_BANDS (8)
#define EEPROM_TX_POWER_MEASUREMENTS (3)
#define EEPROM_TX_POWER_VERSION (2)
#define EEPROM_TX_POWER_VERSION_NEW (5)
struct iwl_eeprom_calib_measure {
u8 temperature;
u8 gain_idx;
u8 actual_pow;
s8 pa_det;
} __attribute__ ((packed));
struct iwl_eeprom_calib_ch_info {
u8 ch_num;
struct iwl_eeprom_calib_measure measurements[EEPROM_TX_POWER_TX_CHAINS]
[EEPROM_TX_POWER_MEASUREMENTS];
} __attribute__ ((packed));
struct iwl_eeprom_calib_subband_info {
u8 ch_from;
u8 ch_to;
struct iwl_eeprom_calib_ch_info ch1;
struct iwl_eeprom_calib_ch_info ch2;
} __attribute__ ((packed));
struct iwl_eeprom_calib_info {
u8 saturation_power24;
u8 saturation_power52;
s16 voltage; /* signed */
struct iwl_eeprom_calib_subband_info band_info[EEPROM_TX_POWER_BANDS];
} __attribute__ ((packed));
#endif
struct iwl_eeprom {
u8 reserved0[16];
#define EEPROM_DEVICE_ID (2*0x08) /* 2 bytes */
u16 device_id; /* abs.ofs: 16 */
u8 reserved1[2];
#define EEPROM_PMC (2*0x0A) /* 2 bytes */
u16 pmc; /* abs.ofs: 20 */
u8 reserved2[20];
#define EEPROM_MAC_ADDRESS (2*0x15) /* 6 bytes */
u8 mac_address[6]; /* abs.ofs: 42 */
u8 reserved3[58];
#define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
u16 board_revision; /* abs.ofs: 106 */
u8 reserved4[11];
#define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
u8 board_pba_number[9]; /* abs.ofs: 119 */
u8 reserved5[8];
#define EEPROM_VERSION (2*0x44) /* 2 bytes */
u16 version; /* abs.ofs: 136 */
#define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */
u8 sku_cap; /* abs.ofs: 138 */
#define EEPROM_LEDS_MODE (2*0x45+1) /* 1 bytes */
u8 leds_mode; /* abs.ofs: 139 */
#define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
u16 oem_mode;
#define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
u16 wowlan_mode; /* abs.ofs: 142 */
#define EEPROM_LEDS_TIME_INTERVAL (2*0x48) /* 2 bytes */
u16 leds_time_interval; /* abs.ofs: 144 */
#define EEPROM_LEDS_OFF_TIME (2*0x49) /* 1 bytes */
u8 leds_off_time; /* abs.ofs: 146 */
#define EEPROM_LEDS_ON_TIME (2*0x49+1) /* 1 bytes */
u8 leds_on_time; /* abs.ofs: 147 */
#define EEPROM_ALMGOR_M_VERSION (2*0x4A) /* 1 bytes */
u8 almgor_m_version; /* abs.ofs: 148 */
#define EEPROM_ANTENNA_SWITCH_TYPE (2*0x4A+1) /* 1 bytes */
u8 antenna_switch_type; /* abs.ofs: 149 */
#if IWL == 3945
u8 reserved6[42];
#else
u8 reserved6[8];
#define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */
u16 board_revision_4965; /* abs.ofs: 158 */
u8 reserved7[13];
#define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */
u8 board_pba_number_4965[9]; /* abs.ofs: 173 */
u8 reserved8[10];
#endif
#define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */
u8 sku_id[4]; /* abs.ofs: 192 */
#define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */
u16 band_1_count; /* abs.ofs: 196 */
#define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */
struct iwl_eeprom_channel band_1_channels[14]; /* abs.ofs: 196 */
#define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */
u16 band_2_count; /* abs.ofs: 226 */
#define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */
struct iwl_eeprom_channel band_2_channels[13]; /* abs.ofs: 228 */
#define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */
u16 band_3_count; /* abs.ofs: 254 */
#define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */
struct iwl_eeprom_channel band_3_channels[12]; /* abs.ofs: 256 */
#define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */
u16 band_4_count; /* abs.ofs: 280 */
#define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */
struct iwl_eeprom_channel band_4_channels[11]; /* abs.ofs: 282 */
#define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */
u16 band_5_count; /* abs.ofs: 304 */
#define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */
struct iwl_eeprom_channel band_5_channels[6]; /* abs.ofs: 306 */
/* From here on out the EEPROM diverges between the 4965 and the 3945 */
#if IWL == 3945
u8 reserved9[194];
#define EEPROM_TXPOWER_CALIB_GROUP0 0x200
#define EEPROM_TXPOWER_CALIB_GROUP1 0x240
#define EEPROM_TXPOWER_CALIB_GROUP2 0x280
#define EEPROM_TXPOWER_CALIB_GROUP3 0x2c0
#define EEPROM_TXPOWER_CALIB_GROUP4 0x300
#define IWL_NUM_TX_CALIB_GROUPS 5
struct iwl_eeprom_txpower_group groups[IWL_NUM_TX_CALIB_GROUPS];
/* abs.ofs: 512 */
#define EEPROM_CALIB_TEMPERATURE_CORRECT 0x340
struct iwl_eeprom_temperature_corr corrections; /* abs.ofs: 832 */
u8 reserved16[172]; /* fill out to full 1024 byte block */
/* 4965AGN adds fat channel support */
#elif IWL == 4965
u8 reserved10[2];
#define EEPROM_REGULATORY_BAND_24_FAT_CHANNELS (2*0xA0) /* 14 bytes */
struct iwl_eeprom_channel band_24_channels[7]; /* abs.ofs: 320 */
u8 reserved11[2];
#define EEPROM_REGULATORY_BAND_52_FAT_CHANNELS (2*0xA8) /* 22 bytes */
struct iwl_eeprom_channel band_52_channels[11]; /* abs.ofs: 336 */
u8 reserved12[6];
#define EEPROM_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */
u16 calib_version; /* abs.ofs: 364 */
u8 reserved13[2];
#define EEPROM_SATURATION_POWER_OFFSET (2*0xB8) /* 2 bytes */
u16 satruation_power; /* abs.ofs: 368 */
u8 reserved14[94];
#define EEPROM_IWL_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */
struct iwl_eeprom_calib_info calib_info; /* abs.ofs: 464 */
u8 reserved16[140]; /* fill out to full 1024 byte block */
#endif
} __attribute__ ((packed));
#define IWL_EEPROM_IMAGE_SIZE 1024
#endif
drivers/net/wireless/iwlwifi/iwl-helpers.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* Portions of this file are derived from the ipw3945 project, as well
* as portions of the ieee80211 subsystem header files.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_helpers_h__
#define __iwl_helpers_h__
#include <linux/ctype.h>
/*
* The structures defined by the hardware/uCode interface
* have bit-wise operations. For each bit-field there is
* a data symbol in the structure, the start bit position
* and the length of the bit-field.
*
* iwl_get_bits and iwl_set_bits will return or set the
* appropriate bits on a 32-bit value.
*
* IWL_GET_BITS and IWL_SET_BITS use symbol expansion to
* expand out to the appropriate call to iwl_get_bits
* and iwl_set_bits without having to reference all of the
* numerical constants and defines provided in the hardware
* definition
*/
/**
* iwl_get_bits - Extract a hardware bit-field value
* @src: source hardware value (__le32)
* @pos: bit-position (0-based) of first bit of value
* @len: length of bit-field
*
* iwl_get_bits will return the bit-field in cpu endian ordering.
*
* NOTE: If used from IWL_GET_BITS then pos and len are compile-constants and
* will collapse to minimal code by the compiler.
*/
static inline u32 iwl_get_bits(__le32 src, u8 pos, u8 len)
{
u32 tmp = le32_to_cpu(src);
tmp >>= pos;
tmp &= (1UL << len) - 1;
return tmp;
}
/**
* iwl_set_bits - Set a hardware bit-field value
* @dst: Address of __le32 hardware value
* @pos: bit-position (0-based) of first bit of value
* @len: length of bit-field
* @val: cpu endian value to encode into the bit-field
*
* iwl_set_bits will encode val into dst, masked to be len bits long at bit
* position pos.
*
* NOTE: If used IWL_SET_BITS pos and len will be compile-constants and
* will collapse to minimal code by the compiler.
*/
static inline void iwl_set_bits(__le32 *dst, u8 pos, u8 len, int val)
{
u32 tmp = le32_to_cpu(*dst);
tmp &= ~(((1UL << len) - 1) << pos);
tmp |= (val & ((1UL << len) - 1)) << pos;
*dst = cpu_to_le32(tmp);
}
static inline void iwl_set_bits16(__le16 *dst, u8 pos, u8 len, int val)
{
u16 tmp = le16_to_cpu(*dst);
tmp &= ~((1UL << (pos + len)) - (1UL << pos));
tmp |= (val & ((1UL << len) - 1)) << pos;
*dst = cpu_to_le16(tmp);
}
/*
* The bit-field definitions in iwl-xxxx-hw.h are in the form of:
*
* struct example {
* __le32 val1;
* #define IWL_name_POS 8
* #define IWL_name_LEN 4
* #define IWL_name_SYM val1
* };
*
* The IWL_SET_BITS and IWL_GET_BITS macros are provided to allow the driver
* to call:
*
* struct example bar;
* u32 val = IWL_GET_BITS(bar, name);
* val = val * 2;
* IWL_SET_BITS(bar, name, val);
*
* All cpu / host ordering, masking, and shifts are performed by the macros
* and iwl_{get,set}_bits.
*
*/
#define IWL_SET_BITS(s, sym, v) \
iwl_set_bits(&(s).IWL_ ## sym ## _SYM, IWL_ ## sym ## _POS, \
IWL_ ## sym ## _LEN, (v))
#define IWL_SET_BITS16(s, sym, v) \
iwl_set_bits16(&(s).IWL_ ## sym ## _SYM, IWL_ ## sym ## _POS, \
IWL_ ## sym ## _LEN, (v))
#define IWL_GET_BITS(s, sym) \
iwl_get_bits((s).IWL_ ## sym ## _SYM, IWL_ ## sym ## _POS, \
IWL_ ## sym ## _LEN)
#define KELVIN_TO_CELSIUS(x) ((x)-273)
#define CELSIUS_TO_KELVIN(x) ((x)+273)
#define IEEE80211_CHAN_W_RADAR_DETECT 0x00000010
static inline struct ieee80211_conf *ieee80211_get_hw_conf(
struct ieee80211_hw *hw)
{
return &hw->conf;
}
#define QOS_CONTROL_LEN 2
#define IEEE80211_STYPE_BACK_REQ 0x0080
#define IEEE80211_STYPE_BACK 0x0090
static inline int ieee80211_is_management(u16 fc)
{
return (fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT;
}
static inline int ieee80211_is_control(u16 fc)
{
return (fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_CTL;
}
static inline int ieee80211_is_data(u16 fc)
{
return (fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA;
}
static inline int ieee80211_is_back_request(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_CTL) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_BACK_REQ);
}
static inline int ieee80211_is_probe_response(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_PROBE_RESP);
}
static inline int ieee80211_is_probe_request(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_PROBE_REQ);
}
static inline int ieee80211_is_beacon(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_BEACON);
}
static inline int ieee80211_is_atim(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ATIM);
}
static inline int ieee80211_is_assoc_request(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ);
}
static inline int ieee80211_is_assoc_response(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_RESP);
}
static inline int ieee80211_is_auth(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ);
}
static inline int ieee80211_is_deauth(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ);
}
static inline int ieee80211_is_disassoc(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ);
}
static inline int ieee80211_is_reassoc_request(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ);
}
static inline int ieee80211_is_reassoc_response(u16 fc)
{
return ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) &&
((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_RESP);
}
static inline int iwl_check_bits(unsigned long field, unsigned long mask)
{
return ((field & mask) == mask) ? 1 : 0;
}
static inline unsigned long elapsed_jiffies(unsigned long start,
unsigned long end)
{
if (end > start)
return end - start;
return end + (MAX_JIFFY_OFFSET - start);
}
#endif /* __iwl_helpers_h__ */
drivers/net/wireless/iwlwifi/iwl-hw.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU Geeral Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
* USA
*
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
* BSD LICENSE
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef __iwlwifi_hw_h__
#define __iwlwifi_hw_h__
/*
* This file defines hardware constants common to 3945 and 4965.
*
* Device-specific constants are defined in iwl-3945-hw.h and iwl-4965-hw.h,
* although this file contains a few definitions for which the .c
* implementation is the same for 3945 and 4965, except for the value of
* a constant.
*
* uCode API constants are defined in iwl-commands.h.
*
* NOTE: DO NOT PUT OS IMPLEMENTATION-SPECIFIC DECLARATIONS HERE
*
* The iwl-*hw.h (and files they include) files should remain OS/driver
* implementation independent, declaring only the hardware interface.
*/
/* uCode queue management definitions */
#define IWL_CMD_QUEUE_NUM 4
#define IWL_CMD_FIFO_NUM 4
#define IWL_BACK_QUEUE_FIRST_ID 7
/* Tx rates */
#define IWL_CCK_RATES 4
#define IWL_OFDM_RATES 8
#if IWL == 3945
#define IWL_HT_RATES 0
#elif IWL == 4965
#define IWL_HT_RATES 16
#endif
#define IWL_MAX_RATES (IWL_CCK_RATES+IWL_OFDM_RATES+IWL_HT_RATES)
/* Time constants */
#define SHORT_SLOT_TIME 9
#define LONG_SLOT_TIME 20
/* RSSI to dBm */
#if IWL == 3945
#define IWL_RSSI_OFFSET 95
#elif IWL == 4965
#define IWL_RSSI_OFFSET 44
#endif
#include "iwl-eeprom.h"
#include "iwl-commands.h"
#define PCI_LINK_CTRL 0x0F0
#define PCI_POWER_SOURCE 0x0C8
#define PCI_REG_WUM8 0x0E8
#define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT (0x80000000)
/*=== CSR (control and status registers) ===*/
#define CSR_BASE (0x000)
#define CSR_SW_VER (CSR_BASE+0x000)
#define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */
#define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */
#define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */
#define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */
#define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack*/
#define CSR_GPIO_IN (CSR_BASE+0x018) /* read external chip pins */
#define CSR_RESET (CSR_BASE+0x020) /* busmaster enable, NMI, etc*/
#define CSR_GP_CNTRL (CSR_BASE+0x024)
#define CSR_HW_REV (CSR_BASE+0x028)
#define CSR_EEPROM_REG (CSR_BASE+0x02c)
#define CSR_EEPROM_GP (CSR_BASE+0x030)
#define CSR_GP_UCODE (CSR_BASE+0x044)
#define CSR_UCODE_DRV_GP1 (CSR_BASE+0x054)
#define CSR_UCODE_DRV_GP1_SET (CSR_BASE+0x058)
#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c)
#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060)
#define CSR_LED_REG (CSR_BASE+0x094)
#define CSR_DRAM_INT_TBL_CTL (CSR_BASE+0x0A0)
#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)
#define CSR_ANA_PLL_CFG (CSR_BASE+0x20c)
#define CSR_HW_REV_WA_REG (CSR_BASE+0x22C)
/* HW I/F configuration */
#define CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB (0x00000100)
#define CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM (0x00000200)
#define CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC (0x00000400)
#define CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE (0x00000800)
#define CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A (0x00000000)
#define CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B (0x00001000)
#define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000)
/* interrupt flags in INTA, set by uCode or hardware (e.g. dma),
* acknowledged (reset) by host writing "1" to flagged bits. */
#define CSR_INT_BIT_FH_RX (1<<31) /* Rx DMA, cmd responses, FH_INT[17:16] */
#define CSR_INT_BIT_HW_ERR (1<<29) /* DMA hardware error FH_INT[31] */
#define CSR_INT_BIT_DNLD (1<<28) /* uCode Download */
#define CSR_INT_BIT_FH_TX (1<<27) /* Tx DMA FH_INT[1:0] */
#define CSR_INT_BIT_MAC_CLK_ACTV (1<<26) /* NIC controller's clock toggled on/off */
#define CSR_INT_BIT_SW_ERR (1<<25) /* uCode error */
#define CSR_INT_BIT_RF_KILL (1<<7) /* HW RFKILL switch GP_CNTRL[27] toggled */
#define CSR_INT_BIT_CT_KILL (1<<6) /* Critical temp (chip too hot) rfkill */
#define CSR_INT_BIT_SW_RX (1<<3) /* Rx, command responses, 3945 */
#define CSR_INT_BIT_WAKEUP (1<<1) /* NIC controller waking up (pwr mgmt) */
#define CSR_INT_BIT_ALIVE (1<<0) /* uCode interrupts once it initializes */
#define CSR_INI_SET_MASK (CSR_INT_BIT_FH_RX | \
CSR_INT_BIT_HW_ERR | \
CSR_INT_BIT_FH_TX | \
CSR_INT_BIT_SW_ERR | \
CSR_INT_BIT_RF_KILL | \
CSR_INT_BIT_SW_RX | \
CSR_INT_BIT_WAKEUP | \
CSR_INT_BIT_ALIVE)
/* interrupt flags in FH (flow handler) (PCI busmaster DMA) */
#define CSR_FH_INT_BIT_ERR (1<<31) /* Error */
#define CSR_FH_INT_BIT_HI_PRIOR (1<<30) /* High priority Rx, bypass coalescing */
#define CSR_FH_INT_BIT_RX_CHNL2 (1<<18) /* Rx channel 2 (3945 only) */
#define CSR_FH_INT_BIT_RX_CHNL1 (1<<17) /* Rx channel 1 */
#define CSR_FH_INT_BIT_RX_CHNL0 (1<<16) /* Rx channel 0 */
#define CSR_FH_INT_BIT_TX_CHNL6 (1<<6) /* Tx channel 6 (3945 only) */
#define CSR_FH_INT_BIT_TX_CHNL1 (1<<1) /* Tx channel 1 */
#define CSR_FH_INT_BIT_TX_CHNL0 (1<<0) /* Tx channel 0 */
#define CSR_FH_INT_RX_MASK (CSR_FH_INT_BIT_HI_PRIOR | \
CSR_FH_INT_BIT_RX_CHNL2 | \
CSR_FH_INT_BIT_RX_CHNL1 | \
CSR_FH_INT_BIT_RX_CHNL0)
#define CSR_FH_INT_TX_MASK (CSR_FH_INT_BIT_TX_CHNL6 | \
CSR_FH_INT_BIT_TX_CHNL1 | \
CSR_FH_INT_BIT_TX_CHNL0 )
/* RESET */
#define CSR_RESET_REG_FLAG_NEVO_RESET (0x00000001)
#define CSR_RESET_REG_FLAG_FORCE_NMI (0x00000002)
#define CSR_RESET_REG_FLAG_SW_RESET (0x00000080)
#define CSR_RESET_REG_FLAG_MASTER_DISABLED (0x00000100)
#define CSR_RESET_REG_FLAG_STOP_MASTER (0x00000200)
/* GP (general purpose) CONTROL */
#define CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY (0x00000001)
#define CSR_GP_CNTRL_REG_FLAG_INIT_DONE (0x00000004)
#define CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (0x00000008)
#define CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP (0x00000010)
#define CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN (0x00000001)
#define CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE (0x07000000)
#define CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE (0x04000000)
#define CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW (0x08000000)
/* EEPROM REG */
#define CSR_EEPROM_REG_READ_VALID_MSK (0x00000001)
#define CSR_EEPROM_REG_BIT_CMD (0x00000002)
/* EEPROM GP */
#define CSR_EEPROM_GP_VALID_MSK (0x00000006)
#define CSR_EEPROM_GP_BAD_SIGNATURE (0x00000000)
#define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180)
/* UCODE DRV GP */
#define CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP (0x00000001)
#define CSR_UCODE_SW_BIT_RFKILL (0x00000002)
#define CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED (0x00000004)
#define CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT (0x00000008)
/* GPIO */
#define CSR_GPIO_IN_BIT_AUX_POWER (0x00000200)
#define CSR_GPIO_IN_VAL_VAUX_PWR_SRC (0x00000000)
#define CSR_GPIO_IN_VAL_VMAIN_PWR_SRC CSR_GPIO_IN_BIT_AUX_POWER
/* GI Chicken Bits */
#define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX (0x00800000)
#define CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER (0x20000000)
/* CSR_ANA_PLL_CFG */
#define CSR_ANA_PLL_CFG_SH (0x00880300)
#define CSR_LED_REG_TRUN_ON (0x00000078)
#define CSR_LED_REG_TRUN_OFF (0x00000038)
#define CSR_LED_BSM_CTRL_MSK (0xFFFFFFDF)
/* DRAM_INT_TBL_CTRL */
#define CSR_DRAM_INT_TBL_CTRL_EN (1<<31)
#define CSR_DRAM_INT_TBL_CTRL_WRAP_CHK (1<<27)
/*=== HBUS (Host-side Bus) ===*/
#define HBUS_BASE (0x400)
#define HBUS_TARG_MEM_RADDR (HBUS_BASE+0x00c)
#define HBUS_TARG_MEM_WADDR (HBUS_BASE+0x010)
#define HBUS_TARG_MEM_WDAT (HBUS_BASE+0x018)
#define HBUS_TARG_MEM_RDAT (HBUS_BASE+0x01c)
#define HBUS_TARG_PRPH_WADDR (HBUS_BASE+0x044)
#define HBUS_TARG_PRPH_RADDR (HBUS_BASE+0x048)
#define HBUS_TARG_PRPH_WDAT (HBUS_BASE+0x04c)
#define HBUS_TARG_PRPH_RDAT (HBUS_BASE+0x050)
#define HBUS_TARG_WRPTR (HBUS_BASE+0x060)
#define HBUS_TARG_MBX_C (HBUS_BASE+0x030)
/* SCD (Scheduler) */
#define SCD_BASE (CSR_BASE + 0x2E00)
#define SCD_MODE_REG (SCD_BASE + 0x000)
#define SCD_ARASTAT_REG (SCD_BASE + 0x004)
#define SCD_TXFACT_REG (SCD_BASE + 0x010)
#define SCD_TXF4MF_REG (SCD_BASE + 0x014)
#define SCD_TXF5MF_REG (SCD_BASE + 0x020)
#define SCD_SBYP_MODE_1_REG (SCD_BASE + 0x02C)
#define SCD_SBYP_MODE_2_REG (SCD_BASE + 0x030)
/*=== FH (data Flow Handler) ===*/
#define FH_BASE (0x800)
#define FH_CBCC_TABLE (FH_BASE+0x140)
#define FH_TFDB_TABLE (FH_BASE+0x180)
#define FH_RCSR_TABLE (FH_BASE+0x400)
#define FH_RSSR_TABLE (FH_BASE+0x4c0)
#define FH_TCSR_TABLE (FH_BASE+0x500)
#define FH_TSSR_TABLE (FH_BASE+0x680)
/* TFDB (Transmit Frame Buffer Descriptor) */
#define FH_TFDB(_channel, buf) \
(FH_TFDB_TABLE+((_channel)*2+(buf))*0x28)
#define ALM_FH_TFDB_CHNL_BUF_CTRL_REG(_channel) \
(FH_TFDB_TABLE + 0x50 * _channel)
/* CBCC _channel is [0,2] */
#define FH_CBCC(_channel) (FH_CBCC_TABLE+(_channel)*0x8)
#define FH_CBCC_CTRL(_channel) (FH_CBCC(_channel)+0x00)
#define FH_CBCC_BASE(_channel) (FH_CBCC(_channel)+0x04)
/* RCSR _channel is [0,2] */
#define FH_RCSR(_channel) (FH_RCSR_TABLE+(_channel)*0x40)
#define FH_RCSR_CONFIG(_channel) (FH_RCSR(_channel)+0x00)
#define FH_RCSR_RBD_BASE(_channel) (FH_RCSR(_channel)+0x04)
#define FH_RCSR_WPTR(_channel) (FH_RCSR(_channel)+0x20)
#define FH_RCSR_RPTR_ADDR(_channel) (FH_RCSR(_channel)+0x24)
#if IWL == 3945
#define FH_RSCSR_CHNL0_WPTR (FH_RCSR_WPTR(0))
#elif IWL == 4965
#define FH_RSCSR_CHNL0_WPTR (FH_RSCSR_CHNL0_RBDCB_WPTR_REG)
#endif
/* RSSR */
#define FH_RSSR_CTRL (FH_RSSR_TABLE+0x000)
#define FH_RSSR_STATUS (FH_RSSR_TABLE+0x004)
/* TCSR */
#define FH_TCSR(_channel) (FH_TCSR_TABLE+(_channel)*0x20)
#define FH_TCSR_CONFIG(_channel) (FH_TCSR(_channel)+0x00)
#define FH_TCSR_CREDIT(_channel) (FH_TCSR(_channel)+0x04)
#define FH_TCSR_BUFF_STTS(_channel) (FH_TCSR(_channel)+0x08)
/* TSSR */
#define FH_TSSR_CBB_BASE (FH_TSSR_TABLE+0x000)
#define FH_TSSR_MSG_CONFIG (FH_TSSR_TABLE+0x008)
#define FH_TSSR_TX_STATUS (FH_TSSR_TABLE+0x010)
/* 18 - reserved */
/* card static random access memory (SRAM) for processor data and instructs */
#define RTC_INST_LOWER_BOUND (0x000000)
#define RTC_DATA_LOWER_BOUND (0x800000)
/* DBM */
#define ALM_FH_SRVC_CHNL (6)
#define ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE (20)
#define ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH (4)
#define ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN (0x08000000)
#define ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE (0x80000000)
#define ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE (0x20000000)
#define ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 (0x01000000)
#define ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST (0x00001000)
#define ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH (0x00000000)
#define ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF (0x00000000)
#define ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_DRIVER (0x00000001)
#define ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE_VAL (0x00000000)
#define ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL (0x00000008)
#define ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD (0x00200000)
#define ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT (0x00000000)
#define ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE (0x00000000)
#define ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE (0x80000000)
#define ALM_FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID (0x00004000)
#define ALM_FH_TCSR_CHNL_TX_BUF_STS_REG_BIT_TFDB_WPTR (0x00000001)
#define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON (0xFF000000)
#define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON (0x00FF0000)
#define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B (0x00000400)
#define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON (0x00000100)
#define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON (0x00000080)
#define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH (0x00000020)
#define ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH (0x00000005)
#define ALM_TB_MAX_BYTES_COUNT (0xFFF0)
#define ALM_FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_channel) \
((1LU << _channel) << 24)
#define ALM_FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_channel) \
((1LU << _channel) << 16)
#define ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(_channel) \
(ALM_FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_channel) | \
ALM_FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_channel))
#define PCI_CFG_REV_ID_BIT_BASIC_SKU (0x40) /* bit 6 */
#define PCI_CFG_REV_ID_BIT_RTP (0x80) /* bit 7 */
#define HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED (0x00000004)
#define TFD_QUEUE_MIN 0
#define TFD_QUEUE_MAX 6
#define TFD_QUEUE_SIZE_MAX (256)
/* spectrum and channel data structures */
#define IWL_NUM_SCAN_RATES (2)
#define IWL_SCAN_FLAG_24GHZ (1<<0)
#define IWL_SCAN_FLAG_52GHZ (1<<1)
#define IWL_SCAN_FLAG_ACTIVE (1<<2)
#define IWL_SCAN_FLAG_DIRECT (1<<3)
#define IWL_MAX_CMD_SIZE 1024
#define IWL_DEFAULT_TX_RETRY 15
#define IWL_MAX_TX_RETRY 16
/*********************************************/
#define RFD_SIZE 4
#define NUM_TFD_CHUNKS 4
#define RX_QUEUE_SIZE 256
#define RX_QUEUE_MASK 255
#define RX_QUEUE_SIZE_LOG 8
/* QoS definitions */
#define CW_MIN_OFDM 15
#define CW_MAX_OFDM 1023
#define CW_MIN_CCK 31
#define CW_MAX_CCK 1023
#define QOS_TX0_CW_MIN_OFDM CW_MIN_OFDM
#define QOS_TX1_CW_MIN_OFDM CW_MIN_OFDM
#define QOS_TX2_CW_MIN_OFDM ((CW_MIN_OFDM + 1) / 2 - 1)
#define QOS_TX3_CW_MIN_OFDM ((CW_MIN_OFDM + 1) / 4 - 1)
#define QOS_TX0_CW_MIN_CCK CW_MIN_CCK
#define QOS_TX1_CW_MIN_CCK CW_MIN_CCK
#define QOS_TX2_CW_MIN_CCK ((CW_MIN_CCK + 1) / 2 - 1)
#define QOS_TX3_CW_MIN_CCK ((CW_MIN_CCK + 1) / 4 - 1)
#define QOS_TX0_CW_MAX_OFDM CW_MAX_OFDM
#define QOS_TX1_CW_MAX_OFDM CW_MAX_OFDM
#define QOS_TX2_CW_MAX_OFDM CW_MIN_OFDM
#define QOS_TX3_CW_MAX_OFDM ((CW_MIN_OFDM + 1) / 2 - 1)
#define QOS_TX0_CW_MAX_CCK CW_MAX_CCK
#define QOS_TX1_CW_MAX_CCK CW_MAX_CCK
#define QOS_TX2_CW_MAX_CCK CW_MIN_CCK
#define QOS_TX3_CW_MAX_CCK ((CW_MIN_CCK + 1) / 2 - 1)
#define QOS_TX0_AIFS 3
#define QOS_TX1_AIFS 7
#define QOS_TX2_AIFS 2
#define QOS_TX3_AIFS 2
#define QOS_TX0_ACM 0
#define QOS_TX1_ACM 0
#define QOS_TX2_ACM 0
#define QOS_TX3_ACM 0
#define QOS_TX0_TXOP_LIMIT_CCK 0
#define QOS_TX1_TXOP_LIMIT_CCK 0
#define QOS_TX2_TXOP_LIMIT_CCK 6016
#define QOS_TX3_TXOP_LIMIT_CCK 3264
#define QOS_TX0_TXOP_LIMIT_OFDM 0
#define QOS_TX1_TXOP_LIMIT_OFDM 0
#define QOS_TX2_TXOP_LIMIT_OFDM 3008
#define QOS_TX3_TXOP_LIMIT_OFDM 1504
#define DEF_TX0_CW_MIN_OFDM CW_MIN_OFDM
#define DEF_TX1_CW_MIN_OFDM CW_MIN_OFDM
#define DEF_TX2_CW_MIN_OFDM CW_MIN_OFDM
#define DEF_TX3_CW_MIN_OFDM CW_MIN_OFDM
#define DEF_TX0_CW_MIN_CCK CW_MIN_CCK
#define DEF_TX1_CW_MIN_CCK CW_MIN_CCK
#define DEF_TX2_CW_MIN_CCK CW_MIN_CCK
#define DEF_TX3_CW_MIN_CCK CW_MIN_CCK
#define DEF_TX0_CW_MAX_OFDM CW_MAX_OFDM
#define DEF_TX1_CW_MAX_OFDM CW_MAX_OFDM
#define DEF_TX2_CW_MAX_OFDM CW_MAX_OFDM
#define DEF_TX3_CW_MAX_OFDM CW_MAX_OFDM
#define DEF_TX0_CW_MAX_CCK CW_MAX_CCK
#define DEF_TX1_CW_MAX_CCK CW_MAX_CCK
#define DEF_TX2_CW_MAX_CCK CW_MAX_CCK
#define DEF_TX3_CW_MAX_CCK CW_MAX_CCK
#define DEF_TX0_AIFS (2)
#define DEF_TX1_AIFS (2)
#define DEF_TX2_AIFS (2)
#define DEF_TX3_AIFS (2)
#define DEF_TX0_ACM 0
#define DEF_TX1_ACM 0
#define DEF_TX2_ACM 0
#define DEF_TX3_ACM 0
#define DEF_TX0_TXOP_LIMIT_CCK 0
#define DEF_TX1_TXOP_LIMIT_CCK 0
#define DEF_TX2_TXOP_LIMIT_CCK 0
#define DEF_TX3_TXOP_LIMIT_CCK 0
#define DEF_TX0_TXOP_LIMIT_OFDM 0
#define DEF_TX1_TXOP_LIMIT_OFDM 0
#define DEF_TX2_TXOP_LIMIT_OFDM 0
#define DEF_TX3_TXOP_LIMIT_OFDM 0
#define QOS_QOS_SETS 3
#define QOS_PARAM_SET_ACTIVE 0
#define QOS_PARAM_SET_DEF_CCK 1
#define QOS_PARAM_SET_DEF_OFDM 2
#define CTRL_QOS_NO_ACK (0x0020)
#define DCT_FLAG_EXT_QOS_ENABLED (0x10)
#define U32_PAD(n) ((4-(n))&0x3)
/*
* Generic queue structure
*
* Contains common data for Rx and Tx queues
*/
#define TFD_CTL_COUNT_SET(n) (n<<24)
#define TFD_CTL_COUNT_GET(ctl) ((ctl>>24) & 7)
#define TFD_CTL_PAD_SET(n) (n<<28)
#define TFD_CTL_PAD_GET(ctl) (ctl>>28)
#define TFD_TX_CMD_SLOTS 256
#define TFD_CMD_SLOTS 32
#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_cmd) - \
sizeof(struct iwl_cmd_meta))
/*
* RX related structures and functions
*/
#define RX_FREE_BUFFERS 64
#define RX_LOW_WATERMARK 8
#endif /* __iwlwifi_hw_h__ */
drivers/net/wireless/iwlwifi/iwl-io.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* Portions of this file are derived from the ipw3945 project.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_io_h__
#define __iwl_io_h__
#include <linux/io.h>
#include "iwl-debug.h"
/*
* IO, register, and NIC memory access functions
*
* NOTE on naming convention and macro usage for these
*
* A single _ prefix before a an access function means that no state
* check or debug information is printed when that function is called.
*
* A double __ prefix before an access function means that state is checked
* (in the case of *restricted calls) and the current line number is printed
* in addition to any other debug output.
*
* The non-prefixed name is the #define that maps the caller into a
* #define that provides the caller's __LINE__ to the double prefix version.
*
* If you wish to call the function without any debug or state checking,
* you should use the single _ prefix version (as is used by dependent IO
* routines, for example _iwl_read_restricted calls the non-check version of
* _iwl_read32.)
*
* These declarations are *extremely* useful in quickly isolating code deltas
* which result in misconfiguring of the hardware I/O. In combination with
* git-bisect and the IO debug level you can quickly determine the specific
* commit which breaks the IO sequence to the hardware.
*
*/
#define _iwl_write32(iwl, ofs, val) writel((val), (iwl)->hw_base + (ofs))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *iwl,
u32 ofs, u32 val)
{
IWL_DEBUG_IO("write_direct32(0x%08X, 0x%08X) - %s %d\n",
(u32) (ofs), (u32) (val), f, l);
_iwl_write32(iwl, ofs, val);
}
#define iwl_write32(iwl, ofs, val) \
__iwl_write32(__FILE__, __LINE__, iwl, ofs, val)
#else
#define iwl_write32(iwl, ofs, val) _iwl_write32(iwl, ofs, val)
#endif
#define _iwl_read32(iwl, ofs) readl((iwl)->hw_base + (ofs))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl_read32(char *f, u32 l, struct iwl_priv *iwl, u32 ofs)
{
IWL_DEBUG_IO("read_direct32(0x%08X) - %s %d\n", ofs, f, l);
return _iwl_read32(iwl, ofs);
}
#define iwl_read32(iwl, ofs) __iwl_read32(__FILE__, __LINE__, iwl, ofs)
#else
#define iwl_read32(p, o) _iwl_read32(p, o)
#endif
static inline int _iwl_poll_bit(struct iwl_priv *priv, u32 addr,
u32 bits, u32 mask, int timeout)
{
int i = 0;
do {
if ((_iwl_read32(priv, addr) & mask) == (bits & mask))
return i;
mdelay(10);
i += 10;
} while (i < timeout);
return -ETIMEDOUT;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl_poll_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 addr,
u32 bits, u32 mask, int timeout)
{
int rc = _iwl_poll_bit(priv, addr, bits, mask, timeout);
if (unlikely(rc == -ETIMEDOUT))
IWL_DEBUG_IO
("poll_bit(0x%08X, 0x%08X, 0x%08X) - timedout - %s %d\n",
addr, bits, mask, f, l);
else
IWL_DEBUG_IO
("poll_bit(0x%08X, 0x%08X, 0x%08X) = 0x%08X - %s %d\n",
addr, bits, mask, rc, f, l);
return rc;
}
#define iwl_poll_bit(iwl, addr, bits, mask, timeout) \
__iwl_poll_bit(__FILE__, __LINE__, iwl, addr, bits, mask, timeout)
#else
#define iwl_poll_bit(p, a, b, m, t) _iwl_poll_bit(p, a, b, m, t)
#endif
static inline void _iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask)
{
_iwl_write32(priv, reg, _iwl_read32(priv, reg) | mask);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_set_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 reg, u32 mask)
{
u32 val = _iwl_read32(priv, reg) | mask;
IWL_DEBUG_IO("set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
_iwl_write32(priv, reg, val);
}
#define iwl_set_bit(p, r, m) __iwl_set_bit(__FILE__, __LINE__, p, r, m)
#else
#define iwl_set_bit(p, r, m) _iwl_set_bit(p, r, m)
#endif
static inline void _iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask)
{
_iwl_write32(priv, reg, _iwl_read32(priv, reg) & ~mask);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_clear_bit(const char *f, u32 l,
struct iwl_priv *priv, u32 reg, u32 mask)
{
u32 val = _iwl_read32(priv, reg) & ~mask;
IWL_DEBUG_IO("clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
_iwl_write32(priv, reg, val);
}
#define iwl_clear_bit(p, r, m) __iwl_clear_bit(__FILE__, __LINE__, p, r, m)
#else
#define iwl_clear_bit(p, r, m) _iwl_clear_bit(p, r, m)
#endif
static inline int _iwl_grab_restricted_access(struct iwl_priv *priv)
{
int rc;
u32 gp_ctl;
#ifdef CONFIG_IWLWIFI_DEBUG
if (atomic_read(&priv->restrict_refcnt))
return 0;
#endif
if (test_bit(STATUS_RF_KILL_HW, &priv->status) ||
test_bit(STATUS_RF_KILL_SW, &priv->status)) {
IWL_WARNING("WARNING: Requesting MAC access during RFKILL "
"wakes up NIC\n");
/* 10 msec allows time for NIC to complete its data save */
gp_ctl = _iwl_read32(priv, CSR_GP_CNTRL);
if (gp_ctl & CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY) {
IWL_DEBUG_RF_KILL("Wait for complete power-down, "
"gpctl = 0x%08x\n", gp_ctl);
mdelay(10);
} else
IWL_DEBUG_RF_KILL("power-down complete, "
"gpctl = 0x%08x\n", gp_ctl);
}
/* this bit wakes up the NIC */
_iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
rc = _iwl_poll_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
(CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 50);
if (rc < 0) {
IWL_ERROR("MAC is in deep sleep!\n");
return -EIO;
}
#ifdef CONFIG_IWLWIFI_DEBUG
atomic_inc(&priv->restrict_refcnt);
#endif
return 0;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl_grab_restricted_access(const char *f, u32 l,
struct iwl_priv *priv)
{
if (atomic_read(&priv->restrict_refcnt))
IWL_DEBUG_INFO("Grabbing access while already held at "
"line %d.\n", l);
IWL_DEBUG_IO("grabbing restricted access - %s %d\n", f, l);
return _iwl_grab_restricted_access(priv);
}
#define iwl_grab_restricted_access(priv) \
__iwl_grab_restricted_access(__FILE__, __LINE__, priv)
#else
#define iwl_grab_restricted_access(priv) \
_iwl_grab_restricted_access(priv)
#endif
static inline void _iwl_release_restricted_access(struct iwl_priv *priv)
{
#ifdef CONFIG_IWLWIFI_DEBUG
if (atomic_dec_and_test(&priv->restrict_refcnt))
#endif
_iwl_clear_bit(priv, CSR_GP_CNTRL,
CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_release_restricted_access(const char *f, u32 l,
struct iwl_priv *priv)
{
if (atomic_read(&priv->restrict_refcnt) <= 0)
IWL_ERROR("Release unheld restricted access at line %d.\n", l);
IWL_DEBUG_IO("releasing restricted access - %s %d\n", f, l);
_iwl_release_restricted_access(priv);
}
#define iwl_release_restricted_access(priv) \
__iwl_release_restricted_access(__FILE__, __LINE__, priv)
#else
#define iwl_release_restricted_access(priv) \
_iwl_release_restricted_access(priv)
#endif
static inline u32 _iwl_read_restricted(struct iwl_priv *priv, u32 reg)
{
return _iwl_read32(priv, reg);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl_read_restricted(const char *f, u32 l,
struct iwl_priv *priv, u32 reg)
{
u32 value = _iwl_read_restricted(priv, reg);
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Unrestricted access from %s %d\n", f, l);
IWL_DEBUG_IO("read_restricted(0x%4X) = 0x%08x - %s %d \n", reg, value,
f, l);
return value;
}
#define iwl_read_restricted(priv, reg) \
__iwl_read_restricted(__FILE__, __LINE__, priv, reg)
#else
#define iwl_read_restricted _iwl_read_restricted
#endif
static inline void _iwl_write_restricted(struct iwl_priv *priv,
u32 reg, u32 value)
{
_iwl_write32(priv, reg, value);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static void __iwl_write_restricted(u32 line,
struct iwl_priv *priv, u32 reg, u32 value)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Unrestricted access from line %d\n", line);
_iwl_write_restricted(priv, reg, value);
}
#define iwl_write_restricted(priv, reg, value) \
__iwl_write_restricted(__LINE__, priv, reg, value)
#else
#define iwl_write_restricted _iwl_write_restricted
#endif
static inline void iwl_write_buffer_restricted(struct iwl_priv *priv,
u32 reg, u32 len, u32 *values)
{
u32 count = sizeof(u32);
if ((priv != NULL) && (values != NULL)) {
for (; 0 < len; len -= count, reg += count, values++)
_iwl_write_restricted(priv, reg, *values);
}
}
static inline int _iwl_poll_restricted_bit(struct iwl_priv *priv,
u32 addr, u32 mask, int timeout)
{
int i = 0;
do {
if ((_iwl_read_restricted(priv, addr) & mask) == mask)
return i;
mdelay(10);
i += 10;
} while (i < timeout);
return -ETIMEDOUT;
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline int __iwl_poll_restricted_bit(const char *f, u32 l,
struct iwl_priv *priv,
u32 addr, u32 mask, int timeout)
{
int rc = _iwl_poll_restricted_bit(priv, addr, mask, timeout);
if (unlikely(rc == -ETIMEDOUT))
IWL_DEBUG_IO("poll_restricted_bit(0x%08X, 0x%08X) - "
"timedout - %s %d\n", addr, mask, f, l);
else
IWL_DEBUG_IO("poll_restricted_bit(0x%08X, 0x%08X) = 0x%08X "
"- %s %d\n", addr, mask, rc, f, l);
return rc;
}
#define iwl_poll_restricted_bit(iwl, addr, mask, timeout) \
__iwl_poll_restricted_bit(__FILE__, __LINE__, iwl, addr, mask, timeout)
#else
#define iwl_poll_restricted_bit _iwl_poll_restricted_bit
#endif
static inline u32 _iwl_read_restricted_reg(struct iwl_priv *priv, u32 reg)
{
_iwl_write_restricted(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
return _iwl_read_restricted(priv, HBUS_TARG_PRPH_RDAT);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline u32 __iwl_read_restricted_reg(u32 line,
struct iwl_priv *priv, u32 reg)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Unrestricted access from line %d\n", line);
return _iwl_read_restricted_reg(priv, reg);
}
#define iwl_read_restricted_reg(priv, reg) \
__iwl_read_restricted_reg(__LINE__, priv, reg)
#else
#define iwl_read_restricted_reg _iwl_read_restricted_reg
#endif
static inline void _iwl_write_restricted_reg(struct iwl_priv *priv,
u32 addr, u32 val)
{
_iwl_write_restricted(priv, HBUS_TARG_PRPH_WADDR,
((addr & 0x0000FFFF) | (3 << 24)));
_iwl_write_restricted(priv, HBUS_TARG_PRPH_WDAT, val);
}
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_write_restricted_reg(u32 line,
struct iwl_priv *priv,
u32 addr, u32 val)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Unrestricted access from line %d\n", line);
_iwl_write_restricted_reg(priv, addr, val);
}
#define iwl_write_restricted_reg(priv, addr, val) \
__iwl_write_restricted_reg(__LINE__, priv, addr, val);
#else
#define iwl_write_restricted_reg _iwl_write_restricted_reg
#endif
#define _iwl_set_bits_restricted_reg(priv, reg, mask) \
_iwl_write_restricted_reg(priv, reg, \
(_iwl_read_restricted_reg(priv, reg) | mask))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_set_bits_restricted_reg(u32 line, struct iwl_priv
*priv, u32 reg, u32 mask)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Unrestricted access from line %d\n", line);
_iwl_set_bits_restricted_reg(priv, reg, mask);
}
#define iwl_set_bits_restricted_reg(priv, reg, mask) \
__iwl_set_bits_restricted_reg(__LINE__, priv, reg, mask)
#else
#define iwl_set_bits_restricted_reg _iwl_set_bits_restricted_reg
#endif
#define _iwl_set_bits_mask_restricted_reg(priv, reg, bits, mask) \
_iwl_write_restricted_reg( \
priv, reg, ((_iwl_read_restricted_reg(priv, reg) & mask) | bits))
#ifdef CONFIG_IWLWIFI_DEBUG
static inline void __iwl_set_bits_mask_restricted_reg(u32 line,
struct iwl_priv *priv, u32 reg, u32 bits, u32 mask)
{
if (!atomic_read(&priv->restrict_refcnt))
IWL_ERROR("Unrestricted access from line %d\n", line);
_iwl_set_bits_mask_restricted_reg(priv, reg, bits, mask);
}
#define iwl_set_bits_mask_restricted_reg(priv, reg, bits, mask) \
__iwl_set_bits_mask_restricted_reg(__LINE__, priv, reg, bits, mask)
#else
#define iwl_set_bits_mask_restricted_reg _iwl_set_bits_mask_restricted_reg
#endif
static inline void iwl_clear_bits_restricted_reg(struct iwl_priv
*priv, u32 reg, u32 mask)
{
u32 val = _iwl_read_restricted_reg(priv, reg);
_iwl_write_restricted_reg(priv, reg, (val & ~mask));
}
static inline u32 iwl_read_restricted_mem(struct iwl_priv *priv, u32 addr)
{
iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, addr);
return iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
}
static inline void iwl_write_restricted_mem(struct iwl_priv *priv, u32 addr,
u32 val)
{
iwl_write_restricted(priv, HBUS_TARG_MEM_WADDR, addr);
iwl_write_restricted(priv, HBUS_TARG_MEM_WDAT, val);
}
static inline void iwl_write_restricted_mems(struct iwl_priv *priv, u32 addr,
u32 len, u32 *values)
{
iwl_write_restricted(priv, HBUS_TARG_MEM_WADDR, addr);
for (; 0 < len; len -= sizeof(u32), values++)
iwl_write_restricted(priv, HBUS_TARG_MEM_WDAT, *values);
}
static inline void iwl_write_restricted_regs(struct iwl_priv *priv, u32 reg,
u32 len, u8 *values)
{
u32 reg_offset = reg;
u32 aligment = reg & 0x3;
/* write any non-dword-aligned stuff at the beginning */
if (len < sizeof(u32)) {
if ((aligment + len) <= sizeof(u32)) {
u8 size;
u32 value = 0;
size = len - 1;
memcpy(&value, values, len);
reg_offset = (reg_offset & 0x0000FFFF);
_iwl_write_restricted(priv,
HBUS_TARG_PRPH_WADDR,
(reg_offset | (size << 24)));
_iwl_write_restricted(priv, HBUS_TARG_PRPH_WDAT,
value);
}
return;
}
/* now write all the dword-aligned stuff */
for (; reg_offset < (reg + len);
reg_offset += sizeof(u32), values += sizeof(u32))
_iwl_write_restricted_reg(priv, reg_offset, *((u32 *) values));
}
#endif
drivers/net/wireless/iwlwifi/iwl-priv.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_priv_h__
#define __iwl_priv_h__
#include <linux/workqueue.h>
#ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
enum {
MEASUREMENT_READY = (1 << 0),
MEASUREMENT_ACTIVE = (1 << 1),
};
#endif
struct iwl_priv {
/* ieee device used by generic ieee processing code */
struct ieee80211_hw *hw;
struct ieee80211_channel *ieee_channels;
struct ieee80211_rate *ieee_rates;
/* temporary frame storage list */
struct list_head free_frames;
int frames_count;
u8 phymode;
int alloc_rxb_skb;
void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
struct iwl_rx_mem_buffer *rxb);
const struct ieee80211_hw_mode *modes;
#ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
/* spectrum measurement report caching */
struct iwl_spectrum_notification measure_report;
u8 measurement_status;
#endif
/* ucode beacon time */
u32 ucode_beacon_time;
/* we allocate array of iwl_channel_info for NIC's valid channels.
* Access via channel # using indirect index array */
struct iwl_channel_info *channel_info; /* channel info array */
u8 channel_count; /* # of channels */
/* each calibration channel group in the EEPROM has a derived
* clip setting for each rate. */
const struct iwl_clip_group clip_groups[5];
/* thermal calibration */
s32 temperature; /* degrees Kelvin */
s32 last_temperature;
/* Scan related variables */
unsigned long last_scan_jiffies;
unsigned long scan_start;
unsigned long scan_pass_start;
unsigned long scan_start_tsf;
int scan_bands;
int one_direct_scan;
u8 direct_ssid_len;
u8 direct_ssid[IW_ESSID_MAX_SIZE];
struct iwl_scan_cmd *scan;
u8 only_active_channel;
/* spinlock */
spinlock_t lock; /* protect general shared data */
spinlock_t hcmd_lock; /* protect hcmd */
struct mutex mutex;
/* basic pci-network driver stuff */
struct pci_dev *pci_dev;
/* pci hardware address support */
void __iomem *hw_base;
/* uCode images, save to reload in case of failure */
struct fw_image_desc ucode_code; /* runtime inst */
struct fw_image_desc ucode_data; /* runtime data original */
struct fw_image_desc ucode_data_backup; /* runtime data save/restore */
struct fw_image_desc ucode_init; /* initialization inst */
struct fw_image_desc ucode_init_data; /* initialization data */
struct fw_image_desc ucode_boot; /* bootstrap inst */
struct iwl_rxon_time_cmd rxon_timing;
/* We declare this const so it can only be
* changed via explicit cast within the
* routines that actually update the physical
* hardware */
const struct iwl_rxon_cmd active_rxon;
struct iwl_rxon_cmd staging_rxon;
int error_recovering;
struct iwl_rxon_cmd recovery_rxon;
/* 1st responses from initialize and runtime uCode images.
* 4965's initialize alive response contains some calibration data. */
struct iwl_init_alive_resp card_alive_init;
struct iwl_alive_resp card_alive;
#ifdef LED
/* LED related variables */
struct iwl_activity_blink activity;
unsigned long led_packets;
int led_state;
#endif
u16 active_rate;
u16 active_rate_basic;
u8 call_post_assoc_from_beacon;
u8 assoc_station_added;
#if IWL == 4965
u8 use_ant_b_for_management_frame; /* Tx antenna selection */
/* HT variables */
u8 is_dup;
u8 is_ht_enabled;
u8 channel_width; /* 0=20MHZ, 1=40MHZ */
u8 current_channel_width;
u8 valid_antenna; /* Bit mask of antennas actually connected */
#ifdef CONFIG_IWLWIFI_SENSITIVITY
struct iwl_sensitivity_data sensitivity_data;
struct iwl_chain_noise_data chain_noise_data;
u8 start_calib;
__le16 sensitivity_tbl[HD_TABLE_SIZE];
#endif /*CONFIG_IWLWIFI_SENSITIVITY*/
#ifdef CONFIG_IWLWIFI_HT
struct sta_ht_info current_assoc_ht;
#endif
u8 active_rate_ht[2];
u8 last_phy_res[100];
/* Rate scaling data */
struct iwl_lq_mngr lq_mngr;
#endif
/* Rate scaling data */
s8 data_retry_limit;
u8 retry_rate;
wait_queue_head_t wait_command_queue;
int activity_timer_active;
/* Rx and Tx DMA processing queues */
struct iwl_rx_queue rxq;
struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES];
#if IWL == 4965
unsigned long txq_ctx_active_msk;
struct iwl_kw kw; /* keep warm address */
u32 scd_base_addr; /* scheduler sram base address */
#endif
unsigned long status;
u32 config;
int last_rx_rssi; /* From Rx packet statisitics */
int last_rx_noise; /* From beacon statistics */
struct iwl_power_mgr power_data;
struct iwl_notif_statistics statistics;
unsigned long last_statistics_time;
/* context information */
u8 essid[IW_ESSID_MAX_SIZE];
u8 essid_len;
u16 rates_mask;
u32 power_mode;
u32 antenna;
u8 bssid[ETH_ALEN];
u16 rts_threshold;
u8 mac_addr[ETH_ALEN];
/*station table variables */
spinlock_t sta_lock;
int num_stations;
struct iwl_station_entry stations[IWL_STATION_COUNT];
/* Indication if ieee80211_ops->open has been called */
int is_open;
u8 mac80211_registered;
int is_abg;
u32 notif_missed_beacons;
/* Rx'd packet timing information */
u32 last_beacon_time;
u64 last_tsf;
/* Duplicate packet detection */
u16 last_seq_num;
u16 last_frag_num;
unsigned long last_packet_time;
struct list_head ibss_mac_hash[IWL_IBSS_MAC_HASH_SIZE];
/* eeprom */
struct iwl_eeprom eeprom;
int iw_mode;
struct sk_buff *ibss_beacon;
/* Last Rx'd beacon timestamp */
u32 timestamp0;
u32 timestamp1;
u16 beacon_int;
struct iwl_driver_hw_info hw_setting;
int interface_id;
/* Current association information needed to configure the
* hardware */
u16 assoc_id;
u16 assoc_capability;
u8 ps_mode;
#ifdef CONFIG_IWLWIFI_QOS
struct iwl_qos_info qos_data;
#endif /*CONFIG_IWLWIFI_QOS */
struct workqueue_struct *workqueue;
struct work_struct up;
struct work_struct restart;
struct work_struct calibrated_work;
struct work_struct scan_completed;
struct work_struct rx_replenish;
struct work_struct rf_kill;
struct work_struct abort_scan;
struct work_struct update_link_led;
struct work_struct auth_work;
struct work_struct report_work;
struct work_struct request_scan;
struct work_struct beacon_update;
struct tasklet_struct irq_tasklet;
struct delayed_work init_alive_start;
struct delayed_work alive_start;
struct delayed_work activity_timer;
struct delayed_work thermal_periodic;
struct delayed_work gather_stats;
struct delayed_work scan_check;
struct delayed_work post_associate;
#define IWL_DEFAULT_TX_POWER 0x0F
s8 user_txpower_limit;
s8 max_channel_txpower_limit;
u32 cck_power_index_compensation;
#ifdef CONFIG_PM
u32 pm_state[16];
#endif
#ifdef CONFIG_IWLWIFI_DEBUG
/* debugging info */
u32 framecnt_to_us;
atomic_t restrict_refcnt;
#endif
#if IWL == 4965
struct work_struct txpower_work;
#ifdef CONFIG_IWLWIFI_SENSITIVITY
struct work_struct sensitivity_work;
#endif
struct work_struct statistics_work;
struct timer_list statistics_periodic;
#ifdef CONFIG_IWLWIFI_HT_AGG
struct work_struct agg_work;
#endif
#endif /* 4965 */
}; /*iwl_priv */
#endif /* __iwl_priv_h__ */
drivers/net/wireless/iwlwifi/iwl-prph.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* GPL LICENSE SUMMARY
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU Geeral Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
* USA
*
* The full GNU General Public License is included in this distribution
* in the file called LICENSE.GPL.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
* BSD LICENSE
*
* Copyright(c) 2005 - 2007 Intel Corporation. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*****************************************************************************/
#ifndef __iwl_prph_h__
#define __iwl_prph_h__
#define PRPH_BASE (0x00000)
#define PRPH_END (0xFFFFF)
/* APMG (power management) constants */
#define APMG_BASE (PRPH_BASE + 0x3000)
#define APMG_CLK_CTRL_REG (APMG_BASE + 0x0000)
#define APMG_CLK_EN_REG (APMG_BASE + 0x0004)
#define APMG_CLK_DIS_REG (APMG_BASE + 0x0008)
#define APMG_PS_CTRL_REG (APMG_BASE + 0x000c)
#define APMG_PCIDEV_STT_REG (APMG_BASE + 0x0010)
#define APMG_RFKILL_REG (APMG_BASE + 0x0014)
#define APMG_RTC_INT_STT_REG (APMG_BASE + 0x001c)
#define APMG_RTC_INT_MSK_REG (APMG_BASE + 0x0020)
#define APMG_CLK_VAL_DMA_CLK_RQT (0x00000200)
#define APMG_CLK_VAL_BSM_CLK_RQT (0x00000800)
#define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000)
#define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800)
#define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000)
#define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000)
#define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x01000000)
/**
* BSM (Bootstrap State Machine)
*
* The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
* in special SRAM that does not power down when the embedded control
* processor is sleeping (e.g. for periodic power-saving shutdowns of radio).
*
* When powering back up after sleeps (or during initial uCode load), the BSM
* internally loads the short bootstrap program from the special SRAM into the
* embedded processor's instruction SRAM, and starts the processor so it runs
* the bootstrap program.
*
* This bootstrap program loads (via PCI busmaster DMA) instructions and data
* images for a uCode program from host DRAM locations. The host driver
* indicates DRAM locations and sizes for instruction and data images via the
* four BSM_DRAM_* registers. Once the bootstrap program loads the new program,
* the new program starts automatically.
*
* The uCode used for open-source drivers includes two programs:
*
* 1) Initialization -- performs hardware calibration and sets up some
* internal data, then notifies host via "initialize alive" notification
* (struct iwl_init_alive_resp) that it has completed all of its work.
* After signal from host, it then loads and starts the runtime program.
* The initialization program must be used when initially setting up the
* NIC after loading the driver.
*
* 2) Runtime/Protocol -- performs all normal runtime operations. This
* notifies host via "alive" notification (struct iwl_alive_resp) that it
* is ready to be used.
*
* When initializing the NIC, the host driver does the following procedure:
*
* 1) Load bootstrap program (instructions only, no data image for bootstrap)
* into bootstrap memory. Use dword writes starting at BSM_SRAM_LOWER_BOUND
*
* 2) Point (via BSM_DRAM_*) to the "initialize" uCode data and instruction
* images in host DRAM.
*
* 3) Set up BSM to copy from BSM SRAM into uCode instruction SRAM when asked:
* BSM_WR_MEM_SRC_REG = 0
* BSM_WR_MEM_DST_REG = RTC_INST_LOWER_BOUND
* BSM_WR_MEM_DWCOUNT_REG = # dwords in bootstrap instruction image
*
* 4) Load bootstrap into instruction SRAM:
* BSM_WR_CTRL_REG = BSM_WR_CTRL_REG_BIT_START
*
* 5) Wait for load completion:
* Poll BSM_WR_CTRL_REG for BSM_WR_CTRL_REG_BIT_START = 0
*
* 6) Enable future boot loads whenever NIC's power management triggers it:
* BSM_WR_CTRL_REG = BSM_WR_CTRL_REG_BIT_START_EN
*
* 7) Start the NIC by removing all reset bits:
* CSR_RESET = 0
*
* The bootstrap uCode (already in instruction SRAM) loads initialization
* uCode. Initialization uCode performs data initialization, sends
* "initialize alive" notification to host, and waits for a signal from
* host to load runtime code.
*
* 4) Point (via BSM_DRAM_*) to the "runtime" uCode data and instruction
* images in host DRAM. The last register loaded must be the instruction
* bytecount register ("1" in MSbit tells initialization uCode to load
* the runtime uCode):
* BSM_DRAM_INST_BYTECOUNT_REG = bytecount | BSM_DRAM_INST_LOAD
*
* 5) Wait for "alive" notification, then issue normal runtime commands.
*
* Data caching during power-downs:
*
* Just before the embedded controller powers down (e.g for automatic
* power-saving modes, or for RFKILL), uCode stores (via PCI busmaster DMA)
* a current snapshot of the embedded processor's data SRAM into host DRAM.
* This caches the data while the embedded processor's memory is powered down.
* Location and size are controlled by BSM_DRAM_DATA_* registers.
*
* NOTE: Instruction SRAM does not need to be saved, since that doesn't
* change during operation; the original image (from uCode distribution
* file) can be used for reload.
*
* When powering back up, the BSM loads the bootstrap program. Bootstrap looks
* at the BSM_DRAM_* registers, which now point to the runtime instruction
* image and the cached (modified) runtime data (*not* the initialization
* uCode). Bootstrap reloads these runtime images into SRAM, and restarts the
* uCode from where it left off before the power-down.
*
* NOTE: Initialization uCode does *not* run as part of the save/restore
* procedure.
*
* This save/restore method is mostly for autonomous power management during
* normal operation (result of POWER_TABLE_CMD). Platform suspend/resume and
* RFKILL should use complete restarts (with total re-initialization) of uCode,
* allowing total shutdown (including BSM memory).
*
* Note that, during normal operation, the host DRAM that held the initial
* startup data for the runtime code is now being used as a backup data cache
* for modified data! If you need to completely re-initialize the NIC, make
* sure that you use the runtime data image from the uCode distribution file,
* not the modified/saved runtime data. You may want to store a separate
* "clean" runtime data image in DRAM to avoid disk reads of distribution file.
*/
/* BSM bit fields */
#define BSM_WR_CTRL_REG_BIT_START (0x80000000) /* start boot load now */
#define BSM_WR_CTRL_REG_BIT_START_EN (0x40000000) /* enable boot after pwrup*/
#define BSM_DRAM_INST_LOAD (0x80000000) /* start program load now */
/* BSM addresses */
#define BSM_BASE (PRPH_BASE + 0x3400)
#define BSM_END (PRPH_BASE + 0x3800)
#define BSM_WR_CTRL_REG (BSM_BASE + 0x000) /* ctl and status */
#define BSM_WR_MEM_SRC_REG (BSM_BASE + 0x004) /* source in BSM mem */
#define BSM_WR_MEM_DST_REG (BSM_BASE + 0x008) /* dest in SRAM mem */
#define BSM_WR_DWCOUNT_REG (BSM_BASE + 0x00C) /* bytes */
#define BSM_WR_STATUS_REG (BSM_BASE + 0x010) /* bit 0: 1 == done */
/*
* Pointers and size regs for bootstrap load and data SRAM save/restore.
* NOTE: 3945 pointers use bits 31:0 of DRAM address.
* 4965 pointers use bits 35:4 of DRAM address.
*/
#define BSM_DRAM_INST_PTR_REG (BSM_BASE + 0x090)
#define BSM_DRAM_INST_BYTECOUNT_REG (BSM_BASE + 0x094)
#define BSM_DRAM_DATA_PTR_REG (BSM_BASE + 0x098)
#define BSM_DRAM_DATA_BYTECOUNT_REG (BSM_BASE + 0x09C)
/*
* BSM special memory, stays powered on during power-save sleeps.
* Read/write, address range from LOWER_BOUND to (LOWER_BOUND + SIZE -1)
*/
#define BSM_SRAM_LOWER_BOUND (PRPH_BASE + 0x3800)
#define BSM_SRAM_SIZE (1024) /* bytes */
#endif /* __iwl_prph_h__ */
drivers/net/wireless/iwlwifi/iwl-spectrum.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* Portions of this file are derived from the ieee80211 subsystem header files.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwl_spectrum_h__
#define __iwl_spectrum_h__
enum { /* ieee80211_basic_report.map */
IEEE80211_BASIC_MAP_BSS = (1 << 0),
IEEE80211_BASIC_MAP_OFDM = (1 << 1),
IEEE80211_BASIC_MAP_UNIDENTIFIED = (1 << 2),
IEEE80211_BASIC_MAP_RADAR = (1 << 3),
IEEE80211_BASIC_MAP_UNMEASURED = (1 << 4),
/* Bits 5-7 are reserved */
};
struct ieee80211_basic_report {
u8 channel;
__le64 start_time;
__le16 duration;
u8 map;
} __attribute__ ((packed));
enum { /* ieee80211_measurement_request.mode */
/* Bit 0 is reserved */
IEEE80211_MEASUREMENT_ENABLE = (1 << 1),
IEEE80211_MEASUREMENT_REQUEST = (1 << 2),
IEEE80211_MEASUREMENT_REPORT = (1 << 3),
/* Bits 4-7 are reserved */
};
enum {
IEEE80211_REPORT_BASIC = 0, /* required */
IEEE80211_REPORT_CCA = 1, /* optional */
IEEE80211_REPORT_RPI = 2, /* optional */
/* 3-255 reserved */
};
struct ieee80211_measurement_params {
u8 channel;
__le64 start_time;
__le16 duration;
} __attribute__ ((packed));
struct ieee80211_info_element {
u8 id;
u8 len;
u8 data[0];
} __attribute__ ((packed));
struct ieee80211_measurement_request {
struct ieee80211_info_element ie;
u8 token;
u8 mode;
u8 type;
struct ieee80211_measurement_params params[0];
} __attribute__ ((packed));
struct ieee80211_measurement_report {
struct ieee80211_info_element ie;
u8 token;
u8 mode;
u8 type;
union {
struct ieee80211_basic_report basic[0];
} u;
} __attribute__ ((packed));
#endif
drivers/net/wireless/iwlwifi/iwl3945-base.c 0 → 100644
View file @ b481de9c
This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/net/wireless/iwlwifi/iwl4965-base.c 0 → 100644
View file @ b481de9c
This source diff could not be displayed because it is too large. You can view the blob instead.
drivers/net/wireless/iwlwifi/iwlwifi.h 0 → 100644
View file @ b481de9c
/******************************************************************************
*
* Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
*
* Portions of this file are derived from the ipw3945 project, as well
* as portions of the ieee80211 subsystem header files.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License along with
* this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
*
* The full GNU General Public License is included in this distribution in the
* file called LICENSE.
*
* Contact Information:
* James P. Ketrenos <ipw2100-admin@linux.intel.com>
* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
*
*****************************************************************************/
#ifndef __iwlwifi_h__
#define __iwlwifi_h__
#include <linux/pci.h> /* for struct pci_device_id */
#include <linux/kernel.h>
#include <net/ieee80211_radiotap.h>
struct iwl_priv;
/* Hardware specific file defines the PCI IDs table for that hardware module */
extern struct pci_device_id iwl_hw_card_ids[];
#if IWL == 3945
#define DRV_NAME "iwl3945"
#include "iwl-hw.h"
#include "iwl-3945-hw.h"
#elif IWL == 4965
#define DRV_NAME "iwl4965"
#include "iwl-hw.h"
#include "iwl-4965-hw.h"
#endif
#include "iwl-prph.h"
/*
* Driver implementation data structures, constants, inline
* functions
*
* NOTE: DO NOT PUT HARDWARE/UCODE SPECIFIC DECLRATIONS HERE
*
* Hardware specific declrations go into iwl-*hw.h
*
*/
#include "iwl-debug.h"
/* Default noise level to report when noise measurement is not available.
* This may be because we're:
* 1) Not associated (4965, no beacon statistics being sent to driver)
* 2) Scanning (noise measurement does not apply to associated channel)
* 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
* Use default noise value of -127 ... this is below the range of measurable
* Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
* Also, -127 works better than 0 when averaging frames with/without
* noise info (e.g. averaging might be done in app); measured dBm values are
* always negative ... using a negative value as the default keeps all
* averages within an s8's (used in some apps) range of negative values. */
#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
/* Module parameters accessible from iwl-*.c */
extern int iwl_param_disable_hw_scan;
extern int iwl_param_debug;
extern int iwl_param_mode;
extern int iwl_param_disable;
extern int iwl_param_antenna;
extern int iwl_param_hwcrypto;
extern int iwl_param_qos_enable;
extern int iwl_param_queues_num;
enum iwl_antenna {
IWL_ANTENNA_DIVERSITY,
IWL_ANTENNA_MAIN,
IWL_ANTENNA_AUX
};
/*
* RTS threshold here is total size [2347] minus 4 FCS bytes
* Per spec:
* a value of 0 means RTS on all data/management packets
* a value > max MSDU size means no RTS
* else RTS for data/management frames where MPDU is larger
* than RTS value.
*/
#define DEFAULT_RTS_THRESHOLD 2347U
#define MIN_RTS_THRESHOLD 0U
#define MAX_RTS_THRESHOLD 2347U
#define MAX_MSDU_SIZE 2304U
#define MAX_MPDU_SIZE 2346U
#define DEFAULT_BEACON_INTERVAL 100U
#define DEFAULT_SHORT_RETRY_LIMIT 7U
#define DEFAULT_LONG_RETRY_LIMIT 4U
struct iwl_rx_mem_buffer {
dma_addr_t dma_addr;
struct sk_buff *skb;
struct list_head list;
};
struct iwl_rt_rx_hdr {
struct ieee80211_radiotap_header rt_hdr;
__le64 rt_tsf; /* TSF */
u8 rt_flags; /* radiotap packet flags */
u8 rt_rate; /* rate in 500kb/s */
__le16 rt_channelMHz; /* channel in MHz */
__le16 rt_chbitmask; /* channel bitfield */
s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
s8 rt_dbmnoise;
u8 rt_antenna; /* antenna number */
u8 payload[0]; /* payload... */
} __attribute__ ((packed));
struct iwl_rt_tx_hdr {
struct ieee80211_radiotap_header rt_hdr;
u8 rt_rate; /* rate in 500kb/s */
__le16 rt_channel; /* channel in mHz */
__le16 rt_chbitmask; /* channel bitfield */
s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
u8 rt_antenna; /* antenna number */
u8 payload[0]; /* payload... */
} __attribute__ ((packed));
/*
* Generic queue structure
*
* Contains common data for Rx and Tx queues
*/
struct iwl_queue {
int n_bd; /* number of BDs in this queue */
int first_empty; /* 1-st empty entry (index) host_w*/
int last_used; /* last used entry (index) host_r*/
dma_addr_t dma_addr; /* physical addr for BD's */
int n_window; /* safe queue window */
u32 id;
int low_mark; /* low watermark, resume queue if free
* space more than this */
int high_mark; /* high watermark, stop queue if free
* space less than this */
} __attribute__ ((packed));
#define MAX_NUM_OF_TBS (20)
struct iwl_tx_info {
struct ieee80211_tx_status status;
struct sk_buff *skb[MAX_NUM_OF_TBS];
};
/**
* struct iwl_tx_queue - Tx Queue for DMA
* @need_update: need to update read/write index
* @shed_retry: queue is HT AGG enabled
*
* Queue consists of circular buffer of BD's and required locking structures.
*/
struct iwl_tx_queue {
struct iwl_queue q;
struct iwl_tfd_frame *bd;
struct iwl_cmd *cmd;
dma_addr_t dma_addr_cmd;
struct iwl_tx_info *txb;
int need_update;
int sched_retry;
int active;
};
#include "iwl-channel.h"
#if IWL == 3945
#include "iwl-3945-rs.h"
#else
#include "iwl-4965-rs.h"
#endif
#define IWL_TX_FIFO_AC0 0
#define IWL_TX_FIFO_AC1 1
#define IWL_TX_FIFO_AC2 2
#define IWL_TX_FIFO_AC3 3
#define IWL_TX_FIFO_HCCA_1 5
#define IWL_TX_FIFO_HCCA_2 6
#define IWL_TX_FIFO_NONE 7
/* Minimum number of queues. MAX_NUM is defined in hw specific files */
#define IWL_MIN_NUM_QUEUES 4
/* Power management (not Tx power) structures */
struct iwl_power_vec_entry {
struct iwl_powertable_cmd cmd;
u8 no_dtim;
};
#define IWL_POWER_RANGE_0 (0)
#define IWL_POWER_RANGE_1 (1)
#define IWL_POWER_MODE_CAM 0x00 /* Continuously Aware Mode, always on */
#define IWL_POWER_INDEX_3 0x03
#define IWL_POWER_INDEX_5 0x05
#define IWL_POWER_AC 0x06
#define IWL_POWER_BATTERY 0x07
#define IWL_POWER_LIMIT 0x07
#define IWL_POWER_MASK 0x0F
#define IWL_POWER_ENABLED 0x10
#define IWL_POWER_LEVEL(x) ((x) & IWL_POWER_MASK)
struct iwl_power_mgr {
spinlock_t lock;
struct iwl_power_vec_entry pwr_range_0[IWL_POWER_AC];
struct iwl_power_vec_entry pwr_range_1[IWL_POWER_AC];
u8 active_index;
u32 dtim_val;
};
#define IEEE80211_DATA_LEN 2304
#define IEEE80211_4ADDR_LEN 30
#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
struct iwl_frame {
union {
struct ieee80211_hdr frame;
struct iwl_tx_beacon_cmd beacon;
u8 raw[IEEE80211_FRAME_LEN];
u8 cmd[360];
} u;
struct list_head list;
};
#define SEQ_TO_QUEUE(x) ((x >> 8) & 0xbf)
#define QUEUE_TO_SEQ(x) ((x & 0xbf) << 8)
#define SEQ_TO_INDEX(x) (x & 0xff)
#define INDEX_TO_SEQ(x) (x & 0xff)
#define SEQ_HUGE_FRAME (0x4000)
#define SEQ_RX_FRAME __constant_cpu_to_le16(0x8000)
#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
enum {
/* CMD_SIZE_NORMAL = 0, */
CMD_SIZE_HUGE = (1 << 0),
/* CMD_SYNC = 0, */
CMD_ASYNC = (1 << 1),
/* CMD_NO_SKB = 0, */
CMD_WANT_SKB = (1 << 2),
};
struct iwl_cmd;
struct iwl_priv;
struct iwl_cmd_meta {
struct iwl_cmd_meta *source;
union {
struct sk_buff *skb;
int (*callback)(struct iwl_priv *priv,
struct iwl_cmd *cmd, struct sk_buff *skb);
} __attribute__ ((packed)) u;
/* The CMD_SIZE_HUGE flag bit indicates that the command
* structure is stored at the end of the shared queue memory. */
u32 flags;
} __attribute__ ((packed));
struct iwl_cmd {
struct iwl_cmd_meta meta;
struct iwl_cmd_header hdr;
union {
struct iwl_addsta_cmd addsta;
struct iwl_led_cmd led;
u32 flags;
u8 val8;
u16 val16;
u32 val32;
struct iwl_bt_cmd bt;
struct iwl_rxon_time_cmd rxon_time;
struct iwl_powertable_cmd powertable;
struct iwl_qosparam_cmd qosparam;
struct iwl_tx_cmd tx;
struct iwl_tx_beacon_cmd tx_beacon;
struct iwl_rxon_assoc_cmd rxon_assoc;
u8 *indirect;
u8 payload[360];
} __attribute__ ((packed)) cmd;
} __attribute__ ((packed));
struct iwl_host_cmd {
u8 id;
u16 len;
struct iwl_cmd_meta meta;
const void *data;
};
#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_cmd) - \
sizeof(struct iwl_cmd_meta))
/*
* RX related structures and functions
*/
#define RX_FREE_BUFFERS 64
#define RX_LOW_WATERMARK 8
#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
/**
* struct iwl_rx_queue - Rx queue
* @processed: Internal index to last handled Rx packet
* @read: Shared index to newest available Rx buffer
* @write: Shared index to oldest written Rx packet
* @free_count: Number of pre-allocated buffers in rx_free
* @rx_free: list of free SKBs for use
* @rx_used: List of Rx buffers with no SKB
* @need_update: flag to indicate we need to update read/write index
*
* NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
*/
struct iwl_rx_queue {
__le32 *bd;
dma_addr_t dma_addr;
struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
u32 processed;
u32 read;
u32 write;
u32 free_count;
struct list_head rx_free;
struct list_head rx_used;
int need_update;
spinlock_t lock;
};
#define IWL_SUPPORTED_RATES_IE_LEN 8
#define SCAN_INTERVAL 100
#define MAX_A_CHANNELS 252
#define MIN_A_CHANNELS 7
#define MAX_B_CHANNELS 14
#define MIN_B_CHANNELS 1
#define STATUS_HCMD_ACTIVE 0 /* host command in progress */
#define STATUS_INT_ENABLED 1
#define STATUS_RF_KILL_HW 2
#define STATUS_RF_KILL_SW 3
#define STATUS_INIT 4
#define STATUS_ALIVE 5
#define STATUS_READY 6
#define STATUS_TEMPERATURE 7
#define STATUS_GEO_CONFIGURED 8
#define STATUS_EXIT_PENDING 9
#define STATUS_IN_SUSPEND 10
#define STATUS_STATISTICS 11
#define STATUS_SCANNING 12
#define STATUS_SCAN_ABORTING 13
#define STATUS_SCAN_HW 14
#define STATUS_POWER_PMI 15
#define STATUS_FW_ERROR 16
#define MAX_TID_COUNT 9
#define IWL_INVALID_RATE 0xFF
#define IWL_INVALID_VALUE -1
#if IWL == 4965
#ifdef CONFIG_IWLWIFI_HT
#ifdef CONFIG_IWLWIFI_HT_AGG
struct iwl_ht_agg {
u16 txq_id;
u16 frame_count;
u16 wait_for_ba;
u16 start_idx;
u32 bitmap0;
u32 bitmap1;
u32 rate_n_flags;
};
#endif /* CONFIG_IWLWIFI_HT_AGG */
#endif /* CONFIG_IWLWIFI_HT */
#endif
struct iwl_tid_data {
u16 seq_number;
#if IWL == 4965
#ifdef CONFIG_IWLWIFI_HT
#ifdef CONFIG_IWLWIFI_HT_AGG
struct iwl_ht_agg agg;
#endif /* CONFIG_IWLWIFI_HT_AGG */
#endif /* CONFIG_IWLWIFI_HT */
#endif
};
struct iwl_hw_key {
ieee80211_key_alg alg;
int keylen;
u8 key[32];
};
union iwl_ht_rate_supp {
u16 rates;
struct {
u8 siso_rate;
u8 mimo_rate;
};
};
#ifdef CONFIG_IWLWIFI_HT
#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
#define HT_IE_MAX_AMSDU_SIZE_4K (0)
#define CFG_HT_MPDU_DENSITY_2USEC (0x5)
#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_2USEC
struct sta_ht_info {
u8 is_ht;
u16 rx_mimo_ps_mode;
u16 tx_mimo_ps_mode;
u16 control_channel;
u8 max_amsdu_size;
u8 ampdu_factor;
u8 mpdu_density;
u8 operating_mode;
u8 supported_chan_width;
u8 extension_chan_offset;
u8 is_green_field;
u8 sgf;
u8 supp_rates[16];
u8 tx_chan_width;
u8 chan_width_cap;
};
#endif /*CONFIG_IWLWIFI_HT */
#ifdef CONFIG_IWLWIFI_QOS
union iwl_qos_capabity {
struct {
u8 edca_count:4; /* bit 0-3 */
u8 q_ack:1; /* bit 4 */
u8 queue_request:1; /* bit 5 */
u8 txop_request:1; /* bit 6 */
u8 reserved:1; /* bit 7 */
} q_AP;
struct {
u8 acvo_APSD:1; /* bit 0 */
u8 acvi_APSD:1; /* bit 1 */
u8 ac_bk_APSD:1; /* bit 2 */
u8 ac_be_APSD:1; /* bit 3 */
u8 q_ack:1; /* bit 4 */
u8 max_len:2; /* bit 5-6 */
u8 more_data_ack:1; /* bit 7 */
} q_STA;
u8 val;
};
/* QoS sturctures */
struct iwl_qos_info {
int qos_enable;
int qos_active;
union iwl_qos_capabity qos_cap;
struct iwl_qosparam_cmd def_qos_parm;
};
#endif /*CONFIG_IWLWIFI_QOS */
#define STA_PS_STATUS_WAKE 0
#define STA_PS_STATUS_SLEEP 1
struct iwl_station_entry {
struct iwl_addsta_cmd sta;
struct iwl_tid_data tid[MAX_TID_COUNT];
#if IWL == 3945
union {
struct {
u8 rate;
u8 flags;
} s;
u16 rate_n_flags;
} current_rate;
#endif
u8 used;
u8 ps_status;
struct iwl_hw_key keyinfo;
};
/* one for each uCode image (inst/data, boot/init/runtime) */
struct fw_image_desc {
void *v_addr; /* access by driver */
dma_addr_t p_addr; /* access by card's busmaster DMA */
u32 len; /* bytes */
};
/* uCode file layout */
struct iwl_ucode {
__le32 ver; /* major/minor/subminor */
__le32 inst_size; /* bytes of runtime instructions */
__le32 data_size; /* bytes of runtime data */
__le32 init_size; /* bytes of initialization instructions */
__le32 init_data_size; /* bytes of initialization data */
__le32 boot_size; /* bytes of bootstrap instructions */
u8 data[0]; /* data in same order as "size" elements */
};
#define IWL_IBSS_MAC_HASH_SIZE 32
struct iwl_ibss_seq {
u8 mac[ETH_ALEN];
u16 seq_num;
u16 frag_num;
unsigned long packet_time;
struct list_head list;
};
struct iwl_driver_hw_info {
u16 max_txq_num;
u16 ac_queue_count;
u32 rx_buffer_size;
u16 tx_cmd_len;
u16 max_rxq_size;
u16 max_rxq_log;
u32 cck_flag;
u8 max_stations;
u8 bcast_sta_id;
void *shared_virt;
dma_addr_t shared_phys;
};
#define STA_FLG_RTS_MIMO_PROT_MSK __constant_cpu_to_le32(1 << 17)
#define STA_FLG_AGG_MPDU_8US_MSK __constant_cpu_to_le32(1 << 18)
#define STA_FLG_MAX_AGG_SIZE_POS (19)
#define STA_FLG_MAX_AGG_SIZE_MSK __constant_cpu_to_le32(3 << 19)
#define STA_FLG_FAT_EN_MSK __constant_cpu_to_le32(1 << 21)
#define STA_FLG_MIMO_DIS_MSK __constant_cpu_to_le32(1 << 22)
#define STA_FLG_AGG_MPDU_DENSITY_POS (23)
#define STA_FLG_AGG_MPDU_DENSITY_MSK __constant_cpu_to_le32(7 << 23)
#define HT_SHORT_GI_20MHZ_ONLY (1 << 0)
#define HT_SHORT_GI_40MHZ_ONLY (1 << 1)
#include "iwl-priv.h"
/* Requires full declaration of iwl_priv before including */
#include "iwl-io.h"
#define IWL_RX_HDR(x) ((struct iwl_rx_frame_hdr *)(\
x->u.rx_frame.stats.payload + \
x->u.rx_frame.stats.phy_count))
#define IWL_RX_END(x) ((struct iwl_rx_frame_end *)(\
IWL_RX_HDR(x)->payload + \
le16_to_cpu(IWL_RX_HDR(x)->len)))
#define IWL_RX_STATS(x) (&x->u.rx_frame.stats)
#define IWL_RX_DATA(x) (IWL_RX_HDR(x)->payload)
/******************************************************************************
*
* Functions implemented in iwl-base.c which are forward declared here
* for use by iwl-*.c
*
*****************************************************************************/
struct iwl_addsta_cmd;
extern int iwl_send_add_station(struct iwl_priv *priv,
struct iwl_addsta_cmd *sta, u8 flags);
extern const char *iwl_get_tx_fail_reason(u32 status);
extern u8 iwl_add_station(struct iwl_priv *priv, const u8 *bssid,
int is_ap, u8 flags);
extern int iwl_is_network_packet(struct iwl_priv *priv,
struct ieee80211_hdr *header);
extern int iwl_power_init_handle(struct iwl_priv *priv);
extern int iwl_eeprom_init(struct iwl_priv *priv);
#ifdef CONFIG_IWLWIFI_DEBUG
extern void iwl_report_frame(struct iwl_priv *priv,
struct iwl_rx_packet *pkt,
struct ieee80211_hdr *header, int group100);
#else
static inline void iwl_report_frame(struct iwl_priv *priv,
struct iwl_rx_packet *pkt,
struct ieee80211_hdr *header,
int group100) {}
#endif
extern int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
struct iwl_tx_queue *txq);
extern void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
struct iwl_rx_mem_buffer *rxb,
void *data, short len,
struct ieee80211_rx_status *stats,
u16 phy_flags);
extern int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr
*header);
extern void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
extern int iwl_rx_queue_alloc(struct iwl_priv *priv);
extern void iwl_rx_queue_reset(struct iwl_priv *priv,
struct iwl_rx_queue *rxq);
extern int iwl_calc_db_from_ratio(int sig_ratio);
extern int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm);
extern int iwl_tx_queue_init(struct iwl_priv *priv,
struct iwl_tx_queue *txq, int count, u32 id);
extern int iwl_rx_queue_restock(struct iwl_priv *priv);
extern void iwl_rx_replenish(void *data);
extern void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq);
extern int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len,
const void *data);
extern int __must_check iwl_send_cmd_async(struct iwl_priv *priv,
struct iwl_host_cmd *cmd);
extern int __must_check iwl_send_cmd_sync(struct iwl_priv *priv,
struct iwl_host_cmd *cmd);
extern int __must_check iwl_send_cmd(struct iwl_priv *priv,
struct iwl_host_cmd *cmd);
extern unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
struct ieee80211_hdr *hdr,
const u8 *dest, int left);
extern int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv,
struct iwl_rx_queue *q);
extern int iwl_send_statistics_request(struct iwl_priv *priv);
extern void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
u32 decrypt_res,
struct ieee80211_rx_status *stats);
extern __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr);
extern const u8 BROADCAST_ADDR[ETH_ALEN];
/*
* Currently used by iwl-3945-rs... look at restructuring so that it doesn't
* call this... todo... fix that.
*/
extern u8 iwl_sync_station(struct iwl_priv *priv, int sta_id,
u16 tx_rate, u8 flags);
static inline int iwl_is_associated(struct iwl_priv *priv)
{
return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
}
/******************************************************************************
*
* Functions implemented in iwl-[34]*.c which are forward declared here
* for use by iwl-base.c
*
* NOTE: The implementation of these functions are hardware specific
* which is why they are in the hardware specific files (vs. iwl-base.c)
*
* Naming convention --
* iwl_ <-- Its part of iwlwifi (should be changed to iwl_)
* iwl_hw_ <-- Hardware specific (implemented in iwl-XXXX.c by all HW)
* iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
* iwl_bg_ <-- Called from work queue context
* iwl_mac_ <-- mac80211 callback
*
****************************************************************************/
extern void iwl_hw_rx_handler_setup(struct iwl_priv *priv);
extern void iwl_hw_setup_deferred_work(struct iwl_priv *priv);
extern void iwl_hw_cancel_deferred_work(struct iwl_priv *priv);
extern int iwl_hw_rxq_stop(struct iwl_priv *priv);
extern int iwl_hw_set_hw_setting(struct iwl_priv *priv);
extern int iwl_hw_nic_init(struct iwl_priv *priv);
extern void iwl_hw_card_show_info(struct iwl_priv *priv);
extern int iwl_hw_nic_stop_master(struct iwl_priv *priv);
extern void iwl_hw_txq_ctx_free(struct iwl_priv *priv);
extern void iwl_hw_txq_ctx_stop(struct iwl_priv *priv);
extern int iwl_hw_nic_reset(struct iwl_priv *priv);
extern int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *tfd,
dma_addr_t addr, u16 len);
extern int iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq);
extern int iwl_hw_get_temperature(struct iwl_priv *priv);
extern int iwl_hw_tx_queue_init(struct iwl_priv *priv,
struct iwl_tx_queue *txq);
extern unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
struct iwl_frame *frame, u8 rate);
extern int iwl_hw_get_rx_read(struct iwl_priv *priv);
extern void iwl_hw_build_tx_cmd_rate(struct iwl_priv *priv,
struct iwl_cmd *cmd,
struct ieee80211_tx_control *ctrl,
struct ieee80211_hdr *hdr,
int sta_id, int tx_id);
extern int iwl_hw_reg_send_txpower(struct iwl_priv *priv);
extern int iwl_hw_reg_set_txpower(struct iwl_priv *priv, s8 power);
extern void iwl_hw_rx_statistics(struct iwl_priv *priv,
struct iwl_rx_mem_buffer *rxb);
extern void iwl_disable_events(struct iwl_priv *priv);
extern int iwl4965_get_temperature(const struct iwl_priv *priv);
/**
* iwl_hw_find_station - Find station id for a given BSSID
* @bssid: MAC address of station ID to find
*
* NOTE: This should not be hardware specific but the code has
* not yet been merged into a single common layer for managing the
* station tables.
*/
extern u8 iwl_hw_find_station(struct iwl_priv *priv, const u8 *bssid);
extern int iwl_hw_channel_switch(struct iwl_priv *priv, u16 channel);
extern int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index);
#endif
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