Merge branch 'defxx-next'

Maciej W. Rozycki says:

====================
defxx: Assorted fixes, mainly for EISA

 This is another small series fixing issues with the defxx driver,
mainly for EISA boards, but there's one patch for PCI as well.

 In the end, with the inexistent second IDE channel forcefully disabled
in the IDE driver, I wasn't able to retrigger spurious IRQ 15 interrupts
I previously saw and suspected the DEFEA to be the cause.  So it looks
to me these were real noise on IRQ 15 rather than the latency in
interrupt acknowledge in the DEFEA board causing the slave 8259A to
issue the spurious interrupt vector.  In any case not an issue with the
defxx driver, so nothing to do here unless the problem resurfaces.

 I haven't seen your announcement about opening net-next since the
closure on Oct 6th, but from the patch traffic and the policy described
in Documentation/networking/netdev-FAQ.txt I gather your tree is open.
And these are bug fixes anyway, not new features, so please apply.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>

drivers/net/fddi/defxx.h

@@ -1481,9 +1481,11 @@ typedef union
 
 #define PI_ESIC_K_CSR_IO_LEN		0x40		/* 64 bytes */
 #define PI_ESIC_K_BURST_HOLDOFF_LEN	0x04		/* 4 bytes */
+#define PI_ESIC_K_ESIC_CSR_LEN		0x40		/* 64 bytes */
 
 #define PI_DEFEA_K_CSR_IO		0x000
 #define PI_DEFEA_K_BURST_HOLDOFF	0x040
+#define PI_ESIC_K_ESIC_CSR		0xC80
 
 #define PI_ESIC_K_SLOT_ID            	0xC80
 #define PI_ESIC_K_SLOT_CNTRL		0xC84
@@ -1556,7 +1558,7 @@ typedef union
 #define PI_BURST_HOLDOFF_V_RESERVED	1
 #define PI_BURST_HOLDOFF_V_MEM_MAP	0
 
-/* Define the implicit mask of the Memory Address Mask Register.  */
+/* Define the implicit mask of the Memory Address Compare registers.  */
 
 #define PI_MEM_ADD_MASK_M		0x3ff