[PATCH] fix m68knommu DragonEngine2 target setup code

Numerous fixes for the m68knommu DragonEngine2 setup code.

It was out of date relative to more recent kernels.  Original patches
from Georges Menie.

arch/m68knommu/platform/68VZ328/de2/config.c

@@ -10,7 +10,6 @@
  * for more details.
  */
 
-#include <stdarg.h>
 #include <linux/config.h>
 #include <linux/types.h>
 #include <linux/kernel.h>
@@ -27,20 +26,29 @@
 #include <asm/machdep.h>
 #include <asm/MC68VZ328.h>
 
-#define CLOCK_COMPARE (32768/HZ)
+#ifdef CONFIG_INIT_LCD
+#include "screen.h"
+#endif
+
+/* with a 33.16 MHz clock, this will give usec resolution to the time functions */
+#define CLOCK_SOURCE TCTL_CLKSOURCE_SYSCLK
+#define CLOCK_PRE 7
+#define TICKS_PER_JIFFY 41450
 
-static void dragen2_sched_init(void (*timer_routine)(int, void *, struct pt_regs *))
+static void
+dragen2_sched_init(void (*timer_routine) (int, void *, struct pt_regs *))
 {
 	/* disable timer 1 */
 	TCTL = 0;
 
 	/* set ISR */
-	request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL);
+	if (request_irq(TMR_IRQ_NUM, timer_routine, IRQ_FLG_LOCK, "timer", NULL)) 
+		panic("Unable to attach timer interrupt\n");
 
-	/* Restart mode, Enable int, 32KHz */
-	TCTL = TCTL_OM | TCTL_IRQEN | TCTL_CLKSOURCE_32KHZ;
-	TPRER = 0;
-	TCMP = CLOCK_COMPARE-1; 
+	/* Restart mode, Enable int, Set clock source */
+	TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
+	TPRER = CLOCK_PRE;
+	TCMP = TICKS_PER_JIFFY;
 
 	/* Enable timer 1 */
 	TCTL |= TCTL_TEN;
@@ -54,55 +62,66 @@ static void dragen2_tick(void)
 
 static unsigned long dragen2_gettimeoffset(void)
 {
-	unsigned long ticks, offset = 0;
+	unsigned long ticks = TCN, offset = 0;
 
-	ticks = TCN;
-
-	if (ticks > (CLOCK_COMPARE>>1)) {
 	/* check for pending interrupt */
-		if (ISR & (1<<TMR_IRQ_NUM))
-			offset = 1000000/HZ;
-	}
+	if (ticks < (TICKS_PER_JIFFY >> 1) && (ISR & (1 << TMR_IRQ_NUM)))
+		offset = 1000000 / HZ;
 
-	ticks = CLOCK_COMPARE - ticks;
-	ticks = (1000000/HZ * ticks) / CLOCK_COMPARE;
+	ticks = (ticks * 1000000 / HZ) / TICKS_PER_JIFFY;
 
 	return ticks + offset;
 }
 
-static void dragen2_gettod(int *year, int *mon, int *day, int *hour, int *min, int *sec)
+static void dragen2_gettod(int *year, int *mon, int *day, int *hour,
+						   int *min, int *sec)
 {
 	long now = RTCTIME;
 
 	*year = *mon = *day = 1;
-	*hour = (now>>24)%24;
-	*min = (now>>16)%60;
-	*sec = now%60;
+	*hour = (now >> 24) % 24;
+	*min = (now >> 16) % 60;
+	*sec = now % 60;
 }
 
 static void dragen2_reset(void)
 {
 	local_irq_disable();
-	asm volatile ("
-		movel #-1, 0xFFFFF304;
-		moveb #0, 0xFFFFF300;
-		moveal #0x04000000, %a0;
-		moveal 0(%a0), %sp;
-		moveal 4(%a0), %a0;
-		jmp (%a0);
-	");
+
+#ifdef CONFIG_INIT_LCD
+	PBDATA |= 0x20;				/* disable CCFL light */
+	PKDATA |= 0x4;				/* disable LCD controller */
+	LCKCON = 0;
+#endif
+
+	__asm__ __volatile__(
+		"reset\n\t"
+		"moveal #0x04000000, %a0\n\t"
+		"moveal 0(%a0), %sp\n\t"
+		"moveal 4(%a0), %a0\n\t"
+		"jmp (%a0)"
+	);
 }
 
 int dragen2_cs8900_setup(struct net_device *dev)
 {
+	static int nbdev = 0;
+
+	if (++nbdev == 1) {
 		/* Set the ETH hardware address from its flash monitor location */
-	memcpy(dev->dev_addr, (void *)0x400fffa, 6);
+		memcpy(dev->dev_addr, (void *) 0x400fffa, 6);
 		dev->irq = INT1_IRQ_NUM;
 		return dev->base_addr = 0x08000041;
+	}
+	return 1;					/* no more interface */
 }
 
 static void init_hardware(void)
 {
+#if CONFIG_DIRECT_IO_ACCESS
+	SCR = 0x10;					/* allow user access to internal registers */
+#endif
+
 	/* CSGB Init */
 	CSGBB = 0x4000;
 	CSB = 0x1a1;
@@ -120,7 +139,7 @@ static void init_hardware(void)
 
 	/* cs8900 hardware reset */
 	PFDATA |= PF(5);
-	{ volatile int i; for (i = 0; i < 32000; ++i); }
+	{ int i; for (i = 0; i < 32000; ++i); }
 	PFDATA &= ~PF(5);
 
 	/* INT1 enable (cs8900 IRQ) */
@@ -130,7 +149,37 @@ static void init_hardware(void)
 
 #ifdef CONFIG_68328_SERIAL_UART2
 	/* Enable RXD TXD port bits to enable UART2 */
-	PJSEL &= ~(PJ(5)|PJ(4));
+	PJSEL &= ~(PJ(5) | PJ(4));
+#endif
+
+#ifdef CONFIG_INIT_LCD
+	/* initialize LCD controller */
+	LSSA = (long) screen_bits;
+	LVPW = 0x14;
+	LXMAX = 0x140;
+	LYMAX = 0xef;
+	LRRA = 0;
+	LPXCD = 3;
+	LPICF = 0x08;
+	LPOLCF = 0;
+	LCKCON = 0x80;
+	PCPDEN = 0xff;
+	PCSEL = 0;
+
+	/* Enable LCD controller */
+	PKDIR |= 0x4;
+	PKSEL |= 0x4;
+	PKDATA &= ~0x4;
+
+	/* Enable CCFL backlighting circuit */
+	PBDIR |= 0x20;
+	PBSEL |= 0x20;
+	PBDATA &= ~0x20;
+
+	/* contrast control register */
+	PFDIR |= 0x1;
+	PFSEL &= ~0x1;
+	PWMR = 0x037F;
 #endif
 }
 
@@ -146,6 +195,4 @@ void config_BSP(char *command, int len)
 	mach_gettimeoffset = dragen2_gettimeoffset;
 	mach_reset = dragen2_reset;
 	mach_gettod = dragen2_gettod;
-
-	config_M68328_irq();
 }