Commit b60e1157 authored by Carlo Caione's avatar Carlo Caione

ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b

Signed-off-by: default avatarCarlo Caione <carlo@endlessm.com>
Reviewed-by: default avatarAndreas Färber <afaerber@suse.de>
Tested-by: default avatarKevin Hilman <khilman@baylibre.com>
parent f55532a0
...@@ -91,8 +91,8 @@ clk81: clk@0 { ...@@ -91,8 +91,8 @@ clk81: clk@0 {
clock-frequency = <141666666>; clock-frequency = <141666666>;
}; };
pinctrl: pinctrl@c1109880 { pinctrl_cbus: pinctrl@c1109880 {
compatible = "amlogic,meson8-pinctrl"; compatible = "amlogic,meson8-cbus-pinctrl";
reg = <0xc1109880 0x10>; reg = <0xc1109880 0x10>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -108,29 +108,6 @@ gpio: banks@c11080b0 { ...@@ -108,29 +108,6 @@ gpio: banks@c11080b0 {
#gpio-cells = <2>; #gpio-cells = <2>;
}; };
gpio_ao: ao-bank@c1108030 {
reg = <0xc8100014 0x4>,
<0xc810002c 0x4>,
<0xc8100024 0x8>;
reg-names = "mux", "pull", "gpio";
gpio-controller;
#gpio-cells = <2>;
};
uart_ao_a_pins: uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";
function = "uart_ao";
};
};
i2c_ao_pins: i2c_mst_ao {
mux {
groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";
function = "i2c_mst_ao";
};
};
spi_nor_pins: nor { spi_nor_pins: nor {
mux { mux {
groups = "nor_d", "nor_q", "nor_c", "nor_cs"; groups = "nor_d", "nor_q", "nor_c", "nor_cs";
...@@ -157,4 +134,34 @@ mux { ...@@ -157,4 +134,34 @@ mux {
}; };
}; };
pinctrl_aobus: pinctrl@c8100084 {
compatible = "amlogic,meson8-aobus-pinctrl";
reg = <0xc8100084 0xc>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio_ao: ao-bank@c1108030 {
reg = <0xc8100014 0x4>,
<0xc810002c 0x4>,
<0xc8100024 0x8>;
reg-names = "mux", "pull", "gpio";
gpio-controller;
#gpio-cells = <2>;
};
uart_ao_a_pins: uart_ao_a {
mux {
groups = "uart_tx_ao_a", "uart_rx_ao_a";
function = "uart_ao";
};
};
i2c_ao_pins: i2c_mst_ao {
mux {
groups = "i2c_mst_sck_ao", "i2c_mst_sda_ao";
function = "i2c_mst_ao";
};
};
};
}; /* end of / */ }; /* end of / */
...@@ -155,8 +155,8 @@ clkc: clock-controller@c1104000 { ...@@ -155,8 +155,8 @@ clkc: clock-controller@c1104000 {
reg = <0xc1108000 0x4>, <0xc1104000 0x460>; reg = <0xc1108000 0x4>, <0xc1104000 0x460>;
}; };
pinctrl: pinctrl@c1109880 { pinctrl_cbus: pinctrl@c1109880 {
compatible = "amlogic,meson8b-pinctrl"; compatible = "amlogic,meson8b-cbus-pinctrl";
reg = <0xc1109880 0x10>; reg = <0xc1109880 0x10>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
...@@ -171,6 +171,14 @@ gpio: banks@c11080b0 { ...@@ -171,6 +171,14 @@ gpio: banks@c11080b0 {
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
}; };
};
pinctrl_aobus: pinctrl@c8100084 {
compatible = "amlogic,meson8b-aobus-pinctrl";
reg = <0xc8100084 0xc>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
gpio_ao: ao-bank@c1108030 { gpio_ao: ao-bank@c1108030 {
reg = <0xc8100014 0x4>, reg = <0xc8100014 0x4>,
......
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