Commit b6fadcad authored by Drew Davenport's avatar Drew Davenport Committed by Rob Clark

drm/msm/dpu: Remove unnecessary NULL check

dpu_encoder_virt.phys_encs[0:num_phys_encs-1] will not be NULL so don't
check.

Also fix multiline strings that caused checkpatch warning.
Signed-off-by: default avatarDrew Davenport <ddavenport@chromium.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 85a8f8ee
...@@ -233,7 +233,7 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc, ...@@ -233,7 +233,7 @@ int dpu_encoder_helper_wait_for_irq(struct dpu_encoder_phys *phys_enc,
u32 irq_status; u32 irq_status;
int ret; int ret;
if (!phys_enc || !wait_info || intr_idx >= INTR_IDX_MAX) { if (!wait_info || intr_idx >= INTR_IDX_MAX) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
return -EINVAL; return -EINVAL;
} }
...@@ -308,7 +308,7 @@ int dpu_encoder_helper_register_irq(struct dpu_encoder_phys *phys_enc, ...@@ -308,7 +308,7 @@ int dpu_encoder_helper_register_irq(struct dpu_encoder_phys *phys_enc,
struct dpu_encoder_irq *irq; struct dpu_encoder_irq *irq;
int ret = 0; int ret = 0;
if (!phys_enc || intr_idx >= INTR_IDX_MAX) { if (intr_idx >= INTR_IDX_MAX) {
DPU_ERROR("invalid params\n"); DPU_ERROR("invalid params\n");
return -EINVAL; return -EINVAL;
} }
...@@ -363,10 +363,6 @@ int dpu_encoder_helper_unregister_irq(struct dpu_encoder_phys *phys_enc, ...@@ -363,10 +363,6 @@ int dpu_encoder_helper_unregister_irq(struct dpu_encoder_phys *phys_enc,
struct dpu_encoder_irq *irq; struct dpu_encoder_irq *irq;
int ret; int ret;
if (!phys_enc) {
DPU_ERROR("invalid encoder\n");
return -EINVAL;
}
irq = &phys_enc->irq[intr_idx]; irq = &phys_enc->irq[intr_idx];
/* silently skip irqs that weren't registered */ /* silently skip irqs that weren't registered */
...@@ -415,7 +411,7 @@ void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc, ...@@ -415,7 +411,7 @@ void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc,
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (phys && phys->ops.get_hw_resources) if (phys->ops.get_hw_resources)
phys->ops.get_hw_resources(phys, hw_res); phys->ops.get_hw_resources(phys, hw_res);
} }
} }
...@@ -438,7 +434,7 @@ static void dpu_encoder_destroy(struct drm_encoder *drm_enc) ...@@ -438,7 +434,7 @@ static void dpu_encoder_destroy(struct drm_encoder *drm_enc)
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (phys && phys->ops.destroy) { if (phys->ops.destroy) {
phys->ops.destroy(phys); phys->ops.destroy(phys);
--dpu_enc->num_phys_encs; --dpu_enc->num_phys_encs;
dpu_enc->phys_encs[i] = NULL; dpu_enc->phys_encs[i] = NULL;
...@@ -464,7 +460,7 @@ void dpu_encoder_helper_split_config( ...@@ -464,7 +460,7 @@ void dpu_encoder_helper_split_config(
struct dpu_hw_mdp *hw_mdptop; struct dpu_hw_mdp *hw_mdptop;
struct msm_display_info *disp_info; struct msm_display_info *disp_info;
if (!phys_enc || !phys_enc->hw_mdptop || !phys_enc->parent) { if (!phys_enc->hw_mdptop || !phys_enc->parent) {
DPU_ERROR("invalid arg(s), encoder %d\n", phys_enc != 0); DPU_ERROR("invalid arg(s), encoder %d\n", phys_enc != 0);
return; return;
} }
...@@ -598,10 +594,10 @@ static int dpu_encoder_virt_atomic_check( ...@@ -598,10 +594,10 @@ static int dpu_encoder_virt_atomic_check(
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (phys && phys->ops.atomic_check) if (phys->ops.atomic_check)
ret = phys->ops.atomic_check(phys, crtc_state, ret = phys->ops.atomic_check(phys, crtc_state,
conn_state); conn_state);
else if (phys && phys->ops.mode_fixup) else if (phys->ops.mode_fixup)
if (!phys->ops.mode_fixup(phys, mode, adj_mode)) if (!phys->ops.mode_fixup(phys, mode, adj_mode))
ret = -EINVAL; ret = -EINVAL;
...@@ -697,7 +693,7 @@ static void _dpu_encoder_irq_control(struct drm_encoder *drm_enc, bool enable) ...@@ -697,7 +693,7 @@ static void _dpu_encoder_irq_control(struct drm_encoder *drm_enc, bool enable)
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (phys && phys->ops.irq_control) if (phys->ops.irq_control)
phys->ops.irq_control(phys, enable); phys->ops.irq_control(phys, enable);
} }
...@@ -1047,16 +1043,15 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, ...@@ -1047,16 +1043,15 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (phys) {
if (!dpu_enc->hw_pp[i]) { if (!dpu_enc->hw_pp[i]) {
DPU_ERROR_ENC(dpu_enc, "no pp block assigned" DPU_ERROR_ENC(dpu_enc,
"at idx: %d\n", i); "no pp block assigned at idx: %d\n", i);
goto error; goto error;
} }
if (!hw_ctl[i]) { if (!hw_ctl[i]) {
DPU_ERROR_ENC(dpu_enc, "no ctl block assigned" DPU_ERROR_ENC(dpu_enc,
"at idx: %d\n", i); "no ctl block assigned at idx: %d\n", i);
goto error; goto error;
} }
...@@ -1078,8 +1073,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, ...@@ -1078,8 +1073,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
if (!phys->hw_intf) { if (!phys->hw_intf) {
DPU_ERROR_ENC(dpu_enc, DPU_ERROR_ENC(dpu_enc,
"no intf block assigned at idx: %d\n", "no intf block assigned at idx: %d\n", i);
i);
goto error; goto error;
} }
...@@ -1087,7 +1081,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, ...@@ -1087,7 +1081,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc,
if (phys->ops.mode_set) if (phys->ops.mode_set)
phys->ops.mode_set(phys, mode, adj_mode); phys->ops.mode_set(phys, mode, adj_mode);
} }
}
dpu_enc->mode_set_complete = true; dpu_enc->mode_set_complete = true;
...@@ -1218,7 +1211,7 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) ...@@ -1218,7 +1211,7 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (phys && phys->ops.disable) if (phys->ops.disable)
phys->ops.disable(phys); phys->ops.disable(phys);
} }
...@@ -1231,7 +1224,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) ...@@ -1231,7 +1224,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc)
dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_STOP); dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_STOP);
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
if (dpu_enc->phys_encs[i])
dpu_enc->phys_encs[i]->connector = NULL; dpu_enc->phys_encs[i]->connector = NULL;
} }
...@@ -1322,7 +1314,7 @@ void dpu_encoder_toggle_vblank_for_crtc(struct drm_encoder *drm_enc, ...@@ -1322,7 +1314,7 @@ void dpu_encoder_toggle_vblank_for_crtc(struct drm_encoder *drm_enc,
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (phys && phys->ops.control_vblank_irq) if (phys->ops.control_vblank_irq)
phys->ops.control_vblank_irq(phys, enable); phys->ops.control_vblank_irq(phys, enable);
} }
} }
...@@ -1478,11 +1470,6 @@ void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc) ...@@ -1478,11 +1470,6 @@ void dpu_encoder_helper_trigger_start(struct dpu_encoder_phys *phys_enc)
{ {
struct dpu_hw_ctl *ctl; struct dpu_hw_ctl *ctl;
if (!phys_enc) {
DPU_ERROR("invalid encoder\n");
return;
}
ctl = phys_enc->hw_ctl; ctl = phys_enc->hw_ctl;
if (ctl->ops.trigger_start) { if (ctl->ops.trigger_start) {
ctl->ops.trigger_start(ctl); ctl->ops.trigger_start(ctl);
...@@ -1521,10 +1508,6 @@ static void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc) ...@@ -1521,10 +1508,6 @@ static void dpu_encoder_helper_hw_reset(struct dpu_encoder_phys *phys_enc)
struct dpu_hw_ctl *ctl; struct dpu_hw_ctl *ctl;
int rc; int rc;
if (!phys_enc) {
DPU_ERROR("invalid encoder\n");
return;
}
dpu_enc = to_dpu_encoder_virt(phys_enc->parent); dpu_enc = to_dpu_encoder_virt(phys_enc->parent);
ctl = phys_enc->hw_ctl; ctl = phys_enc->hw_ctl;
...@@ -1565,7 +1548,7 @@ static void _dpu_encoder_kickoff_phys(struct dpu_encoder_virt *dpu_enc) ...@@ -1565,7 +1548,7 @@ static void _dpu_encoder_kickoff_phys(struct dpu_encoder_virt *dpu_enc)
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (!phys || phys->enable_state == DPU_ENC_DISABLED) if (phys->enable_state == DPU_ENC_DISABLED)
continue; continue;
ctl = phys->hw_ctl; ctl = phys->hw_ctl;
...@@ -1616,7 +1599,6 @@ void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc) ...@@ -1616,7 +1599,6 @@ void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc)
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
phys = dpu_enc->phys_encs[i]; phys = dpu_enc->phys_encs[i];
if (phys) {
ctl = phys->hw_ctl; ctl = phys->hw_ctl;
if (ctl->ops.clear_pending_flush) if (ctl->ops.clear_pending_flush)
ctl->ops.clear_pending_flush(ctl); ctl->ops.clear_pending_flush(ctl);
...@@ -1627,7 +1609,6 @@ void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc) ...@@ -1627,7 +1609,6 @@ void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc)
&& ctl->ops.trigger_pending) && ctl->ops.trigger_pending)
ctl->ops.trigger_pending(ctl); ctl->ops.trigger_pending(ctl);
} }
}
} }
static u32 _dpu_encoder_calculate_linetime(struct dpu_encoder_virt *dpu_enc, static u32 _dpu_encoder_calculate_linetime(struct dpu_encoder_virt *dpu_enc,
...@@ -1786,13 +1767,11 @@ void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc) ...@@ -1786,13 +1767,11 @@ void dpu_encoder_prepare_for_kickoff(struct drm_encoder *drm_enc)
DPU_ATRACE_BEGIN("enc_prepare_for_kickoff"); DPU_ATRACE_BEGIN("enc_prepare_for_kickoff");
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
phys = dpu_enc->phys_encs[i]; phys = dpu_enc->phys_encs[i];
if (phys) {
if (phys->ops.prepare_for_kickoff) if (phys->ops.prepare_for_kickoff)
phys->ops.prepare_for_kickoff(phys); phys->ops.prepare_for_kickoff(phys);
if (phys->enable_state == DPU_ENC_ERR_NEEDS_HW_RESET) if (phys->enable_state == DPU_ENC_ERR_NEEDS_HW_RESET)
needs_hw_reset = true; needs_hw_reset = true;
} }
}
DPU_ATRACE_END("enc_prepare_for_kickoff"); DPU_ATRACE_END("enc_prepare_for_kickoff");
dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_KICKOFF); dpu_encoder_resource_control(drm_enc, DPU_ENC_RC_EVENT_KICKOFF);
...@@ -1832,7 +1811,7 @@ void dpu_encoder_kickoff(struct drm_encoder *drm_enc) ...@@ -1832,7 +1811,7 @@ void dpu_encoder_kickoff(struct drm_encoder *drm_enc)
/* allow phys encs to handle any post-kickoff business */ /* allow phys encs to handle any post-kickoff business */
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
phys = dpu_enc->phys_encs[i]; phys = dpu_enc->phys_encs[i];
if (phys && phys->ops.handle_post_kickoff) if (phys->ops.handle_post_kickoff)
phys->ops.handle_post_kickoff(phys); phys->ops.handle_post_kickoff(phys);
} }
...@@ -1861,7 +1840,7 @@ void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc) ...@@ -1861,7 +1840,7 @@ void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc)
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
phys = dpu_enc->phys_encs[i]; phys = dpu_enc->phys_encs[i];
if (phys && phys->ops.prepare_commit) if (phys->ops.prepare_commit)
phys->ops.prepare_commit(phys); phys->ops.prepare_commit(phys);
} }
} }
...@@ -1876,9 +1855,6 @@ static int _dpu_encoder_status_show(struct seq_file *s, void *data) ...@@ -1876,9 +1855,6 @@ static int _dpu_encoder_status_show(struct seq_file *s, void *data)
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (!phys)
continue;
seq_printf(s, "intf:%d vsync:%8d underrun:%8d ", seq_printf(s, "intf:%d vsync:%8d underrun:%8d ",
phys->intf_idx - INTF_0, phys->intf_idx - INTF_0,
atomic_read(&phys->vsync_cnt), atomic_read(&phys->vsync_cnt),
...@@ -1937,8 +1913,7 @@ static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc) ...@@ -1937,8 +1913,7 @@ static int _dpu_encoder_init_debugfs(struct drm_encoder *drm_enc)
dpu_enc->debugfs_root, dpu_enc, &debugfs_status_fops); dpu_enc->debugfs_root, dpu_enc, &debugfs_status_fops);
for (i = 0; i < dpu_enc->num_phys_encs; i++) for (i = 0; i < dpu_enc->num_phys_encs; i++)
if (dpu_enc->phys_encs[i] && if (dpu_enc->phys_encs[i]->ops.late_register)
dpu_enc->phys_encs[i]->ops.late_register)
dpu_enc->phys_encs[i]->ops.late_register( dpu_enc->phys_encs[i]->ops.late_register(
dpu_enc->phys_encs[i], dpu_enc->phys_encs[i],
dpu_enc->debugfs_root); dpu_enc->debugfs_root);
...@@ -2107,12 +2082,9 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc, ...@@ -2107,12 +2082,9 @@ static int dpu_encoder_setup_display(struct dpu_encoder_virt *dpu_enc,
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (phys) {
atomic_set(&phys->vsync_cnt, 0); atomic_set(&phys->vsync_cnt, 0);
atomic_set(&phys->underrun_cnt, 0); atomic_set(&phys->underrun_cnt, 0);
} }
}
mutex_unlock(&dpu_enc->enc_lock); mutex_unlock(&dpu_enc->enc_lock);
return ret; return ret;
...@@ -2253,8 +2225,6 @@ int dpu_encoder_wait_for_event(struct drm_encoder *drm_enc, ...@@ -2253,8 +2225,6 @@ int dpu_encoder_wait_for_event(struct drm_encoder *drm_enc,
for (i = 0; i < dpu_enc->num_phys_encs; i++) { for (i = 0; i < dpu_enc->num_phys_encs; i++) {
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
if (!phys)
continue;
switch (event) { switch (event) {
case MSM_ENC_COMMIT_DONE: case MSM_ENC_COMMIT_DONE:
...@@ -2287,7 +2257,6 @@ int dpu_encoder_wait_for_event(struct drm_encoder *drm_enc, ...@@ -2287,7 +2257,6 @@ int dpu_encoder_wait_for_event(struct drm_encoder *drm_enc,
enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder) enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder)
{ {
struct dpu_encoder_virt *dpu_enc = NULL; struct dpu_encoder_virt *dpu_enc = NULL;
int i;
if (!encoder) { if (!encoder) {
DPU_ERROR("invalid encoder\n"); DPU_ERROR("invalid encoder\n");
...@@ -2298,12 +2267,8 @@ enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder) ...@@ -2298,12 +2267,8 @@ enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder)
if (dpu_enc->cur_master) if (dpu_enc->cur_master)
return dpu_enc->cur_master->intf_mode; return dpu_enc->cur_master->intf_mode;
for (i = 0; i < dpu_enc->num_phys_encs; i++) { if (dpu_enc->num_phys_encs)
struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; return dpu_enc->phys_encs[0]->intf_mode;
if (phys)
return phys->intf_mode;
}
return INTF_MODE_NONE; return INTF_MODE_NONE;
} }
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