Commit b8f114db authored by Jon Loeliger's avatar Jon Loeliger Committed by Paul Mackerras

[PATCH] powerpc: Merge asm-ppc*/dma.h

This merges the asm-ppc*/dma.h files.
Signed-off-by: default avatarJon Loeliger <jdl@freescale.com>
Signed-off-by: default avatarKumar Gala <kumar.gala@freescale.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent e903c5b5
...@@ -71,7 +71,8 @@ struct ide_machdep_calls ppc_ide_md; ...@@ -71,7 +71,8 @@ struct ide_machdep_calls ppc_ide_md;
unsigned long boot_mem_size; unsigned long boot_mem_size;
unsigned long ISA_DMA_THRESHOLD; unsigned long ISA_DMA_THRESHOLD;
unsigned long DMA_MODE_READ, DMA_MODE_WRITE; unsigned int DMA_MODE_READ;
unsigned int DMA_MODE_WRITE;
#ifdef CONFIG_PPC_MULTIPLATFORM #ifdef CONFIG_PPC_MULTIPLATFORM
int _machine = 0; int _machine = 0;
......
#ifndef _ASM_POWERPC_DMA_H
#define _ASM_POWERPC_DMA_H
/* /*
* include/asm-ppc/dma.h: Defines for using and allocating dma channels. * Defines for using and allocating dma channels.
* Written by Hennus Bergman, 1992. * Written by Hennus Bergman, 1992.
* High DMA channel support & info by Hannu Savolainen * High DMA channel support & info by Hannu Savolainen
* and John Boyd, Nov. 1992. * and John Boyd, Nov. 1992.
* Changes for ppc sound by Christoph Nadig * Changes for ppc sound by Christoph Nadig
*/ */
#ifdef __KERNEL__
#include <linux/config.h>
#include <asm/io.h>
#include <linux/spinlock.h>
#include <asm/system.h>
/* /*
* Note: Adapted for PowerPC by Gary Thomas * Note: Adapted for PowerPC by Gary Thomas
* Modified by Cort Dougan <cort@cs.nmt.edu> * Modified by Cort Dougan <cort@cs.nmt.edu>
...@@ -25,8 +21,10 @@ ...@@ -25,8 +21,10 @@
* with a grain of salt. * with a grain of salt.
*/ */
#ifndef _ASM_DMA_H #include <linux/config.h>
#define _ASM_DMA_H #include <asm/io.h>
#include <linux/spinlock.h>
#include <asm/system.h>
#ifndef MAX_DMA_CHANNELS #ifndef MAX_DMA_CHANNELS
#define MAX_DMA_CHANNELS 8 #define MAX_DMA_CHANNELS 8
...@@ -34,11 +32,9 @@ ...@@ -34,11 +32,9 @@
/* The maximum address that we can perform a DMA transfer to on this platform */ /* The maximum address that we can perform a DMA transfer to on this platform */
/* Doesn't really apply... */ /* Doesn't really apply... */
#define MAX_DMA_ADDRESS 0xFFFFFFFF #define MAX_DMA_ADDRESS (~0UL)
/* in arch/ppc/kernel/setup.c -- Cort */ #if !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI)
extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
extern unsigned long ISA_DMA_THRESHOLD;
#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER #ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
#define dma_outb outb_p #define dma_outb outb_p
...@@ -171,7 +167,18 @@ extern long ppc_cs4232_dma, ppc_cs4232_dma2; ...@@ -171,7 +167,18 @@ extern long ppc_cs4232_dma, ppc_cs4232_dma2;
#define DMA1_EXT_REG 0x40B #define DMA1_EXT_REG 0x40B
#define DMA2_EXT_REG 0x4D6 #define DMA2_EXT_REG 0x4D6
#ifndef __powerpc64__
/* in arch/ppc/kernel/setup.c -- Cort */
extern unsigned int DMA_MODE_WRITE;
extern unsigned int DMA_MODE_READ;
extern unsigned long ISA_DMA_THRESHOLD;
#else
#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
#endif
#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */ #define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
#define DMA_AUTOINIT 0x10 #define DMA_AUTOINIT 0x10
extern spinlock_t dma_spin_lock; extern spinlock_t dma_spin_lock;
...@@ -200,8 +207,9 @@ static __inline__ void enable_dma(unsigned int dmanr) ...@@ -200,8 +207,9 @@ static __inline__ void enable_dma(unsigned int dmanr)
if (dmanr <= 3) { if (dmanr <= 3) {
dma_outb(dmanr, DMA1_MASK_REG); dma_outb(dmanr, DMA1_MASK_REG);
dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */ dma_outb(ucDmaCmd, DMA1_CMD_REG); /* Enable group */
} else } else {
dma_outb(dmanr & 3, DMA2_MASK_REG); dma_outb(dmanr & 3, DMA2_MASK_REG);
}
} }
static __inline__ void disable_dma(unsigned int dmanr) static __inline__ void disable_dma(unsigned int dmanr)
...@@ -290,19 +298,26 @@ static __inline__ void set_dma_page(unsigned int dmanr, int pagenr) ...@@ -290,19 +298,26 @@ static __inline__ void set_dma_page(unsigned int dmanr, int pagenr)
static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys) static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int phys)
{ {
if (dmanr <= 3) { if (dmanr <= 3) {
dma_outb(phys & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); dma_outb(phys & 0xff,
dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); ((dmanr & 3) << 1) + IO_DMA1_BASE);
dma_outb((phys >> 8) & 0xff,
((dmanr & 3) << 1) + IO_DMA1_BASE);
} else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) { } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
dma_outb(phys & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); dma_outb(phys & 0xff,
dma_outb((phys >> 8) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); ((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((phys >> 8) & 0xff,
((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((dmanr & 3), DMA2_EXT_REG); dma_outb((dmanr & 3), DMA2_EXT_REG);
} else { } else {
dma_outb((phys >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); dma_outb((phys >> 1) & 0xff,
dma_outb((phys >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); ((dmanr & 3) << 2) + IO_DMA2_BASE);
dma_outb((phys >> 9) & 0xff,
((dmanr & 3) << 2) + IO_DMA2_BASE);
} }
set_dma_page(dmanr, phys >> 16); set_dma_page(dmanr, phys >> 16);
} }
/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for /* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
* a specific DMA channel. * a specific DMA channel.
* You must ensure the parameters are valid. * You must ensure the parameters are valid.
...@@ -315,21 +330,24 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) ...@@ -315,21 +330,24 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
{ {
count--; count--;
if (dmanr <= 3) { if (dmanr <= 3) {
dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); dma_outb(count & 0xff,
dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 1) + 1 + ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
IO_DMA1_BASE); dma_outb((count >> 8) & 0xff,
((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
} else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) { } else if (dmanr == SND_DMA1 || dmanr == SND_DMA2) {
dma_outb(count & 0xff, ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); dma_outb(count & 0xff,
dma_outb((count >> 8) & 0xff, ((dmanr & 3) << 2) + 2 + ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
IO_DMA2_BASE); dma_outb((count >> 8) & 0xff,
((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
} else { } else {
dma_outb((count >> 1) & 0xff, ((dmanr & 3) << 2) + 2 + dma_outb((count >> 1) & 0xff,
IO_DMA2_BASE); ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
dma_outb((count >> 9) & 0xff, ((dmanr & 3) << 2) + 2 + dma_outb((count >> 9) & 0xff,
IO_DMA2_BASE); ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
} }
} }
/* Get DMA residue count. After a DMA transfer, this /* Get DMA residue count. After a DMA transfer, this
* should return zero. Reading this while a DMA transfer is * should return zero. Reading this while a DMA transfer is
* still in progress will return unpredictable results. * still in progress will return unpredictable results.
...@@ -340,8 +358,8 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) ...@@ -340,8 +358,8 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
*/ */
static __inline__ int get_dma_residue(unsigned int dmanr) static __inline__ int get_dma_residue(unsigned int dmanr)
{ {
unsigned int io_port = (dmanr <= 3) ? unsigned int io_port = (dmanr <= 3)
((dmanr & 3) << 1) + 1 + IO_DMA1_BASE ? ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE
: ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE; : ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE;
/* using short to get 16-bit wrap around */ /* using short to get 16-bit wrap around */
...@@ -352,7 +370,6 @@ static __inline__ int get_dma_residue(unsigned int dmanr) ...@@ -352,7 +370,6 @@ static __inline__ int get_dma_residue(unsigned int dmanr)
return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2) return (dmanr <= 3 || dmanr == SND_DMA1 || dmanr == SND_DMA2)
? count : (count << 1); ? count : (count << 1);
} }
/* These are in kernel/dma.c: */ /* These are in kernel/dma.c: */
...@@ -367,5 +384,7 @@ extern int isa_dma_bridge_buggy; ...@@ -367,5 +384,7 @@ extern int isa_dma_bridge_buggy;
#else #else
#define isa_dma_bridge_buggy (0) #define isa_dma_bridge_buggy (0)
#endif #endif
#endif /* _ASM_DMA_H */
#endif /* __KERNEL__ */ #endif /* !defined(CONFIG_PPC_ISERIES) || defined(CONFIG_PCI) */
#endif /* _ASM_POWERPC_DMA_H */
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