Commit b9e25ace authored by eric miao's avatar eric miao Committed by Russell King

[ARM] pxa: merge assignment of set_wake into pxa_init_{irq,gpio}()

To further clean up the GPIO and IRQ structure:

1. pxa_init_irq_gpio() and pxa_init_gpio() combines into a single
   function pxa_init_gpio()

2. assignment of set_wake merged into pxa_init_{irq,gpio}() as
   an argument
Signed-off-by: default avatareric miao <eric.miao@marvell.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent f6fb7af4
...@@ -9,14 +9,13 @@ ...@@ -9,14 +9,13 @@
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
typedef int (*set_wake_t)(unsigned int, unsigned int);
struct sys_timer; struct sys_timer;
extern struct sys_timer pxa_timer; extern struct sys_timer pxa_timer;
extern void __init pxa_init_irq(int irq_nr); extern void __init pxa_init_irq(int irq_nr, set_wake_t fn);
extern void __init pxa_init_irq_gpio(int gpio_nr); extern void __init pxa_init_gpio(int gpio_nr, set_wake_t fn);
extern void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int));
extern void __init pxa_init_gpio_set_wake(int (*set_wake)(unsigned int, unsigned int));
extern void __init pxa_init_gpio(int gpio_nr);
extern void __init pxa25x_init_irq(void); extern void __init pxa25x_init_irq(void);
extern void __init pxa27x_init_irq(void); extern void __init pxa27x_init_irq(void);
extern void __init pxa3xx_init_irq(void); extern void __init pxa3xx_init_irq(void);
......
...@@ -153,20 +153,6 @@ static struct pxa_gpio_chip pxa_gpio_chip[] = { ...@@ -153,20 +153,6 @@ static struct pxa_gpio_chip pxa_gpio_chip[] = {
#endif #endif
}; };
void __init pxa_init_gpio(int gpio_nr)
{
int i;
/* add a GPIO chip for each register bank.
* the last PXA25x register only contains 21 GPIOs
*/
for (i = 0; i < gpio_nr; i += 32) {
if (i+32 > gpio_nr)
pxa_gpio_chip[i/32].chip.ngpio = gpio_nr - i;
gpiochip_add(&pxa_gpio_chip[i/32].chip);
}
}
/* /*
* PXA GPIO edge detection for IRQs: * PXA GPIO edge detection for IRQs:
* IRQs are generated on Falling-Edge, Rising-Edge, or both. * IRQs are generated on Falling-Edge, Rising-Edge, or both.
...@@ -309,9 +295,9 @@ static struct irq_chip pxa_muxed_gpio_chip = { ...@@ -309,9 +295,9 @@ static struct irq_chip pxa_muxed_gpio_chip = {
.set_type = pxa_gpio_irq_type, .set_type = pxa_gpio_irq_type,
}; };
void __init pxa_init_irq_gpio(int gpio_nr) void __init pxa_init_gpio(int gpio_nr, set_wake_t fn)
{ {
int irq, i; int irq, i, gpio;
pxa_last_gpio = gpio_nr - 1; pxa_last_gpio = gpio_nr - 1;
...@@ -340,11 +326,15 @@ void __init pxa_init_irq_gpio(int gpio_nr) ...@@ -340,11 +326,15 @@ void __init pxa_init_irq_gpio(int gpio_nr)
/* Install handler for GPIO>=2 edge detect interrupts */ /* Install handler for GPIO>=2 edge detect interrupts */
set_irq_chained_handler(IRQ_GPIO_2_x, pxa_gpio_demux_handler); set_irq_chained_handler(IRQ_GPIO_2_x, pxa_gpio_demux_handler);
pxa_init_gpio(gpio_nr); pxa_low_gpio_chip.set_wake = fn;
} pxa_muxed_gpio_chip.set_wake = fn;
void __init pxa_init_gpio_set_wake(int (*set_wake)(unsigned int, unsigned int)) /* add a GPIO chip for each register bank.
{ * the last PXA25x register only contains 21 GPIOs
pxa_low_gpio_chip.set_wake = set_wake; */
pxa_muxed_gpio_chip.set_wake = set_wake; for (gpio = 0, i = 0; gpio < gpio_nr; gpio += 32, i++) {
if (gpio + 32 > gpio_nr)
pxa_gpio_chip[i].chip.ngpio = gpio_nr - gpio;
gpiochip_add(&pxa_gpio_chip[i].chip);
}
} }
...@@ -51,7 +51,7 @@ static struct irq_chip pxa_internal_irq_chip = { ...@@ -51,7 +51,7 @@ static struct irq_chip pxa_internal_irq_chip = {
.unmask = pxa_unmask_irq, .unmask = pxa_unmask_irq,
}; };
void __init pxa_init_irq(int irq_nr) void __init pxa_init_irq(int irq_nr, set_wake_t fn)
{ {
int irq; int irq;
...@@ -70,12 +70,8 @@ void __init pxa_init_irq(int irq_nr) ...@@ -70,12 +70,8 @@ void __init pxa_init_irq(int irq_nr)
set_irq_handler(irq, handle_level_irq); set_irq_handler(irq, handle_level_irq);
set_irq_flags(irq, IRQF_VALID); set_irq_flags(irq, IRQF_VALID);
} }
}
void __init pxa_init_irq_set_wake(int (*set_wake)(unsigned int, unsigned int)) pxa_internal_irq_chip.set_wake = fn;
{
pxa_internal_irq_chip.set_wake = set_wake;
pxa_init_gpio_set_wake(set_wake);
} }
#ifdef CONFIG_PM #ifdef CONFIG_PM
......
...@@ -267,9 +267,8 @@ static int pxa25x_set_wake(unsigned int irq, unsigned int on) ...@@ -267,9 +267,8 @@ static int pxa25x_set_wake(unsigned int irq, unsigned int on)
void __init pxa25x_init_irq(void) void __init pxa25x_init_irq(void)
{ {
pxa_init_irq(32); pxa_init_irq(32, pxa25x_set_wake);
pxa_init_irq_gpio(85); pxa_init_gpio(85, pxa25x_set_wake);
pxa_init_irq_set_wake(pxa25x_set_wake);
} }
static struct platform_device *pxa25x_devices[] __initdata = { static struct platform_device *pxa25x_devices[] __initdata = {
......
...@@ -340,9 +340,8 @@ static int pxa27x_set_wake(unsigned int irq, unsigned int on) ...@@ -340,9 +340,8 @@ static int pxa27x_set_wake(unsigned int irq, unsigned int on)
void __init pxa27x_init_irq(void) void __init pxa27x_init_irq(void)
{ {
pxa_init_irq(34); pxa_init_irq(34, pxa27x_set_wake);
pxa_init_irq_gpio(128); pxa_init_gpio(128, pxa27x_set_wake);
pxa_init_irq_set_wake(pxa27x_set_wake);
} }
/* /*
......
...@@ -494,15 +494,9 @@ static int pxa3xx_set_wake(unsigned int irq, unsigned int on) ...@@ -494,15 +494,9 @@ static int pxa3xx_set_wake(unsigned int irq, unsigned int on)
return 0; return 0;
} }
static void pxa3xx_init_irq_pm(void)
{
pxa_init_irq_set_wake(pxa3xx_set_wake);
}
#else #else
static inline void pxa3xx_init_pm(void) {} static inline void pxa3xx_init_pm(void) {}
static inline void pxa3xx_init_irq_pm(void) {} #define pxa3xx_set_wake NULL
#endif #endif
void __init pxa3xx_init_irq(void) void __init pxa3xx_init_irq(void)
...@@ -513,9 +507,8 @@ void __init pxa3xx_init_irq(void) ...@@ -513,9 +507,8 @@ void __init pxa3xx_init_irq(void)
value |= (1 << 6); value |= (1 << 6);
__asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value)); __asm__ __volatile__("mcr p15, 0, %0, c15, c1, 0\n": :"r"(value));
pxa_init_irq(56); pxa_init_irq(56, pxa3xx_set_wake);
pxa_init_irq_gpio(128); pxa_init_gpio(128, NULL);
pxa3xx_init_irq_pm();
} }
/* /*
......
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