Commit be8bf986 authored by Alexandre Belloni's avatar Alexandre Belloni

rtc: at91sam9: correct trivial checkpatch warnings

Correct trivial checkpatch warnings, mostly whitespace issues and
unbalanced braces.
Acked-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@bootlin.com>
parent bc40072d
......@@ -44,10 +44,10 @@
*/
#define AT91_RTT_MR 0x00 /* Real-time Mode Register */
#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */
#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */
#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */
#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */
#define AT91_RTT_RTPRES (0xffff << 0) /* Timer Prescaler Value */
#define AT91_RTT_ALMIEN BIT(16) /* Alarm Interrupt Enable */
#define AT91_RTT_RTTINCIEN BIT(17) /* Increment Interrupt Enable */
#define AT91_RTT_RTTRST BIT(18) /* Timer Restart */
#define AT91_RTT_AR 0x04 /* Real-time Alarm Register */
#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */
......@@ -56,8 +56,8 @@
#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */
#define AT91_RTT_SR 0x0c /* Real-time Status Register */
#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */
#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */
#define AT91_RTT_ALMS BIT(0) /* Alarm Status */
#define AT91_RTT_RTTINC BIT(1) /* Timer Increment */
/*
* We store ALARM_DISABLED in ALMV to record that no alarm is set.
......@@ -65,7 +65,6 @@
*/
#define ALARM_DISABLED ((u32)~0)
struct sam9_rtc {
void __iomem *rtt;
struct rtc_device *rtcdev;
......@@ -494,9 +493,10 @@ static int at91_rtc_suspend(struct device *dev)
/* don't let RTTINC cause wakeups */
if (mr & AT91_RTT_RTTINCIEN)
rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
} else
} else {
rtt_writel(rtc, MR, mr & ~rtc->imr);
}
}
return 0;
}
......
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