Commit c1874ed7 authored by Imre Deak's avatar Imre Deak Committed by Daniel Vetter

drm/i915: factor out valleyview_pipestat_irq_handler

This will be used by other platforms too, so factor it out.

The only functional change is the reordeing of gmbus_irq_handler() wrt.
the hotplug handling, but since it only schedules a work, it isn't an
issue.
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Don't keep on using the private_t typedef.]
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent b7e634cc
...@@ -1477,27 +1477,12 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir) ...@@ -1477,27 +1477,12 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
} }
} }
static irqreturn_t valleyview_irq_handler(int irq, void *arg) static void valleyview_pipestat_irq_handler(struct drm_device *dev, u32 iir)
{ {
struct drm_device *dev = (struct drm_device *) arg; struct drm_i915_private *dev_priv = dev->dev_private;
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; u32 pipe_stats[I915_MAX_PIPES];
u32 iir, gt_iir, pm_iir;
irqreturn_t ret = IRQ_NONE;
unsigned long irqflags; unsigned long irqflags;
int pipe; int pipe;
u32 pipe_stats[I915_MAX_PIPES];
while (true) {
iir = I915_READ(VLV_IIR);
gt_iir = I915_READ(GTIIR);
pm_iir = I915_READ(GEN6_PMIIR);
if (gt_iir == 0 && pm_iir == 0 && iir == 0)
goto out;
ret = IRQ_HANDLED;
snb_gt_irq_handler(dev, dev_priv, gt_iir);
spin_lock_irqsave(&dev_priv->irq_lock, irqflags); spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
for_each_pipe(pipe) { for_each_pipe(pipe) {
...@@ -1529,6 +1514,31 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) ...@@ -1529,6 +1514,31 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
DRM_ERROR("pipe %c underrun\n", pipe_name(pipe)); DRM_ERROR("pipe %c underrun\n", pipe_name(pipe));
} }
if (pipe_stats[0] & PIPE_GMBUS_INTERRUPT_STATUS)
gmbus_irq_handler(dev);
}
static irqreturn_t valleyview_irq_handler(int irq, void *arg)
{
struct drm_device *dev = (struct drm_device *) arg;
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
u32 iir, gt_iir, pm_iir;
irqreturn_t ret = IRQ_NONE;
while (true) {
iir = I915_READ(VLV_IIR);
gt_iir = I915_READ(GTIIR);
pm_iir = I915_READ(GEN6_PMIIR);
if (gt_iir == 0 && pm_iir == 0 && iir == 0)
goto out;
ret = IRQ_HANDLED;
snb_gt_irq_handler(dev, dev_priv, gt_iir);
valleyview_pipestat_irq_handler(dev, iir);
/* Consume port. Then clear IIR or we'll miss events */ /* Consume port. Then clear IIR or we'll miss events */
if (iir & I915_DISPLAY_PORT_INTERRUPT) { if (iir & I915_DISPLAY_PORT_INTERRUPT) {
u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT); u32 hotplug_status = I915_READ(PORT_HOTPLUG_STAT);
...@@ -1543,8 +1553,6 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg) ...@@ -1543,8 +1553,6 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
I915_READ(PORT_HOTPLUG_STAT); I915_READ(PORT_HOTPLUG_STAT);
} }
if (pipe_stats[0] & PIPE_GMBUS_INTERRUPT_STATUS)
gmbus_irq_handler(dev);
if (pm_iir) if (pm_iir)
gen6_rps_irq_handler(dev_priv, pm_iir); gen6_rps_irq_handler(dev_priv, pm_iir);
......
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