Commit c39ff03a authored by Ezequiel Garcia's avatar Ezequiel Garcia Committed by Brian Norris

mtd: nand: pxa3xx: Split prepare_command_pool() in two stages

This commit splits the prepare_command_pool() function into two
stages: prepare_start_command() / prepare_set_command().

This is a preparation patch without any functionality changes,
and is meant to allow support for multiple page reading/writing
operations.
Signed-off-by: default avatarEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: default avatarDaniel Mack <zonque@gmail.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 01d9947e
...@@ -603,18 +603,8 @@ static void set_command_address(struct pxa3xx_nand_info *info, ...@@ -603,18 +603,8 @@ static void set_command_address(struct pxa3xx_nand_info *info,
} }
} }
static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, static void prepare_start_command(struct pxa3xx_nand_info *info, int command)
uint16_t column, int page_addr)
{ {
int addr_cycle, exec_cmd;
struct pxa3xx_nand_host *host;
struct mtd_info *mtd;
host = info->host[info->cs];
mtd = host->mtd;
addr_cycle = 0;
exec_cmd = 1;
/* reset data and oob column point to handle data */ /* reset data and oob column point to handle data */
info->buf_start = 0; info->buf_start = 0;
info->buf_count = 0; info->buf_count = 0;
...@@ -623,10 +613,6 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, ...@@ -623,10 +613,6 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command,
info->use_spare = 1; info->use_spare = 1;
info->retcode = ERR_NONE; info->retcode = ERR_NONE;
info->ndcb3 = 0; info->ndcb3 = 0;
if (info->cs != 0)
info->ndcb0 = NDCB0_CSEL;
else
info->ndcb0 = 0;
switch (command) { switch (command) {
case NAND_CMD_READ0: case NAND_CMD_READ0:
...@@ -638,14 +624,32 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, ...@@ -638,14 +624,32 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command,
case NAND_CMD_PARAM: case NAND_CMD_PARAM:
info->use_spare = 0; info->use_spare = 0;
break; break;
case NAND_CMD_SEQIN:
exec_cmd = 0;
break;
default: default:
info->ndcb1 = 0; info->ndcb1 = 0;
info->ndcb2 = 0; info->ndcb2 = 0;
break; break;
} }
}
static int prepare_set_command(struct pxa3xx_nand_info *info, int command,
uint16_t column, int page_addr)
{
int addr_cycle, exec_cmd;
struct pxa3xx_nand_host *host;
struct mtd_info *mtd;
host = info->host[info->cs];
mtd = host->mtd;
addr_cycle = 0;
exec_cmd = 1;
if (info->cs != 0)
info->ndcb0 = NDCB0_CSEL;
else
info->ndcb0 = 0;
if (command == NAND_CMD_SEQIN)
exec_cmd = 0;
addr_cycle = NDCB0_ADDR_CYC(host->row_addr_cycles addr_cycle = NDCB0_ADDR_CYC(host->row_addr_cycles
+ host->col_addr_cycles); + host->col_addr_cycles);
...@@ -780,8 +784,10 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command, ...@@ -780,8 +784,10 @@ static void pxa3xx_nand_cmdfunc(struct mtd_info *mtd, unsigned command,
nand_writel(info, NDTR1CS0, info->ndtr1cs0); nand_writel(info, NDTR1CS0, info->ndtr1cs0);
} }
prepare_start_command(info, command);
info->state = STATE_PREPARED; info->state = STATE_PREPARED;
exec_cmd = prepare_command_pool(info, command, column, page_addr); exec_cmd = prepare_set_command(info, command, column, page_addr);
if (exec_cmd) { if (exec_cmd) {
init_completion(&info->cmd_complete); init_completion(&info->cmd_complete);
init_completion(&info->dev_ready); init_completion(&info->dev_ready);
......
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