Commit c6978369 authored by Hidetoshi Seto's avatar Hidetoshi Seto Committed by H. Peter Anvin

x86, mce: make mce_disabled boolean

The mce_disabled on 32bit is a tristate variable [1,0,-1],
while 64bit version is boolean [0,1].
This patch makes mce_disabled always boolean, and use mce_p5_enabled
to indicate the third state instead.
Signed-off-by: default avatarHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@zytor.com>
parent 9e55e44e
...@@ -107,6 +107,7 @@ struct mce_log { ...@@ -107,6 +107,7 @@ struct mce_log {
#include <asm/atomic.h> #include <asm/atomic.h>
extern int mce_disabled; extern int mce_disabled;
extern int mce_p5_enabled;
#ifdef CONFIG_X86_OLD_MCE #ifdef CONFIG_X86_OLD_MCE
void amd_mcheck_init(struct cpuinfo_x86 *c); void amd_mcheck_init(struct cpuinfo_x86 *c);
...@@ -117,14 +118,11 @@ void intel_p6_mcheck_init(struct cpuinfo_x86 *c); ...@@ -117,14 +118,11 @@ void intel_p6_mcheck_init(struct cpuinfo_x86 *c);
#ifdef CONFIG_X86_ANCIENT_MCE #ifdef CONFIG_X86_ANCIENT_MCE
void intel_p5_mcheck_init(struct cpuinfo_x86 *c); void intel_p5_mcheck_init(struct cpuinfo_x86 *c);
void winchip_mcheck_init(struct cpuinfo_x86 *c); void winchip_mcheck_init(struct cpuinfo_x86 *c);
extern int mce_p5_enable; static inline void enable_p5_mce(void) { mce_p5_enabled = 1; }
static inline int mce_p5_enabled(void) { return mce_p5_enable; }
static inline void enable_p5_mce(void) { mce_p5_enable = 1; }
#else #else
static inline void intel_p5_mcheck_init(struct cpuinfo_x86 *c) {} static inline void intel_p5_mcheck_init(struct cpuinfo_x86 *c) {}
static inline void winchip_mcheck_init(struct cpuinfo_x86 *c) {} static inline void winchip_mcheck_init(struct cpuinfo_x86 *c) {}
static inline int mce_p5_enabled(void) { return 0; } static inline void enable_p5_mce(void) {}
static inline void enable_p5_mce(void) { }
#endif #endif
/* Call the installed machine check handler for this CPU setup. */ /* Call the installed machine check handler for this CPU setup. */
......
...@@ -1286,7 +1286,6 @@ static void __cpuinit mce_ancient_init(struct cpuinfo_x86 *c) ...@@ -1286,7 +1286,6 @@ static void __cpuinit mce_ancient_init(struct cpuinfo_x86 *c)
return; return;
switch (c->x86_vendor) { switch (c->x86_vendor) {
case X86_VENDOR_INTEL: case X86_VENDOR_INTEL:
if (mce_p5_enabled())
intel_p5_mcheck_init(c); intel_p5_mcheck_init(c);
break; break;
case X86_VENDOR_CENTAUR: case X86_VENDOR_CENTAUR:
...@@ -2002,7 +2001,7 @@ EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */ ...@@ -2002,7 +2001,7 @@ EXPORT_SYMBOL_GPL(nr_mce_banks); /* non-fatal.o */
/* This has to be run for each processor */ /* This has to be run for each processor */
void mcheck_init(struct cpuinfo_x86 *c) void mcheck_init(struct cpuinfo_x86 *c)
{ {
if (mce_disabled == 1) if (mce_disabled)
return; return;
switch (c->x86_vendor) { switch (c->x86_vendor) {
...@@ -2032,10 +2031,9 @@ void mcheck_init(struct cpuinfo_x86 *c) ...@@ -2032,10 +2031,9 @@ void mcheck_init(struct cpuinfo_x86 *c)
static int __init mcheck_enable(char *str) static int __init mcheck_enable(char *str)
{ {
mce_disabled = -1; mce_p5_enabled = 1;
return 1; return 1;
} }
__setup("mce", mcheck_enable); __setup("mce", mcheck_enable);
#endif /* CONFIG_X86_OLD_MCE */ #endif /* CONFIG_X86_OLD_MCE */
......
...@@ -14,7 +14,7 @@ ...@@ -14,7 +14,7 @@
#include <asm/msr.h> #include <asm/msr.h>
/* By default disabled */ /* By default disabled */
int mce_p5_enable; int mce_p5_enabled __read_mostly;
/* Machine check handler for Pentium class Intel CPUs: */ /* Machine check handler for Pentium class Intel CPUs: */
static void pentium_machine_check(struct pt_regs *regs, long error_code) static void pentium_machine_check(struct pt_regs *regs, long error_code)
...@@ -42,15 +42,13 @@ void intel_p5_mcheck_init(struct cpuinfo_x86 *c) ...@@ -42,15 +42,13 @@ void intel_p5_mcheck_init(struct cpuinfo_x86 *c)
{ {
u32 l, h; u32 l, h;
/* Check for MCE support: */ /* Default P5 to off as its often misconnected: */
if (!cpu_has(c, X86_FEATURE_MCE)) if (!mce_p5_enabled)
return; return;
#ifdef CONFIG_X86_OLD_MCE /* Check for MCE support: */
/* Default P5 to off as its often misconnected: */ if (!cpu_has(c, X86_FEATURE_MCE))
if (mce_disabled != -1)
return; return;
#endif
machine_check_vector = pentium_machine_check; machine_check_vector = pentium_machine_check;
/* Make sure the vector pointer is visible before we enable MCEs: */ /* Make sure the vector pointer is visible before we enable MCEs: */
......
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