Commit c86c5a91 authored by Nobuhiro Iwamatsu's avatar Nobuhiro Iwamatsu Committed by Paul Mundt

sh: L-BOX RE2 support.

This adds support for the L-BOX RE2 router.

	http://www.nttcom.co.jp/l-box/

L-BOX RE2 is a SH7751R-based router. It has CF, Cardbus, serial,
and LAN x2. This is one of the very few SH boards that a general
person can obtain now.

The L-BOX shipped with a 2.4.28 kernel, this is a rewritten patch
adding it to current git.
Signed-off-by: default avatarNobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 00e8c494
......@@ -244,6 +244,12 @@ config SH_7619_SOLUTION_ENGINE
Select 7619 SolutionEngine if configuring for a Hitachi SH7619
evaluation board.
config SH_LBOX_RE2
bool "L-BOX RE2"
select CPU_SUBTYPE_SH7751R
help
Select L-BOX RE2 if configuring for the NTT COMWARE L-BOX RE2.
config SH_UNKNOWN
bool "BareCPU"
help
......
......@@ -110,6 +110,7 @@ machdir-$(CONFIG_SH_TITAN) := titan
machdir-$(CONFIG_SH_SHMIN) := shmin
machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) := se/7206
machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) := se/7619
machdir-$(CONFIG_SH_LBOX_RE2) := lboxre2
machdir-$(CONFIG_SH_UNKNOWN) := unknown
incdir-y := $(notdir $(machdir-y))
......
#
# Makefile for the L-BOX RE2 specific parts of the kernel
# Copyright (c) 2007 Nobuhiro Iwamatsu
obj-y := setup.o irq.o
/*
* linux/arch/sh/boards/lboxre2/irq.c
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* NTT COMWARE L-BOX RE2 Support.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/lboxre2.h>
/*
* Initialize IRQ setting
*/
void __init init_lboxre2_IRQ(void)
{
make_imask_irq(IRQ_CF1);
make_imask_irq(IRQ_CF0);
make_imask_irq(IRQ_INTD);
make_imask_irq(IRQ_ETH1);
make_imask_irq(IRQ_ETH0);
make_imask_irq(IRQ_INTA);
}
/*
* linux/arch/sh/boards/lbox/setup.c
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* NTT COMWARE L-BOX RE2 Support
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/pata_platform.h>
#include <asm/machvec.h>
#include <asm/lboxre2.h>
#include <asm/io.h>
static struct resource cf_ide_resources[] = {
[0] = {
.start = 0x1f0,
.end = 0x1f0 + 8 ,
.flags = IORESOURCE_IO,
},
[1] = {
.start = 0x1f0 + 0x206,
.end = 0x1f0 +8 + 0x206 + 8,
.flags = IORESOURCE_IO,
},
[2] = {
.start = IRQ_CF0,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device cf_ide_device = {
.name = "pata_platform",
.id = -1,
.num_resources = ARRAY_SIZE(cf_ide_resources),
.resource = cf_ide_resources,
};
static struct platform_device *lboxre2_devices[] __initdata = {
&cf_ide_device,
};
static int __init lboxre2_devices_setup(void)
{
u32 cf0_io_base; /* Boot CF base address */
pgprot_t prot;
unsigned long paddrbase, psize;
/* open I/O area window */
paddrbase = virt_to_phys((void*)CONFIG_CF0_BASE_ADDR);
psize = PAGE_SIZE;
prot = PAGE_KERNEL_PCC( 1 , _PAGE_PCC_IO16);
cf0_io_base = (u32)p3_ioremap(paddrbase, psize, prot.pgprot);
if (!cf0_io_base) {
printk(KERN_ERR "%s : can't open CF I/O window!\n" , __func__ );
return -ENOMEM;
}
cf_ide_resources[0].start += cf0_io_base ;
cf_ide_resources[0].end += cf0_io_base ;
cf_ide_resources[1].start += cf0_io_base ;
cf_ide_resources[1].end += cf0_io_base ;
return platform_add_devices(lboxre2_devices,
ARRAY_SIZE(lboxre2_devices));
}
device_initcall(lboxre2_devices_setup);
/*
* The Machine Vector
*/
struct sh_machine_vector mv_lboxre2 __initmv = {
.mv_name = "L-BOX RE2",
.mv_nr_irqs = 72,
.mv_init_irq = init_lboxre2_IRQ,
};
ALIAS_MV(lboxre2)
This diff is collapsed.
......@@ -18,3 +18,4 @@ obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
obj-$(CONFIG_SH_HIGHLANDER) += ops-r7780rp.o fixups-r7780rp.o
obj-$(CONFIG_SH_TITAN) += ops-titan.o
obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o
/*
* arch/sh/drivers/pci/fixups-lboxre2.c
*
* L-BOX RE2 PCI fixups
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include "pci-sh4.h"
#define PCIMCR_MRSET_OFF 0xBFFFFFFF
#define PCIMCR_RFSH_OFF 0xFFFFFFFB
int pci_fixup_pcic(void)
{
unsigned long bcr1, mcr;
bcr1 = inl(SH7751_BCR1);
bcr1 |= 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
pci_write_reg(bcr1, SH4_PCIBCR1);
/* Enable all interrupts, so we known what to fix */
pci_write_reg(0x0000c3ff, SH4_PCIINTM);
pci_write_reg(0x0000380f, SH4_PCIAINTM);
pci_write_reg(0xfb900047, SH7751_PCICONF1);
pci_write_reg(0xab000001, SH7751_PCICONF4);
mcr = inl(SH7751_MCR);
mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
pci_write_reg(mcr, SH4_PCIMCR);
pci_write_reg(0x0c000000, SH7751_PCICONF5);
pci_write_reg(0xd0000000, SH7751_PCICONF6);
pci_write_reg(0x0c000000, SH4_PCILAR0);
pci_write_reg(0x00000000, SH4_PCILAR1);
return 0;
}
/*
* linux/arch/sh/drivers/pci/ops-lboxre2.c
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* PCI initialization for the NTT COMWARE L-BOX RE2
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/io.h>
#include <asm/lboxre2.h>
#include "pci-sh4.h"
static char lboxre2_irq_tab[] __initdata = {
IRQ_ETH0, IRQ_ETH1, IRQ_INTA, IRQ_INTD,
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
return lboxre2_irq_tab[slot];
}
static struct resource sh7751_io_resource = {
.name = "SH7751_IO",
.start = SH7751_PCI_IO_BASE ,
.end = SH7751_PCI_IO_BASE + SH7751_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sh7751_mem_resource = {
.name = "SH7751_mem",
.start = SH7751_PCI_MEMORY_BASE,
.end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
extern struct pci_ops sh7751_pci_ops;
struct pci_channel board_pci_channels[] = {
{ &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
EXPORT_SYMBOL(board_pci_channels);
static struct sh4_pci_address_map sh7751_pci_map = {
.window0 = {
.base = SH7751_CS3_BASE_ADDR,
.size = 0x04000000,
},
.window1 = {
.base = 0x00000000, /* Unused */
.size = 0x00000000, /* Unused */
},
.flags = SH4_PCIC_NO_RESET,
};
int __init pcibios_init_platform(void)
{
return sh7751_pcic_init(&sh7751_pci_map);
}
......@@ -194,7 +194,7 @@ int __init sh7751_pcic_init(struct sh4_pci_address_map *map)
* DMA interrupts...
*/
#ifdef CONFIG_SH_RTS7751R2D
#if defined(CONFIG_SH_RTS7751R2D) || defined(CONFIG_SH_LBOX_RE2)
pci_fixup_pcic();
#endif
......
#ifndef __ASM_SH_LBOXRE2_H
#define __ASM_SH_LBOXRE2_H
/*
* linux/include/asm-sh/lbox.h
*
* Copyright (C) 2007 Nobuhiro Iwamatsu
*
* NTT COMWARE L-BOX RE2 support
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
*/
#define CONFIG_CF0_BASE_ADDR 0xb4000000 /* Boot only */
#define CONFIG_CF1_BASE_ADDR 0xb8000000
#define IRQ_CF1 9 /* CF1 */
#define IRQ_CF0 10 /* CF0 */
#define IRQ_INTD 11 /* INTD */
#define IRQ_ETH1 12 /* Ether1 */
#define IRQ_ETH0 13 /* Ether0 */
#define IRQ_INTA 14 /* INTA */
void init_lboxre2_IRQ(void);
#define __IO_PREFIX lboxre2
#include <asm/io_generic.h>
#endif /* __ASM_SH_LBOXRE2_H */
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