Commit ca4e406a authored by David Mosberger's avatar David Mosberger

ia64: Sync up with 2.5.17 tree.

parent fea891b3
......@@ -37,7 +37,7 @@ else
8KB CONFIG_IA64_PAGE_SIZE_8KB \
16KB CONFIG_IA64_PAGE_SIZE_16KB \
64KB CONFIG_IA64_PAGE_SIZE_64KB" 16KB
endif
fi
if [ "$CONFIG_IA64_HP_SIM" = "n" ]; then
define_bool CONFIG_ACPI y
......
......@@ -40,12 +40,18 @@ ENTRY(ia32_clone)
zxt4 out1=in1 // newsp
mov out3=16 // stacksize (compensates for 16-byte scratch area)
adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
zxt4 out0=in0 // out0 = clone_flags
br.call.sptk.many rp=do_fork_WITHOUT_CLONE_IDLETASK // FIXME: mask out CLONE_IDLETASK from flags, and return value now task_struct *.
dep out0=0,in0,CLONE_IDLETASK_BIT,1 // out0 = clone_flags & ~CLONE_IDLETASK
br.call.sptk.many rp=do_fork
.ret0: .restore sp
adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
mov r2=-1000
adds r3=IA64_TASK_PID_OFFSET,r8
;;
cmp.leu p6,p0=r8,r2
mov ar.pfs=loc1
mov rp=loc0
;;
(p6) ld4 r8=[r3]
br.ret.sptk.many rp
END(ia32_clone)
......@@ -167,11 +173,17 @@ GLOBAL_ENTRY(sys32_fork)
mov out1=0
mov out3=0
adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
br.call.sptk.few rp=do_fork_FIXME_RETURNS_TASK_STRUCT
.ret5: mov ar.pfs=loc1
.restore sp
br.call.sptk.few rp=do_fork
.ret5: .restore sp
adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
mov r2=-1000
adds r3=IA64_TASK_PID_OFFSET,r8
;;
cmp.leu p6,p0=r8,r2
mov ar.pfs=loc1
mov rp=loc0
;;
(p6) ld4 r8=[r3]
br.ret.sptk.many rp
END(sys32_fork)
......
......@@ -3,8 +3,8 @@
*
* Copyright (C) 1999 VA Linux Systems
* Copyright (C) 1999,2000 Walt Drummond <drummond@valinux.com>
* Copyright (C) 2000 Hewlett-Packard Co.
* Copyright (C) 2000 David Mosberger-Tang <davidm@hpl.hp.com>
* Copyright (C) 2000, 2002 Hewlett-Packard Co.
* David Mosberger-Tang <davidm@hpl.hp.com>
* Copyright (C) 2000 Intel Corp.
* Copyright (C) 2000,2001 J.I. Lee <jung-ik.lee@intel.com>
* Copyright (C) 2001 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
......@@ -173,7 +173,7 @@ acpi_dispose_crs (acpi_buffer *buf)
#define ACPI_MAX_PLATFORM_IRQS 256
/* Array to record platform interrupt vectors for generic interrupt routing. */
int platform_irq_list[ACPI_MAX_PLATFORM_IRQS];
int platform_irq_list[ACPI_MAX_PLATFORM_IRQS] = { [0 ... ACPI_MAX_PLATFORM_IRQS - 1] = -1 };
/*
* Interrupt routing API for device drivers. Provides interrupt vector for
......@@ -421,8 +421,6 @@ acpi_parse_nmi_src (acpi_table_entry_header *header)
static int __init
acpi_parse_madt (unsigned long phys_addr, unsigned long size)
{
int i = 0;
if (!phys_addr || !size)
return -EINVAL;
......@@ -432,11 +430,6 @@ acpi_parse_madt (unsigned long phys_addr, unsigned long size)
return -ENODEV;
}
/* Initialize platform interrupt vector array */
for (i = 0; i < ACPI_MAX_PLATFORM_IRQS; i++)
platform_irq_list[i] = -1;
/* Get base address of IPI Message Block */
if (acpi_madt->lapic_address)
......@@ -643,7 +636,7 @@ acpi_get_prt (struct pci_vector_struct **vectors, int *count)
*vectors = NULL;
*count = 0;
if (acpi_prts.count < 0) {
if (acpi_prts.count <= 0) {
printk(KERN_ERR PREFIX "No PCI IRQ routing entries\n");
return -ENODEV;
}
......@@ -661,7 +654,7 @@ acpi_get_prt (struct pci_vector_struct **vectors, int *count)
list_for_each(node, &acpi_prts.entries) {
entry = (struct acpi_prt_entry *)node;
vector[i].bus = entry->id.bus;
vector[i].pci_id = ((u32) entry->id.dev) << 16 | 0xffff;
vector[i].pci_id = ((u32) entry->id.dev << 16) | 0xffff;
vector[i].pin = entry->id.pin;
vector[i].irq = entry->source.index;
i++;
......
......@@ -100,12 +100,18 @@ GLOBAL_ENTRY(sys_clone2)
mov out1=in1
mov out3=in2
adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
mov out0=in0 // out0 = clone_flags
br.call.sptk.many rp=do_fork_WITHOUT_CLONE_IDLETASK // FIXME: mask out CLONE_IDLETASK from flags, and now returns task_struct *.
dep out0=0,in0,CLONE_IDLETASK_BIT,1 // out0 = clone_flags & ~CLONE_IDLETASK
br.call.sptk.many rp=do_fork
.ret1: .restore sp
adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
mov r2=-1000
adds r3=IA64_TASK_PID_OFFSET,r8
;;
cmp.leu p6,p0=r8,r2
mov ar.pfs=loc1
mov rp=loc0
;;
(p6) ld4 r8=[r3]
br.ret.sptk.many rp
END(sys_clone2)
......@@ -119,12 +125,18 @@ GLOBAL_ENTRY(sys_clone)
mov out1=in1
mov out3=16 // stacksize (compensates for 16-byte scratch area)
adds out2=IA64_SWITCH_STACK_SIZE+16,sp // out2 = &regs
mov out0=in0 // out0 = clone_flags
br.call.sptk.many rp=do_fork_WITHOUT_CLONE_IDLETASK // FIXME: mask out CLONE_IDLETASK from flags, and now return task_struct *.
dep out0=0,in0,CLONE_IDLETASK_BIT,1 // out0 = clone_flags & ~CLONE_IDLETASK
br.call.sptk.many rp=do_fork
.ret2: .restore sp
adds sp=IA64_SWITCH_STACK_SIZE,sp // pop the switch stack
mov r2=-1000
adds r3=IA64_TASK_PID_OFFSET,r8
;;
cmp.leu p6,p0=r8,r2
mov ar.pfs=loc1
mov rp=loc0
;;
(p6) ld4 r8=[r3]
br.ret.sptk.many rp
END(sys_clone)
......
......@@ -24,7 +24,8 @@
* /proc/irq/#/smp_affinity
* 02/04/02 P. Diefenbaugh Cleaned up ACPI PCI IRQ routing.
* 02/04/18 J.I. Lee bug fix in iosapic_init_pci_irq
* 02/04/30 J.I. Lee bug fix in find_iosapic to fix ACPI PCI IRQ to IOSAPIC mapping error
* 02/04/30 J.I. Lee bug fix in find_iosapic to fix ACPI PCI IRQ to IOSAPIC mapping
* error
*/
/*
* Here is what the interrupt logic between a PCI device and the CPU looks like:
......@@ -631,7 +632,7 @@ iosapic_init (unsigned long phys_addr, unsigned int base_irq, int pcat_compat)
}
}
void __init
static void __init
iosapic_init_pci_irq (void)
{
int i, index, vector, pin;
......
......@@ -218,10 +218,11 @@ pcibios_init (void)
pci_scan_bus(i, pci_root_ops, NULL);
platform_pci_fixup(1); /* phase 1 fixups (after buses scanned) */
return;
return 0;
}
subsys_initcall(pcibios_init);
/*
* Called after each bus is probed, but before its children
* are examined.
......
......@@ -395,7 +395,7 @@ show_cpuinfo (struct seq_file *m, void *v)
switch (c->family) {
case 0x07: memcpy(family, "Itanium", 8); break;
case 0x1f: memcpy(family, "Itanium 2", 9); break;
case 0x1f: memcpy(family, "Itanium 2", 10); break;
default: sprintf(family, "%u", c->family); break;
}
......@@ -564,17 +564,13 @@ cpu_init (void)
#define FEATURE_SET 16
struct ia64_pal_retval iprv;
if (my_cpu_data->family == 0x1f) {
if (my_cpu_info->family == 0x1f) {
PAL_CALL_PHYS(iprv, PAL_PROC_GET_FEATURES, 0, FEATURE_SET, 0);
if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80)) {
if ((iprv.status == 0) && (iprv.v0 & 0x80) && (iprv.v2 & 0x80))
PAL_CALL_PHYS(iprv, PAL_PROC_SET_FEATURES,
(iprv.v1 | 0x80), FEATURE_SET, 0);
}
}
}
#endif
/* Clear the stack memory reserved for pt_regs: */
......
......@@ -7,6 +7,8 @@ BEGIN {
print " * This file was generated by arch/ia64/tools/print_offsets.awk."
print " *"
print " */"
print ""
print "#define CLONE_IDLETASK_BIT 12"
}
# look for .tab:
......
......@@ -53,6 +53,7 @@ tab[] =
{ "UNW_FRAME_INFO_SIZE", sizeof (struct unw_frame_info) },
{ "", 0 }, /* spacer */
{ "IA64_TASK_THREAD_KSP_OFFSET", offsetof (struct task_struct, thread.ksp) },
{ "IA64_TASK_PID_OFFSET", offsetof (struct task_struct, pid) },
{ "IA64_PT_REGS_CR_IPSR_OFFSET", offsetof (struct pt_regs, cr_ipsr) },
{ "IA64_PT_REGS_CR_IIP_OFFSET", offsetof (struct pt_regs, cr_iip) },
{ "IA64_PT_REGS_CR_IFS_OFFSET", offsetof (struct pt_regs, cr_ifs) },
......@@ -161,6 +162,7 @@ tab[] =
{ "IA64_SIGFRAME_ARG2_OFFSET", offsetof (struct sigframe, arg2) },
{ "IA64_SIGFRAME_HANDLER_OFFSET", offsetof (struct sigframe, handler) },
{ "IA64_SIGFRAME_SIGCONTEXT_OFFSET", offsetof (struct sigframe, sc) },
/* for assembly files which can't include sched.h: */
{ "IA64_CLONE_VFORK", CLONE_VFORK },
{ "IA64_CLONE_VM", CLONE_VM },
};
......@@ -199,6 +201,8 @@ main (int argc, char **argv)
}
}
printf ("\n#define CLONE_IDLETASK_BIT %ld\n", ia64_fls (CLONE_IDLETASK));
printf ("\n#endif /* _ASM_IA64_OFFSETS_H */\n");
return 0;
}
......@@ -56,39 +56,12 @@ do { \
flush_dcache_page(page); \
} while (0)
/*
* Note: the MAP_NR_*() macro can't use __pa() because MAP_NR_*(X) MUST
* map to something >= max_mapnr if X is outside the identity mapped
* kernel space.
*/
/*
* The dense variant can be used as long as the size of memory holes isn't
* very big.
*/
#define MAP_NR_DENSE(addr) (((unsigned long) (addr) - PAGE_OFFSET) >> PAGE_SHIFT)
#define page_to_pfn(page) ((unsigned long)((page) - mem_map))
#define pfn_valid(pfn) ((pfn) < max_mapnr)
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#ifdef CONFIG_IA64_GENERIC
# include <asm/machvec.h>
# define virt_to_page(kaddr) (mem_map + platform_map_nr(kaddr))
# define page_to_pfn(page) ((unsigned long) (page - mem_map))
# define pfn_to_page(pfn) (mem_map + (pfn))
#elif defined (CONFIG_IA64_SGI_SN1)
# ifndef CONFIG_DISCONTIGMEM
# define virt_to_page(kaddr) (mem_map + MAP_NR_DENSE(kaddr))
# define page_to_pfn(page) XXX fix me
# define pfn_to_page(pfn) XXX fix me
# endif
#else
# define virt_to_page(kaddr) (mem_map + MAP_NR_DENSE(kaddr))
# define page_to_pfn(page) ((unsigned long) (page - mem_map))
# define pfn_to_page(pfn) (mem_map + (pfn))
#endif
#define page_to_pfn(page) ((unsigned long) (page - mem_map))
#define pfn_to_page(pfn) (mem_map + (pfn))
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
typedef union ia64_va {
struct {
......
......@@ -106,6 +106,8 @@ pmd_free (pmd_t *pmd)
++pgtable_cache_size;
}
#define pmd_free_tlb(tlb, pmd) pmd_free(pmd)
static inline void
pmd_populate (struct mm_struct *mm, pmd_t *pmd_entry, struct page *pte)
{
......@@ -150,6 +152,8 @@ pte_free_kernel (pte_t *pte)
free_page((unsigned long) pte);
}
#define pte_free_tlb(tlb, pte) tlb_remove_page((tlb), (pte))
extern void check_pgt_cache (void);
/*
......
......@@ -216,6 +216,8 @@ ia64_phys_addr_valid (unsigned long addr)
/* Extract pfn from pte. */
#define pte_pfn(_pte) ((pte_val(_pte) & _PFN_MASK) >> PAGE_SHIFT)
#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
#define pte_modify(_pte, newprot) \
(__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
......
/* XXX fix me! */
#define tlb_start_vma(tlb, vma) do { } while (0)
#define tlb_end_vma(tlb, vma) do { } while (0)
#define tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
#include <asm-generic/tlb.h>
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