Commit cbee4751 authored by Linus Torvalds's avatar Linus Torvalds

Merge branch 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6

* 'drm-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
  drm/radeon/kms: fix r300 vram width calculations
  drm/radeon/kms: rs400/480 MC setup is different than r300.
  drm/radeon/kms: make initial state of load detect property correct.
  drm/radeon/kms: disable HDMI audio for now on rv710/rv730
  drm/radeon/kms: don't call suspend path before cleaning up GPU
  drivers/gpu/drm/radeon/radeon_combios.c: fix warning
  ati_pcigart: fix printk format warning
  drm/r100/kms: Emit cache flush to the end of command buffer. (v2)
  drm/radeon/kms: fix regression rendering issue on R6XX/R7XX
  drm/radeon/kms: move blit initialization after we disabled VGA
parents adbfbcd1 5ff55717
...@@ -113,7 +113,7 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga ...@@ -113,7 +113,7 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) { if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) {
DRM_ERROR("fail to set dma mask to 0x%Lx\n", DRM_ERROR("fail to set dma mask to 0x%Lx\n",
gart_info->table_mask); (unsigned long long)gart_info->table_mask);
ret = 1; ret = 1;
goto done; goto done;
} }
......
...@@ -354,11 +354,17 @@ u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc) ...@@ -354,11 +354,17 @@ u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc)
return RREG32(RADEON_CRTC2_CRNT_FRAME); return RREG32(RADEON_CRTC2_CRNT_FRAME);
} }
/* Who ever call radeon_fence_emit should call ring_lock and ask
* for enough space (today caller are ib schedule and buffer move) */
void r100_fence_ring_emit(struct radeon_device *rdev, void r100_fence_ring_emit(struct radeon_device *rdev,
struct radeon_fence *fence) struct radeon_fence *fence)
{ {
/* Who ever call radeon_fence_emit should call ring_lock and ask /* We have to make sure that caches are flushed before
* for enough space (today caller are ib schedule and buffer move) */ * CPU might read something from VRAM. */
radeon_ring_write(rdev, PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0));
radeon_ring_write(rdev, RADEON_RB3D_DC_FLUSH_ALL);
radeon_ring_write(rdev, PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0));
radeon_ring_write(rdev, RADEON_RB3D_ZC_FLUSH_ALL);
/* Wait until IDLE & CLEAN */ /* Wait until IDLE & CLEAN */
radeon_ring_write(rdev, PACKET0(0x1720, 0)); radeon_ring_write(rdev, PACKET0(0x1720, 0));
radeon_ring_write(rdev, (1 << 16) | (1 << 17)); radeon_ring_write(rdev, (1 << 16) | (1 << 17));
...@@ -3369,7 +3375,6 @@ int r100_suspend(struct radeon_device *rdev) ...@@ -3369,7 +3375,6 @@ int r100_suspend(struct radeon_device *rdev)
void r100_fini(struct radeon_device *rdev) void r100_fini(struct radeon_device *rdev)
{ {
r100_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
...@@ -3481,13 +3486,12 @@ int r100_init(struct radeon_device *rdev) ...@@ -3481,13 +3486,12 @@ int r100_init(struct radeon_device *rdev)
if (r) { if (r) {
/* Somethings want wront with the accel init stop accel */ /* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n"); dev_err(rdev->dev, "Disabling GPU acceleration\n");
r100_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
radeon_irq_kms_fini(rdev);
if (rdev->flags & RADEON_IS_PCI) if (rdev->flags & RADEON_IS_PCI)
r100_pci_gart_fini(rdev); r100_pci_gart_fini(rdev);
radeon_irq_kms_fini(rdev);
rdev->accel_working = false; rdev->accel_working = false;
} }
return 0; return 0;
......
...@@ -506,11 +506,14 @@ void r300_vram_info(struct radeon_device *rdev) ...@@ -506,11 +506,14 @@ void r300_vram_info(struct radeon_device *rdev)
/* DDR for all card after R300 & IGP */ /* DDR for all card after R300 & IGP */
rdev->mc.vram_is_ddr = true; rdev->mc.vram_is_ddr = true;
tmp = RREG32(RADEON_MEM_CNTL); tmp = RREG32(RADEON_MEM_CNTL);
if (tmp & R300_MEM_NUM_CHANNELS_MASK) { tmp &= R300_MEM_NUM_CHANNELS_MASK;
rdev->mc.vram_width = 128; switch (tmp) {
} else { case 0: rdev->mc.vram_width = 64; break;
rdev->mc.vram_width = 64; case 1: rdev->mc.vram_width = 128; break;
case 2: rdev->mc.vram_width = 256; break;
default: rdev->mc.vram_width = 128; break;
} }
r100_vram_init_sizes(rdev); r100_vram_init_sizes(rdev);
...@@ -1327,7 +1330,6 @@ int r300_suspend(struct radeon_device *rdev) ...@@ -1327,7 +1330,6 @@ int r300_suspend(struct radeon_device *rdev)
void r300_fini(struct radeon_device *rdev) void r300_fini(struct radeon_device *rdev)
{ {
r300_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
...@@ -1418,15 +1420,15 @@ int r300_init(struct radeon_device *rdev) ...@@ -1418,15 +1420,15 @@ int r300_init(struct radeon_device *rdev)
if (r) { if (r) {
/* Somethings want wront with the accel init stop accel */ /* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n"); dev_err(rdev->dev, "Disabling GPU acceleration\n");
r300_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
radeon_irq_kms_fini(rdev);
if (rdev->flags & RADEON_IS_PCIE) if (rdev->flags & RADEON_IS_PCIE)
rv370_pcie_gart_fini(rdev); rv370_pcie_gart_fini(rdev);
if (rdev->flags & RADEON_IS_PCI) if (rdev->flags & RADEON_IS_PCI)
r100_pci_gart_fini(rdev); r100_pci_gart_fini(rdev);
radeon_irq_kms_fini(rdev); radeon_agp_fini(rdev);
rdev->accel_working = false; rdev->accel_working = false;
} }
return 0; return 0;
......
...@@ -389,16 +389,15 @@ int r420_init(struct radeon_device *rdev) ...@@ -389,16 +389,15 @@ int r420_init(struct radeon_device *rdev)
if (r) { if (r) {
/* Somethings want wront with the accel init stop accel */ /* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n"); dev_err(rdev->dev, "Disabling GPU acceleration\n");
r420_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
radeon_irq_kms_fini(rdev);
if (rdev->flags & RADEON_IS_PCIE) if (rdev->flags & RADEON_IS_PCIE)
rv370_pcie_gart_fini(rdev); rv370_pcie_gart_fini(rdev);
if (rdev->flags & RADEON_IS_PCI) if (rdev->flags & RADEON_IS_PCI)
r100_pci_gart_fini(rdev); r100_pci_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_agp_fini(rdev);
radeon_irq_kms_fini(rdev);
rdev->accel_working = false; rdev->accel_working = false;
} }
return 0; return 0;
......
...@@ -294,13 +294,12 @@ int r520_init(struct radeon_device *rdev) ...@@ -294,13 +294,12 @@ int r520_init(struct radeon_device *rdev)
if (r) { if (r) {
/* Somethings want wront with the accel init stop accel */ /* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n"); dev_err(rdev->dev, "Disabling GPU acceleration\n");
rv515_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
radeon_irq_kms_fini(rdev);
rv370_pcie_gart_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_agp_fini(rdev);
radeon_irq_kms_fini(rdev);
rdev->accel_working = false; rdev->accel_working = false;
} }
return 0; return 0;
......
...@@ -1654,6 +1654,12 @@ void r600_ring_init(struct radeon_device *rdev, unsigned ring_size) ...@@ -1654,6 +1654,12 @@ void r600_ring_init(struct radeon_device *rdev, unsigned ring_size)
rdev->cp.align_mask = 16 - 1; rdev->cp.align_mask = 16 - 1;
} }
void r600_cp_fini(struct radeon_device *rdev)
{
r600_cp_stop(rdev);
radeon_ring_fini(rdev);
}
/* /*
* GPU scratch registers helpers function. * GPU scratch registers helpers function.
...@@ -1861,6 +1867,12 @@ int r600_startup(struct radeon_device *rdev) ...@@ -1861,6 +1867,12 @@ int r600_startup(struct radeon_device *rdev)
return r; return r;
} }
r600_gpu_init(rdev); r600_gpu_init(rdev);
r = r600_blit_init(rdev);
if (r) {
r600_blit_fini(rdev);
rdev->asic->copy = NULL;
dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
}
/* pin copy shader into vram */ /* pin copy shader into vram */
if (rdev->r600_blit.shader_obj) { if (rdev->r600_blit.shader_obj) {
r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
...@@ -2045,19 +2057,15 @@ int r600_init(struct radeon_device *rdev) ...@@ -2045,19 +2057,15 @@ int r600_init(struct radeon_device *rdev)
r = r600_pcie_gart_init(rdev); r = r600_pcie_gart_init(rdev);
if (r) if (r)
return r; return r;
r = r600_blit_init(rdev);
if (r) {
r600_blit_fini(rdev);
rdev->asic->copy = NULL;
dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
}
rdev->accel_working = true; rdev->accel_working = true;
r = r600_startup(rdev); r = r600_startup(rdev);
if (r) { if (r) {
r600_suspend(rdev); dev_err(rdev->dev, "disabling GPU acceleration\n");
r600_cp_fini(rdev);
r600_wb_fini(rdev); r600_wb_fini(rdev);
radeon_ring_fini(rdev); r600_irq_fini(rdev);
radeon_irq_kms_fini(rdev);
r600_pcie_gart_fini(rdev); r600_pcie_gart_fini(rdev);
rdev->accel_working = false; rdev->accel_working = false;
} }
...@@ -2083,20 +2091,17 @@ int r600_init(struct radeon_device *rdev) ...@@ -2083,20 +2091,17 @@ int r600_init(struct radeon_device *rdev)
void r600_fini(struct radeon_device *rdev) void r600_fini(struct radeon_device *rdev)
{ {
/* Suspend operations */
r600_suspend(rdev);
r600_audio_fini(rdev); r600_audio_fini(rdev);
r600_blit_fini(rdev); r600_blit_fini(rdev);
r600_cp_fini(rdev);
r600_wb_fini(rdev);
r600_irq_fini(rdev); r600_irq_fini(rdev);
radeon_irq_kms_fini(rdev); radeon_irq_kms_fini(rdev);
radeon_ring_fini(rdev);
r600_wb_fini(rdev);
r600_pcie_gart_fini(rdev); r600_pcie_gart_fini(rdev);
radeon_agp_fini(rdev);
radeon_gem_fini(rdev); radeon_gem_fini(rdev);
radeon_fence_driver_fini(rdev); radeon_fence_driver_fini(rdev);
radeon_clocks_fini(rdev); radeon_clocks_fini(rdev);
radeon_agp_fini(rdev);
radeon_bo_fini(rdev); radeon_bo_fini(rdev);
radeon_atombios_fini(rdev); radeon_atombios_fini(rdev);
kfree(rdev->bios); kfree(rdev->bios);
...@@ -2900,3 +2905,18 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev) ...@@ -2900,3 +2905,18 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev)
return 0; return 0;
#endif #endif
} }
/**
* r600_ioctl_wait_idle - flush host path cache on wait idle ioctl
* rdev: radeon device structure
* bo: buffer object struct which userspace is waiting for idle
*
* Some R6XX/R7XX doesn't seems to take into account HDP flush performed
* through ring buffer, this leads to corruption in rendering, see
* http://bugzilla.kernel.org/show_bug.cgi?id=15186 to avoid this we
* directly perform HDP flush by writing register through MMIO.
*/
void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
{
WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
}
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
*/ */
static int r600_audio_chipset_supported(struct radeon_device *rdev) static int r600_audio_chipset_supported(struct radeon_device *rdev)
{ {
return rdev->family >= CHIP_R600 return (rdev->family >= CHIP_R600 && rdev->family < CHIP_RV710)
|| rdev->family == CHIP_RS600 || rdev->family == CHIP_RS600
|| rdev->family == CHIP_RS690 || rdev->family == CHIP_RS690
|| rdev->family == CHIP_RS740; || rdev->family == CHIP_RS740;
......
...@@ -661,6 +661,13 @@ struct radeon_asic { ...@@ -661,6 +661,13 @@ struct radeon_asic {
void (*hpd_fini)(struct radeon_device *rdev); void (*hpd_fini)(struct radeon_device *rdev);
bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd); bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
void (*hpd_set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd); void (*hpd_set_polarity)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
/* ioctl hw specific callback. Some hw might want to perform special
* operation on specific ioctl. For instance on wait idle some hw
* might want to perform and HDP flush through MMIO as it seems that
* some R6XX/R7XX hw doesn't take HDP flush into account if programmed
* through ring.
*/
void (*ioctl_wait_idle)(struct radeon_device *rdev, struct radeon_bo *bo);
}; };
/* /*
...@@ -1143,6 +1150,7 @@ extern bool r600_card_posted(struct radeon_device *rdev); ...@@ -1143,6 +1150,7 @@ extern bool r600_card_posted(struct radeon_device *rdev);
extern void r600_cp_stop(struct radeon_device *rdev); extern void r600_cp_stop(struct radeon_device *rdev);
extern void r600_ring_init(struct radeon_device *rdev, unsigned ring_size); extern void r600_ring_init(struct radeon_device *rdev, unsigned ring_size);
extern int r600_cp_resume(struct radeon_device *rdev); extern int r600_cp_resume(struct radeon_device *rdev);
extern void r600_cp_fini(struct radeon_device *rdev);
extern int r600_count_pipe_bits(uint32_t val); extern int r600_count_pipe_bits(uint32_t val);
extern int r600_gart_clear_page(struct radeon_device *rdev, int i); extern int r600_gart_clear_page(struct radeon_device *rdev, int i);
extern int r600_mc_wait_for_idle(struct radeon_device *rdev); extern int r600_mc_wait_for_idle(struct radeon_device *rdev);
......
...@@ -117,6 +117,7 @@ static struct radeon_asic r100_asic = { ...@@ -117,6 +117,7 @@ static struct radeon_asic r100_asic = {
.hpd_fini = &r100_hpd_fini, .hpd_fini = &r100_hpd_fini,
.hpd_sense = &r100_hpd_sense, .hpd_sense = &r100_hpd_sense,
.hpd_set_polarity = &r100_hpd_set_polarity, .hpd_set_polarity = &r100_hpd_set_polarity,
.ioctl_wait_idle = NULL,
}; };
...@@ -176,6 +177,7 @@ static struct radeon_asic r300_asic = { ...@@ -176,6 +177,7 @@ static struct radeon_asic r300_asic = {
.hpd_fini = &r100_hpd_fini, .hpd_fini = &r100_hpd_fini,
.hpd_sense = &r100_hpd_sense, .hpd_sense = &r100_hpd_sense,
.hpd_set_polarity = &r100_hpd_set_polarity, .hpd_set_polarity = &r100_hpd_set_polarity,
.ioctl_wait_idle = NULL,
}; };
/* /*
...@@ -219,6 +221,7 @@ static struct radeon_asic r420_asic = { ...@@ -219,6 +221,7 @@ static struct radeon_asic r420_asic = {
.hpd_fini = &r100_hpd_fini, .hpd_fini = &r100_hpd_fini,
.hpd_sense = &r100_hpd_sense, .hpd_sense = &r100_hpd_sense,
.hpd_set_polarity = &r100_hpd_set_polarity, .hpd_set_polarity = &r100_hpd_set_polarity,
.ioctl_wait_idle = NULL,
}; };
...@@ -267,6 +270,7 @@ static struct radeon_asic rs400_asic = { ...@@ -267,6 +270,7 @@ static struct radeon_asic rs400_asic = {
.hpd_fini = &r100_hpd_fini, .hpd_fini = &r100_hpd_fini,
.hpd_sense = &r100_hpd_sense, .hpd_sense = &r100_hpd_sense,
.hpd_set_polarity = &r100_hpd_set_polarity, .hpd_set_polarity = &r100_hpd_set_polarity,
.ioctl_wait_idle = NULL,
}; };
...@@ -323,6 +327,7 @@ static struct radeon_asic rs600_asic = { ...@@ -323,6 +327,7 @@ static struct radeon_asic rs600_asic = {
.hpd_fini = &rs600_hpd_fini, .hpd_fini = &rs600_hpd_fini,
.hpd_sense = &rs600_hpd_sense, .hpd_sense = &rs600_hpd_sense,
.hpd_set_polarity = &rs600_hpd_set_polarity, .hpd_set_polarity = &rs600_hpd_set_polarity,
.ioctl_wait_idle = NULL,
}; };
...@@ -370,6 +375,7 @@ static struct radeon_asic rs690_asic = { ...@@ -370,6 +375,7 @@ static struct radeon_asic rs690_asic = {
.hpd_fini = &rs600_hpd_fini, .hpd_fini = &rs600_hpd_fini,
.hpd_sense = &rs600_hpd_sense, .hpd_sense = &rs600_hpd_sense,
.hpd_set_polarity = &rs600_hpd_set_polarity, .hpd_set_polarity = &rs600_hpd_set_polarity,
.ioctl_wait_idle = NULL,
}; };
...@@ -421,6 +427,7 @@ static struct radeon_asic rv515_asic = { ...@@ -421,6 +427,7 @@ static struct radeon_asic rv515_asic = {
.hpd_fini = &rs600_hpd_fini, .hpd_fini = &rs600_hpd_fini,
.hpd_sense = &rs600_hpd_sense, .hpd_sense = &rs600_hpd_sense,
.hpd_set_polarity = &rs600_hpd_set_polarity, .hpd_set_polarity = &rs600_hpd_set_polarity,
.ioctl_wait_idle = NULL,
}; };
...@@ -463,6 +470,7 @@ static struct radeon_asic r520_asic = { ...@@ -463,6 +470,7 @@ static struct radeon_asic r520_asic = {
.hpd_fini = &rs600_hpd_fini, .hpd_fini = &rs600_hpd_fini,
.hpd_sense = &rs600_hpd_sense, .hpd_sense = &rs600_hpd_sense,
.hpd_set_polarity = &rs600_hpd_set_polarity, .hpd_set_polarity = &rs600_hpd_set_polarity,
.ioctl_wait_idle = NULL,
}; };
/* /*
...@@ -504,6 +512,7 @@ void r600_hpd_fini(struct radeon_device *rdev); ...@@ -504,6 +512,7 @@ void r600_hpd_fini(struct radeon_device *rdev);
bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd); bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
void r600_hpd_set_polarity(struct radeon_device *rdev, void r600_hpd_set_polarity(struct radeon_device *rdev,
enum radeon_hpd_id hpd); enum radeon_hpd_id hpd);
extern void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo);
static struct radeon_asic r600_asic = { static struct radeon_asic r600_asic = {
.init = &r600_init, .init = &r600_init,
...@@ -538,6 +547,7 @@ static struct radeon_asic r600_asic = { ...@@ -538,6 +547,7 @@ static struct radeon_asic r600_asic = {
.hpd_fini = &r600_hpd_fini, .hpd_fini = &r600_hpd_fini,
.hpd_sense = &r600_hpd_sense, .hpd_sense = &r600_hpd_sense,
.hpd_set_polarity = &r600_hpd_set_polarity, .hpd_set_polarity = &r600_hpd_set_polarity,
.ioctl_wait_idle = r600_ioctl_wait_idle,
}; };
/* /*
...@@ -582,6 +592,7 @@ static struct radeon_asic rv770_asic = { ...@@ -582,6 +592,7 @@ static struct radeon_asic rv770_asic = {
.hpd_fini = &r600_hpd_fini, .hpd_fini = &r600_hpd_fini,
.hpd_sense = &r600_hpd_sense, .hpd_sense = &r600_hpd_sense,
.hpd_set_polarity = &r600_hpd_set_polarity, .hpd_set_polarity = &r600_hpd_set_polarity,
.ioctl_wait_idle = r600_ioctl_wait_idle,
}; };
#endif #endif
...@@ -971,8 +971,7 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder ...@@ -971,8 +971,7 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
lvds->native_mode.vdisplay); lvds->native_mode.vdisplay);
lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c);
if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) lvds->panel_vcc_delay = min_t(u16, lvds->panel_vcc_delay, 2000);
lvds->panel_vcc_delay = 2000;
lvds->panel_pwr_delay = RBIOS8(lcd_info + 0x24); lvds->panel_pwr_delay = RBIOS8(lcd_info + 0x24);
lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf; lvds->panel_digon_delay = RBIOS16(lcd_info + 0x38) & 0xf;
......
...@@ -1343,7 +1343,7 @@ radeon_add_legacy_connector(struct drm_device *dev, ...@@ -1343,7 +1343,7 @@ radeon_add_legacy_connector(struct drm_device *dev,
radeon_connector->dac_load_detect = false; radeon_connector->dac_load_detect = false;
drm_connector_attach_property(&radeon_connector->base, drm_connector_attach_property(&radeon_connector->base,
rdev->mode_info.load_detect_property, rdev->mode_info.load_detect_property,
1); radeon_connector->dac_load_detect);
drm_connector_attach_property(&radeon_connector->base, drm_connector_attach_property(&radeon_connector->base,
rdev->mode_info.tv_std_property, rdev->mode_info.tv_std_property,
radeon_combios_get_tv_info(rdev)); radeon_combios_get_tv_info(rdev));
......
...@@ -308,6 +308,9 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, ...@@ -308,6 +308,9 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
} }
robj = gobj->driver_private; robj = gobj->driver_private;
r = radeon_bo_wait(robj, NULL, false); r = radeon_bo_wait(robj, NULL, false);
/* callback hw specific functions if any */
if (robj->rdev->asic->ioctl_wait_idle)
robj->rdev->asic->ioctl_wait_idle(robj->rdev, robj);
mutex_lock(&dev->struct_mutex); mutex_lock(&dev->struct_mutex);
drm_gem_object_unreference(gobj); drm_gem_object_unreference(gobj);
mutex_unlock(&dev->struct_mutex); mutex_unlock(&dev->struct_mutex);
......
...@@ -223,15 +223,31 @@ int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) ...@@ -223,15 +223,31 @@ int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
return 0; return 0;
} }
int rs400_mc_wait_for_idle(struct radeon_device *rdev)
{
unsigned i;
uint32_t tmp;
for (i = 0; i < rdev->usec_timeout; i++) {
/* read MC_STATUS */
tmp = RREG32(0x0150);
if (tmp & (1 << 2)) {
return 0;
}
DRM_UDELAY(1);
}
return -1;
}
void rs400_gpu_init(struct radeon_device *rdev) void rs400_gpu_init(struct radeon_device *rdev)
{ {
/* FIXME: HDP same place on rs400 ? */ /* FIXME: HDP same place on rs400 ? */
r100_hdp_reset(rdev); r100_hdp_reset(rdev);
/* FIXME: is this correct ? */ /* FIXME: is this correct ? */
r420_pipes_init(rdev); r420_pipes_init(rdev);
if (r300_mc_wait_for_idle(rdev)) { if (rs400_mc_wait_for_idle(rdev)) {
printk(KERN_WARNING "Failed to wait MC idle while " printk(KERN_WARNING "rs400: Failed to wait MC idle while "
"programming pipes. Bad things might happen.\n"); "programming pipes. Bad things might happen. %08x\n", RREG32(0x150));
} }
} }
...@@ -370,8 +386,8 @@ void rs400_mc_program(struct radeon_device *rdev) ...@@ -370,8 +386,8 @@ void rs400_mc_program(struct radeon_device *rdev)
r100_mc_stop(rdev, &save); r100_mc_stop(rdev, &save);
/* Wait for mc idle */ /* Wait for mc idle */
if (r300_mc_wait_for_idle(rdev)) if (rs400_mc_wait_for_idle(rdev))
dev_warn(rdev->dev, "Wait MC idle timeout before updating MC.\n"); dev_warn(rdev->dev, "rs400: Wait MC idle timeout before updating MC.\n");
WREG32(R_000148_MC_FB_LOCATION, WREG32(R_000148_MC_FB_LOCATION,
S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | S_000148_MC_FB_START(rdev->mc.vram_start >> 16) |
S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16)); S_000148_MC_FB_TOP(rdev->mc.vram_end >> 16));
...@@ -448,7 +464,6 @@ int rs400_suspend(struct radeon_device *rdev) ...@@ -448,7 +464,6 @@ int rs400_suspend(struct radeon_device *rdev)
void rs400_fini(struct radeon_device *rdev) void rs400_fini(struct radeon_device *rdev)
{ {
rs400_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
...@@ -527,7 +542,6 @@ int rs400_init(struct radeon_device *rdev) ...@@ -527,7 +542,6 @@ int rs400_init(struct radeon_device *rdev)
if (r) { if (r) {
/* Somethings want wront with the accel init stop accel */ /* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n"); dev_err(rdev->dev, "Disabling GPU acceleration\n");
rs400_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
......
...@@ -610,7 +610,6 @@ int rs600_suspend(struct radeon_device *rdev) ...@@ -610,7 +610,6 @@ int rs600_suspend(struct radeon_device *rdev)
void rs600_fini(struct radeon_device *rdev) void rs600_fini(struct radeon_device *rdev)
{ {
rs600_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
...@@ -689,7 +688,6 @@ int rs600_init(struct radeon_device *rdev) ...@@ -689,7 +688,6 @@ int rs600_init(struct radeon_device *rdev)
if (r) { if (r) {
/* Somethings want wront with the accel init stop accel */ /* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n"); dev_err(rdev->dev, "Disabling GPU acceleration\n");
rs600_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
......
...@@ -676,7 +676,6 @@ int rs690_suspend(struct radeon_device *rdev) ...@@ -676,7 +676,6 @@ int rs690_suspend(struct radeon_device *rdev)
void rs690_fini(struct radeon_device *rdev) void rs690_fini(struct radeon_device *rdev)
{ {
rs690_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
...@@ -756,7 +755,6 @@ int rs690_init(struct radeon_device *rdev) ...@@ -756,7 +755,6 @@ int rs690_init(struct radeon_device *rdev)
if (r) { if (r) {
/* Somethings want wront with the accel init stop accel */ /* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n"); dev_err(rdev->dev, "Disabling GPU acceleration\n");
rs690_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
......
...@@ -537,7 +537,6 @@ void rv515_set_safe_registers(struct radeon_device *rdev) ...@@ -537,7 +537,6 @@ void rv515_set_safe_registers(struct radeon_device *rdev)
void rv515_fini(struct radeon_device *rdev) void rv515_fini(struct radeon_device *rdev)
{ {
rv515_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
...@@ -615,13 +614,12 @@ int rv515_init(struct radeon_device *rdev) ...@@ -615,13 +614,12 @@ int rv515_init(struct radeon_device *rdev)
if (r) { if (r) {
/* Somethings want wront with the accel init stop accel */ /* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n"); dev_err(rdev->dev, "Disabling GPU acceleration\n");
rv515_suspend(rdev);
r100_cp_fini(rdev); r100_cp_fini(rdev);
r100_wb_fini(rdev); r100_wb_fini(rdev);
r100_ib_fini(rdev); r100_ib_fini(rdev);
radeon_irq_kms_fini(rdev);
rv370_pcie_gart_fini(rdev); rv370_pcie_gart_fini(rdev);
radeon_agp_fini(rdev); radeon_agp_fini(rdev);
radeon_irq_kms_fini(rdev);
rdev->accel_working = false; rdev->accel_working = false;
} }
return 0; return 0;
......
...@@ -887,6 +887,12 @@ static int rv770_startup(struct radeon_device *rdev) ...@@ -887,6 +887,12 @@ static int rv770_startup(struct radeon_device *rdev)
return r; return r;
} }
rv770_gpu_init(rdev); rv770_gpu_init(rdev);
r = r600_blit_init(rdev);
if (r) {
r600_blit_fini(rdev);
rdev->asic->copy = NULL;
dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
}
/* pin copy shader into vram */ /* pin copy shader into vram */
if (rdev->r600_blit.shader_obj) { if (rdev->r600_blit.shader_obj) {
r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false);
...@@ -1055,19 +1061,15 @@ int rv770_init(struct radeon_device *rdev) ...@@ -1055,19 +1061,15 @@ int rv770_init(struct radeon_device *rdev)
r = r600_pcie_gart_init(rdev); r = r600_pcie_gart_init(rdev);
if (r) if (r)
return r; return r;
r = r600_blit_init(rdev);
if (r) {
r600_blit_fini(rdev);
rdev->asic->copy = NULL;
dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r);
}
rdev->accel_working = true; rdev->accel_working = true;
r = rv770_startup(rdev); r = rv770_startup(rdev);
if (r) { if (r) {
rv770_suspend(rdev); dev_err(rdev->dev, "disabling GPU acceleration\n");
r600_cp_fini(rdev);
r600_wb_fini(rdev); r600_wb_fini(rdev);
radeon_ring_fini(rdev); r600_irq_fini(rdev);
radeon_irq_kms_fini(rdev);
rv770_pcie_gart_fini(rdev); rv770_pcie_gart_fini(rdev);
rdev->accel_working = false; rdev->accel_working = false;
} }
...@@ -1089,13 +1091,11 @@ int rv770_init(struct radeon_device *rdev) ...@@ -1089,13 +1091,11 @@ int rv770_init(struct radeon_device *rdev)
void rv770_fini(struct radeon_device *rdev) void rv770_fini(struct radeon_device *rdev)
{ {
rv770_suspend(rdev);
r600_blit_fini(rdev); r600_blit_fini(rdev);
r600_cp_fini(rdev);
r600_wb_fini(rdev);
r600_irq_fini(rdev); r600_irq_fini(rdev);
radeon_irq_kms_fini(rdev); radeon_irq_kms_fini(rdev);
radeon_ring_fini(rdev);
r600_wb_fini(rdev);
rv770_pcie_gart_fini(rdev); rv770_pcie_gart_fini(rdev);
radeon_gem_fini(rdev); radeon_gem_fini(rdev);
radeon_fence_driver_fini(rdev); radeon_fence_driver_fini(rdev);
......
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