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Commit cdcdbbf3 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'renesas-dt-for-v4.17' of... 

Merge tag 'renesas-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Renesas ARM Based SoC DT Updates for v4.17" from Simon Horman:

* Silk board with R-Car E2 (r8a7794) SoC
  - Add r1ex24002 EEPROM to DT

    Magnus Damm says "Extend the Silk board support to include U14 which is
    an I2C based EEPROM hooked up to the I2C1 bus."

  - Add GPIO keys to DT

    Magnus Damm says "Extend the Silk board support to include SW3, SW4,
    SW6 and SW12. They are all connected via GPIO lines and handled by the
    gpio-keys driver"

* Marzen board with R-Car H1 (r7a7779) SoC
  - Add SDHI0 VCCQ Regulator

    Magnus Damm says "Add support for the on-board voltage regulator hooked
    up to GPIO3_20 on r8a7779 Marzen. The board schematics describes the
    regulator as U4 TPS2110A. Input wise, U4 has D0 fixed to ground, D1
    tied to GPIO3_20 while IN1 is fixed to 3.3V and IN2 is fixed to 1.8V.
    OUT goes to the pull-ups for the data pins of SDHI0."

* Porter board with R-Car M3W (r8a7791) SoC
  - Fix HDMI output routing

    Laurent Pinchart says "The HDMI encoder is connected to the RGB output
    of the DU, which is port@0, not port@1."

* iWave Systems RZ/G1E SODIMM System On Module (iW-RainboW-G22M-SM) and
  iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
  - Enable cmt0

* Stout board with R-Car H2 (r8a7790) SoC
  - Initial support

* Lager board with R-Car H2 (r8a7790) SoC
  - Add CEC clock for HDMI transmitter

    Niklas Söderlund says "The adv7511 on the Lager board has a 12 MHz
    fixed clock for the CEC block. Specify this in the dts to enable CEC
    support."

  - Move cec_clock to root node

    By definition nodes without a bus address do not belong on the bus

* kzm9d board with EMMA Mobile EV2 (EMEV2) SoC
  - Fix "debounce-interval" property misspelling

* RZ/G1M (r8a7743) and RZ/G1H (r8a7745) SoCs
  - Add IPMMU DT nodes
  - Add VSP support

* R-Car Gen2 boards
  - Use I2C demuxer for

    This allows run-time switching between alternate I2C IP blocks

* R-Car Gen2 and RZ/G1 SoCs
  - Clean up DT files to ease future maintenance
    + add soc node for IP attached to the bus
    + sort subnodes of soc and root node
    + consistently use single space after =

* R-Car H2 (r8a7790), M3-W (r8a7791) and M3-N (r7a7793) SoCs
  - Reduce size of thermal registers

    According to the "User's Manual: Hardware" v2.00 the registers at base
    0xe61f0000 extend to an offset of 0x10, rather than 0x14 which is the
    case on the r8a73a4 (R-Mobile APE6).

    This should not have any runtime affect as mapping granularity is
    PAGE_SIZE.

* tag 'renesas-dt-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (47 commits)
  ARM: dts: silk: Add GPIO keys to DT
  ARM: dts: silk: Add r1ex24002 EEPROM to DT
  ARM: dts: marzen: Add SDHI0 VCCQ Regulator
  ARM: dts: stout: Initial r8a7790 Stout board support
  ARM: dts: lager: Move cec_clock to root node
  ARM: dts: kzm9d: Fix "debounce-interval" property misspelling
  ARM: dts: gose: use demuxer for I2C4
  ARM: dts: gose: use demuxer for I2C2
  ARM: dts: silk: use demuxer for I2C1
  ARM: dts: alt: use demuxer for I2C1
  ARM: dts: porter: use demuxer for I2C2
  ARM: dts: koelsch: use demuxer for I2C4
  ARM: dts: koelsch: use demuxer for I2C2
  ARM: dts: lager: use demuxer for IIC3/I2C3
  ARM: dts: lager: use demuxer for IIC2/I2C2
  ARM: dts: r8a7745: Add VSP support
  ARM: dts: r8a7743: Add VSP support
  ARM: dts: r8a7745: Add IPMMU DT nodes
  ARM: dts: r8a7743: Add IPMMU DT nodes
  ARM: dts: r8a7745: sort subnodes of soc node
  ...
parents e5bdf777 a24a5821
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Showing with 8436 additions and 7337 deletions
arch/arm/boot/dts/Makefile
View file @ cdcdbbf3
...@@ -797,6 +797,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \ ...@@ -797,6 +797,7 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
r8a7778-bockw.dtb \ r8a7778-bockw.dtb \
r8a7779-marzen.dtb \ r8a7779-marzen.dtb \
r8a7790-lager.dtb \ r8a7790-lager.dtb \
r8a7790-stout.dtb \
r8a7791-koelsch.dtb \ r8a7791-koelsch.dtb \
r8a7791-porter.dtb \ r8a7791-porter.dtb \
r8a7792-blanche.dtb \ r8a7792-blanche.dtb \
......
arch/arm/boot/dts/emev2-kzm9d.dts
View file @ cdcdbbf3
...@@ -38,28 +38,28 @@ gpio_keys { ...@@ -38,28 +38,28 @@ gpio_keys {
#size-cells = <0>; #size-cells = <0>;
one { one {
debounce_interval = <50>; debounce-interval = <50>;
wakeup-source; wakeup-source;
label = "DSW2-1"; label = "DSW2-1";
linux,code = <KEY_1>; linux,code = <KEY_1>;
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
}; };
two { two {
debounce_interval = <50>; debounce-interval = <50>;
wakeup-source; wakeup-source;
label = "DSW2-2"; label = "DSW2-2";
linux,code = <KEY_2>; linux,code = <KEY_2>;
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
}; };
three { three {
debounce_interval = <50>; debounce-interval = <50>;
wakeup-source; wakeup-source;
label = "DSW2-3"; label = "DSW2-3";
linux,code = <KEY_3>; linux,code = <KEY_3>;
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
}; };
four { four {
debounce_interval = <50>; debounce-interval = <50>;
wakeup-source; wakeup-source;
label = "DSW2-4"; label = "DSW2-4";
linux,code = <KEY_4>; linux,code = <KEY_4>;
......
arch/arm/boot/dts/r8a7743-iwg20m.dtsi
View file @ cdcdbbf3
...@@ -34,6 +34,10 @@ reg_3p3v: 3p3v { ...@@ -34,6 +34,10 @@ reg_3p3v: 3p3v {
}; };
}; };
&cmt0 {
status = "okay";
};
&extal_clk { &extal_clk {
clock-frequency = <20000000>; clock-frequency = <20000000>;
}; };
......
arch/arm/boot/dts/r8a7743.dtsi
View file @ cdcdbbf3
...@@ -141,29 +141,6 @@ soc { ...@@ -141,29 +141,6 @@ soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
apmu@e6152000 {
compatible = "renesas,r8a7743-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
gpio0: gpio@e6050000 { gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7743", compatible = "renesas,gpio-r8a7743",
"renesas,rcar-gen2-gpio"; "renesas,rcar-gen2-gpio";
...@@ -284,6 +261,48 @@ gpio7: gpio@e6055800 { ...@@ -284,6 +261,48 @@ gpio7: gpio@e6055800 {
resets = <&cpg 904>; resets = <&cpg 904>;
}; };
pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a7743";
reg = <0 0xe6060000 0 0x250>;
};
tpu: pwm@e60f0000 {
compatible = "renesas,tpu-r8a7743", "renesas,tpu";
reg = <0 0xe60f0000 0 0x148>;
clocks = <&cpg CPG_MOD 304>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 304>;
#pwm-cells = <3>;
status = "disabled";
};
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a7743-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
clocks = <&extal_clk>, <&usb_extal_clk>;
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
apmu@e6152000 {
compatible = "renesas,r8a7743-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7743-rst";
reg = <0 0xe6160000 0 0x100>;
};
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7743-sysc";
reg = <0 0xe6180000 0 0x200>;
#power-domain-cells = <1>;
};
irqc: interrupt-controller@e61c0000 { irqc: interrupt-controller@e61c0000 {
compatible = "renesas,irqc-r8a7743", "renesas,irqc"; compatible = "renesas,irqc-r8a7743", "renesas,irqc";
#interrupt-cells = <2>; #interrupt-cells = <2>;
...@@ -316,268 +335,130 @@ thermal: thermal@e61f0000 { ...@@ -316,268 +335,130 @@ thermal: thermal@e61f0000 {
#thermal-sensor-cells = <0>; #thermal-sensor-cells = <0>;
}; };
cmt0: timer@ffca0000 { ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,r8a7743-cmt0", compatible = "renesas,ipmmu-r8a7743",
"renesas,rcar-gen2-cmt0"; "renesas,ipmmu-vmsa";
reg = <0 0xffca0000 0 0x1004>; reg = <0 0xe6280000 0 0x1000>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>; #iommu-cells = <1>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled"; status = "disabled";
}; };
cmt1: timer@e6130000 { ipmmu_sy1: mmu@e6290000 {
compatible = "renesas,r8a7743-cmt1", compatible = "renesas,ipmmu-r8a7743",
"renesas,rcar-gen2-cmt1"; "renesas,ipmmu-vmsa";
reg = <0 0xe6130000 0 0x1004>; reg = <0 0xe6290000 0 0x1000>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, #iommu-cells = <1>;
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled"; status = "disabled";
}; };
cpg: clock-controller@e6150000 { ipmmu_ds: mmu@e6740000 {
compatible = "renesas,r8a7743-cpg-mssr"; compatible = "renesas,ipmmu-r8a7743",
reg = <0 0xe6150000 0 0x1000>; "renesas,ipmmu-vmsa";
clocks = <&extal_clk>, <&usb_extal_clk>; reg = <0 0xe6740000 0 0x1000>;
clock-names = "extal", "usb_extal"; interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
#clock-cells = <2>; <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
#power-domain-cells = <0>; #iommu-cells = <1>;
#reset-cells = <1>; status = "disabled";
}; };
prr: chipid@ff000044 { ipmmu_mp: mmu@ec680000 {
compatible = "renesas,prr"; compatible = "renesas,ipmmu-r8a7743",
reg = <0 0xff000044 0 4>; "renesas,ipmmu-vmsa";
reg = <0 0xec680000 0 0x1000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
status = "disabled";
}; };
rst: reset-controller@e6160000 { ipmmu_mx: mmu@fe951000 {
compatible = "renesas,r8a7743-rst"; compatible = "renesas,ipmmu-r8a7743",
reg = <0 0xe6160000 0 0x100>; "renesas,ipmmu-vmsa";
reg = <0 0xfe951000 0 0x1000>;
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
status = "disabled";
}; };
sysc: system-controller@e6180000 { ipmmu_gp: mmu@e62a0000 {
compatible = "renesas,r8a7743-sysc"; compatible = "renesas,ipmmu-r8a7743",
reg = <0 0xe6180000 0 0x200>; "renesas,ipmmu-vmsa";
#power-domain-cells = <1>; reg = <0 0xe62a0000 0 0x1000>;
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
status = "disabled";
}; };
pfc: pin-controller@e6060000 { icram0: sram@e63a0000 {
compatible = "renesas,pfc-r8a7743"; compatible = "mmio-sram";
reg = <0 0xe6060000 0 0x250>; reg = <0 0xe63a0000 0 0x12000>;
}; };
dmac0: dma-controller@e6700000 { icram1: sram@e63c0000 {
compatible = "renesas,dmac-r8a7743", compatible = "mmio-sram";
"renesas,rcar-dmac"; reg = <0 0xe63c0000 0 0x1000>;
reg = <0 0xe6700000 0 0x20000>; #address-cells = <1>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH #size-cells = <1>;
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH ranges = <0 0 0xe63c0000 0x1000>;
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH smp-sram@0 {
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH compatible = "renesas,smp-sram";
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH reg = <0 0x10>;
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH icram2: sram@e6300000 {
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH compatible = "mmio-sram";
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6300000 0 0x40000>;
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH /* The memory map in the User's Manual maps the cores to
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>; * bus numbers
interrupt-names = "error", */
"ch0", "ch1", "ch2", "ch3", i2c0: i2c@e6508000 {
"ch4", "ch5", "ch6", "ch7", #address-cells = <1>;
"ch8", "ch9", "ch10", "ch11", #size-cells = <0>;
"ch12", "ch13", "ch14"; compatible = "renesas,i2c-r8a7743",
clocks = <&cpg CPG_MOD 219>; "renesas,rcar-gen2-i2c";
clock-names = "fck"; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 219>; resets = <&cpg 931>;
#dma-cells = <1>; i2c-scl-internal-delay-ns = <6>;
dma-channels = <15>; status = "disabled";
}; };
dmac1: dma-controller@e6720000 { i2c1: i2c@e6518000 {
compatible = "renesas,dmac-r8a7743", #address-cells = <1>;
"renesas,rcar-dmac"; #size-cells = <0>;
reg = <0 0xe6720000 0 0x20000>; compatible = "renesas,i2c-r8a7743",
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH "renesas,rcar-gen2-i2c";
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6518000 0 0x40>;
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH clocks = <&cpg CPG_MOD 930>;
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 218>; resets = <&cpg 930>;
#dma-cells = <1>; i2c-scl-internal-delay-ns = <6>;
dma-channels = <15>; status = "disabled";
}; };
audma0: dma-controller@ec700000 { i2c2: i2c@e6530000 {
compatible = "renesas,dmac-r8a7743", #address-cells = <1>;
"renesas,rcar-dmac"; #size-cells = <0>;
reg = <0 0xec700000 0 0x10000>; compatible = "renesas,i2c-r8a7743",
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH "renesas,rcar-gen2-i2c";
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6530000 0 0x40>;
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH clocks = <&cpg CPG_MOD 929>;
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 502>; resets = <&cpg 929>;
#dma-cells = <1>; i2c-scl-internal-delay-ns = <6>;
dma-channels = <13>; status = "disabled";
};
audma1: dma-controller@ec720000 {
compatible = "renesas,dmac-r8a7743",
"renesas,rcar-dmac";
reg = <0 0xec720000 0 0x10000>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,r8a7743-usb-dmac",
"renesas,usb-dmac";
reg = <0 0xe65a0000 0 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
};
usb_dmac1: dma-controller@e65b0000 {
compatible = "renesas,r8a7743-usb-dmac",
"renesas,usb-dmac";
reg = <0 0xe65b0000 0 0x100>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
};
/* The memory map in the User's Manual maps the cores to bus
* numbers
*/
i2c0: i2c@e6508000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7743",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c1: i2c@e6518000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7743",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 930>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c2: i2c@e6530000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7743",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
}; };
i2c3: i2c@e6540000 { i2c3: i2c@e6540000 {
...@@ -675,6 +556,168 @@ iic3: i2c@e60b0000 { ...@@ -675,6 +556,168 @@ iic3: i2c@e60b0000 {
status = "disabled"; status = "disabled";
}; };
hsusb: usb@e6590000 {
compatible = "renesas,usbhs-r8a7743",
"renesas,rcar-gen2-usbhs";
reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 704>;
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
<&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 704>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
status = "disabled";
};
usbphy: usb-phy@e6590100 {
compatible = "renesas,usb-phy-r8a7743",
"renesas,rcar-gen2-usb-phy";
reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cpg CPG_MOD 704>;
clock-names = "usbhs";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 704>;
status = "disabled";
usb0: usb-channel@0 {
reg = <0>;
#phy-cells = <1>;
};
usb2: usb-channel@2 {
reg = <2>;
#phy-cells = <1>;
};
};
usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,r8a7743-usb-dmac",
"renesas,usb-dmac";
reg = <0 0xe65a0000 0 0x100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
};
usb_dmac1: dma-controller@e65b0000 {
compatible = "renesas,r8a7743-usb-dmac",
"renesas,usb-dmac";
reg = <0 0xe65b0000 0 0x100>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
};
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7743",
"renesas,rcar-dmac";
reg = <0 0xe6700000 0 0x20000>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
dmac1: dma-controller@e6720000 {
compatible = "renesas,dmac-r8a7743",
"renesas,rcar-dmac";
reg = <0 0xe6720000 0 0x20000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a7743",
"renesas,etheravb-rcar-gen2";
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7743", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 917>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 917>;
status = "disabled";
};
scifa0: serial@e6c40000 { scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a7743", compatible = "renesas,scifa-r8a7743",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,rcar-gen2-scifa", "renesas,scifa";
...@@ -954,88 +997,6 @@ hscif2: serial@e62d0000 { ...@@ -954,88 +997,6 @@ hscif2: serial@e62d0000 {
status = "disabled"; status = "disabled";
}; };
icram2: sram@e6300000 {
compatible = "mmio-sram";
reg = <0 0xe6300000 0 0x40000>;
};
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
};
icram1: sram@e63c0000 {
compatible = "mmio-sram";
reg = <0 0xe63c0000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63c0000 0x1000>;
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
};
};
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7743",
"renesas,rcar-gen2-ether";
reg = <0 0xee700000 0 0x400>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a7743",
"renesas,etheravb-rcar-gen2";
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
mmcif0: mmc@ee200000 {
compatible = "renesas,mmcif-r8a7743",
"renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 315>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 315>;
reg-io-width = <4>;
max-frequency = <97500000>;
status = "disabled";
};
qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7743", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 917>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 917>;
status = "disabled";
};
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7743", compatible = "renesas,msiof-r8a7743",
"renesas,rcar-gen2-msiof"; "renesas,rcar-gen2-msiof";
...@@ -1084,26 +1045,6 @@ msiof2: spi@e6e00000 { ...@@ -1084,26 +1045,6 @@ msiof2: spi@e6e00000 {
status = "disabled"; status = "disabled";
}; };
/*
* pci1 and xhci share the same phy, therefore only one of them
* can be active at any one time. If both of them are enabled,
* a race condition will determine who'll control the phy.
* A firmware file is needed by the xhci driver in order for
* USB 3.0 to work properly.
*/
xhci: usb@ee000000 {
compatible = "renesas,xhci-r8a7743",
"renesas,rcar-gen2-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 328>;
phys = <&usb2 1>;
phy-names = "usb";
status = "disabled";
};
pwm0: pwm@e6e30000 { pwm0: pwm@e6e30000 {
compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar"; compatible = "renesas,pwm-r8a7743", "renesas,pwm-rcar";
reg = <0 0xe6e30000 0 0x8>; reg = <0 0xe6e30000 0 0x8>;
...@@ -1174,98 +1115,32 @@ pwm6: pwm@e6e36000 { ...@@ -1174,98 +1115,32 @@ pwm6: pwm@e6e36000 {
status = "disabled"; status = "disabled";
}; };
tpu: pwm@e60f0000 { can0: can@e6e80000 {
compatible = "renesas,tpu-r8a7743", "renesas,tpu"; compatible = "renesas,can-r8a7743",
reg = <0 0xe60f0000 0 0x148>; "renesas,rcar-gen2-can";
clocks = <&cpg CPG_MOD 304>; reg = <0 0xe6e80000 0 0x1000>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
resets = <&cpg 304>; clocks = <&cpg CPG_MOD 916>,
#pwm-cells = <3>; <&cpg CPG_CORE R8A7743_CLK_RCAN>,
status = "disabled"; <&can_clk>;
}; clock-names = "clkp1", "clkp2", "can_clk";
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7743",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
sdhi1: sd@ee140000 {
compatible = "renesas,sdhi-r8a7743",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 312>;
status = "disabled";
};
sdhi2: sd@ee160000 {
compatible = "renesas,sdhi-r8a7743",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 311>;
status = "disabled";
};
hsusb: usb@e6590000 {
compatible = "renesas,usbhs-r8a7743",
"renesas,rcar-gen2-usbhs";
reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 704>;
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
<&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 704>; resets = <&cpg 916>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
usbphy: usb-phy@e6590100 { can1: can@e6e88000 {
compatible = "renesas,usb-phy-r8a7743", compatible = "renesas,can-r8a7743",
"renesas,rcar-gen2-usb-phy"; "renesas,rcar-gen2-can";
reg = <0 0xe6590100 0 0x100>; reg = <0 0xe6e88000 0 0x1000>;
#address-cells = <1>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
#size-cells = <0>; clocks = <&cpg CPG_MOD 915>,
clocks = <&cpg CPG_MOD 704>; <&cpg CPG_CORE R8A7743_CLK_RCAN>,
clock-names = "usbhs"; <&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 704>; resets = <&cpg 915>;
status = "disabled"; status = "disabled";
usb0: usb-channel@0 {
reg = <0>;
#phy-cells = <1>;
};
usb2: usb-channel@2 {
reg = <2>;
#phy-cells = <1>;
};
}; };
vin0: video@e6ef0000 { vin0: video@e6ef0000 {
...@@ -1301,177 +1176,21 @@ vin2: video@e6ef2000 { ...@@ -1301,177 +1176,21 @@ vin2: video@e6ef2000 {
status = "disabled"; status = "disabled";
}; };
du: display@feb00000 { rcar_sound: sound@ec500000 {
compatible = "renesas,du-r8a7743"; /*
reg = <0 0xfeb00000 0 0x40000>, * #sound-dai-cells is required
<0 0xfeb90000 0 0x1c>; *
reg-names = "du", "lvds.0"; * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; */
clocks = <&cpg CPG_MOD 724>, compatible = "renesas,rcar_sound-r8a7743",
<&cpg CPG_MOD 723>, "renesas,rcar_sound-gen2";
<&cpg CPG_MOD 726>; reg = <0 0xec500000 0 0x1000>, /* SCU */
clock-names = "du.0", "du.1", "lvds.0"; <0 0xec5a0000 0 0x100>, /* ADG */
status = "disabled"; <0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
ports { <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
#address-cells = <1>; reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
#size-cells = <0>;
port@0 {
reg = <0>;
du_out_rgb: endpoint {
};
};
port@1 {
reg = <1>;
du_out_lvds0: endpoint {
};
};
};
};
can0: can@e6e80000 {
compatible = "renesas,can-r8a7743",
"renesas,rcar-gen2-can";
reg = <0 0xe6e80000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A7743_CLK_RCAN>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 916>;
status = "disabled";
};
can1: can@e6e88000 {
compatible = "renesas,can-r8a7743",
"renesas,rcar-gen2-can";
reg = <0 0xe6e88000 0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>,
<&cpg CPG_CORE R8A7743_CLK_RCAN>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 915>;
status = "disabled";
};
pci0: pci@ee090000 {
compatible = "renesas,pci-r8a7743",
"renesas,pci-rcar-gen2";
device_type = "pci";
reg = <0 0xee090000 0 0xc00>,
<0 0xee080000 0 0x1100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
usb@2,0 {
reg = <0x1000 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
};
pci1: pci@ee0d0000 {
compatible = "renesas,pci-r8a7743",
"renesas,pci-rcar-gen2";
device_type = "pci";
reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x10800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
usb@2,0 {
reg = <0x11000 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
};
pciec: pcie@fe000000 {
compatible = "renesas,pcie-r8a7743",
"renesas,pcie-rcar-gen2";
reg = <0 0xfe000000 0 0x80000>;
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x00 0xff>;
device_type = "pci";
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 319>;
status = "disabled";
};
rcar_sound: sound@ec500000 {
/*
* #sound-dai-cells is required
*
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
compatible = "renesas,rcar_sound-r8a7743",
"renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>, clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
...@@ -1641,6 +1360,369 @@ ssi9: ssi-9 { ...@@ -1641,6 +1360,369 @@ ssi9: ssi-9 {
}; };
}; };
}; };
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a7743",
"renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
audma1: dma-controller@ec720000 {
compatible = "renesas,dmac-r8a7743",
"renesas,rcar-dmac";
reg = <0 0xec720000 0 0x10000>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
/*
* pci1 and xhci share the same phy, therefore only one of them
* can be active at any one time. If both of them are enabled,
* a race condition will determine who'll control the phy.
* A firmware file is needed by the xhci driver in order for
* USB 3.0 to work properly.
*/
xhci: usb@ee000000 {
compatible = "renesas,xhci-r8a7743",
"renesas,rcar-gen2-xhci";
reg = <0 0xee000000 0 0xc00>;
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 328>;
phys = <&usb2 1>;
phy-names = "usb";
status = "disabled";
};
pci0: pci@ee090000 {
compatible = "renesas,pci-r8a7743",
"renesas,pci-rcar-gen2";
device_type = "pci";
reg = <0 0xee090000 0 0xc00>,
<0 0xee080000 0 0x1100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
usb@2,0 {
reg = <0x1000 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
};
pci1: pci@ee0d0000 {
compatible = "renesas,pci-r8a7743",
"renesas,pci-rcar-gen2";
device_type = "pci";
reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x10800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
usb@2,0 {
reg = <0x11000 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7743",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
sdhi1: sd@ee140000 {
compatible = "renesas,sdhi-r8a7743",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 312>;
status = "disabled";
};
sdhi2: sd@ee160000 {
compatible = "renesas,sdhi-r8a7743",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 311>;
status = "disabled";
};
mmcif0: mmc@ee200000 {
compatible = "renesas,mmcif-r8a7743",
"renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 315>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 315>;
reg-io-width = <4>;
max-frequency = <97500000>;
status = "disabled";
};
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7743",
"renesas,rcar-gen2-ether";
reg = <0 0xee700000 0 0x400>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
pciec: pcie@fe000000 {
compatible = "renesas,pcie-r8a7743",
"renesas,pcie-rcar-gen2";
reg = <0 0xfe000000 0 0x80000>;
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x00 0xff>;
device_type = "pci";
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 319>;
status = "disabled";
};
vsp@fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 131>;
};
vsp@fe930000 {
compatible = "renesas,vsp1";
reg = <0 0xfe930000 0 0x8000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 128>;
};
vsp@fe938000 {
compatible = "renesas,vsp1";
reg = <0 0xfe938000 0 0x8000>;
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 127>;
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 127>;
};
du: display@feb00000 {
compatible = "renesas,du-r8a7743";
reg = <0 0xfeb00000 0 0x40000>,
<0 0xfeb90000 0 0x1c>;
reg-names = "du", "lvds.0";
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 726>;
clock-names = "du.0", "du.1", "lvds.0";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
du_out_rgb: endpoint {
};
};
port@1 {
reg = <1>;
du_out_lvds0: endpoint {
};
};
};
};
prr: chipid@ff000044 {
compatible = "renesas,prr";
reg = <0 0xff000044 0 4>;
};
cmt0: timer@ffca0000 {
compatible = "renesas,r8a7743-cmt0",
"renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
};
cmt1: timer@e6130000 {
compatible = "renesas,r8a7743-cmt1",
"renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7743_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled";
};
}; };
thermal-zones { thermal-zones {
......
arch/arm/boot/dts/r8a7745-iwg22m.dtsi
View file @ cdcdbbf3
...@@ -29,6 +29,10 @@ reg_3p3v: 3p3v { ...@@ -29,6 +29,10 @@ reg_3p3v: 3p3v {
}; };
}; };
&cmt0 {
status = "okay";
};
&extal_clk { &extal_clk {
clock-frequency = <20000000>; clock-frequency = <20000000>;
}; };
......
arch/arm/boot/dts/r8a7745.dtsi
View file @ cdcdbbf3
...@@ -121,29 +121,6 @@ soc { ...@@ -121,29 +121,6 @@ soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
apmu@e6151000 {
compatible = "renesas,r8a7745-apmu", "renesas,apmu";
reg = <0 0xe6151000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
gpio0: gpio@e6050000 { gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7745", compatible = "renesas,gpio-r8a7745",
"renesas,rcar-gen2-gpio"; "renesas,rcar-gen2-gpio";
...@@ -249,55 +226,18 @@ gpio6: gpio@e6055400 { ...@@ -249,55 +226,18 @@ gpio6: gpio@e6055400 {
resets = <&cpg 905>; resets = <&cpg 905>;
}; };
irqc: interrupt-controller@e61c0000 { pfc: pin-controller@e6060000 {
compatible = "renesas,irqc-r8a7745", "renesas,irqc"; compatible = "renesas,pfc-r8a7745";
#interrupt-cells = <2>; reg = <0 0xe6060000 0 0x11c>;
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
cmt0: timer@ffca0000 {
compatible = "renesas,r8a7745-cmt0",
"renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
}; };
cmt1: timer@e6130000 { tpu: pwm@e60f0000 {
compatible = "renesas,r8a7745-cmt1", compatible = "renesas,tpu-r8a7745", "renesas,tpu";
"renesas,rcar-gen2-cmt1"; reg = <0 0xe60f0000 0 0x148>;
reg = <0 0xe6130000 0 0x1004>; clocks = <&cpg CPG_MOD 304>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 329>; resets = <&cpg 304>;
#pwm-cells = <3>;
status = "disabled"; status = "disabled";
}; };
...@@ -311,9 +251,10 @@ cpg: clock-controller@e6150000 { ...@@ -311,9 +251,10 @@ cpg: clock-controller@e6150000 {
#reset-cells = <1>; #reset-cells = <1>;
}; };
prr: chipid@ff000044 { apmu@e6151000 {
compatible = "renesas,prr"; compatible = "renesas,r8a7745-apmu", "renesas,apmu";
reg = <0 0xff000044 0 4>; reg = <0 0xe6151000 0 0x188>;
cpus = <&cpu0 &cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
...@@ -327,450 +268,355 @@ sysc: system-controller@e6180000 { ...@@ -327,450 +268,355 @@ sysc: system-controller@e6180000 {
#power-domain-cells = <1>; #power-domain-cells = <1>;
}; };
pfc: pin-controller@e6060000 { irqc: interrupt-controller@e61c0000 {
compatible = "renesas,pfc-r8a7745"; compatible = "renesas,irqc-r8a7745", "renesas,irqc";
reg = <0 0xe6060000 0 0x11c>; #interrupt-cells = <2>;
}; interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
dmac0: dma-controller@e6700000 { interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
compatible = "renesas,dmac-r8a7745", <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
"renesas,rcar-dmac"; <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
reg = <0 0xe6700000 0 0x20000>; <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH clocks = <&cpg CPG_MOD 407>;
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 219>; resets = <&cpg 407>;
#dma-cells = <1>;
dma-channels = <15>;
}; };
dmac1: dma-controller@e6720000 { ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,dmac-r8a7745", compatible = "renesas,ipmmu-r8a7745",
"renesas,rcar-dmac"; "renesas,ipmmu-vmsa";
reg = <0 0xe6720000 0 0x20000>; reg = <0 0xe6280000 0 0x1000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
}; };
audma0: dma-controller@ec700000 { ipmmu_sy1: mmu@e6290000 {
compatible = "renesas,dmac-r8a7745", compatible = "renesas,ipmmu-r8a7745",
"renesas,rcar-dmac"; "renesas,ipmmu-vmsa";
reg = <0 0xec700000 0 0x10000>; reg = <0 0xe6290000 0 0x1000>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
}; };
usb_dmac0: dma-controller@e65a0000 { ipmmu_ds: mmu@e6740000 {
compatible = "renesas,r8a7745-usb-dmac", compatible = "renesas,ipmmu-r8a7745",
"renesas,usb-dmac"; "renesas,ipmmu-vmsa";
reg = <0 0xe65a0000 0 0x100>; reg = <0 0xe6740000 0 0x1000>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1"; #iommu-cells = <1>;
clocks = <&cpg CPG_MOD 330>; status = "disabled";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
}; };
usb_dmac1: dma-controller@e65b0000 { ipmmu_mp: mmu@ec680000 {
compatible = "renesas,r8a7745-usb-dmac", compatible = "renesas,ipmmu-r8a7745",
"renesas,usb-dmac"; "renesas,ipmmu-vmsa";
reg = <0 0xe65b0000 0 0x100>; reg = <0 0xec680000 0 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; #iommu-cells = <1>;
interrupt-names = "ch0", "ch1"; status = "disabled";
clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
}; };
scifa0: serial@e6c40000 { ipmmu_mx: mmu@fe951000 {
compatible = "renesas,scifa-r8a7745", compatible = "renesas,ipmmu-r8a7745",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,ipmmu-vmsa";
reg = <0 0xe6c40000 0 0x40>; reg = <0 0xfe951000 0 0x1000>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
clocks = <&cpg CPG_MOD 204>; <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck"; #iommu-cells = <1>;
dmas = <&dmac0 0x21>, <&dmac0 0x22>,
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 204>;
status = "disabled"; status = "disabled";
}; };
scifa1: serial@e6c50000 { ipmmu_gp: mmu@e62a0000 {
compatible = "renesas,scifa-r8a7745", compatible = "renesas,ipmmu-r8a7745",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,ipmmu-vmsa";
reg = <0 0xe6c50000 0 0x40>; reg = <0 0xe62a0000 0 0x1000>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
clocks = <&cpg CPG_MOD 203>; <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck"; #iommu-cells = <1>;
dmas = <&dmac0 0x25>, <&dmac0 0x26>,
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 203>;
status = "disabled"; status = "disabled";
}; };
scifa2: serial@e6c60000 { icram0: sram@e63a0000 {
compatible = "renesas,scifa-r8a7745", compatible = "mmio-sram";
"renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe63a0000 0 0x12000>;
reg = <0 0xe6c60000 0 0x40>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 202>;
clock-names = "fck";
dmas = <&dmac0 0x27>, <&dmac0 0x28>,
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 202>;
status = "disabled";
}; };
scifa3: serial@e6c70000 { icram1: sram@e63c0000 {
compatible = "renesas,scifa-r8a7745", compatible = "mmio-sram";
"renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe63c0000 0 0x1000>;
reg = <0 0xe6c70000 0 0x40>; #address-cells = <1>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; #size-cells = <1>;
clocks = <&cpg CPG_MOD 1106>; ranges = <0 0 0xe63c0000 0x1000>;
clock-names = "fck";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, smp-sram@0 {
<&dmac1 0x1b>, <&dmac1 0x1c>; compatible = "renesas,smp-sram";
dma-names = "tx", "rx", "tx", "rx"; reg = <0 0x10>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; };
resets = <&cpg 1106>;
status = "disabled";
}; };
scifa4: serial@e6c78000 { icram2: sram@e6300000 {
compatible = "renesas,scifa-r8a7745", compatible = "mmio-sram";
"renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6300000 0 0x40000>;
reg = <0 0xe6c78000 0 0x40>; };
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; i2c0: i2c@e6508000 {
clocks = <&cpg CPG_MOD 1107>; #address-cells = <1>;
clock-names = "fck"; #size-cells = <0>;
dmas = <&dmac0 0x1f>, <&dmac0 0x20>, compatible = "renesas,i2c-r8a7745",
<&dmac1 0x1f>, <&dmac1 0x20>; "renesas,rcar-gen2-i2c";
dma-names = "tx", "rx", "tx", "rx"; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 1107>; resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
scifa5: serial@e6c80000 { i2c1: i2c@e6518000 {
compatible = "renesas,scifa-r8a7745", #address-cells = <1>;
"renesas,rcar-gen2-scifa", "renesas,scifa"; #size-cells = <0>;
reg = <0 0xe6c80000 0 0x40>; compatible = "renesas,i2c-r8a7745",
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 1108>; reg = <0 0xe6518000 0 0x40>;
clock-names = "fck"; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x23>, <&dmac0 0x24>, clocks = <&cpg CPG_MOD 930>;
<&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 1108>; resets = <&cpg 930>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
scifb0: serial@e6c20000 { i2c2: i2c@e6530000 {
compatible = "renesas,scifb-r8a7745", #address-cells = <1>;
"renesas,rcar-gen2-scifb", "renesas,scifb"; #size-cells = <0>;
reg = <0 0xe6c20000 0 0x100>; compatible = "renesas,i2c-r8a7745",
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 206>; reg = <0 0xe6530000 0 0x40>;
clock-names = "fck"; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, clocks = <&cpg CPG_MOD 929>;
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 206>; resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
scifb1: serial@e6c30000 { i2c3: i2c@e6540000 {
compatible = "renesas,scifb-r8a7745", #address-cells = <1>;
"renesas,rcar-gen2-scifb", "renesas,scifb"; #size-cells = <0>;
reg = <0 0xe6c30000 0 0x100>; compatible = "renesas,i2c-r8a7745",
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 207>; reg = <0 0xe6540000 0 0x40>;
clock-names = "fck"; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x19>, <&dmac0 0x1a>, clocks = <&cpg CPG_MOD 928>;
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 207>; resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
scifb2: serial@e6ce0000 { i2c4: i2c@e6520000 {
compatible = "renesas,scifb-r8a7745", #address-cells = <1>;
"renesas,rcar-gen2-scifb", "renesas,scifb"; #size-cells = <0>;
reg = <0 0xe6ce0000 0 0x100>; compatible = "renesas,i2c-r8a7745",
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 216>; reg = <0 0xe6520000 0 0x40>;
clock-names = "fck"; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, clocks = <&cpg CPG_MOD 927>;
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 216>; resets = <&cpg 927>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
scif0: serial@e6e60000 { i2c5: i2c@e6528000 {
compatible = "renesas,scif-r8a7745", #address-cells = <1>;
"renesas,rcar-gen2-scif", "renesas,scif"; #size-cells = <0>;
reg = <0 0xe6e60000 0 0x40>; compatible = "renesas,i2c-r8a7745",
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 721>, reg = <0 0xe6528000 0 0x40>;
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck", "brg_int", "scif_clk"; clocks = <&cpg CPG_MOD 925>;
dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 721>; resets = <&cpg 925>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
scif1: serial@e6e68000 { iic0: i2c@e6500000 {
compatible = "renesas,scif-r8a7745", #address-cells = <1>;
"renesas,rcar-gen2-scif", "renesas,scif"; #size-cells = <0>;
reg = <0 0xe6e68000 0 0x40>; compatible = "renesas,iic-r8a7745",
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-iic",
clocks = <&cpg CPG_MOD 720>, "renesas,rmobile-iic";
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; reg = <0 0xe6500000 0 0x425>;
clock-names = "fck", "brg_int", "scif_clk"; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, clocks = <&cpg CPG_MOD 318>;
<&dmac1 0x2d>, <&dmac1 0x2e>; dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 720>; resets = <&cpg 318>;
status = "disabled"; status = "disabled";
}; };
scif2: serial@e6e58000 { iic1: i2c@e6510000 {
compatible = "renesas,scif-r8a7745", #address-cells = <1>;
"renesas,rcar-gen2-scif", "renesas,scif"; #size-cells = <0>;
reg = <0 0xe6e58000 0 0x40>; compatible = "renesas,iic-r8a7745",
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-iic",
clocks = <&cpg CPG_MOD 719>, "renesas,rmobile-iic";
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; reg = <0 0xe6510000 0 0x425>;
clock-names = "fck", "brg_int", "scif_clk"; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, clocks = <&cpg CPG_MOD 323>;
<&dmac1 0x2b>, <&dmac1 0x2c>; dmas = <&dmac0 0x65>, <&dmac0 0x66>,
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 719>; resets = <&cpg 323>;
status = "disabled"; status = "disabled";
}; };
scif3: serial@e6ea8000 { hsusb: usb@e6590000 {
compatible = "renesas,scif-r8a7745", compatible = "renesas,usbhs-r8a7745",
"renesas,rcar-gen2-scif", "renesas,scif"; "renesas,rcar-gen2-usbhs";
reg = <0 0xe6ea8000 0 0x40>; reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 718>, clocks = <&cpg CPG_MOD 704>;
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
clock-names = "fck", "brg_int", "scif_clk"; <&usb_dmac1 0>, <&usb_dmac1 1>;
dmas = <&dmac0 0x2f>, <&dmac0 0x30>, dma-names = "ch0", "ch1", "ch2", "ch3";
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 718>; resets = <&cpg 704>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
status = "disabled"; status = "disabled";
}; };
scif4: serial@e6ee0000 { usbphy: usb-phy@e6590100 {
compatible = "renesas,scif-r8a7745", compatible = "renesas,usb-phy-r8a7745",
"renesas,rcar-gen2-scif", "renesas,scif"; "renesas,rcar-gen2-usb-phy";
reg = <0 0xe6ee0000 0 0x40>; reg = <0 0xe6590100 0 0x100>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>;
clocks = <&cpg CPG_MOD 715>, #size-cells = <0>;
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; clocks = <&cpg CPG_MOD 704>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "usbhs";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 715>; resets = <&cpg 704>;
status = "disabled"; status = "disabled";
usb0: usb-channel@0 {
reg = <0>;
#phy-cells = <1>;
};
usb2: usb-channel@2 {
reg = <2>;
#phy-cells = <1>;
};
}; };
scif5: serial@e6ee8000 { usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,scif-r8a7745", compatible = "renesas,r8a7745-usb-dmac",
"renesas,rcar-gen2-scif", "renesas,scif"; "renesas,usb-dmac";
reg = <0 0xe6ee8000 0 0x40>; reg = <0 0xe65a0000 0 0x100>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 714>, GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; interrupt-names = "ch0", "ch1";
clock-names = "fck", "brg_int", "scif_clk"; clocks = <&cpg CPG_MOD 330>;
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 714>;
status = "disabled";
};
hscif0: serial@e62c0000 {
compatible = "renesas,hscif-r8a7745",
"renesas,rcar-gen2-hscif", "renesas,hscif";
reg = <0 0xe62c0000 0 0x60>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 717>,
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 717>; resets = <&cpg 330>;
status = "disabled"; #dma-cells = <1>;
dma-channels = <2>;
}; };
hscif1: serial@e62c8000 { usb_dmac1: dma-controller@e65b0000 {
compatible = "renesas,hscif-r8a7745", compatible = "renesas,r8a7745-usb-dmac",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,usb-dmac";
reg = <0 0xe62c8000 0 0x60>; reg = <0 0xe65b0000 0 0x100>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 716>, GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; interrupt-names = "ch0", "ch1";
clock-names = "fck", "brg_int", "scif_clk"; clocks = <&cpg CPG_MOD 331>;
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 716>; resets = <&cpg 331>;
status = "disabled"; #dma-cells = <1>;
dma-channels = <2>;
}; };
hscif2: serial@e62d0000 { dmac0: dma-controller@e6700000 {
compatible = "renesas,hscif-r8a7745", compatible = "renesas,dmac-r8a7745",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-dmac";
reg = <0 0xe62d0000 0 0x60>; reg = <0 0xe6700000 0 0x20000>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 713>, GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>; GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
clock-names = "fck", "brg_int", "scif_clk"; GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x3b>, <&dmac1 0x3c>; GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 713>; resets = <&cpg 219>;
status = "disabled"; #dma-cells = <1>;
}; dma-channels = <15>;
icram2: sram@e6300000 {
compatible = "mmio-sram";
reg = <0 0xe6300000 0 0x40000>;
};
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
};
icram1: sram@e63c0000 {
compatible = "mmio-sram";
reg = <0 0xe63c0000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63c0000 0x1000>;
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
};
}; };
ether: ethernet@ee700000 { dmac1: dma-controller@e6720000 {
compatible = "renesas,ether-r8a7745", compatible = "renesas,dmac-r8a7745",
"renesas,rcar-gen2-ether"; "renesas,rcar-dmac";
reg = <0 0xee700000 0 0x400>; reg = <0 0xe6720000 0 0x20000>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 813>; GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 813>; resets = <&cpg 218>;
phy-mode = "rmii"; #dma-cells = <1>;
#address-cells = <1>; dma-channels = <15>;
#size-cells = <0>;
status = "disabled";
}; };
avb: ethernet@e6800000 { avb: ethernet@e6800000 {
...@@ -786,257 +632,353 @@ avb: ethernet@e6800000 { ...@@ -786,257 +632,353 @@ avb: ethernet@e6800000 {
status = "disabled"; status = "disabled";
}; };
i2c0: i2c@e6508000 { qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7745", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 917>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
num-cs = <1>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7745", resets = <&cpg 917>;
"renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
i2c1: i2c@e6518000 { scifa0: serial@e6c40000 {
#address-cells = <1>; compatible = "renesas,scifa-r8a7745",
#size-cells = <0>; "renesas,rcar-gen2-scifa", "renesas,scifa";
compatible = "renesas,i2c-r8a7745", reg = <0 0xe6c40000 0 0x40>;
"renesas,rcar-gen2-i2c"; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe6518000 0 0x40>; clocks = <&cpg CPG_MOD 204>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; clock-names = "fck";
clocks = <&cpg CPG_MOD 930>; dmas = <&dmac0 0x21>, <&dmac0 0x22>,
<&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 930>; resets = <&cpg 204>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
i2c2: i2c@e6530000 { scifa1: serial@e6c50000 {
#address-cells = <1>; compatible = "renesas,scifa-r8a7745",
#size-cells = <0>; "renesas,rcar-gen2-scifa", "renesas,scifa";
compatible = "renesas,i2c-r8a7745", reg = <0 0xe6c50000 0 0x40>;
"renesas,rcar-gen2-i2c"; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe6530000 0 0x40>; clocks = <&cpg CPG_MOD 203>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; clock-names = "fck";
clocks = <&cpg CPG_MOD 929>; dmas = <&dmac0 0x25>, <&dmac0 0x26>,
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 929>; resets = <&cpg 203>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
i2c3: i2c@e6540000 { scifa2: serial@e6c60000 {
#address-cells = <1>; compatible = "renesas,scifa-r8a7745",
#size-cells = <0>; "renesas,rcar-gen2-scifa", "renesas,scifa";
compatible = "renesas,i2c-r8a7745", reg = <0 0xe6c60000 0 0x40>;
"renesas,rcar-gen2-i2c"; interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe6540000 0 0x40>; clocks = <&cpg CPG_MOD 202>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; clock-names = "fck";
clocks = <&cpg CPG_MOD 928>; dmas = <&dmac0 0x27>, <&dmac0 0x28>,
<&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 928>; resets = <&cpg 202>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
i2c4: i2c@e6520000 { scifa3: serial@e6c70000 {
#address-cells = <1>; compatible = "renesas,scifa-r8a7745",
#size-cells = <0>; "renesas,rcar-gen2-scifa", "renesas,scifa";
compatible = "renesas,i2c-r8a7745", reg = <0 0xe6c70000 0 0x40>;
"renesas,rcar-gen2-i2c"; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe6520000 0 0x40>; clocks = <&cpg CPG_MOD 1106>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clock-names = "fck";
clocks = <&cpg CPG_MOD 927>; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; <&dmac1 0x1b>, <&dmac1 0x1c>;
resets = <&cpg 927>; dma-names = "tx", "rx", "tx", "rx";
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c5: i2c@e6528000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "renesas,i2c-r8a7745",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 925>; resets = <&cpg 1106>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
}; };
iic0: i2c@e6500000 { scifa4: serial@e6c78000 {
#address-cells = <1>; compatible = "renesas,scifa-r8a7745",
#size-cells = <0>; "renesas,rcar-gen2-scifa", "renesas,scifa";
compatible = "renesas,iic-r8a7745", reg = <0 0xe6c78000 0 0x40>;
"renesas,rcar-gen2-iic", interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
"renesas,rmobile-iic"; clocks = <&cpg CPG_MOD 1107>;
reg = <0 0xe6500000 0 0x425>; clock-names = "fck";
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
clocks = <&cpg CPG_MOD 318>; <&dmac1 0x1f>, <&dmac1 0x20>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 318>; resets = <&cpg 1107>;
status = "disabled"; status = "disabled";
}; };
iic1: i2c@e6510000 { scifa5: serial@e6c80000 {
#address-cells = <1>; compatible = "renesas,scifa-r8a7745",
#size-cells = <0>; "renesas,rcar-gen2-scifa", "renesas,scifa";
compatible = "renesas,iic-r8a7745", reg = <0 0xe6c80000 0 0x40>;
"renesas,rcar-gen2-iic", interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
"renesas,rmobile-iic"; clocks = <&cpg CPG_MOD 1108>;
reg = <0 0xe6510000 0 0x425>; clock-names = "fck";
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; dmas = <&dmac0 0x23>, <&dmac0 0x24>,
clocks = <&cpg CPG_MOD 323>; <&dmac1 0x23>, <&dmac1 0x24>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>,
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 323>; resets = <&cpg 1108>;
status = "disabled"; status = "disabled";
}; };
mmcif0: mmc@ee200000 { scifb0: serial@e6c20000 {
compatible = "renesas,mmcif-r8a7745", compatible = "renesas,scifb-r8a7745",
"renesas,sh-mmcif"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xee200000 0 0x80>; reg = <0 0xe6c20000 0 0x100>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 315>; clocks = <&cpg CPG_MOD 206>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, clock-names = "fck";
<&dmac1 0xd1>, <&dmac1 0xd2>; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 315>; resets = <&cpg 206>;
reg-io-width = <4>;
max-frequency = <97500000>;
status = "disabled"; status = "disabled";
}; };
qspi: spi@e6b10000 { scifb1: serial@e6c30000 {
compatible = "renesas,qspi-r8a7745", "renesas,qspi"; compatible = "renesas,scifb-r8a7745",
reg = <0 0xe6b10000 0 0x2c>; "renesas,rcar-gen2-scifb", "renesas,scifb";
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6c30000 0 0x100>;
clocks = <&cpg CPG_MOD 917>; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>, clocks = <&cpg CPG_MOD 207>;
<&dmac1 0x17>, <&dmac1 0x18>; clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
num-cs = <1>; resets = <&cpg 207>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 917>;
status = "disabled"; status = "disabled";
}; };
vin0: video@e6ef0000 { scifb2: serial@e6ce0000 {
compatible = "renesas,vin-r8a7745", compatible = "renesas,scifb-r8a7745",
"renesas,rcar-gen2-vin"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6ef0000 0 0x1000>; reg = <0 0xe6ce0000 0 0x100>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>; clocks = <&cpg CPG_MOD 216>;
clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 811>; resets = <&cpg 216>;
status = "disabled"; status = "disabled";
}; };
vin1: video@e6ef1000 { scif0: serial@e6e60000 {
compatible = "renesas,vin-r8a7745", compatible = "renesas,scif-r8a7745",
"renesas,rcar-gen2-vin"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ef1000 0 0x1000>; reg = <0 0xe6e60000 0 0x40>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>; clocks = <&cpg CPG_MOD 721>,
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 810>; resets = <&cpg 721>;
status = "disabled"; status = "disabled";
}; };
du: display@feb00000 { scif1: serial@e6e68000 {
compatible = "renesas,du-r8a7745"; compatible = "renesas,scif-r8a7745",
reg = <0 0xfeb00000 0 0x40000>; "renesas,rcar-gen2-scif", "renesas,scif";
reg-names = "du"; reg = <0 0xe6e68000 0 0x40>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 720>,
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
clock-names = "du.0", "du.1"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
<&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 720>;
status = "disabled"; status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
du_out_rgb0: endpoint {
};
};
port@1 {
reg = <1>;
du_out_rgb1: endpoint {
};
};
};
}; };
msiof0: spi@e6e20000 { scif2: serial@e6e58000 {
compatible = "renesas,msiof-r8a7745", compatible = "renesas,scif-r8a7745",
"renesas,rcar-gen2-msiof"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e20000 0 0x0064>; reg = <0 0xe6e58000 0 0x40>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 000>; clocks = <&cpg CPG_MOD 719>,
dmas = <&dmac0 0x51>, <&dmac0 0x52>, <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
<&dmac1 0x51>, <&dmac1 0x52>; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 719>;
#size-cells = <0>;
resets = <&cpg 000>;
status = "disabled"; status = "disabled";
}; };
msiof1: spi@e6e10000 { scif3: serial@e6ea8000 {
compatible = "renesas,msiof-r8a7745", compatible = "renesas,scif-r8a7745",
"renesas,rcar-gen2-msiof"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e10000 0 0x0064>; reg = <0 0xe6ea8000 0 0x40>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 208>; clocks = <&cpg CPG_MOD 718>,
dmas = <&dmac0 0x55>, <&dmac0 0x56>, <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
<&dmac1 0x55>, <&dmac1 0x56>; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 718>;
#size-cells = <0>;
resets = <&cpg 208>;
status = "disabled"; status = "disabled";
}; };
msiof2: spi@e6e00000 { scif4: serial@e6ee0000 {
compatible = "renesas,msiof-r8a7745", compatible = "renesas,scif-r8a7745",
"renesas,rcar-gen2-msiof"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6e00000 0 0x0064>; reg = <0 0xe6ee0000 0 0x40>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 205>; clocks = <&cpg CPG_MOD 715>,
dmas = <&dmac0 0x41>, <&dmac0 0x42>, <&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
<&dmac1 0x41>, <&dmac1 0x42>; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 715>;
#size-cells = <0>;
resets = <&cpg 205>;
status = "disabled"; status = "disabled";
}; };
pwm0: pwm@e6e30000 { scif5: serial@e6ee8000 {
compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar"; compatible = "renesas,scif-r8a7745",
reg = <0 0xe6e30000 0 0x8>; "renesas,rcar-gen2-scif", "renesas,scif";
clocks = <&cpg CPG_MOD 523>; reg = <0 0xe6ee8000 0 0x40>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 714>,
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 714>;
status = "disabled";
};
hscif0: serial@e62c0000 {
compatible = "renesas,hscif-r8a7745",
"renesas,rcar-gen2-hscif", "renesas,hscif";
reg = <0 0xe62c0000 0 0x60>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 717>,
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 717>;
status = "disabled";
};
hscif1: serial@e62c8000 {
compatible = "renesas,hscif-r8a7745",
"renesas,rcar-gen2-hscif", "renesas,hscif";
reg = <0 0xe62c8000 0 0x60>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 716>,
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 716>;
status = "disabled";
};
hscif2: serial@e62d0000 {
compatible = "renesas,hscif-r8a7745",
"renesas,rcar-gen2-hscif", "renesas,hscif";
reg = <0 0xe62d0000 0 0x60>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 713>,
<&cpg CPG_CORE R8A7745_CLK_ZS>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 713>;
status = "disabled";
};
msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7745",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e20000 0 0x0064>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 000>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>,
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 000>;
status = "disabled";
};
msiof1: spi@e6e10000 {
compatible = "renesas,msiof-r8a7745",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 208>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>,
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 208>;
status = "disabled";
};
msiof2: spi@e6e00000 {
compatible = "renesas,msiof-r8a7745",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 205>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>,
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&cpg 205>;
status = "disabled";
};
pwm0: pwm@e6e30000 {
compatible = "renesas,pwm-r8a7745", "renesas,pwm-rcar";
reg = <0 0xe6e30000 0 0x8>;
clocks = <&cpg CPG_MOD 523>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 523>; resets = <&cpg 523>;
#pwm-cells = <2>; #pwm-cells = <2>;
...@@ -1103,249 +1045,107 @@ pwm6: pwm@e6e36000 { ...@@ -1103,249 +1045,107 @@ pwm6: pwm@e6e36000 {
status = "disabled"; status = "disabled";
}; };
tpu: pwm@e60f0000 { can0: can@e6e80000 {
compatible = "renesas,tpu-r8a7745", "renesas,tpu"; compatible = "renesas,can-r8a7745",
reg = <0 0xe60f0000 0 0x148>; "renesas,rcar-gen2-can";
clocks = <&cpg CPG_MOD 304>; reg = <0 0xe6e80000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A7745_CLK_RCAN>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 304>; resets = <&cpg 916>;
#pwm-cells = <3>;
status = "disabled"; status = "disabled";
}; };
sdhi0: sd@ee100000 { can1: can@e6e88000 {
compatible = "renesas,sdhi-r8a7745", compatible = "renesas,can-r8a7745",
"renesas,rcar-gen2-sdhi"; "renesas,rcar-gen2-can";
reg = <0 0xee100000 0 0x328>; reg = <0 0xe6e88000 0 0x1000>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>; clocks = <&cpg CPG_MOD 915>,
dmas = <&dmac0 0xcd>, <&dmac0 0xce>, <&cpg CPG_CORE R8A7745_CLK_RCAN>,
<&dmac1 0xcd>, <&dmac1 0xce>; <&can_clk>;
dma-names = "tx", "rx", "tx", "rx"; clock-names = "clkp1", "clkp2", "can_clk";
max-frequency = <195000000>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 314>; resets = <&cpg 915>;
status = "disabled"; status = "disabled";
}; };
sdhi1: sd@ee140000 { vin0: video@e6ef0000 {
compatible = "renesas,sdhi-r8a7745", compatible = "renesas,vin-r8a7745",
"renesas,rcar-gen2-sdhi"; "renesas,rcar-gen2-vin";
reg = <0 0xee140000 0 0x100>; reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>; clocks = <&cpg CPG_MOD 811>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 312>; resets = <&cpg 811>;
status = "disabled"; status = "disabled";
}; };
sdhi2: sd@ee160000 { vin1: video@e6ef1000 {
compatible = "renesas,sdhi-r8a7745", compatible = "renesas,vin-r8a7745",
"renesas,rcar-gen2-sdhi"; "renesas,rcar-gen2-vin";
reg = <0 0xee160000 0 0x100>; reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>; clocks = <&cpg CPG_MOD 810>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 311>; resets = <&cpg 810>;
status = "disabled"; status = "disabled";
}; };
pci0: pci@ee090000 { rcar_sound: sound@ec500000 {
compatible = "renesas,pci-r8a7745", /*
"renesas,pci-rcar-gen2"; * #sound-dai-cells is required
device_type = "pci"; *
reg = <0 0xee090000 0 0xc00>, * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
<0 0xee080000 0 0x1100>; * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; */
clocks = <&cpg CPG_MOD 703>; compatible = "renesas,rcar_sound-r8a7745",
"renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
<&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
<&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clka>, <&audio_clkb>, <&audio_clkc>,
<&cpg CPG_CORE R8A7745_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0",
"src.6", "src.5", "src.4", "src.3",
"src.2", "src.1",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>; power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 703>; resets = <&cpg 1005>,
status = "disabled"; <&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
<&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
bus-range = <0 0>; <&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
#address-cells = <3>; <&cpg 1015>;
#size-cells = <2>; reset-names = "ssi-all",
#interrupt-cells = <1>; "ssi.9", "ssi.8", "ssi.7", "ssi.6",
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>; "ssi.5", "ssi.4", "ssi.3", "ssi.2",
interrupt-map-mask = <0xff00 0 0 0x7>; "ssi.1", "ssi.0";
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
usb@2,0 {
reg = <0x1000 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
};
pci1: pci@ee0d0000 {
compatible = "renesas,pci-r8a7745",
"renesas,pci-rcar-gen2";
device_type = "pci";
reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x10800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
usb@2,0 {
reg = <0x11000 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
};
hsusb: usb@e6590000 {
compatible = "renesas,usbhs-r8a7745",
"renesas,rcar-gen2-usbhs";
reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 704>;
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
<&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "ch0", "ch1", "ch2", "ch3";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 704>;
renesas,buswait = <4>;
phys = <&usb0 1>;
phy-names = "usb";
status = "disabled";
};
usbphy: usb-phy@e6590100 {
compatible = "renesas,usb-phy-r8a7745",
"renesas,rcar-gen2-usb-phy";
reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cpg CPG_MOD 704>;
clock-names = "usbhs";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 704>;
status = "disabled";
usb0: usb-channel@0 {
reg = <0>;
#phy-cells = <1>;
};
usb2: usb-channel@2 {
reg = <2>;
#phy-cells = <1>;
};
};
can0: can@e6e80000 {
compatible = "renesas,can-r8a7745",
"renesas,rcar-gen2-can";
reg = <0 0xe6e80000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>,
<&cpg CPG_CORE R8A7745_CLK_RCAN>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 916>;
status = "disabled";
};
can1: can@e6e88000 {
compatible = "renesas,can-r8a7745",
"renesas,rcar-gen2-can";
reg = <0 0xe6e88000 0 0x1000>;
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 915>,
<&cpg CPG_CORE R8A7745_CLK_RCAN>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 915>;
status = "disabled";
};
rcar_sound: sound@ec500000 {
/*
* #sound-dai-cells is required
*
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
compatible = "renesas,rcar_sound-r8a7745",
"renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
<&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
<&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clka>, <&audio_clkb>, <&audio_clkc>,
<&cpg CPG_CORE R8A7745_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0",
"src.6", "src.5", "src.4", "src.3",
"src.2", "src.1",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>,
<&cpg 1009>, <&cpg 1010>, <&cpg 1011>,
<&cpg 1012>, <&cpg 1013>, <&cpg 1014>,
<&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0";
status = "disabled"; status = "disabled";
rcar_sound,dvc { rcar_sound,dvc {
...@@ -1474,6 +1274,278 @@ ssi9: ssi-9 { ...@@ -1474,6 +1274,278 @@ ssi9: ssi-9 {
}; };
}; };
}; };
audma0: dma-controller@ec700000 {
compatible = "renesas,dmac-r8a7745",
"renesas,rcar-dmac";
reg = <0 0xec700000 0 0x10000>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
pci0: pci@ee090000 {
compatible = "renesas,pci-r8a7745",
"renesas,pci-rcar-gen2";
device_type = "pci";
reg = <0 0xee090000 0 0xc00>,
<0 0xee080000 0 0x1100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
usb@2,0 {
reg = <0x1000 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
};
pci1: pci@ee0d0000 {
compatible = "renesas,pci-r8a7745",
"renesas,pci-rcar-gen2";
device_type = "pci";
reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x10800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
usb@2,0 {
reg = <0x11000 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7745",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
sdhi1: sd@ee140000 {
compatible = "renesas,sdhi-r8a7745",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 312>;
status = "disabled";
};
sdhi2: sd@ee160000 {
compatible = "renesas,sdhi-r8a7745",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 311>;
status = "disabled";
};
mmcif0: mmc@ee200000 {
compatible = "renesas,mmcif-r8a7745",
"renesas,sh-mmcif";
reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 315>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 315>;
reg-io-width = <4>;
max-frequency = <97500000>;
status = "disabled";
};
ether: ethernet@ee700000 {
compatible = "renesas,ether-r8a7745",
"renesas,rcar-gen2-ether";
reg = <0 0xee700000 0 0x400>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
vsp@fe928000 {
compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>;
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 131>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 131>;
};
vsp@fe930000 {
compatible = "renesas,vsp1";
reg = <0 0xfe930000 0 0x8000>;
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 128>;
};
du: display@feb00000 {
compatible = "renesas,du-r8a7745";
reg = <0 0xfeb00000 0 0x40000>;
reg-names = "du";
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
du_out_rgb0: endpoint {
};
};
port@1 {
reg = <1>;
du_out_rgb1: endpoint {
};
};
};
};
prr: chipid@ff000044 {
compatible = "renesas,prr";
reg = <0 0xff000044 0 4>;
};
cmt0: timer@ffca0000 {
compatible = "renesas,r8a7745-cmt0",
"renesas,rcar-gen2-cmt0";
reg = <0 0xffca0000 0 0x1004>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
};
cmt1: timer@e6130000 {
compatible = "renesas,r8a7745-cmt1",
"renesas,rcar-gen2-cmt1";
reg = <0 0xe6130000 0 0x1004>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled";
};
}; };
timer { timer {
......
arch/arm/boot/dts/r8a7779-marzen.dts
View file @ cdcdbbf3
...@@ -42,6 +42,19 @@ fixedregulator3v3: regulator-3v3 { ...@@ -42,6 +42,19 @@ fixedregulator3v3: regulator-3v3 {
regulator-always-on; regulator-always-on;
}; };
vccq_sdhi0: regulator-vccq-sdhi0 {
compatible = "regulator-gpio";
regulator-name = "SDHI0 VccQ";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
gpios-states = <1>;
states = <3300000 1
1800000 0>;
};
ethernet@18000000 { ethernet@18000000 {
compatible = "smsc,lan9220", "smsc,lan9115"; compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x18000000 0x100>; reg = <0x18000000 0x100>;
...@@ -243,6 +256,7 @@ &sdhi0 { ...@@ -243,6 +256,7 @@ &sdhi0 {
pinctrl-names = "default"; pinctrl-names = "default";
vmmc-supply = <&fixedregulator3v3>; vmmc-supply = <&fixedregulator3v3>;
vqmmc-supply = <&vccq_sdhi0>;
bus-width = <4>; bus-width = <4>;
status = "okay"; status = "okay";
}; };
......
arch/arm/boot/dts/r8a7790-lager.dts
View file @ cdcdbbf3
...@@ -51,8 +51,11 @@ aliases { ...@@ -51,8 +51,11 @@ aliases {
serial0 = &scif0; serial0 = &scif0;
serial1 = &scifa1; serial1 = &scifa1;
i2c8 = &gpioi2c1; i2c8 = &gpioi2c1;
i2c9 = &gpioi2c2;
i2c10 = &i2cexio0; i2c10 = &i2cexio0;
i2c11 = &i2cexio1; i2c11 = &i2cexio1;
i2c12 = &i2chdmi;
i2c13 = &i2cpwr;
}; };
chosen { chosen {
...@@ -244,6 +247,12 @@ hdmi_con_in: endpoint { ...@@ -244,6 +247,12 @@ hdmi_con_in: endpoint {
}; };
}; };
cec_clock: cec-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12000000>;
};
hdmi-out { hdmi-out {
compatible = "hdmi-connector"; compatible = "hdmi-connector";
type = "a"; type = "a";
...@@ -272,8 +281,18 @@ gpioi2c1: i2c-8 { ...@@ -272,8 +281,18 @@ gpioi2c1: i2c-8 {
#size-cells = <0>; #size-cells = <0>;
compatible = "i2c-gpio"; compatible = "i2c-gpio";
status = "disabled"; status = "disabled";
sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio1 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio1 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
gpioi2c2: i2c-9 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
scl-gpios = <&gpio5 5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio5 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>; i2c-gpio,delay-us = <5>;
}; };
...@@ -308,6 +327,138 @@ i2cexio1: i2c-11 { ...@@ -308,6 +327,138 @@ i2cexio1: i2c-11 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
}; };
/*
* IIC2 and I2C2 may be switched using pinmux.
* A fallback to GPIO is also provided.
*/
i2chdmi: i2c-12 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic2>, <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin1>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep0>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cec_clock>;
clock-names = "cec";
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_lvds0>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
hdmi-in@4c {
compatible = "adi,adv7612";
reg = <0x4c>;
interrupt-parent = <&gpio1>;
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
default-input = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7612_in: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
port@2 {
reg = <2>;
adv7612_out: endpoint {
remote-endpoint = <&vin0ep2>;
};
};
};
};
};
/*
* IIC3 and I2C3 may be switched using pinmux.
* IIC3/I2C3 does not appear to support fallback to GPIO.
*/
i2cpwr: i2c-13 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&iic3>, <&i2c3>;
i2c-bus-name = "i2c-pwr";
#address-cells = <1>;
#size-cells = <0>;
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
wdt {
compatible = "dlg,da9063-watchdog";
};
};
vdd_dvfs: regulator@68 {
compatible = "dlg,da9210";
reg = <0x68>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
};
};
}; };
&du { &du {
...@@ -437,11 +588,21 @@ iic1_pins: iic1 { ...@@ -437,11 +588,21 @@ iic1_pins: iic1 {
function = "iic1"; function = "iic1";
}; };
i2c2_pins: i2c2 {
groups = "i2c2";
function = "i2c2";
};
iic2_pins: iic2 { iic2_pins: iic2 {
groups = "iic2"; groups = "iic2";
function = "iic2"; function = "iic2";
}; };
i2c3_pins: i2c3 {
groups = "i2c3";
function = "i2c3";
};
iic3_pins: iic3 { iic3_pins: iic3 {
groups = "iic3"; groups = "iic3";
function = "iic3"; function = "iic3";
...@@ -643,124 +804,28 @@ &iic1 { ...@@ -643,124 +804,28 @@ &iic1 {
pinctrl-names = "i2c-exio1"; pinctrl-names = "i2c-exio1";
}; };
&iic2 { &i2c2 {
status = "okay"; pinctrl-0 = <&i2c2_pins>;
pinctrl-0 = <&iic2_pins>; pinctrl-names = "i2c-hdmi";
pinctrl-names = "default";
clock-frequency = <100000>; clock-frequency = <100000>;
};
ak4643: codec@12 { &iic2 {
compatible = "asahi-kasei,ak4643"; pinctrl-0 = <&iic2_pins>;
#sound-dai-cells = <0>; pinctrl-names = "i2c-hdmi";
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin1>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep0>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_lvds0>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
hdmi-in@4c {
compatible = "adi,adv7612";
reg = <0x4c>;
interrupt-parent = <&gpio1>;
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
default-input = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 { clock-frequency = <100000>;
reg = <0>; };
adv7612_in: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
port@2 { &i2c3 {
reg = <2>; pinctrl-0 = <&i2c3_pins>;
adv7612_out: endpoint { pinctrl-names = "i2c-pwr";
remote-endpoint = <&vin0ep2>;
};
};
};
};
}; };
&iic3 { &iic3 {
pinctrl-names = "default";
pinctrl-0 = <&iic3_pins>; pinctrl-0 = <&iic3_pins>;
status = "okay"; pinctrl-names = "i2c-pwr";
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
wdt {
compatible = "dlg,da9063-watchdog";
};
};
vdd_dvfs: regulator@68 {
compatible = "dlg,da9210";
reg = <0x68>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
};
}; };
&pci0 { &pci0 {
......
arch/arm/boot/dts/r8a7790-stout.dts 0 → 100644
View file @ cdcdbbf3
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the Stout board
*
* Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
*/
/dts-v1/;
#include "r8a7790.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Stout";
compatible = "renesas,stout", "renesas,r8a7790";
aliases {
serial0 = &scifa0;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial0:115200n8";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
leds {
compatible = "gpio-leds";
led1 {
gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
led2 {
gpios = <&gpio4 23 GPIO_ACTIVE_LOW>;
};
led3 {
gpios = <&gpio5 17 GPIO_ACTIVE_LOW>;
};
led5 {
gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
};
};
fixedregulator3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
vcc_sdhi0: regulator-vcc-sdhi0 {
compatible = "regulator-fixed";
regulator-name = "SDHI0 Vcc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio5 24 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
hdmi-out {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_con_out: endpoint {
remote-endpoint = <&adv7511_out>;
};
};
};
osc1_clk: osc1-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <148500000>;
};
osc4_clk: osc4-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <12000000>;
};
};
&du {
pinctrl-0 = <&du_pins>;
pinctrl-names = "default";
status = "okay";
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, <&cpg CPG_MOD 722>,
<&cpg CPG_MOD 726>, <&cpg CPG_MOD 725>,
<&osc1_clk>;
clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1", "dclkin.0";
ports {
port@0 {
endpoint {
remote-endpoint = <&adv7511_in>;
};
};
port@1 {
lvds_connector0: endpoint {
};
};
port@2 {
lvds_connector1: endpoint {
};
};
};
};
&extal_clk {
clock-frequency = <20000000>;
};
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
du_pins: du {
groups = "du_rgb888", "du_sync_1", "du_clk_out_0";
function = "du";
};
scifa0_pins: scifa0 {
groups = "scifa0_data_b";
function = "scifa0";
};
scif_clk_pins: scif_clk {
groups = "scif_clk";
function = "scif_clk";
};
ether_pins: ether {
groups = "eth_link", "eth_mdio", "eth_rmii";
function = "eth";
};
phy1_pins: phy1 {
groups = "intc_irq1";
function = "intc";
};
sdhi0_pins: sd0 {
groups = "sdhi0_data4", "sdhi0_ctrl";
function = "sdhi0";
power-source = <3300>;
};
qspi_pins: qspi {
groups = "qspi_ctrl", "qspi_data4";
function = "qspi";
};
iic2_pins: iic2 {
groups = "iic2_b";
function = "iic2";
};
iic3_pins: iic3 {
groups = "iic3";
function = "iic3";
};
usb0_pins: usb0 {
groups = "usb0";
function = "usb0";
};
};
&ether {
pinctrl-0 = <&ether_pins &phy1_pins>;
pinctrl-names = "default";
phy-handle = <&phy1>;
renesas,ether-link-active-low;
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&irqc0>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
micrel,led-mode = <1>;
};
};
&cmt0 {
status = "okay";
};
&qspi {
pinctrl-0 = <&qspi_pins>;
pinctrl-names = "default";
status = "okay";
flash: flash@0 {
compatible = "spansion,s25fl512s", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <30000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
spi-cpha;
spi-cpol;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "loader";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "uboot";
reg = <0x00080000 0x00040000>;
read-only;
};
partition@c0000 {
label = "uboot-env";
reg = <0x000c0000 0x00040000>;
read-only;
};
partition@100000 {
label = "flash";
reg = <0x00100000 0x03f00000>;
};
};
};
};
&scifa0 {
pinctrl-0 = <&scifa0_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif_clk {
clock-frequency = <14745600>;
};
&sdhi0 {
pinctrl-0 = <&sdhi0_pins>;
pinctrl-names = "default";
vmmc-supply = <&vcc_sdhi0>;
cd-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
&cpu0 {
cpu0-supply = <&vdd_dvfs>;
};
&iic2 {
status = "okay";
pinctrl-0 = <&iic2_pins>;
pinctrl-names = "default";
clock-frequency = <100000>;
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
clocks = <&osc4_clk>;
clock-names = "cec";
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
};
&iic3 {
pinctrl-names = "default";
pinctrl-0 = <&iic3_pins>;
status = "okay";
pmic@58 {
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
rtc {
compatible = "dlg,da9063-rtc";
};
wdt {
compatible = "dlg,da9063-watchdog";
};
};
vdd_dvfs: regulator@68 {
compatible = "dlg,da9210";
reg = <0x68>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
};
vdd: regulator@70 {
compatible = "dlg,da9210";
reg = <0x70>;
interrupt-parent = <&irqc0>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-boot-on;
regulator-always-on;
};
};
&pci0 {
status = "okay";
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
};
&usbphy {
status = "okay";
};
arch/arm/boot/dts/r8a7790.dtsi
View file @ cdcdbbf3
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
/ { / {
compatible = "renesas,r8a7790"; compatible = "renesas,r8a7790";
interrupt-parent = <&gic>;
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
...@@ -41,6 +40,35 @@ aliases { ...@@ -41,6 +40,35 @@ aliases {
vin3 = &vin3; vin3 = &vin3;
}; };
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -159,1510 +187,1553 @@ L2_CA7: cache-controller-1 { ...@@ -159,1510 +187,1553 @@ L2_CA7: cache-controller-1 {
}; };
}; };
thermal-zones { /* External root clock */
cpu_thermal: cpu-thermal { extal_clk: extal {
polling-delay-passive = <0>; compatible = "fixed-clock";
polling-delay = <0>; #clock-cells = <0>;
/* This value must be overridden by the board. */
thermal-sensors = <&thermal>; clock-frequency = <0>;
trips {
cpu-crit {
temperature = <95000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
}; };
apmu@e6151000 { /* External PCIe clock - can be overridden by the board */
compatible = "renesas,r8a7790-apmu", "renesas,apmu"; pcie_bus_clk: pcie_bus {
reg = <0 0xe6151000 0 0x188>; compatible = "fixed-clock";
cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; #clock-cells = <0>;
clock-frequency = <0>;
}; };
apmu@e6152000 { /* External SCIF clock */
compatible = "renesas,r8a7790-apmu", "renesas,apmu"; scif_clk: scif {
reg = <0 0xe6152000 0 0x188>; compatible = "fixed-clock";
cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; #clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
}; };
gic: interrupt-controller@f1001000 { soc {
compatible = "arm,gic-400"; compatible = "simple-bus";
#interrupt-cells = <3>; interrupt-parent = <&gic>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
gpio0: gpio@e6050000 { #address-cells = <2>;
compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; #size-cells = <2>;
reg = <0 0xe6050000 0 0x50>; ranges;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; gpio0: gpio@e6050000 {
gpio-controller; compatible = "renesas,gpio-r8a7790",
gpio-ranges = <&pfc 0 0 32>; "renesas,rcar-gen2-gpio";
#interrupt-cells = <2>; reg = <0 0xe6050000 0 0x50>;
interrupt-controller; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 912>; #gpio-cells = <2>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; gpio-controller;
resets = <&cpg 912>; gpio-ranges = <&pfc 0 0 32>;
}; #interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 912>;
};
gpio1: gpio@e6051000 { gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7790",
reg = <0 0xe6051000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6051000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 32 30>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 32 30>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 911>; interrupt-controller;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 911>;
resets = <&cpg 911>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 911>;
};
gpio2: gpio@e6052000 { gpio2: gpio@e6052000 {
compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7790",
reg = <0 0xe6052000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6052000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 64 30>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 64 30>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 910>; interrupt-controller;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 910>;
resets = <&cpg 910>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 910>;
};
gpio3: gpio@e6053000 { gpio3: gpio@e6053000 {
compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7790",
reg = <0 0xe6053000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6053000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 96 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 96 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 909>; interrupt-controller;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 909>;
resets = <&cpg 909>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 909>;
};
gpio4: gpio@e6054000 { gpio4: gpio@e6054000 {
compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7790",
reg = <0 0xe6054000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6054000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 128 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 128 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 908>; interrupt-controller;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 908>;
resets = <&cpg 908>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 908>;
};
gpio5: gpio@e6055000 { gpio5: gpio@e6055000 {
compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7790",
reg = <0 0xe6055000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6055000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 160 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 160 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 907>; interrupt-controller;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 907>;
resets = <&cpg 907>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 907>;
};
thermal: thermal@e61f0000 { pfc: pin-controller@e6060000 {
compatible = "renesas,thermal-r8a7790", compatible = "renesas,pfc-r8a7790";
"renesas,rcar-gen2-thermal", reg = <0 0xe6060000 0 0x250>;
"renesas,rcar-thermal"; };
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 522>;
#thermal-sensor-cells = <0>;
};
timer { cpg: clock-controller@e6150000 {
compatible = "arm,armv7-timer"; compatible = "renesas,r8a7790-cpg-mssr";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, reg = <0 0xe6150000 0 0x1000>;
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, clocks = <&extal_clk>, <&usb_extal_clk>;
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, clock-names = "extal", "usb_extal";
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; #clock-cells = <2>;
}; #power-domain-cells = <0>;
#reset-cells = <1>;
};
cmt0: timer@ffca0000 { apmu@e6151000 {
compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0"; compatible = "renesas,r8a7790-apmu", "renesas,apmu";
reg = <0 0xffca0000 0 0x1004>; reg = <0 0xe6151000 0 0x188>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
};
cmt1: timer@e6130000 { apmu@e6152000 {
compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1"; compatible = "renesas,r8a7790-apmu", "renesas,apmu";
reg = <0 0xe6130000 0 0x1004>; reg = <0 0xe6152000 0 0x188>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, };
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled";
};
irqc0: interrupt-controller@e61c0000 { rst: reset-controller@e6160000 {
compatible = "renesas,irqc-r8a7790", "renesas,irqc"; compatible = "renesas,r8a7790-rst";
#interrupt-cells = <2>; reg = <0 0xe6160000 0 0x0100>;
interrupt-controller; };
reg = <0 0xe61c0000 0 0x200>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
dmac0: dma-controller@e6700000 { sysc: system-controller@e6180000 {
compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; compatible = "renesas,r8a7790-sysc";
reg = <0 0xe6700000 0 0x20000>; reg = <0 0xe6180000 0 0x0200>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH #power-domain-cells = <1>;
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
dmac1: dma-controller@e6720000 { irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; compatible = "renesas,irqc-r8a7790", "renesas,irqc";
reg = <0 0xe6720000 0 0x20000>; #interrupt-cells = <2>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH interrupt-controller;
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe61c0000 0 0x200>;
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH clocks = <&cpg CPG_MOD 407>;
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH resets = <&cpg 407>;
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
audma0: dma-controller@ec700000 { thermal: thermal@e61f0000 {
compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; compatible = "renesas,thermal-r8a7790",
reg = <0 0xec700000 0 0x10000>; "renesas,rcar-gen2-thermal",
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH "renesas,rcar-thermal";
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH clocks = <&cpg CPG_MOD 522>;
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH resets = <&cpg 522>;
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH #thermal-sensor-cells = <0>;
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
audma1: dma-controller@ec720000 { ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac"; compatible = "renesas,ipmmu-r8a7790",
reg = <0 0xec720000 0 0x10000>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6280000 0 0x1000>;
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
usb_dmac0: dma-controller@e65a0000 { ipmmu_sy1: mmu@e6290000 {
compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; compatible = "renesas,ipmmu-r8a7790",
reg = <0 0xe65a0000 0 0x100>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6290000 0 0x1000>;
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1"; #iommu-cells = <1>;
clocks = <&cpg CPG_MOD 330>; status = "disabled";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; };
resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
};
usb_dmac1: dma-controller@e65b0000 { ipmmu_ds: mmu@e6740000 {
compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac"; compatible = "renesas,ipmmu-r8a7790",
reg = <0 0xe65b0000 0 0x100>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6740000 0 0x1000>;
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
interrupt-names = "ch0", "ch1"; <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 331>; #iommu-cells = <1>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 331>; };
#dma-cells = <1>;
dma-channels = <2>;
};
i2c0: i2c@e6508000 { ipmmu_mp: mmu@ec680000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7790",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; reg = <0 0xec680000 0 0x1000>;
reg = <0 0xe6508000 0 0x40>; interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; #iommu-cells = <1>;
clocks = <&cpg CPG_MOD 931>; status = "disabled";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; };
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
i2c1: i2c@e6518000 { ipmmu_mx: mmu@fe951000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7790",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; reg = <0 0xfe951000 0 0x1000>;
reg = <0 0xe6518000 0 0x40>; interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>; #iommu-cells = <1>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 930>; };
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c2: i2c@e6530000 { ipmmu_rt: mmu@ffc80000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7790",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; reg = <0 0xffc80000 0 0x1000>;
reg = <0 0xe6530000 0 0x40>; interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; #iommu-cells = <1>;
clocks = <&cpg CPG_MOD 929>; status = "disabled";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; };
resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c3: i2c@e6540000 { icram0: sram@e63a0000 {
#address-cells = <1>; compatible = "mmio-sram";
#size-cells = <0>; reg = <0 0xe63a0000 0 0x12000>;
compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c"; };
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
iic0: i2c@e6500000 { icram1: sram@e63c0000 {
#address-cells = <1>; compatible = "mmio-sram";
#size-cells = <0>; reg = <0 0xe63c0000 0 0x1000>;
compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", #address-cells = <1>;
"renesas,rmobile-iic"; #size-cells = <1>;
reg = <0 0xe6500000 0 0x425>; ranges = <0 0 0xe63c0000 0x1000>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 318>;
status = "disabled";
};
iic1: i2c@e6510000 { smp-sram@0 {
#address-cells = <1>; compatible = "renesas,smp-sram";
#size-cells = <0>; reg = <0 0x10>;
compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", };
"renesas,rmobile-iic"; };
reg = <0 0xe6510000 0 0x425>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 323>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>,
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 323>;
status = "disabled";
};
iic2: i2c@e6520000 { i2c0: i2c@e6508000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", compatible = "renesas,i2c-r8a7790",
"renesas,rmobile-iic"; "renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x425>; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 300>; clocks = <&cpg CPG_MOD 931>;
dmas = <&dmac0 0x69>, <&dmac0 0x6a>, power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
<&dmac1 0x69>, <&dmac1 0x6a>; resets = <&cpg 931>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <110>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 300>; };
status = "disabled";
};
iic3: i2c@e60b0000 { i2c1: i2c@e6518000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic", compatible = "renesas,i2c-r8a7790",
"renesas,rmobile-iic"; "renesas,rcar-gen2-i2c";
reg = <0 0xe60b0000 0 0x425>; reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 926>; clocks = <&cpg CPG_MOD 930>;
dmas = <&dmac0 0x77>, <&dmac0 0x78>, power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
<&dmac1 0x77>, <&dmac1 0x78>; resets = <&cpg 930>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 926>; };
status = "disabled";
};
mmcif0: mmc@ee200000 { i2c2: i2c@e6530000 {
compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; #address-cells = <1>;
reg = <0 0xee200000 0 0x80>; #size-cells = <0>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,i2c-r8a7790",
clocks = <&cpg CPG_MOD 315>; "renesas,rcar-gen2-i2c";
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, reg = <0 0xe6530000 0 0x40>;
<&dmac1 0xd1>, <&dmac1 0xd2>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 315>; resets = <&cpg 929>;
reg-io-width = <4>; i2c-scl-internal-delay-ns = <6>;
status = "disabled"; status = "disabled";
max-frequency = <97500000>; };
};
mmcif1: mmc@ee220000 { i2c3: i2c@e6540000 {
compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif"; #address-cells = <1>;
reg = <0 0xee220000 0 0x80>; #size-cells = <0>;
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,i2c-r8a7790",
clocks = <&cpg CPG_MOD 305>; "renesas,rcar-gen2-i2c";
dmas = <&dmac0 0xe1>, <&dmac0 0xe2>, reg = <0 0xe6540000 0 0x40>;
<&dmac1 0xe1>, <&dmac1 0xe2>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 305>; resets = <&cpg 928>;
reg-io-width = <4>; i2c-scl-internal-delay-ns = <110>;
status = "disabled"; status = "disabled";
max-frequency = <97500000>; };
};
pfc: pin-controller@e6060000 { iic0: i2c@e6500000 {
compatible = "renesas,pfc-r8a7790"; #address-cells = <1>;
reg = <0 0xe6060000 0 0x250>; #size-cells = <0>;
}; compatible = "renesas,iic-r8a7790",
"renesas,rcar-gen2-iic",
"renesas,rmobile-iic";
reg = <0 0xe6500000 0 0x425>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 318>;
status = "disabled";
};
sdhi0: sd@ee100000 { iic1: i2c@e6510000 {
compatible = "renesas,sdhi-r8a7790", #address-cells = <1>;
"renesas,rcar-gen2-sdhi"; #size-cells = <0>;
reg = <0 0xee100000 0 0x328>; compatible = "renesas,iic-r8a7790",
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-iic",
clocks = <&cpg CPG_MOD 314>; "renesas,rmobile-iic";
dmas = <&dmac0 0xcd>, <&dmac0 0xce>, reg = <0 0xe6510000 0 0x425>;
<&dmac1 0xcd>, <&dmac1 0xce>; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 323>;
max-frequency = <195000000>; dmas = <&dmac0 0x65>, <&dmac0 0x66>,
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; <&dmac1 0x65>, <&dmac1 0x66>;
resets = <&cpg 314>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 323>;
status = "disabled";
};
sdhi1: sd@ee120000 { iic2: i2c@e6520000 {
compatible = "renesas,sdhi-r8a7790", #address-cells = <1>;
"renesas,rcar-gen2-sdhi"; #size-cells = <0>;
reg = <0 0xee120000 0 0x328>; compatible = "renesas,iic-r8a7790",
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-iic",
clocks = <&cpg CPG_MOD 313>; "renesas,rmobile-iic";
dmas = <&dmac0 0xc9>, <&dmac0 0xca>, reg = <0 0xe6520000 0 0x425>;
<&dmac1 0xc9>, <&dmac1 0xca>; interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 300>;
max-frequency = <195000000>; dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; <&dmac1 0x69>, <&dmac1 0x6a>;
resets = <&cpg 313>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 300>;
status = "disabled";
};
sdhi2: sd@ee140000 { iic3: i2c@e60b0000 {
compatible = "renesas,sdhi-r8a7790", #address-cells = <1>;
"renesas,rcar-gen2-sdhi"; #size-cells = <0>;
reg = <0 0xee140000 0 0x100>; compatible = "renesas,iic-r8a7790",
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-iic",
clocks = <&cpg CPG_MOD 312>; "renesas,rmobile-iic";
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, reg = <0 0xe60b0000 0 0x425>;
<&dmac1 0xc1>, <&dmac1 0xc2>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 926>;
max-frequency = <97500000>; dmas = <&dmac0 0x77>, <&dmac0 0x78>,
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; <&dmac1 0x77>, <&dmac1 0x78>;
resets = <&cpg 312>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 926>;
status = "disabled";
};
sdhi3: sd@ee160000 { hsusb: usb@e6590000 {
compatible = "renesas,sdhi-r8a7790", compatible = "renesas,usbhs-r8a7790",
"renesas,rcar-gen2-sdhi"; "renesas,rcar-gen2-usbhs";
reg = <0 0xee160000 0 0x100>; reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>; clocks = <&cpg CPG_MOD 704>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
<&dmac1 0xd3>, <&dmac1 0xd4>; <&usb_dmac1 0>, <&usb_dmac1 1>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "ch0", "ch1", "ch2", "ch3";
max-frequency = <97500000>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 704>;
resets = <&cpg 311>; renesas,buswait = <4>;
status = "disabled"; phys = <&usb0 1>;
}; phy-names = "usb";
status = "disabled";
};
scifa0: serial@e6c40000 { usbphy: usb-phy@e6590100 {
compatible = "renesas,scifa-r8a7790", compatible = "renesas,usb-phy-r8a7790",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,rcar-gen2-usb-phy";
reg = <0 0xe6c40000 0 64>; reg = <0 0xe6590100 0 0x100>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>;
clocks = <&cpg CPG_MOD 204>; #size-cells = <0>;
clock-names = "fck"; clocks = <&cpg CPG_MOD 704>;
dmas = <&dmac0 0x21>, <&dmac0 0x22>, clock-names = "usbhs";
<&dmac1 0x21>, <&dmac1 0x22>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 704>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 204>;
status = "disabled";
};
scifa1: serial@e6c50000 { usb0: usb-channel@0 {
compatible = "renesas,scifa-r8a7790", reg = <0>;
"renesas,rcar-gen2-scifa", "renesas,scifa"; #phy-cells = <1>;
reg = <0 0xe6c50000 0 64>; };
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; usb2: usb-channel@2 {
clocks = <&cpg CPG_MOD 203>; reg = <2>;
clock-names = "fck"; #phy-cells = <1>;
dmas = <&dmac0 0x25>, <&dmac0 0x26>, };
<&dmac1 0x25>, <&dmac1 0x26>; };
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 203>;
status = "disabled";
};
scifa2: serial@e6c60000 { usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,scifa-r8a7790", compatible = "renesas,r8a7790-usb-dmac",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,usb-dmac";
reg = <0 0xe6c60000 0 64>; reg = <0 0xe65a0000 0 0x100>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 202>; GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck"; interrupt-names = "ch0", "ch1";
dmas = <&dmac0 0x27>, <&dmac0 0x28>, clocks = <&cpg CPG_MOD 330>;
<&dmac1 0x27>, <&dmac1 0x28>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 330>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; #dma-cells = <1>;
resets = <&cpg 202>; dma-channels = <2>;
status = "disabled"; };
};
scifb0: serial@e6c20000 { usb_dmac1: dma-controller@e65b0000 {
compatible = "renesas,scifb-r8a7790", compatible = "renesas,r8a7790-usb-dmac",
"renesas,rcar-gen2-scifb", "renesas,scifb"; "renesas,usb-dmac";
reg = <0 0xe6c20000 0 0x100>; reg = <0 0xe65b0000 0 0x100>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 206>; GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck"; interrupt-names = "ch0", "ch1";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, clocks = <&cpg CPG_MOD 331>;
<&dmac1 0x3d>, <&dmac1 0x3e>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 331>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; #dma-cells = <1>;
resets = <&cpg 206>; dma-channels = <2>;
status = "disabled"; };
};
scifb1: serial@e6c30000 { dmac0: dma-controller@e6700000 {
compatible = "renesas,scifb-r8a7790", compatible = "renesas,dmac-r8a7790",
"renesas,rcar-gen2-scifb", "renesas,scifb"; "renesas,rcar-dmac";
reg = <0 0xe6c30000 0 0x100>; reg = <0 0xe6700000 0 0x20000>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 207>; GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
clock-names = "fck"; GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x19>, <&dmac0 0x1a>, GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x19>, <&dmac1 0x1a>; GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 207>; GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
scifb2: serial@e6ce0000 { dmac1: dma-controller@e6720000 {
compatible = "renesas,scifb-r8a7790", compatible = "renesas,dmac-r8a7790",
"renesas,rcar-gen2-scifb", "renesas,scifb"; "renesas,rcar-dmac";
reg = <0 0xe6ce0000 0 0x100>; reg = <0 0xe6720000 0 0x20000>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 216>; GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
clock-names = "fck"; GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x1d>, <&dmac1 0x1e>; GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 216>; GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
scif0: serial@e6e60000 { avb: ethernet@e6800000 {
compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", compatible = "renesas,etheravb-r8a7790",
"renesas,scif"; "renesas,etheravb-rcar-gen2";
reg = <0 0xe6e60000 0 64>; reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>, clocks = <&cpg CPG_MOD 812>;
<&scif_clk>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
clock-names = "fck", "brg_int", "scif_clk"; resets = <&cpg 812>;
dmas = <&dmac0 0x29>, <&dmac0 0x2a>, #address-cells = <1>;
<&dmac1 0x29>, <&dmac1 0x2a>; #size-cells = <0>;
dma-names = "tx", "rx", "tx", "rx"; status = "disabled";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; };
resets = <&cpg 721>;
status = "disabled";
};
scif1: serial@e6e68000 { qspi: spi@e6b10000 {
compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", compatible = "renesas,qspi-r8a7790", "renesas,qspi";
"renesas,scif"; reg = <0 0xe6b10000 0 0x2c>;
reg = <0 0xe6e68000 0 64>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 917>;
clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>, dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&scif_clk>; <&dmac1 0x17>, <&dmac1 0x18>;
clock-names = "fck", "brg_int", "scif_clk"; dma-names = "tx", "rx", "tx", "rx";
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
<&dmac1 0x2d>, <&dmac1 0x2e>; resets = <&cpg 917>;
dma-names = "tx", "rx", "tx", "rx"; num-cs = <1>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; #address-cells = <1>;
resets = <&cpg 720>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
scif2: serial@e6e56000 { scifa0: serial@e6c40000 {
compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif", compatible = "renesas,scifa-r8a7790",
"renesas,scif"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6e56000 0 64>; reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>, clocks = <&cpg CPG_MOD 204>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x21>, <&dmac0 0x22>,
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, <&dmac1 0x21>, <&dmac1 0x22>;
<&dmac1 0x2b>, <&dmac1 0x2c>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 204>;
resets = <&cpg 310>; status = "disabled";
status = "disabled"; };
};
hscif0: serial@e62c0000 { scifa1: serial@e6c50000 {
compatible = "renesas,hscif-r8a7790", compatible = "renesas,scifa-r8a7790",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe62c0000 0 96>; reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>, clocks = <&cpg CPG_MOD 203>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x25>, <&dmac0 0x26>,
dmas = <&dmac0 0x39>, <&dmac0 0x3a>, <&dmac1 0x25>, <&dmac1 0x26>;
<&dmac1 0x39>, <&dmac1 0x3a>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 203>;
resets = <&cpg 717>; status = "disabled";
status = "disabled"; };
};
hscif1: serial@e62c8000 { scifa2: serial@e6c60000 {
compatible = "renesas,hscif-r8a7790", compatible = "renesas,scifa-r8a7790",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe62c8000 0 96>; reg = <0 0xe6c60000 0 64>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>, clocks = <&cpg CPG_MOD 202>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x27>, <&dmac0 0x28>,
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, <&dmac1 0x27>, <&dmac1 0x28>;
<&dmac1 0x4d>, <&dmac1 0x4e>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 202>;
resets = <&cpg 716>; status = "disabled";
status = "disabled"; };
};
icram0: sram@e63a0000 { scifb0: serial@e6c20000 {
compatible = "mmio-sram"; compatible = "renesas,scifb-r8a7790",
reg = <0 0xe63a0000 0 0x12000>; "renesas,rcar-gen2-scifb", "renesas,scifb";
}; reg = <0 0xe6c20000 0 0x100>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 206>;
status = "disabled";
};
icram1: sram@e63c0000 { scifb1: serial@e6c30000 {
compatible = "mmio-sram"; compatible = "renesas,scifb-r8a7790",
reg = <0 0xe63c0000 0 0x1000>; "renesas,rcar-gen2-scifb", "renesas,scifb";
#address-cells = <1>; reg = <0 0xe6c30000 0 0x100>;
#size-cells = <1>; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
ranges = <0 0 0xe63c0000 0x1000>; clocks = <&cpg CPG_MOD 207>;
clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 207>;
status = "disabled";
};
smp-sram@0 { scifb2: serial@e6ce0000 {
compatible = "renesas,smp-sram"; compatible = "renesas,scifb-r8a7790",
reg = <0 0x10>; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6ce0000 0 0x100>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 216>;
clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 216>;
status = "disabled";
}; };
};
ether: ethernet@ee700000 { scif0: serial@e6e60000 {
compatible = "renesas,ether-r8a7790", compatible = "renesas,scif-r8a7790",
"renesas,rcar-gen2-ether"; "renesas,rcar-gen2-scif",
reg = <0 0xee700000 0 0x400>; "renesas,scif";
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e60000 0 64>;
clocks = <&cpg CPG_MOD 813>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 721>,
resets = <&cpg 813>; <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
phy-mode = "rmii"; clock-names = "fck", "brg_int", "scif_clk";
#address-cells = <1>; dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
#size-cells = <0>; <&dmac1 0x29>, <&dmac1 0x2a>;
status = "disabled"; dma-names = "tx", "rx", "tx", "rx";
}; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 721>;
status = "disabled";
};
avb: ethernet@e6800000 { scif1: serial@e6e68000 {
compatible = "renesas,etheravb-r8a7790", compatible = "renesas,scif-r8a7790",
"renesas,etheravb-rcar-gen2"; "renesas,rcar-gen2-scif",
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; "renesas,scif";
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e68000 0 64>;
clocks = <&cpg CPG_MOD 812>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 720>,
resets = <&cpg 812>; <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
#address-cells = <1>; clock-names = "fck", "brg_int", "scif_clk";
#size-cells = <0>; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
status = "disabled"; <&dmac1 0x2d>, <&dmac1 0x2e>;
}; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 720>;
status = "disabled";
};
sata0: sata@ee300000 { scif2: serial@e6e56000 {
compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata"; compatible = "renesas,scif-r8a7790",
reg = <0 0xee300000 0 0x2000>; "renesas,rcar-gen2-scif",
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; "renesas,scif";
clocks = <&cpg CPG_MOD 815>; reg = <0 0xe6e56000 0 64>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
resets = <&cpg 815>; clocks = <&cpg CPG_MOD 310>,
status = "disabled"; <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
}; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
<&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 310>;
status = "disabled";
};
sata1: sata@ee500000 { hscif0: serial@e62c0000 {
compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata"; compatible = "renesas,hscif-r8a7790",
reg = <0 0xee500000 0 0x2000>; "renesas,rcar-gen2-hscif", "renesas,hscif";
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe62c0000 0 96>;
clocks = <&cpg CPG_MOD 814>; interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 717>,
resets = <&cpg 814>; <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
status = "disabled"; clock-names = "fck", "brg_int", "scif_clk";
}; dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 717>;
status = "disabled";
};
hsusb: usb@e6590000 { hscif1: serial@e62c8000 {
compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs"; compatible = "renesas,hscif-r8a7790",
reg = <0 0xe6590000 0 0x100>; "renesas,rcar-gen2-hscif", "renesas,hscif";
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe62c8000 0 96>;
clocks = <&cpg CPG_MOD 704>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, clocks = <&cpg CPG_MOD 716>,
<&usb_dmac1 0>, <&usb_dmac1 1>; <&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
dma-names = "ch0", "ch1", "ch2", "ch3"; clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
resets = <&cpg 704>; <&dmac1 0x4d>, <&dmac1 0x4e>;
renesas,buswait = <4>; dma-names = "tx", "rx", "tx", "rx";
phys = <&usb0 1>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
phy-names = "usb"; resets = <&cpg 716>;
status = "disabled"; status = "disabled";
}; };
usbphy: usb-phy@e6590100 { msiof0: spi@e6e20000 {
compatible = "renesas,usb-phy-r8a7790", compatible = "renesas,msiof-r8a7790",
"renesas,rcar-gen2-usb-phy"; "renesas,rcar-gen2-msiof";
reg = <0 0xe6590100 0 0x100>; reg = <0 0xe6e20000 0 0x0064>;
#address-cells = <1>; interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
#size-cells = <0>; clocks = <&cpg CPG_MOD 0>;
clocks = <&cpg CPG_MOD 704>; dmas = <&dmac0 0x51>, <&dmac0 0x52>,
clock-names = "usbhs"; <&dmac1 0x51>, <&dmac1 0x52>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; dma-names = "tx", "rx", "tx", "rx";
resets = <&cpg 704>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
usb0: usb-channel@0 { msiof1: spi@e6e10000 {
reg = <0>; compatible = "renesas,msiof-r8a7790",
#phy-cells = <1>; "renesas,rcar-gen2-msiof";
reg = <0 0xe6e10000 0 0x0064>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 208>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>,
<&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
}; };
usb2: usb-channel@2 {
reg = <2>; msiof2: spi@e6e00000 {
#phy-cells = <1>; compatible = "renesas,msiof-r8a7790",
"renesas,rcar-gen2-msiof";
reg = <0 0xe6e00000 0 0x0064>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 205>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>,
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 205>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
}; };
};
vin0: video@e6ef0000 { msiof3: spi@e6c90000 {
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; compatible = "renesas,msiof-r8a7790",
reg = <0 0xe6ef0000 0 0x1000>; "renesas,rcar-gen2-msiof";
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6c90000 0 0x0064>;
clocks = <&cpg CPG_MOD 811>; interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 215>;
resets = <&cpg 811>; dmas = <&dmac0 0x45>, <&dmac0 0x46>,
status = "disabled"; <&dmac1 0x45>, <&dmac1 0x46>;
}; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 215>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
vin1: video@e6ef1000 { can0: can@e6e80000 {
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; compatible = "renesas,can-r8a7790",
reg = <0 0xe6ef1000 0 0x1000>; "renesas,rcar-gen2-can";
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e80000 0 0x1000>;
clocks = <&cpg CPG_MOD 810>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 916>,
resets = <&cpg 810>; <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
status = "disabled"; clock-names = "clkp1", "clkp2", "can_clk";
}; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 916>;
status = "disabled";
};
vin2: video@e6ef2000 { can1: can@e6e88000 {
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; compatible = "renesas,can-r8a7790",
reg = <0 0xe6ef2000 0 0x1000>; "renesas,rcar-gen2-can";
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e88000 0 0x1000>;
clocks = <&cpg CPG_MOD 809>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 915>,
resets = <&cpg 809>; <&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
status = "disabled"; clock-names = "clkp1", "clkp2", "can_clk";
}; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 915>;
status = "disabled";
};
vin3: video@e6ef3000 { vin0: video@e6ef0000 {
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin"; compatible = "renesas,vin-r8a7790",
reg = <0 0xe6ef3000 0 0x1000>; "renesas,rcar-gen2-vin";
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ef0000 0 0x1000>;
clocks = <&cpg CPG_MOD 808>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 811>;
resets = <&cpg 808>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 811>;
}; status = "disabled";
};
vsp@fe920000 { vin1: video@e6ef1000 {
compatible = "renesas,vsp1"; compatible = "renesas,vin-r8a7790",
reg = <0 0xfe920000 0 0x8000>; "renesas,rcar-gen2-vin";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ef1000 0 0x1000>;
clocks = <&cpg CPG_MOD 130>; interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 810>;
resets = <&cpg 130>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 810>;
status = "disabled";
};
vsp@fe928000 { vin2: video@e6ef2000 {
compatible = "renesas,vsp1"; compatible = "renesas,vin-r8a7790",
reg = <0 0xfe928000 0 0x8000>; "renesas,rcar-gen2-vin";
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ef2000 0 0x1000>;
clocks = <&cpg CPG_MOD 131>; interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 809>;
resets = <&cpg 131>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 809>;
status = "disabled";
};
vsp@fe930000 { vin3: video@e6ef3000 {
compatible = "renesas,vsp1"; compatible = "renesas,vin-r8a7790",
reg = <0 0xfe930000 0 0x8000>; "renesas,rcar-gen2-vin";
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ef3000 0 0x1000>;
clocks = <&cpg CPG_MOD 128>; interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 808>;
resets = <&cpg 128>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
}; resets = <&cpg 808>;
status = "disabled";
};
vsp@fe938000 { rcar_sound: sound@ec500000 {
compatible = "renesas,vsp1"; /*
reg = <0 0xfe938000 0 0x8000>; * #sound-dai-cells is required
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; *
clocks = <&cpg CPG_MOD 127>; * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
resets = <&cpg 127>; */
}; compatible = "renesas,rcar_sound-r8a7790",
"renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7790_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6",
"src.5", "src.4", "src.3", "src.2",
"src.1", "src.0",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>,
<&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>,
<&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0";
status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
du: display@feb00000 { rcar_sound,mix {
compatible = "renesas,du-r8a7790"; mix0: mix-0 { };
reg = <0 0xfeb00000 0 0x70000>, mix1: mix-1 { };
<0 0xfeb90000 0 0x1c>, };
<0 0xfeb94000 0 0x1c>;
reg-names = "du", "lvds.0", "lvds.1";
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
<&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
<&cpg CPG_MOD 725>;
clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 { rcar_sound,ctu {
reg = <0>; ctu00: ctu-0 { };
du_out_rgb: endpoint { ctu01: ctu-1 { };
}; ctu02: ctu-2 { };
ctu03: ctu-3 { };
ctu10: ctu-4 { };
ctu11: ctu-5 { };
ctu12: ctu-6 { };
ctu13: ctu-7 { };
}; };
port@1 {
reg = <1>; rcar_sound,src {
du_out_lvds0: endpoint { src0: src-0 {
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x85>, <&audma1 0x9a>;
dma-names = "rx", "tx";
};
src1: src-1 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx";
};
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx";
};
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx";
};
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx";
};
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx";
};
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
}; };
}; };
port@2 {
reg = <2>; rcar_sound,ssi {
du_out_lvds1: endpoint { ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>,
<&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>,
<&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>,
<&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>,
<&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>,
<&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>,
<&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>,
<&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>,
<&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>,
<&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>,
<&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
}; };
}; };
}; };
};
can0: can@e6e80000 { audma0: dma-controller@ec700000 {
compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; compatible = "renesas,dmac-r8a7790",
reg = <0 0xe6e80000 0 0x1000>; "renesas,rcar-dmac";
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xec700000 0 0x10000>;
clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>, interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
<&can_clk>; GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
clock-names = "clkp1", "clkp2", "can_clk"; GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 916>; GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
can1: can@e6e88000 { GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can"; GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
reg = <0 0xe6e88000 0 0x1000>; GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>, GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
<&can_clk>; GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clkp1", "clkp2", "can_clk"; interrupt-names = "error",
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; "ch0", "ch1", "ch2", "ch3",
resets = <&cpg 915>; "ch4", "ch5", "ch6", "ch7",
status = "disabled"; "ch8", "ch9", "ch10", "ch11",
}; "ch12";
clocks = <&cpg CPG_MOD 502>;
jpu: jpeg-codec@fe980000 { clock-names = "fck";
compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu"; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
reg = <0 0xfe980000 0 0x10300>; resets = <&cpg 502>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>;
clocks = <&cpg CPG_MOD 106>; dma-channels = <13>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; };
resets = <&cpg 106>;
};
/* External root clock */
extal_clk: extal {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/* External PCIe clock - can be overridden by the board */
pcie_bus_clk: pcie_bus {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* audma1: dma-controller@ec720000 {
* The external audio clocks are configured as 0 Hz fixed frequency compatible = "renesas,dmac-r8a7790",
* clocks by default. "renesas,rcar-dmac";
* Boards that provide audio clocks should override them. reg = <0 0xec720000 0 0x10000>;
*/ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
audio_clk_a: audio_clk_a { GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
compatible = "fixed-clock"; GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
#clock-cells = <0>; GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
clock-frequency = <0>; GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
audio_clk_b: audio_clk_b { GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
compatible = "fixed-clock"; GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
#clock-cells = <0>; GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
clock-frequency = <0>; GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
audio_clk_c: audio_clk_c { GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
compatible = "fixed-clock"; GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
#clock-cells = <0>; GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; interrupt-names = "error",
}; "ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
/* External SCIF clock */ xhci: usb@ee000000 {
scif_clk: scif { compatible = "renesas,xhci-r8a7790",
compatible = "fixed-clock"; "renesas,rcar-gen2-xhci";
#clock-cells = <0>; reg = <0 0xee000000 0 0xc00>;
/* This value must be overridden by the board. */ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; clocks = <&cpg CPG_MOD 328>;
}; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 328>;
phys = <&usb2 1>;
phy-names = "usb";
status = "disabled";
};
/* External USB clock - can be overridden by the board */ pci0: pci@ee090000 {
usb_extal_clk: usb_extal { compatible = "renesas,pci-r8a7790",
compatible = "fixed-clock"; "renesas,pci-rcar-gen2";
#clock-cells = <0>; device_type = "pci";
clock-frequency = <48000000>; reg = <0 0xee090000 0 0xc00>,
}; <0 0xee080000 0 0x1100>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
/* External CAN clock */ usb@2,0 {
can_clk: can { reg = <0x1000 0 0 0 0>;
compatible = "fixed-clock"; phys = <&usb0 0>;
#clock-cells = <0>; phy-names = "usb";
/* This value must be overridden by the board. */ };
clock-frequency = <0>; };
};
cpg: clock-controller@e6150000 { pci1: pci@ee0b0000 {
compatible = "renesas,r8a7790-cpg-mssr"; compatible = "renesas,pci-r8a7790",
reg = <0 0xe6150000 0 0x1000>; "renesas,pci-rcar-gen2";
clocks = <&extal_clk>, <&usb_extal_clk>; device_type = "pci";
clock-names = "extal", "usb_extal"; reg = <0 0xee0b0000 0 0xc00>,
#clock-cells = <2>; <0 0xee0a0000 0 0x1100>;
#power-domain-cells = <0>; interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>; clocks = <&cpg CPG_MOD 703>;
}; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
};
prr: chipid@ff000044 { pci2: pci@ee0d0000 {
compatible = "renesas,prr"; compatible = "renesas,pci-r8a7790",
reg = <0 0xff000044 0 4>; "renesas,pci-rcar-gen2";
}; device_type = "pci";
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 703>;
reg = <0 0xee0d0000 0 0xc00>,
<0 0xee0c0000 0 0x1100>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
bus-range = <2 2>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x20800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
rst: reset-controller@e6160000 { usb@2,0 {
compatible = "renesas,r8a7790-rst"; reg = <0x21000 0 0 0 0>;
reg = <0 0xe6160000 0 0x0100>; phys = <&usb2 0>;
}; phy-names = "usb";
};
};
sysc: system-controller@e6180000 { sdhi0: sd@ee100000 {
compatible = "renesas,r8a7790-sysc"; compatible = "renesas,sdhi-r8a7790",
reg = <0 0xe6180000 0 0x0200>; "renesas,rcar-gen2-sdhi";
#power-domain-cells = <1>; reg = <0 0xee100000 0 0x328>;
}; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
qspi: spi@e6b10000 { sdhi1: sd@ee120000 {
compatible = "renesas,qspi-r8a7790", "renesas,qspi"; compatible = "renesas,sdhi-r8a7790",
reg = <0 0xe6b10000 0 0x2c>; "renesas,rcar-gen2-sdhi";
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xee120000 0 0x328>;
clocks = <&cpg CPG_MOD 917>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>, clocks = <&cpg CPG_MOD 313>;
<&dmac1 0x17>, <&dmac1 0x18>; dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
dma-names = "tx", "rx", "tx", "rx"; <&dmac1 0xc9>, <&dmac1 0xca>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; dma-names = "tx", "rx", "tx", "rx";
resets = <&cpg 917>; max-frequency = <195000000>;
num-cs = <1>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 313>;
#size-cells = <0>; status = "disabled";
status = "disabled"; };
};
msiof0: spi@e6e20000 { sdhi2: sd@ee140000 {
compatible = "renesas,msiof-r8a7790", compatible = "renesas,sdhi-r8a7790",
"renesas,rcar-gen2-msiof"; "renesas,rcar-gen2-sdhi";
reg = <0 0xe6e20000 0 0x0064>; reg = <0 0xee140000 0 0x100>;
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 0>; clocks = <&cpg CPG_MOD 312>;
dmas = <&dmac0 0x51>, <&dmac0 0x52>, dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0x51>, <&dmac1 0x52>; <&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; max-frequency = <97500000>;
resets = <&cpg 0>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 312>;
#size-cells = <0>; status = "disabled";
status = "disabled"; };
};
msiof1: spi@e6e10000 { sdhi3: sd@ee160000 {
compatible = "renesas,msiof-r8a7790", compatible = "renesas,sdhi-r8a7790",
"renesas,rcar-gen2-msiof"; "renesas,rcar-gen2-sdhi";
reg = <0 0xe6e10000 0 0x0064>; reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 208>; clocks = <&cpg CPG_MOD 311>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>, dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0x55>, <&dmac1 0x56>; <&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; max-frequency = <97500000>;
resets = <&cpg 208>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 311>;
#size-cells = <0>; status = "disabled";
status = "disabled"; };
};
msiof2: spi@e6e00000 { mmcif0: mmc@ee200000 {
compatible = "renesas,msiof-r8a7790", compatible = "renesas,mmcif-r8a7790",
"renesas,rcar-gen2-msiof"; "renesas,sh-mmcif";
reg = <0 0xe6e00000 0 0x0064>; reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 205>; clocks = <&cpg CPG_MOD 315>;
dmas = <&dmac0 0x41>, <&dmac0 0x42>, dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0x41>, <&dmac1 0x42>; <&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 205>; resets = <&cpg 315>;
#address-cells = <1>; reg-io-width = <4>;
#size-cells = <0>; status = "disabled";
status = "disabled"; max-frequency = <97500000>;
}; };
msiof3: spi@e6c90000 { mmcif1: mmc@ee220000 {
compatible = "renesas,msiof-r8a7790", compatible = "renesas,mmcif-r8a7790",
"renesas,rcar-gen2-msiof"; "renesas,sh-mmcif";
reg = <0 0xe6c90000 0 0x0064>; reg = <0 0xee220000 0 0x80>;
interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 215>; clocks = <&cpg CPG_MOD 305>;
dmas = <&dmac0 0x45>, <&dmac0 0x46>, dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
<&dmac1 0x45>, <&dmac1 0x46>; <&dmac1 0xe1>, <&dmac1 0xe2>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 215>; resets = <&cpg 305>;
#address-cells = <1>; reg-io-width = <4>;
#size-cells = <0>; status = "disabled";
status = "disabled"; max-frequency = <97500000>;
}; };
xhci: usb@ee000000 { sata0: sata@ee300000 {
compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci"; compatible = "renesas,sata-r8a7790",
reg = <0 0xee000000 0 0xc00>; "renesas,rcar-gen2-sata";
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xee300000 0 0x2000>;
clocks = <&cpg CPG_MOD 328>; interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 815>;
resets = <&cpg 328>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
phys = <&usb2 1>; resets = <&cpg 815>;
phy-names = "usb"; status = "disabled";
status = "disabled"; };
};
pci0: pci@ee090000 { sata1: sata@ee500000 {
compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; compatible = "renesas,sata-r8a7790",
device_type = "pci"; "renesas,rcar-gen2-sata";
reg = <0 0xee090000 0 0xc00>, reg = <0 0xee500000 0 0x2000>;
<0 0xee080000 0 0x1100>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 814>;
clocks = <&cpg CPG_MOD 703>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; resets = <&cpg 814>;
resets = <&cpg 703>; status = "disabled";
status = "disabled";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
}; };
usb@2,0 { ether: ethernet@ee700000 {
reg = <0x1000 0 0 0 0>; compatible = "renesas,ether-r8a7790",
phys = <&usb0 0>; "renesas,rcar-gen2-ether";
phy-names = "usb"; reg = <0 0xee700000 0 0x400>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
}; };
};
pci1: pci@ee0b0000 { gic: interrupt-controller@f1001000 {
compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; compatible = "arm,gic-400";
device_type = "pci"; #interrupt-cells = <3>;
reg = <0 0xee0b0000 0 0xc00>, #address-cells = <0>;
<0 0xee0a0000 0 0x1100>; interrupt-controller;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
clocks = <&cpg CPG_MOD 703>; <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
resets = <&cpg 703>; clocks = <&cpg CPG_MOD 408>;
status = "disabled"; clock-names = "clk";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
bus-range = <1 1>; resets = <&cpg 408>;
#address-cells = <3>; };
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
};
pci2: pci@ee0d0000 { pciec: pcie@fe000000 {
compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2"; compatible = "renesas,pcie-r8a7790",
device_type = "pci"; "renesas,pcie-rcar-gen2";
clocks = <&cpg CPG_MOD 703>; reg = <0 0xfe000000 0 0x80000>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; #address-cells = <3>;
resets = <&cpg 703>; #size-cells = <2>;
reg = <0 0xee0d0000 0 0xc00>, bus-range = <0x00 0xff>;
<0 0xee0c0000 0 0x1100>; device_type = "pci";
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
status = "disabled"; 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
bus-range = <2 2>; 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
#address-cells = <3>; /* Map all possible DDR as inbound ranges */
#size-cells = <2>; dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
#interrupt-cells = <1>; 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
interrupt-map-mask = <0xff00 0 0 0x7>; <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH #interrupt-cells = <1>;
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 { clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
reg = <0x20800 0 0 0 0>; clock-names = "pcie", "pcie_bus";
phys = <&usb2 0>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
phy-names = "usb"; resets = <&cpg 319>;
status = "disabled";
}; };
usb@2,0 { vsp@fe920000 {
reg = <0x21000 0 0 0 0>; compatible = "renesas,vsp1";
phys = <&usb2 0>; reg = <0 0xfe920000 0 0x8000>;
phy-names = "usb"; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 130>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 130>;
}; };
};
pciec: pcie@fe000000 { vsp@fe928000 {
compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2"; compatible = "renesas,vsp1";
reg = <0 0xfe000000 0 0x80000>; reg = <0 0xfe928000 0 0x8000>;
#address-cells = <3>; interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
#size-cells = <2>; clocks = <&cpg CPG_MOD 131>;
bus-range = <0x00 0xff>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
device_type = "pci"; resets = <&cpg 131>;
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 };
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 319>;
status = "disabled";
};
rcar_sound: sound@ec500000 { vsp@fe930000 {
/* compatible = "renesas,vsp1";
* #sound-dai-cells is required reg = <0 0xfe930000 0 0x8000>;
* interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; clocks = <&cpg CPG_MOD 128>;
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
*/ resets = <&cpg 128>;
compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7790_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6", "src.5",
"src.4", "src.3", "src.2", "src.1", "src.0",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma1 0xbe>;
dma-names = "tx";
};
}; };
rcar_sound,mix { vsp@fe938000 {
mix0: mix-0 { }; compatible = "renesas,vsp1";
mix1: mix-1 { }; reg = <0 0xfe938000 0 0x8000>;
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 127>;
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 127>;
}; };
rcar_sound,ctu { jpu: jpeg-codec@fe980000 {
ctu00: ctu-0 { }; compatible = "renesas,jpu-r8a7790",
ctu01: ctu-1 { }; "renesas,rcar-gen2-jpu";
ctu02: ctu-2 { }; reg = <0 0xfe980000 0 0x10300>;
ctu03: ctu-3 { }; interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
ctu10: ctu-4 { }; clocks = <&cpg CPG_MOD 106>;
ctu11: ctu-5 { }; power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
ctu12: ctu-6 { }; resets = <&cpg 106>;
ctu13: ctu-7 { };
}; };
rcar_sound,src { du: display@feb00000 {
src0: src-0 { compatible = "renesas,du-r8a7790";
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xfeb00000 0 0x70000>,
dmas = <&audma0 0x85>, <&audma1 0x9a>; <0 0xfeb90000 0 0x1c>,
dma-names = "rx", "tx"; <0 0xfeb94000 0 0x1c>;
}; reg-names = "du", "lvds.0", "lvds.1";
src1: src-1 { interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
dmas = <&audma0 0x87>, <&audma1 0x9c>; <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "rx", "tx"; clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
}; <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
src2: src-2 { <&cpg CPG_MOD 725>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; clock-names = "du.0", "du.1", "du.2", "lvds.0",
dmas = <&audma0 0x89>, <&audma1 0x9e>; "lvds.1";
dma-names = "rx", "tx"; status = "disabled";
};
src3: src-3 { ports {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>; #size-cells = <0>;
dma-names = "rx", "tx";
}; port@0 {
src4: src-4 { reg = <0>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; du_out_rgb: endpoint {
dmas = <&audma0 0x8d>, <&audma1 0xb0>; };
dma-names = "rx", "tx"; };
}; port@1 {
src5: src-5 { reg = <1>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; du_out_lvds0: endpoint {
dmas = <&audma0 0x8f>, <&audma1 0xb2>; };
dma-names = "rx", "tx"; };
}; port@2 {
src6: src-6 { reg = <2>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; du_out_lvds1: endpoint {
dmas = <&audma0 0x91>, <&audma1 0xb4>; };
dma-names = "rx", "tx"; };
};
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
}; };
}; };
rcar_sound,ssi { prr: chipid@ff000044 {
ssi0: ssi-0 { compatible = "renesas,prr";
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xff000044 0 4>;
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
};
}; };
};
ipmmu_sy0: mmu@e6280000 { cmt0: timer@ffca0000 {
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; compatible = "renesas,r8a7790-cmt0",
reg = <0 0xe6280000 0 0x1000>; "renesas,rcar-gen2-cmt0";
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xffca0000 0 0x1004>;
<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
#iommu-cells = <1>; <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; clocks = <&cpg CPG_MOD 124>;
}; clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
};
ipmmu_sy1: mmu@e6290000 { cmt1: timer@e6130000 {
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; compatible = "renesas,r8a7790-cmt1",
reg = <0 0xe6290000 0 0x1000>; "renesas,rcar-gen2-cmt1";
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6130000 0 0x1004>;
#iommu-cells = <1>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
status = "disabled"; <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled";
};
}; };
ipmmu_ds: mmu@e6740000 { thermal-zones {
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; cpu_thermal: cpu-thermal {
reg = <0 0xe6740000 0 0x1000>; polling-delay-passive = <0>;
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, polling-delay = <0>;
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
status = "disabled";
};
ipmmu_mp: mmu@ec680000 { thermal-sensors = <&thermal>;
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
reg = <0 0xec680000 0 0x1000>; trips {
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; cpu-crit {
#iommu-cells = <1>; temperature = <95000>;
status = "disabled"; hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
}; };
ipmmu_mx: mmu@fe951000 { timer {
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; compatible = "arm,armv7-timer";
reg = <0 0xfe951000 0 0x1000>; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
#iommu-cells = <1>; <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
status = "disabled";
}; };
ipmmu_rt: mmu@ffc80000 { /* External USB clock - can be overridden by the board */
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa"; usb_extal_clk: usb_extal {
reg = <0 0xffc80000 0 0x1000>; compatible = "fixed-clock";
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; #clock-cells = <0>;
#iommu-cells = <1>; clock-frequency = <48000000>;
status = "disabled";
}; };
}; };
arch/arm/boot/dts/r8a7791-koelsch.dts
View file @ cdcdbbf3
...@@ -51,7 +51,11 @@ aliases { ...@@ -51,7 +51,11 @@ aliases {
serial0 = &scif0; serial0 = &scif0;
serial1 = &scif1; serial1 = &scif1;
i2c9 = &gpioi2c1; i2c9 = &gpioi2c1;
i2c10 = &gpioi2c2;
i2c11 = &gpioi2c4;
i2c12 = &i2cexio1; i2c12 = &i2cexio1;
i2c13 = &i2chdmi;
i2c14 = &i2cexio4;
}; };
chosen { chosen {
...@@ -312,8 +316,28 @@ gpioi2c1: i2c-9 { ...@@ -312,8 +316,28 @@ gpioi2c1: i2c-9 {
#size-cells = <0>; #size-cells = <0>;
compatible = "i2c-gpio"; compatible = "i2c-gpio";
status = "disabled"; status = "disabled";
sda-gpios = <&gpio7 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio7 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio7 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio7 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
gpioi2c2: i2c-10 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
gpioi2c4: i2c-11 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
scl-gpios = <&gpio7 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio7 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>; i2c-gpio,delay-us = <5>;
}; };
...@@ -328,6 +352,115 @@ i2cexio1: i2c-12 { ...@@ -328,6 +352,115 @@ i2cexio1: i2c-12 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
}; };
/*
* A fallback to GPIO is provided for I2C2.
*/
i2chdmi: i2c-13 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin1>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cec_clock>;
clock-names = "cec";
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
hdmi-in@4c {
compatible = "adi,adv7612";
reg = <0x4c>;
interrupt-parent = <&gpio4>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
default-input = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7612_in: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
port@2 {
reg = <2>;
adv7612_out: endpoint {
remote-endpoint = <&vin0ep2>;
};
};
};
};
eeprom@50 {
compatible = "renesas,r1ex24002", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
};
/*
* I2C4 is routed to EXIO connector E, pins 37 (SCL) + 39 (SDA).
* A fallback to GPIO is provided.
*/
i2cexio4: i2c-14 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&i2c4>, <&gpioi2c4>;
i2c-bus-name = "i2c-exio4";
#address-cells = <1>;
#size-cells = <0>;
};
}; };
&du { &du {
...@@ -371,6 +504,11 @@ i2c2_pins: i2c2 { ...@@ -371,6 +504,11 @@ i2c2_pins: i2c2 {
function = "i2c2"; function = "i2c2";
}; };
i2c4_pins: i2c4 {
groups = "i2c4_c";
function = "i2c4";
};
du_pins: du { du_pins: du {
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
function = "du"; function = "du";
...@@ -621,96 +759,14 @@ &i2c1 { ...@@ -621,96 +759,14 @@ &i2c1 {
&i2c2 { &i2c2 {
pinctrl-0 = <&i2c2_pins>; pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default"; pinctrl-names = "i2c-hdmi";
status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
};
ak4643: codec@12 { &i2c4 {
compatible = "asahi-kasei,ak4643"; pinctrl-0 = <&i2c4_pins>;
#sound-dai-cells = <0>; pinctrl-names = "i2c-exio4";
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin1>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
clocks = <&cec_clock>;
clock-names = "cec";
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
hdmi-in@4c {
compatible = "adi,adv7612";
reg = <0x4c>;
interrupt-parent = <&gpio4>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
default-input = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7612_in: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
port@2 {
reg = <2>;
adv7612_out: endpoint {
remote-endpoint = <&vin0ep2>;
};
};
};
};
eeprom@50 {
compatible = "renesas,r1ex24002", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
}; };
&i2c6 { &i2c6 {
......
arch/arm/boot/dts/r8a7791-porter.dts
View file @ cdcdbbf3
...@@ -29,6 +29,8 @@ / { ...@@ -29,6 +29,8 @@ / {
aliases { aliases {
serial0 = &scif0; serial0 = &scif0;
i2c9 = &gpioi2c2;
i2c10 = &i2chdmi;
}; };
chosen { chosen {
...@@ -135,6 +137,78 @@ soundcodec: simple-audio-card,codec { ...@@ -135,6 +137,78 @@ soundcodec: simple-audio-card,codec {
clocks = <&x14_clk>; clocks = <&x14_clk>;
}; };
}; };
gpioi2c2: i2c-9 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
/*
* A fallback to GPIO is provided for I2C2.
*/
i2chdmi: i2c-10 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
ak4642: codec@12 {
compatible = "asahi-kasei,ak4642";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin0>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin0ep>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
};
}; };
&extal_clk { &extal_clk {
...@@ -296,61 +370,9 @@ partition@440000 { ...@@ -296,61 +370,9 @@ partition@440000 {
&i2c2 { &i2c2 {
pinctrl-0 = <&i2c2_pins>; pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default"; pinctrl-names = "i2c-hdmi";
status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
ak4642: codec@12 {
compatible = "asahi-kasei,ak4642";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin0>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin0ep>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
}; };
&sata0 { &sata0 {
...@@ -425,7 +447,7 @@ &du { ...@@ -425,7 +447,7 @@ &du {
"dclkin.0", "dclkin.1"; "dclkin.0", "dclkin.1";
ports { ports {
port@1 { port@0 {
endpoint { endpoint {
remote-endpoint = <&adv7511_in>; remote-endpoint = <&adv7511_in>;
}; };
......
arch/arm/boot/dts/r8a7791.dtsi
View file @ cdcdbbf3
...@@ -17,7 +17,6 @@ ...@@ -17,7 +17,6 @@
/ { / {
compatible = "renesas,r8a7791"; compatible = "renesas,r8a7791";
interrupt-parent = <&gic>;
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
...@@ -40,6 +39,35 @@ aliases { ...@@ -40,6 +39,35 @@ aliases {
vin2 = &vin2; vin2 = &vin2;
}; };
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -83,1585 +111,1627 @@ L2_CA15: cache-controller-0 { ...@@ -83,1585 +111,1627 @@ L2_CA15: cache-controller-0 {
}; };
}; };
thermal-zones { /* External root clock */
cpu_thermal: cpu-thermal { extal_clk: extal {
polling-delay-passive = <0>; compatible = "fixed-clock";
polling-delay = <0>; #clock-cells = <0>;
/* This value must be overridden by the board. */
thermal-sensors = <&thermal>; clock-frequency = <0>;
trips {
cpu-crit {
temperature = <95000>;
hysteresis = <0>;
type = "critical";
};
};
cooling-maps {
};
};
};
apmu@e6152000 {
compatible = "renesas,r8a7791-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
reg = <0 0xe6050000 0 0x50>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 912>;
};
gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
reg = <0 0xe6051000 0 0x50>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 26>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 911>;
};
gpio2: gpio@e6052000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio";
reg = <0 0xe6052000 0 0x50>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 64 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 910>;
}; };
gpio3: gpio@e6053000 { /* External PCIe clock - can be overridden by the board */
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; pcie_bus_clk: pcie_bus {
reg = <0 0xe6053000 0 0x50>; compatible = "fixed-clock";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; #clock-cells = <0>;
#gpio-cells = <2>; clock-frequency = <0>;
gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 909>;
}; };
gpio4: gpio@e6054000 { /* External SCIF clock */
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; scif_clk: scif {
reg = <0 0xe6054000 0 0x50>; compatible = "fixed-clock";
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; #clock-cells = <0>;
#gpio-cells = <2>; /* This value must be overridden by the board. */
gpio-controller; clock-frequency = <0>;
gpio-ranges = <&pfc 0 128 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 908>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 908>;
}; };
gpio5: gpio@e6055000 { soc {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "simple-bus";
reg = <0 0xe6055000 0 0x50>; interrupt-parent = <&gic>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 907>;
};
gpio6: gpio@e6055400 { #address-cells = <2>;
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; #size-cells = <2>;
reg = <0 0xe6055400 0 0x50>; ranges;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; gpio0: gpio@e6050000 {
gpio-controller; compatible = "renesas,gpio-r8a7791",
gpio-ranges = <&pfc 0 192 32>; "renesas,rcar-gen2-gpio";
#interrupt-cells = <2>; reg = <0 0xe6050000 0 0x50>;
interrupt-controller; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 905>; #gpio-cells = <2>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; gpio-controller;
resets = <&cpg 905>; gpio-ranges = <&pfc 0 0 32>;
}; #interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 912>;
};
gpio7: gpio@e6055800 { gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a7791", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7791",
reg = <0 0xe6055800 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6051000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 224 26>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 32 26>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 904>; interrupt-controller;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 911>;
resets = <&cpg 904>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 911>;
};
thermal: thermal@e61f0000 { gpio2: gpio@e6052000 {
compatible = "renesas,thermal-r8a7791", compatible = "renesas,gpio-r8a7791",
"renesas,rcar-gen2-thermal", "renesas,rcar-gen2-gpio";
"renesas,rcar-thermal"; reg = <0 0xe6052000 0 0x50>;
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>;
clocks = <&cpg CPG_MOD 522>; gpio-controller;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; gpio-ranges = <&pfc 0 64 32>;
resets = <&cpg 522>; #interrupt-cells = <2>;
#thermal-sensor-cells = <0>; interrupt-controller;
}; clocks = <&cpg CPG_MOD 910>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 910>;
};
timer { gpio3: gpio@e6053000 {
compatible = "arm,armv7-timer"; compatible = "renesas,gpio-r8a7791",
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, "renesas,rcar-gen2-gpio";
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, reg = <0 0xe6053000 0 0x50>;
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; #gpio-cells = <2>;
}; gpio-controller;
gpio-ranges = <&pfc 0 96 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 909>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 909>;
};
cmt0: timer@ffca0000 { gpio4: gpio@e6054000 {
compatible = "renesas,r8a7791-cmt0", "renesas,rcar-gen2-cmt0"; compatible = "renesas,gpio-r8a7791",
reg = <0 0xffca0000 0 0x1004>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xe6054000 0 0x50>;
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>; #gpio-cells = <2>;
clock-names = "fck"; gpio-controller;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; gpio-ranges = <&pfc 0 128 32>;
resets = <&cpg 124>; #interrupt-cells = <2>;
interrupt-controller;
status = "disabled"; clocks = <&cpg CPG_MOD 908>;
}; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 908>;
};
cmt1: timer@e6130000 { gpio5: gpio@e6055000 {
compatible = "renesas,r8a7791-cmt1", "renesas,rcar-gen2-cmt1"; compatible = "renesas,gpio-r8a7791",
reg = <0 0xe6130000 0 0x1004>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xe6055000 0 0x50>;
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, #gpio-cells = <2>;
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, gpio-controller;
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, gpio-ranges = <&pfc 0 160 32>;
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, #interrupt-cells = <2>;
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, interrupt-controller;
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 907>;
clocks = <&cpg CPG_MOD 329>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
clock-names = "fck"; resets = <&cpg 907>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; };
resets = <&cpg 329>;
status = "disabled";
};
irqc0: interrupt-controller@e61c0000 { gpio6: gpio@e6055400 {
compatible = "renesas,irqc-r8a7791", "renesas,irqc"; compatible = "renesas,gpio-r8a7791",
#interrupt-cells = <2>; "renesas,rcar-gen2-gpio";
interrupt-controller; reg = <0 0xe6055400 0 0x50>;
reg = <0 0xe61c0000 0 0x200>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, #gpio-cells = <2>;
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, gpio-controller;
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, gpio-ranges = <&pfc 0 192 32>;
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, #interrupt-cells = <2>;
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, interrupt-controller;
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, clocks = <&cpg CPG_MOD 905>;
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, resets = <&cpg 905>;
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, };
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
dmac0: dma-controller@e6700000 { gpio7: gpio@e6055800 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; compatible = "renesas,gpio-r8a7791",
reg = <0 0xe6700000 0 0x20000>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6055800 0 0x50>;
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH #gpio-cells = <2>;
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH gpio-controller;
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH gpio-ranges = <&pfc 0 224 26>;
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH #interrupt-cells = <2>;
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH interrupt-controller;
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH clocks = <&cpg CPG_MOD 904>;
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH resets = <&cpg 904>;
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
dmac1: dma-controller@e6720000 { pfc: pin-controller@e6060000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; compatible = "renesas,pfc-r8a7791";
reg = <0 0xe6720000 0 0x20000>; reg = <0 0xe6060000 0 0x250>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
audma0: dma-controller@ec700000 { cpg: clock-controller@e6150000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; compatible = "renesas,r8a7791-cpg-mssr";
reg = <0 0xec700000 0 0x10000>; reg = <0 0xe6150000 0 0x1000>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH clocks = <&extal_clk>, <&usb_extal_clk>;
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH clock-names = "extal", "usb_extal";
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH #clock-cells = <2>;
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH #power-domain-cells = <0>;
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH #reset-cells = <1>;
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
audma1: dma-controller@ec720000 { apmu@e6152000 {
compatible = "renesas,dmac-r8a7791", "renesas,rcar-dmac"; compatible = "renesas,r8a7791-apmu", "renesas,apmu";
reg = <0 0xec720000 0 0x10000>; reg = <0 0xe6152000 0 0x188>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH cpus = <&cpu0 &cpu1>;
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
usb_dmac0: dma-controller@e65a0000 { rst: reset-controller@e6160000 {
compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; compatible = "renesas,r8a7791-rst";
reg = <0 0xe65a0000 0 0x100>; reg = <0 0xe6160000 0 0x0100>;
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 330>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 330>;
#dma-cells = <1>;
dma-channels = <2>;
};
usb_dmac1: dma-controller@e65b0000 { sysc: system-controller@e6180000 {
compatible = "renesas,r8a7791-usb-dmac", "renesas,usb-dmac"; compatible = "renesas,r8a7791-sysc";
reg = <0 0xe65b0000 0 0x100>; reg = <0 0xe6180000 0 0x0200>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH #power-domain-cells = <1>;
GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; };
interrupt-names = "ch0", "ch1";
clocks = <&cpg CPG_MOD 331>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
};
/* The memory map in the User's Manual maps the cores to bus numbers */ irqc0: interrupt-controller@e61c0000 {
i2c0: i2c@e6508000 { compatible = "renesas,irqc-r8a7791", "renesas,irqc";
#address-cells = <1>; #interrupt-cells = <2>;
#size-cells = <0>; interrupt-controller;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; reg = <0 0xe61c0000 0 0x200>;
reg = <0 0xe6508000 0 0x40>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
clocks = <&cpg CPG_MOD 931>; <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
resets = <&cpg 931>; <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
i2c-scl-internal-delay-ns = <6>; <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
status = "disabled"; <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
}; <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
i2c1: i2c@e6518000 { thermal: thermal@e61f0000 {
#address-cells = <1>; compatible = "renesas,thermal-r8a7791",
#size-cells = <0>; "renesas,rcar-gen2-thermal",
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; "renesas,rcar-thermal";
reg = <0 0xe6518000 0 0x40>; reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>; clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 930>; resets = <&cpg 522>;
i2c-scl-internal-delay-ns = <6>; #thermal-sensor-cells = <0>;
status = "disabled"; };
};
i2c2: i2c@e6530000 { ipmmu_sy0: mmu@e6280000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7791",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; reg = <0 0xe6280000 0 0x1000>;
reg = <0 0xe6530000 0 0x40>; interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>; #iommu-cells = <1>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 929>; };
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c3: i2c@e6540000 { ipmmu_sy1: mmu@e6290000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7791",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; reg = <0 0xe6290000 0 0x1000>;
reg = <0 0xe6540000 0 0x40>; interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; #iommu-cells = <1>;
clocks = <&cpg CPG_MOD 928>; status = "disabled";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; };
resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c4: i2c@e6520000 { ipmmu_ds: mmu@e6740000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7791",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; reg = <0 0xe6740000 0 0x1000>;
reg = <0 0xe6520000 0 0x40>; interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>; #iommu-cells = <1>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 927>; };
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c5: i2c@e6528000 { ipmmu_mp: mmu@ec680000 {
/* doesn't need pinmux */ compatible = "renesas,ipmmu-r8a7791",
#address-cells = <1>; "renesas,ipmmu-vmsa";
#size-cells = <0>; reg = <0 0xec680000 0 0x1000>;
compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c"; interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe6528000 0 0x40>; #iommu-cells = <1>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
clocks = <&cpg CPG_MOD 925>; };
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 925>;
i2c-scl-internal-delay-ns = <110>;
status = "disabled";
};
i2c6: i2c@e60b0000 { ipmmu_mx: mmu@fe951000 {
/* doesn't need pinmux */ compatible = "renesas,ipmmu-r8a7791",
#address-cells = <1>; "renesas,ipmmu-vmsa";
#size-cells = <0>; reg = <0 0xfe951000 0 0x1000>;
compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic", interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
"renesas,rmobile-iic"; <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe60b0000 0 0x425>; #iommu-cells = <1>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
clocks = <&cpg CPG_MOD 926>; };
dmas = <&dmac0 0x77>, <&dmac0 0x78>,
<&dmac1 0x77>, <&dmac1 0x78>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 926>;
status = "disabled";
};
i2c7: i2c@e6500000 { ipmmu_rt: mmu@ffc80000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7791",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic", reg = <0 0xffc80000 0 0x1000>;
"renesas,rmobile-iic"; interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe6500000 0 0x425>; #iommu-cells = <1>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
clocks = <&cpg CPG_MOD 318>; };
dmas = <&dmac0 0x61>, <&dmac0 0x62>,
<&dmac1 0x61>, <&dmac1 0x62>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 318>;
status = "disabled";
};
i2c8: i2c@e6510000 { ipmmu_gp: mmu@e62a0000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7791",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,iic-r8a7791", "renesas,rcar-gen2-iic", reg = <0 0xe62a0000 0 0x1000>;
"renesas,rmobile-iic"; interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
reg = <0 0xe6510000 0 0x425>; <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; #iommu-cells = <1>;
clocks = <&cpg CPG_MOD 323>; status = "disabled";
dmas = <&dmac0 0x65>, <&dmac0 0x66>, };
<&dmac1 0x65>, <&dmac1 0x66>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 323>;
status = "disabled";
};
pfc: pin-controller@e6060000 { icram0: sram@e63a0000 {
compatible = "renesas,pfc-r8a7791"; compatible = "mmio-sram";
reg = <0 0xe6060000 0 0x250>; reg = <0 0xe63a0000 0 0x12000>;
}; };
mmcif0: mmc@ee200000 { icram1: sram@e63c0000 {
compatible = "renesas,mmcif-r8a7791", "renesas,sh-mmcif"; compatible = "mmio-sram";
reg = <0 0xee200000 0 0x80>; reg = <0 0xe63c0000 0 0x1000>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>;
clocks = <&cpg CPG_MOD 315>; #size-cells = <1>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, ranges = <0 0 0xe63c0000 0x1000>;
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 315>;
reg-io-width = <4>;
status = "disabled";
max-frequency = <97500000>;
};
sdhi0: sd@ee100000 { smp-sram@0 {
compatible = "renesas,sdhi-r8a7791", compatible = "renesas,smp-sram";
"renesas,rcar-gen2-sdhi"; reg = <0 0x10>;
reg = <0 0xee100000 0 0x328>; };
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&cpg CPG_MOD 314>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
sdhi1: sd@ee140000 { /* The memory map in the User's Manual maps the cores to
compatible = "renesas,sdhi-r8a7791", * bus numbers
"renesas,rcar-gen2-sdhi"; */
reg = <0 0xee140000 0 0x100>; i2c0: i2c@e6508000 {
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>;
clocks = <&cpg CPG_MOD 312>; #size-cells = <0>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, compatible = "renesas,i2c-r8a7791",
<&dmac1 0xc1>, <&dmac1 0xc2>; "renesas,rcar-gen2-i2c";
dma-names = "tx", "rx", "tx", "rx"; reg = <0 0xe6508000 0 0x40>;
max-frequency = <97500000>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 931>;
resets = <&cpg 312>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 931>;
}; i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
sdhi2: sd@ee160000 { i2c1: i2c@e6518000 {
compatible = "renesas,sdhi-r8a7791", #address-cells = <1>;
"renesas,rcar-gen2-sdhi"; #size-cells = <0>;
reg = <0 0xee160000 0 0x100>; compatible = "renesas,i2c-r8a7791",
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 311>; reg = <0 0xe6518000 0 0x40>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
<&dmac1 0xd3>, <&dmac1 0xd4>; clocks = <&cpg CPG_MOD 930>;
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
max-frequency = <97500000>; resets = <&cpg 930>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>;
resets = <&cpg 311>; status = "disabled";
status = "disabled"; };
};
scifa0: serial@e6c40000 { i2c2: i2c@e6530000 {
compatible = "renesas,scifa-r8a7791", #address-cells = <1>;
"renesas,rcar-gen2-scifa", "renesas,scifa"; #size-cells = <0>;
reg = <0 0xe6c40000 0 64>; compatible = "renesas,i2c-r8a7791",
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 204>; reg = <0 0xe6530000 0 0x40>;
clock-names = "fck"; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x21>, <&dmac0 0x22>, clocks = <&cpg CPG_MOD 929>;
<&dmac1 0x21>, <&dmac1 0x22>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 929>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>;
resets = <&cpg 204>; status = "disabled";
status = "disabled"; };
};
scifa1: serial@e6c50000 { i2c3: i2c@e6540000 {
compatible = "renesas,scifa-r8a7791", #address-cells = <1>;
"renesas,rcar-gen2-scifa", "renesas,scifa"; #size-cells = <0>;
reg = <0 0xe6c50000 0 64>; compatible = "renesas,i2c-r8a7791",
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 203>; reg = <0 0xe6540000 0 0x40>;
clock-names = "fck"; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x25>, <&dmac0 0x26>, clocks = <&cpg CPG_MOD 928>;
<&dmac1 0x25>, <&dmac1 0x26>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 928>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>;
resets = <&cpg 203>; status = "disabled";
status = "disabled"; };
};
scifa2: serial@e6c60000 { i2c4: i2c@e6520000 {
compatible = "renesas,scifa-r8a7791", #address-cells = <1>;
"renesas,rcar-gen2-scifa", "renesas,scifa"; #size-cells = <0>;
reg = <0 0xe6c60000 0 64>; compatible = "renesas,i2c-r8a7791",
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-i2c";
clocks = <&cpg CPG_MOD 202>; reg = <0 0xe6520000 0 0x40>;
clock-names = "fck"; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x27>, <&dmac0 0x28>, clocks = <&cpg CPG_MOD 927>;
<&dmac1 0x27>, <&dmac1 0x28>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 927>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; i2c-scl-internal-delay-ns = <6>;
resets = <&cpg 202>; status = "disabled";
status = "disabled"; };
};
scifa3: serial@e6c70000 { i2c5: i2c@e6528000 {
compatible = "renesas,scifa-r8a7791", /* doesn't need pinmux */
"renesas,rcar-gen2-scifa", "renesas,scifa"; #address-cells = <1>;
reg = <0 0xe6c70000 0 64>; #size-cells = <0>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,i2c-r8a7791",
clocks = <&cpg CPG_MOD 1106>; "renesas,rcar-gen2-i2c";
clock-names = "fck"; reg = <0 0xe6528000 0 0x40>;
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
<&dmac1 0x1b>, <&dmac1 0x1c>; clocks = <&cpg CPG_MOD 925>;
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 925>;
resets = <&cpg 1106>; i2c-scl-internal-delay-ns = <110>;
status = "disabled"; status = "disabled";
}; };
scifa4: serial@e6c78000 { i2c6: i2c@e60b0000 {
compatible = "renesas,scifa-r8a7791", /* doesn't need pinmux */
"renesas,rcar-gen2-scifa", "renesas,scifa"; #address-cells = <1>;
reg = <0 0xe6c78000 0 64>; #size-cells = <0>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,iic-r8a7791",
clocks = <&cpg CPG_MOD 1107>; "renesas,rcar-gen2-iic",
clock-names = "fck"; "renesas,rmobile-iic";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>, reg = <0 0xe60b0000 0 0x425>;
<&dmac1 0x1f>, <&dmac1 0x20>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 926>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; dmas = <&dmac0 0x77>, <&dmac0 0x78>,
resets = <&cpg 1107>; <&dmac1 0x77>, <&dmac1 0x78>;
status = "disabled"; dma-names = "tx", "rx", "tx", "rx";
}; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 926>;
status = "disabled";
};
scifa5: serial@e6c80000 { i2c7: i2c@e6500000 {
compatible = "renesas,scifa-r8a7791", #address-cells = <1>;
"renesas,rcar-gen2-scifa", "renesas,scifa"; #size-cells = <0>;
reg = <0 0xe6c80000 0 64>; compatible = "renesas,iic-r8a7791",
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-iic",
clocks = <&cpg CPG_MOD 1108>; "renesas,rmobile-iic";
clock-names = "fck"; reg = <0 0xe6500000 0 0x425>;
dmas = <&dmac0 0x23>, <&dmac0 0x24>, interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
<&dmac1 0x23>, <&dmac1 0x24>; clocks = <&cpg CPG_MOD 318>;
dma-names = "tx", "rx", "tx", "rx"; dmas = <&dmac0 0x61>, <&dmac0 0x62>,
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; <&dmac1 0x61>, <&dmac1 0x62>;
resets = <&cpg 1108>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 318>;
status = "disabled";
};
scifb0: serial@e6c20000 { i2c8: i2c@e6510000 {
compatible = "renesas,scifb-r8a7791", #address-cells = <1>;
"renesas,rcar-gen2-scifb", "renesas,scifb"; #size-cells = <0>;
reg = <0 0xe6c20000 0 0x100>; compatible = "renesas,iic-r8a7791",
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-iic",
clocks = <&cpg CPG_MOD 206>; "renesas,rmobile-iic";
clock-names = "fck"; reg = <0 0xe6510000 0 0x425>;
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
<&dmac1 0x3d>, <&dmac1 0x3e>; clocks = <&cpg CPG_MOD 323>;
dma-names = "tx", "rx", "tx", "rx"; dmas = <&dmac0 0x65>, <&dmac0 0x66>,
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; <&dmac1 0x65>, <&dmac1 0x66>;
resets = <&cpg 206>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 323>;
status = "disabled";
};
scifb1: serial@e6c30000 { hsusb: usb@e6590000 {
compatible = "renesas,scifb-r8a7791", compatible = "renesas,usbhs-r8a7791",
"renesas,rcar-gen2-scifb", "renesas,scifb"; "renesas,rcar-gen2-usbhs";
reg = <0 0xe6c30000 0 0x100>; reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>; clocks = <&cpg CPG_MOD 704>;
clock-names = "fck"; dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
dmas = <&dmac0 0x19>, <&dmac0 0x1a>, <&usb_dmac1 0>, <&usb_dmac1 1>;
<&dmac1 0x19>, <&dmac1 0x1a>; dma-names = "ch0", "ch1", "ch2", "ch3";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 704>;
resets = <&cpg 207>; renesas,buswait = <4>;
status = "disabled"; phys = <&usb0 1>;
}; phy-names = "usb";
status = "disabled";
};
scifb2: serial@e6ce0000 { usbphy: usb-phy@e6590100 {
compatible = "renesas,scifb-r8a7791", compatible = "renesas,usb-phy-r8a7791",
"renesas,rcar-gen2-scifb", "renesas,scifb"; "renesas,rcar-gen2-usb-phy";
reg = <0 0xe6ce0000 0 0x100>; reg = <0 0xe6590100 0 0x100>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>;
clocks = <&cpg CPG_MOD 216>; #size-cells = <0>;
clock-names = "fck"; clocks = <&cpg CPG_MOD 704>;
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, clock-names = "usbhs";
<&dmac1 0x1d>, <&dmac1 0x1e>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 704>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 216>;
status = "disabled";
};
scif0: serial@e6e60000 { usb0: usb-channel@0 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", reg = <0>;
"renesas,scif"; #phy-cells = <1>;
reg = <0 0xe6e60000 0 64>; };
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; usb2: usb-channel@2 {
clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>, reg = <2>;
<&scif_clk>; #phy-cells = <1>;
clock-names = "fck", "brg_int", "scif_clk"; };
dmas = <&dmac0 0x29>, <&dmac0 0x2a>, };
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 721>;
status = "disabled";
};
scif1: serial@e6e68000 { usb_dmac0: dma-controller@e65a0000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,r8a7791-usb-dmac",
"renesas,scif"; "renesas,usb-dmac";
reg = <0 0xe6e68000 0 64>; reg = <0 0xe65a0000 0 0x100>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>, GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
<&scif_clk>; interrupt-names = "ch0", "ch1";
clock-names = "fck", "brg_int", "scif_clk"; clocks = <&cpg CPG_MOD 330>;
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
<&dmac1 0x2d>, <&dmac1 0x2e>; resets = <&cpg 330>;
dma-names = "tx", "rx", "tx", "rx"; #dma-cells = <1>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; dma-channels = <2>;
resets = <&cpg 720>; };
status = "disabled";
};
adc: adc@e6e54000 { usb_dmac1: dma-controller@e65b0000 {
compatible = "renesas,r8a7791-gyroadc", "renesas,rcar-gyroadc"; compatible = "renesas,r8a7791-usb-dmac",
reg = <0 0xe6e54000 0 64>; "renesas,usb-dmac";
clocks = <&cpg CPG_MOD 901>; reg = <0 0xe65b0000 0 0x100>;
clock-names = "fck"; interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
resets = <&cpg 901>; interrupt-names = "ch0", "ch1";
status = "disabled"; clocks = <&cpg CPG_MOD 331>;
}; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 331>;
#dma-cells = <1>;
dma-channels = <2>;
};
scif2: serial@e6e58000 { dmac0: dma-controller@e6700000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,dmac-r8a7791",
"renesas,scif"; "renesas,rcar-dmac";
reg = <0 0xe6e58000 0 64>; reg = <0 0xe6700000 0 0x20000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>, GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
<&scif_clk>; GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
clock-names = "fck", "brg_int", "scif_clk"; GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x2b>, <&dmac1 0x2c>; GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 719>; GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
scif3: serial@e6ea8000 { dmac1: dma-controller@e6720000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,dmac-r8a7791",
"renesas,scif"; "renesas,rcar-dmac";
reg = <0 0xe6ea8000 0 64>; reg = <0 0xe6720000 0 0x20000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>, GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
<&scif_clk>; GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
clock-names = "fck", "brg_int", "scif_clk"; GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x2f>, <&dmac0 0x30>, GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x2f>, <&dmac1 0x30>; GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 718>; GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
scif4: serial@e6ee0000 { avb: ethernet@e6800000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,etheravb-r8a7791",
"renesas,scif"; "renesas,etheravb-rcar-gen2";
reg = <0 0xe6ee0000 0 64>; reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 812>;
<&scif_clk>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
clock-names = "fck", "brg_int", "scif_clk"; resets = <&cpg 812>;
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, #address-cells = <1>;
<&dmac1 0xfb>, <&dmac1 0xfc>; #size-cells = <0>;
dma-names = "tx", "rx", "tx", "rx"; status = "disabled";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; };
resets = <&cpg 715>;
status = "disabled";
};
scif5: serial@e6ee8000 { qspi: spi@e6b10000 {
compatible = "renesas,scif-r8a7791", "renesas,rcar-gen2-scif", compatible = "renesas,qspi-r8a7791", "renesas,qspi";
"renesas,scif"; reg = <0 0xe6b10000 0 0x2c>;
reg = <0 0xe6ee8000 0 64>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 917>;
clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>, dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&scif_clk>; <&dmac1 0x17>, <&dmac1 0x18>;
clock-names = "fck", "brg_int", "scif_clk"; dma-names = "tx", "rx", "tx", "rx";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
<&dmac1 0xfd>, <&dmac1 0xfe>; resets = <&cpg 917>;
dma-names = "tx", "rx", "tx", "rx"; num-cs = <1>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; #address-cells = <1>;
resets = <&cpg 714>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
hscif0: serial@e62c0000 { scifa0: serial@e6c40000 {
compatible = "renesas,hscif-r8a7791", compatible = "renesas,scifa-r8a7791",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe62c0000 0 96>; reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 204>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x21>, <&dmac0 0x22>,
dmas = <&dmac0 0x39>, <&dmac0 0x3a>, <&dmac1 0x21>, <&dmac1 0x22>;
<&dmac1 0x39>, <&dmac1 0x3a>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 204>;
resets = <&cpg 717>; status = "disabled";
status = "disabled"; };
};
hscif1: serial@e62c8000 { scifa1: serial@e6c50000 {
compatible = "renesas,hscif-r8a7791", compatible = "renesas,scifa-r8a7791",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe62c8000 0 96>; reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 203>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x25>, <&dmac0 0x26>,
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, <&dmac1 0x25>, <&dmac1 0x26>;
<&dmac1 0x4d>, <&dmac1 0x4e>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 203>;
resets = <&cpg 716>; status = "disabled";
status = "disabled"; };
};
hscif2: serial@e62d0000 { scifa2: serial@e6c60000 {
compatible = "renesas,hscif-r8a7791", compatible = "renesas,scifa-r8a7791",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe62d0000 0 96>; reg = <0 0xe6c60000 0 64>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>, clocks = <&cpg CPG_MOD 202>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x27>, <&dmac0 0x28>,
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, <&dmac1 0x27>, <&dmac1 0x28>;
<&dmac1 0x3b>, <&dmac1 0x3c>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 202>;
resets = <&cpg 713>; status = "disabled";
status = "disabled"; };
};
icram0: sram@e63a0000 { scifa3: serial@e6c70000 {
compatible = "mmio-sram"; compatible = "renesas,scifa-r8a7791",
reg = <0 0xe63a0000 0 0x12000>; "renesas,rcar-gen2-scifa", "renesas,scifa";
}; reg = <0 0xe6c70000 0 64>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 1106>;
clock-names = "fck";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
<&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 1106>;
status = "disabled";
};
icram1: sram@e63c0000 { scifa4: serial@e6c78000 {
compatible = "mmio-sram"; compatible = "renesas,scifa-r8a7791",
reg = <0 0xe63c0000 0 0x1000>; "renesas,rcar-gen2-scifa", "renesas,scifa";
#address-cells = <1>; reg = <0 0xe6c78000 0 64>;
#size-cells = <1>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
ranges = <0 0 0xe63c0000 0x1000>; clocks = <&cpg CPG_MOD 1107>;
clock-names = "fck";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
<&dmac1 0x1f>, <&dmac1 0x20>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 1107>;
status = "disabled";
};
smp-sram@0 { scifa5: serial@e6c80000 {
compatible = "renesas,smp-sram"; compatible = "renesas,scifa-r8a7791",
reg = <0 0x10>; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c80000 0 64>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 1108>;
clock-names = "fck";
dmas = <&dmac0 0x23>, <&dmac0 0x24>,
<&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 1108>;
status = "disabled";
}; };
};
ether: ethernet@ee700000 { scifb0: serial@e6c20000 {
compatible = "renesas,ether-r8a7791", compatible = "renesas,scifb-r8a7791",
"renesas,rcar-gen2-ether"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xee700000 0 0x400>; reg = <0 0xe6c20000 0 0x100>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>; clocks = <&cpg CPG_MOD 206>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clock-names = "fck";
resets = <&cpg 813>; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
phy-mode = "rmii"; <&dmac1 0x3d>, <&dmac1 0x3e>;
#address-cells = <1>; dma-names = "tx", "rx", "tx", "rx";
#size-cells = <0>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 206>;
}; status = "disabled";
};
avb: ethernet@e6800000 { scifb1: serial@e6c30000 {
compatible = "renesas,etheravb-r8a7791", compatible = "renesas,scifb-r8a7791",
"renesas,etheravb-rcar-gen2"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; reg = <0 0xe6c30000 0 0x100>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>; clocks = <&cpg CPG_MOD 207>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clock-names = "fck";
resets = <&cpg 812>; dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
#address-cells = <1>; <&dmac1 0x19>, <&dmac1 0x1a>;
#size-cells = <0>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 207>;
status = "disabled";
};
sata0: sata@ee300000 { scifb2: serial@e6ce0000 {
compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata"; compatible = "renesas,scifb-r8a7791",
reg = <0 0xee300000 0 0x2000>; "renesas,rcar-gen2-scifb", "renesas,scifb";
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ce0000 0 0x100>;
clocks = <&cpg CPG_MOD 815>; interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 216>;
resets = <&cpg 815>; clock-names = "fck";
status = "disabled"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
}; <&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 216>;
status = "disabled";
};
sata1: sata@ee500000 { scif0: serial@e6e60000 {
compatible = "renesas,sata-r8a7791", "renesas,rcar-gen2-sata"; compatible = "renesas,scif-r8a7791",
reg = <0 0xee500000 0 0x2000>; "renesas,rcar-gen2-scif", "renesas,scif";
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e60000 0 64>;
clocks = <&cpg CPG_MOD 814>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
resets = <&cpg 814>; <&scif_clk>;
status = "disabled"; clock-names = "fck", "brg_int", "scif_clk";
}; dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
<&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 721>;
status = "disabled";
};
hsusb: usb@e6590000 { scif1: serial@e6e68000 {
compatible = "renesas,usbhs-r8a7791", "renesas,rcar-gen2-usbhs"; compatible = "renesas,scif-r8a7791",
reg = <0 0xe6590000 0 0x100>; "renesas,rcar-gen2-scif", "renesas,scif";
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e68000 0 64>;
clocks = <&cpg CPG_MOD 704>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
<&usb_dmac1 0>, <&usb_dmac1 1>; <&scif_clk>;
dma-names = "ch0", "ch1", "ch2", "ch3"; clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
resets = <&cpg 704>; <&dmac1 0x2d>, <&dmac1 0x2e>;
renesas,buswait = <4>; dma-names = "tx", "rx", "tx", "rx";
phys = <&usb0 1>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
phy-names = "usb"; resets = <&cpg 720>;
status = "disabled"; status = "disabled";
}; };
usbphy: usb-phy@e6590100 { scif2: serial@e6e58000 {
compatible = "renesas,usb-phy-r8a7791", compatible = "renesas,scif-r8a7791",
"renesas,rcar-gen2-usb-phy"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6590100 0 0x100>; reg = <0 0xe6e58000 0 64>;
#address-cells = <1>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
#size-cells = <0>; clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
clocks = <&cpg CPG_MOD 704>; <&scif_clk>;
clock-names = "usbhs"; clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
resets = <&cpg 704>; <&dmac1 0x2b>, <&dmac1 0x2c>;
status = "disabled"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 719>;
status = "disabled";
};
usb0: usb-channel@0 { scif3: serial@e6ea8000 {
reg = <0>; compatible = "renesas,scif-r8a7791",
#phy-cells = <1>; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ea8000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 718>;
status = "disabled";
}; };
usb2: usb-channel@2 {
reg = <2>; scif4: serial@e6ee0000 {
#phy-cells = <1>; compatible = "renesas,scif-r8a7791",
"renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ee0000 0 64>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 715>;
status = "disabled";
}; };
};
vin0: video@e6ef0000 { scif5: serial@e6ee8000 {
compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin"; compatible = "renesas,scif-r8a7791",
reg = <0 0xe6ef0000 0 0x1000>; "renesas,rcar-gen2-scif", "renesas,scif";
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ee8000 0 64>;
clocks = <&cpg CPG_MOD 811>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
resets = <&cpg 811>; <&scif_clk>;
status = "disabled"; clock-names = "fck", "brg_int", "scif_clk";
}; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
<&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 714>;
status = "disabled";
};
vin1: video@e6ef1000 { hscif0: serial@e62c0000 {
compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin"; compatible = "renesas,hscif-r8a7791",
reg = <0 0xe6ef1000 0 0x1000>; "renesas,rcar-gen2-hscif", "renesas,hscif";
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe62c0000 0 96>;
clocks = <&cpg CPG_MOD 810>; interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
resets = <&cpg 810>; <&scif_clk>;
status = "disabled"; clock-names = "fck", "brg_int", "scif_clk";
}; dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 717>;
status = "disabled";
};
vin2: video@e6ef2000 { hscif1: serial@e62c8000 {
compatible = "renesas,vin-r8a7791", "renesas,rcar-gen2-vin"; compatible = "renesas,hscif-r8a7791",
reg = <0 0xe6ef2000 0 0x1000>; "renesas,rcar-gen2-hscif", "renesas,hscif";
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe62c8000 0 96>;
clocks = <&cpg CPG_MOD 809>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
resets = <&cpg 809>; <&scif_clk>;
status = "disabled"; clock-names = "fck", "brg_int", "scif_clk";
}; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 716>;
status = "disabled";
};
vsp@fe928000 { hscif2: serial@e62d0000 {
compatible = "renesas,vsp1"; compatible = "renesas,hscif-r8a7791",
reg = <0 0xfe928000 0 0x8000>; "renesas,rcar-gen2-hscif", "renesas,hscif";
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe62d0000 0 96>;
clocks = <&cpg CPG_MOD 131>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7791_CLK_ZS>,
resets = <&cpg 131>; <&scif_clk>;
}; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 713>;
status = "disabled";
};
vsp@fe930000 { msiof0: spi@e6e20000 {
compatible = "renesas,vsp1"; compatible = "renesas,msiof-r8a7791",
reg = <0 0xfe930000 0 0x8000>; "renesas,rcar-gen2-msiof";
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e20000 0 0x0064>;
clocks = <&cpg CPG_MOD 128>; interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 000>;
resets = <&cpg 128>; dmas = <&dmac0 0x51>, <&dmac0 0x52>,
}; <&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
vsp@fe938000 { msiof1: spi@e6e10000 {
compatible = "renesas,vsp1"; compatible = "renesas,msiof-r8a7791",
reg = <0 0xfe938000 0 0x8000>; "renesas,rcar-gen2-msiof";
interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e10000 0 0x0064>;
clocks = <&cpg CPG_MOD 127>; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 208>;
resets = <&cpg 127>; dmas = <&dmac0 0x55>, <&dmac0 0x56>,
}; <&dmac1 0x55>, <&dmac1 0x56>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 208>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
du: display@feb00000 { msiof2: spi@e6e00000 {
compatible = "renesas,du-r8a7791"; compatible = "renesas,msiof-r8a7791",
reg = <0 0xfeb00000 0 0x40000>, "renesas,rcar-gen2-msiof";
<0 0xfeb90000 0 0x1c>; reg = <0 0xe6e00000 0 0x0064>;
reg-names = "du", "lvds.0"; interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, clocks = <&cpg CPG_MOD 205>;
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; dmas = <&dmac0 0x41>, <&dmac0 0x42>,
clocks = <&cpg CPG_MOD 724>, <&dmac1 0x41>, <&dmac1 0x42>;
<&cpg CPG_MOD 723>, dma-names = "tx", "rx", "tx", "rx";
<&cpg CPG_MOD 726>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
clock-names = "du.0", "du.1", "lvds.0"; resets = <&cpg 205>;
status = "disabled";
ports {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled";
};
port@0 { adc: adc@e6e54000 {
reg = <0>; compatible = "renesas,r8a7791-gyroadc",
du_out_rgb: endpoint { "renesas,rcar-gyroadc";
}; reg = <0 0xe6e54000 0 64>;
}; clocks = <&cpg CPG_MOD 901>;
port@1 { clock-names = "fck";
reg = <1>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
du_out_lvds0: endpoint { resets = <&cpg 901>;
}; status = "disabled";
};
}; };
};
can0: can@e6e80000 { can0: can@e6e80000 {
compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; compatible = "renesas,can-r8a7791",
reg = <0 0xe6e80000 0 0x1000>; "renesas,rcar-gen2-can";
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e80000 0 0x1000>;
clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7791_CLK_RCAN>, interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
<&can_clk>; clocks = <&cpg CPG_MOD 916>,
clock-names = "clkp1", "clkp2", "can_clk"; <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clock-names = "clkp1", "clkp2", "can_clk";
resets = <&cpg 916>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 916>;
}; status = "disabled";
};
can1: can@e6e88000 { can1: can@e6e88000 {
compatible = "renesas,can-r8a7791", "renesas,rcar-gen2-can"; compatible = "renesas,can-r8a7791",
reg = <0 0xe6e88000 0 0x1000>; "renesas,rcar-gen2-can";
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e88000 0 0x1000>;
clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7791_CLK_RCAN>, interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
<&can_clk>; clocks = <&cpg CPG_MOD 915>,
clock-names = "clkp1", "clkp2", "can_clk"; <&cpg CPG_CORE R8A7791_CLK_RCAN>, <&can_clk>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clock-names = "clkp1", "clkp2", "can_clk";
resets = <&cpg 915>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 915>;
}; status = "disabled";
};
jpu: jpeg-codec@fe980000 { vin0: video@e6ef0000 {
compatible = "renesas,jpu-r8a7791", "renesas,rcar-gen2-jpu"; compatible = "renesas,vin-r8a7791",
reg = <0 0xfe980000 0 0x10300>; "renesas,rcar-gen2-vin";
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ef0000 0 0x1000>;
clocks = <&cpg CPG_MOD 106>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 811>;
resets = <&cpg 106>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 811>;
status = "disabled";
};
/* External root clock */ vin1: video@e6ef1000 {
extal_clk: extal { compatible = "renesas,vin-r8a7791",
compatible = "fixed-clock"; "renesas,rcar-gen2-vin";
#clock-cells = <0>; reg = <0 0xe6ef1000 0 0x1000>;
/* This value must be overridden by the board. */ interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; clocks = <&cpg CPG_MOD 810>;
}; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 810>;
status = "disabled";
};
/* vin2: video@e6ef2000 {
* The external audio clocks are configured as 0 Hz fixed frequency compatible = "renesas,vin-r8a7791",
* clocks by default. "renesas,rcar-gen2-vin";
* Boards that provide audio clocks should override them. reg = <0 0xe6ef2000 0 0x1000>;
*/ interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
audio_clk_a: audio_clk_a { clocks = <&cpg CPG_MOD 809>;
compatible = "fixed-clock"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
#clock-cells = <0>; resets = <&cpg 809>;
clock-frequency = <0>; status = "disabled";
}; };
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External PCIe clock - can be overridden by the board */ rcar_sound: sound@ec500000 {
pcie_bus_clk: pcie_bus { /*
compatible = "fixed-clock"; * #sound-dai-cells is required
#clock-cells = <0>; *
clock-frequency = <0>; * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
}; * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
*/
compatible = "renesas,rcar_sound-r8a7791",
"renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7791_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0", "src.9", "src.8",
"src.7", "src.6", "src.5", "src.4",
"src.3", "src.2", "src.1", "src.0",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>,
<&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>,
<&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0";
status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
/* External SCIF clock */ rcar_sound,mix {
scif_clk: scif { mix0: mix-0 { };
compatible = "fixed-clock"; mix1: mix-1 { };
#clock-cells = <0>; };
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/* External USB clock - can be overridden by the board */ rcar_sound,ctu {
usb_extal_clk: usb_extal { ctu00: ctu-0 { };
compatible = "fixed-clock"; ctu01: ctu-1 { };
#clock-cells = <0>; ctu02: ctu-2 { };
clock-frequency = <48000000>; ctu03: ctu-3 { };
}; ctu10: ctu-4 { };
ctu11: ctu-5 { };
ctu12: ctu-6 { };
ctu13: ctu-7 { };
};
/* External CAN clock */ rcar_sound,src {
can_clk: can { src0: src-0 {
compatible = "fixed-clock"; interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <0>; dmas = <&audma0 0x85>, <&audma1 0x9a>;
/* This value must be overridden by the board. */ dma-names = "rx", "tx";
clock-frequency = <0>; };
}; src1: src-1 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx";
};
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx";
};
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx";
};
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx";
};
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx";
};
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
};
};
cpg: clock-controller@e6150000 { rcar_sound,ssi {
compatible = "renesas,r8a7791-cpg-mssr"; ssi0: ssi-0 {
reg = <0 0xe6150000 0 0x1000>; interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&extal_clk>, <&usb_extal_clk>; dmas = <&audma0 0x01>, <&audma1 0x02>,
clock-names = "extal", "usb_extal"; <&audma0 0x15>, <&audma1 0x16>;
#clock-cells = <2>; dma-names = "rx", "tx", "rxu", "txu";
#power-domain-cells = <0>; };
#reset-cells = <1>; ssi1: ssi-1 {
}; interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>,
<&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>,
<&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>,
<&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>,
<&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>,
<&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>,
<&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>,
<&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>,
<&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>,
<&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
};
};
};
rst: reset-controller@e6160000 { audma0: dma-controller@ec700000 {
compatible = "renesas,r8a7791-rst"; compatible = "renesas,dmac-r8a7791",
reg = <0 0xe6160000 0 0x0100>; "renesas,rcar-dmac";
}; reg = <0 0xec700000 0 0x10000>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
prr: chipid@ff000044 { audma1: dma-controller@ec720000 {
compatible = "renesas,prr"; compatible = "renesas,dmac-r8a7791",
reg = <0 0xff000044 0 4>; "renesas,rcar-dmac";
}; reg = <0 0xec720000 0 0x10000>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
sysc: system-controller@e6180000 { xhci: usb@ee000000 {
compatible = "renesas,r8a7791-sysc"; compatible = "renesas,xhci-r8a7791",
reg = <0 0xe6180000 0 0x0200>; "renesas,rcar-gen2-xhci";
#power-domain-cells = <1>; reg = <0 0xee000000 0 0xc00>;
}; interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 328>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 328>;
phys = <&usb2 1>;
phy-names = "usb";
status = "disabled";
};
qspi: spi@e6b10000 { pci0: pci@ee090000 {
compatible = "renesas,qspi-r8a7791", "renesas,qspi"; compatible = "renesas,pci-r8a7791",
reg = <0 0xe6b10000 0 0x2c>; "renesas,pci-rcar-gen2";
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; device_type = "pci";
clocks = <&cpg CPG_MOD 917>; reg = <0 0xee090000 0 0xc00>,
dmas = <&dmac0 0x17>, <&dmac0 0x18>, <0 0xee080000 0 0x1100>;
<&dmac1 0x17>, <&dmac1 0x18>; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 917>; resets = <&cpg 703>;
num-cs = <1>; status = "disabled";
#address-cells = <1>;
#size-cells = <0>; bus-range = <0 0>;
status = "disabled"; #address-cells = <3>;
}; #size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
msiof0: spi@e6e20000 { usb@2,0 {
compatible = "renesas,msiof-r8a7791", reg = <0x1000 0 0 0 0>;
"renesas,rcar-gen2-msiof"; phys = <&usb0 0>;
reg = <0 0xe6e20000 0 0x0064>; phy-names = "usb";
interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&cpg CPG_MOD 000>; };
dmas = <&dmac0 0x51>, <&dmac0 0x52>,
<&dmac1 0x51>, <&dmac1 0x52>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
msiof1: spi@e6e10000 { pci1: pci@ee0d0000 {
compatible = "renesas,msiof-r8a7791", compatible = "renesas,pci-r8a7791",
"renesas,rcar-gen2-msiof"; "renesas,pci-rcar-gen2";
reg = <0 0xe6e10000 0 0x0064>; device_type = "pci";
interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xee0d0000 0 0xc00>,
clocks = <&cpg CPG_MOD 208>; <0 0xee0c0000 0 0x1100>;
dmas = <&dmac0 0x55>, <&dmac0 0x56>, interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
<&dmac1 0x55>, <&dmac1 0x56>; clocks = <&cpg CPG_MOD 703>;
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; resets = <&cpg 703>;
resets = <&cpg 208>; status = "disabled";
#address-cells = <1>;
#size-cells = <0>; bus-range = <1 1>;
status = "disabled"; #address-cells = <3>;
}; #size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x10800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
msiof2: spi@e6e00000 { usb@2,0 {
compatible = "renesas,msiof-r8a7791", reg = <0x11000 0 0 0 0>;
"renesas,rcar-gen2-msiof"; phys = <&usb2 0>;
reg = <0 0xe6e00000 0 0x0064>; phy-names = "usb";
interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&cpg CPG_MOD 205>; };
dmas = <&dmac0 0x41>, <&dmac0 0x42>,
<&dmac1 0x41>, <&dmac1 0x42>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 205>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
xhci: usb@ee000000 { sdhi0: sd@ee100000 {
compatible = "renesas,xhci-r8a7791", "renesas,rcar-gen2-xhci"; compatible = "renesas,sdhi-r8a7791",
reg = <0 0xee000000 0 0xc00>; "renesas,rcar-gen2-sdhi";
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xee100000 0 0x328>;
clocks = <&cpg CPG_MOD 328>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 314>;
resets = <&cpg 328>; dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
phys = <&usb2 1>; <&dmac1 0xcd>, <&dmac1 0xce>;
phy-names = "usb"; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; max-frequency = <195000000>;
}; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
pci0: pci@ee090000 { sdhi1: sd@ee140000 {
compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2"; compatible = "renesas,sdhi-r8a7791",
device_type = "pci"; "renesas,rcar-gen2-sdhi";
reg = <0 0xee090000 0 0xc00>, reg = <0 0xee140000 0 0x100>;
<0 0xee080000 0 0x1100>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 312>;
clocks = <&cpg CPG_MOD 703>; dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; <&dmac1 0xc1>, <&dmac1 0xc2>;
resets = <&cpg 703>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; max-frequency = <97500000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
bus-range = <0 0>; resets = <&cpg 312>;
#address-cells = <3>; status = "disabled";
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
}; };
usb@2,0 { sdhi2: sd@ee160000 {
reg = <0x1000 0 0 0 0>; compatible = "renesas,sdhi-r8a7791",
phys = <&usb0 0>; "renesas,rcar-gen2-sdhi";
phy-names = "usb"; reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 311>;
status = "disabled";
}; };
};
pci1: pci@ee0d0000 { mmcif0: mmc@ee200000 {
compatible = "renesas,pci-r8a7791", "renesas,pci-rcar-gen2"; compatible = "renesas,mmcif-r8a7791",
device_type = "pci"; "renesas,sh-mmcif";
reg = <0 0xee0d0000 0 0xc00>, reg = <0 0xee200000 0 0x80>;
<0 0xee0c0000 0 0x1100>; interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 315>;
clocks = <&cpg CPG_MOD 703>; dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; <&dmac1 0xd1>, <&dmac1 0xd2>;
resets = <&cpg 703>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 315>;
bus-range = <1 1>; reg-io-width = <4>;
#address-cells = <3>; status = "disabled";
#size-cells = <2>; max-frequency = <97500000>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x10800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
}; };
usb@2,0 { sata0: sata@ee300000 {
reg = <0x11000 0 0 0 0>; compatible = "renesas,sata-r8a7791",
phys = <&usb2 0>; "renesas,rcar-gen2-sata";
phy-names = "usb"; reg = <0 0xee300000 0 0x2000>;
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 815>;
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 815>;
status = "disabled";
}; };
};
pciec: pcie@fe000000 { sata1: sata@ee500000 {
compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; compatible = "renesas,sata-r8a7791",
reg = <0 0xfe000000 0 0x80000>; "renesas,rcar-gen2-sata";
#address-cells = <3>; reg = <0 0xee500000 0 0x2000>;
#size-cells = <2>; interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x00 0xff>; clocks = <&cpg CPG_MOD 814>;
device_type = "pci"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 resets = <&cpg 814>;
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 status = "disabled";
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 };
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 319>;
status = "disabled";
};
ipmmu_sy0: mmu@e6280000 { ether: ethernet@ee700000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,ether-r8a7791",
reg = <0 0xe6280000 0 0x1000>; "renesas,rcar-gen2-ether";
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xee700000 0 0x400>;
<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 813>;
status = "disabled"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
ipmmu_sy1: mmu@e6290000 { gic: interrupt-controller@f1001000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "arm,gic-400";
reg = <0 0xe6290000 0 0x1000>; #interrupt-cells = <3>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <0>;
#iommu-cells = <1>; interrupt-controller;
status = "disabled"; reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
}; <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
ipmmu_ds: mmu@e6740000 { pciec: pcie@fe000000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,pcie-r8a7791",
reg = <0 0xe6740000 0 0x1000>; "renesas,pcie-rcar-gen2";
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xfe000000 0 0x80000>;
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <3>;
#iommu-cells = <1>; #size-cells = <2>;
status = "disabled"; bus-range = <0x00 0xff>;
}; device_type = "pci";
ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
/* Map all possible DDR as inbound ranges */
dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
0x43000000 2 0x00000000 2 0x00000000 1 0x00000000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
clock-names = "pcie", "pcie_bus";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 319>;
status = "disabled";
};
ipmmu_mp: mmu@ec680000 { vsp@fe928000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,vsp1";
reg = <0 0xec680000 0 0x1000>; reg = <0 0xfe928000 0 0x8000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 131>;
status = "disabled"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 131>;
};
ipmmu_mx: mmu@fe951000 { vsp@fe930000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,vsp1";
reg = <0 0xfe951000 0 0x1000>; reg = <0 0xfe930000 0 0x8000>;
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 128>;
#iommu-cells = <1>; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 128>;
}; };
ipmmu_rt: mmu@ffc80000 { vsp@fe938000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,vsp1";
reg = <0 0xffc80000 0 0x1000>; reg = <0 0xfe938000 0 0x8000>;
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 127>;
status = "disabled"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 127>;
};
ipmmu_gp: mmu@e62a0000 { jpu: jpeg-codec@fe980000 {
compatible = "renesas,ipmmu-r8a7791", "renesas,ipmmu-vmsa"; compatible = "renesas,jpu-r8a7791",
reg = <0 0xe62a0000 0 0x1000>; "renesas,rcar-gen2-jpu";
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xfe980000 0 0x10300>;
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 106>;
status = "disabled"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 106>;
};
rcar_sound: sound@ec500000 { du: display@feb00000 {
/* compatible = "renesas,du-r8a7791";
* #sound-dai-cells is required reg = <0 0xfeb00000 0 0x40000>,
* <0 0xfeb90000 0 0x1c>;
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; reg-names = "du", "lvds.0";
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
*/ <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2"; clocks = <&cpg CPG_MOD 724>,
reg = <0 0xec500000 0 0x1000>, /* SCU */ <&cpg CPG_MOD 723>,
<0 0xec5a0000 0 0x100>, /* ADG */ <&cpg CPG_MOD 726>;
<0 0xec540000 0 0x1000>, /* SSIU */ clock-names = "du.0", "du.1", "lvds.0";
<0 0xec541000 0 0x280>, /* SSI */ status = "disabled";
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; ports {
#address-cells = <1>;
clocks = <&cpg CPG_MOD 1005>, #size-cells = <0>;
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, port@0 {
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, reg = <0>;
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, du_out_rgb: endpoint {
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, };
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, };
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, port@1 {
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, reg = <1>;
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, du_out_lvds0: endpoint {
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, };
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>, };
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7791_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6", "src.5",
"src.4", "src.3", "src.2", "src.1", "src.0",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma1 0xbe>;
dma-names = "tx";
}; };
}; };
rcar_sound,mix { prr: chipid@ff000044 {
mix0: mix-0 { }; compatible = "renesas,prr";
mix1: mix-1 { }; reg = <0 0xff000044 0 4>;
}; };
rcar_sound,ctu { cmt0: timer@ffca0000 {
ctu00: ctu-0 { }; compatible = "renesas,r8a7791-cmt0",
ctu01: ctu-1 { }; "renesas,rcar-gen2-cmt0";
ctu02: ctu-2 { }; reg = <0 0xffca0000 0 0x1004>;
ctu03: ctu-3 { }; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
ctu10: ctu-4 { }; <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
ctu11: ctu-5 { }; clocks = <&cpg CPG_MOD 124>;
ctu12: ctu-6 { }; clock-names = "fck";
ctu13: ctu-7 { }; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
}; };
rcar_sound,src { cmt1: timer@e6130000 {
src0: src-0 { compatible = "renesas,r8a7791-cmt1",
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-cmt1";
dmas = <&audma0 0x85>, <&audma1 0x9a>; reg = <0 0xe6130000 0 0x1004>;
dma-names = "rx", "tx"; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
}; <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
src1: src-1 { <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
dmas = <&audma0 0x87>, <&audma1 0x9c>; <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
dma-names = "rx", "tx"; <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
}; <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
src2: src-2 { <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 329>;
dmas = <&audma0 0x89>, <&audma1 0x9e>; clock-names = "fck";
dma-names = "rx", "tx"; power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
}; resets = <&cpg 329>;
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx";
};
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx";
};
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx";
};
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
};
}; };
};
rcar_sound,ssi { thermal-zones {
ssi0: ssi-0 { cpu_thermal: cpu-thermal {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; polling-delay-passive = <0>;
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; polling-delay = <0>;
dma-names = "rx", "tx", "rxu", "txu";
}; thermal-sensors = <&thermal>;
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; trips {
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; cpu-crit {
dma-names = "rx", "tx", "rxu", "txu"; temperature = <95000>;
}; hysteresis = <0>;
ssi2: ssi-2 { type = "critical";
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; };
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
}; };
ssi9: ssi-9 { cooling-maps {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
}; };
}; };
}; };
timer {
compatible = "arm,armv7-timer";
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
}; };
arch/arm/boot/dts/r8a7792.dtsi
View file @ cdcdbbf3
...@@ -101,63 +101,6 @@ soc { ...@@ -101,63 +101,6 @@ soc {
#size-cells = <2>; #size-cells = <2>;
ranges; ranges;
apmu@e6152000 {
compatible = "renesas,r8a7792-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
irqc: interrupt-controller@e61c0000 {
compatible = "renesas,irqc-r8a7792", "renesas,irqc";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7792-rst";
reg = <0 0xe6160000 0 0x0100>;
};
prr: chipid@ff000044 {
compatible = "renesas,prr";
reg = <0 0xff000044 0 4>;
};
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7792-sysc";
reg = <0 0xe6180000 0 0x0200>;
#power-domain-cells = <1>;
};
pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a7792";
reg = <0 0xe6060000 0 0x144>;
};
gpio0: gpio@e6050000 { gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7792", compatible = "renesas,gpio-r8a7792",
"renesas,rcar-gen2-gpio"; "renesas,rcar-gen2-gpio";
...@@ -338,6 +281,155 @@ gpio11: gpio@e6055600 { ...@@ -338,6 +281,155 @@ gpio11: gpio@e6055600 {
resets = <&cpg 913>; resets = <&cpg 913>;
}; };
pfc: pin-controller@e6060000 {
compatible = "renesas,pfc-r8a7792";
reg = <0 0xe6060000 0 0x144>;
};
cpg: clock-controller@e6150000 {
compatible = "renesas,r8a7792-cpg-mssr";
reg = <0 0xe6150000 0 0x1000>;
clocks = <&extal_clk>;
clock-names = "extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
apmu@e6152000 {
compatible = "renesas,r8a7792-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>;
};
rst: reset-controller@e6160000 {
compatible = "renesas,r8a7792-rst";
reg = <0 0xe6160000 0 0x0100>;
};
sysc: system-controller@e6180000 {
compatible = "renesas,r8a7792-sysc";
reg = <0 0xe6180000 0 0x0200>;
#power-domain-cells = <1>;
};
irqc: interrupt-controller@e61c0000 {
compatible = "renesas,irqc-r8a7792", "renesas,irqc";
#interrupt-cells = <2>;
interrupt-controller;
reg = <0 0xe61c0000 0 0x200>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
};
icram1: sram@e63c0000 {
compatible = "mmio-sram";
reg = <0 0xe63c0000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63c0000 0x1000>;
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
};
};
/* I2C doesn't need pinmux */
i2c0: i2c@e6508000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@e6518000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 930>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@e6530000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@e6540000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c4: i2c@e6520000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 927>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c5: i2c@e6528000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 925>;
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
dmac0: dma-controller@e6700000 { dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7792", compatible = "renesas,dmac-r8a7792",
"renesas,rcar-dmac"; "renesas,rcar-dmac";
...@@ -404,6 +496,35 @@ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH ...@@ -404,6 +496,35 @@ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
dma-channels = <15>; dma-channels = <15>;
}; };
avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a7792",
"renesas,etheravb-rcar-gen2";
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7792", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 917>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
scif0: serial@e6e60000 { scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a7792", compatible = "renesas,scif-r8a7792",
"renesas,rcar-gen2-scif", "renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
...@@ -500,162 +621,6 @@ hscif1: serial@e62c8000 { ...@@ -500,162 +621,6 @@ hscif1: serial@e62c8000 {
status = "disabled"; status = "disabled";
}; };
icram0: sram@e63a0000 {
compatible = "mmio-sram";
reg = <0 0xe63a0000 0 0x12000>;
};
icram1: sram@e63c0000 {
compatible = "mmio-sram";
reg = <0 0xe63c0000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0xe63c0000 0x1000>;
smp-sram@0 {
compatible = "renesas,smp-sram";
reg = <0 0x10>;
};
};
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7792",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
clocks = <&cpg CPG_MOD 314>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
jpu: jpeg-codec@fe980000 {
compatible = "renesas,jpu-r8a7792",
"renesas,rcar-gen2-jpu";
reg = <0 0xfe980000 0 0x10300>;
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 106>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 106>;
};
avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a7792",
"renesas,etheravb-rcar-gen2";
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 812>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
/* I2C doesn't need pinmux */
i2c0: i2c@e6508000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c1: i2c@e6518000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 930>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c2: i2c@e6530000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c3: i2c@e6540000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c4: i2c@e6520000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 927>;
i2c-scl-internal-delay-ns = <6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
i2c5: i2c@e6528000 {
compatible = "renesas,i2c-r8a7792",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 925>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 925>;
i2c-scl-internal-delay-ns = <110>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
qspi: spi@e6b10000 {
compatible = "renesas,qspi-r8a7792", "renesas,qspi";
reg = <0 0xe6b10000 0 0x2c>;
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 917>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>,
<&dmac1 0x17>, <&dmac1 0x18>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 917>;
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
msiof0: spi@e6e20000 { msiof0: spi@e6e20000 {
compatible = "renesas,msiof-r8a7792", compatible = "renesas,msiof-r8a7792",
"renesas,rcar-gen2-msiof"; "renesas,rcar-gen2-msiof";
...@@ -688,34 +653,6 @@ msiof1: spi@e6e10000 { ...@@ -688,34 +653,6 @@ msiof1: spi@e6e10000 {
status = "disabled"; status = "disabled";
}; };
du: display@feb00000 {
compatible = "renesas,du-r8a7792";
reg = <0 0xfeb00000 0 0x40000>;
reg-names = "du";
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
du_out_rgb0: endpoint {
};
};
port@1 {
reg = <1>;
du_out_rgb1: endpoint {
};
};
};
};
can0: can@e6e80000 { can0: can@e6e80000 {
compatible = "renesas,can-r8a7792", compatible = "renesas,can-r8a7792",
"renesas,rcar-gen2-can"; "renesas,rcar-gen2-can";
...@@ -808,6 +745,36 @@ vin5: video@e6ef5000 { ...@@ -808,6 +745,36 @@ vin5: video@e6ef5000 {
status = "disabled"; status = "disabled";
}; };
sdhi0: sd@ee100000 {
compatible = "renesas,sdhi-r8a7792",
"renesas,rcar-gen2-sdhi";
reg = <0 0xee100000 0 0x328>;
interrupts = <0 165 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
clocks = <&cpg CPG_MOD 314>;
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
vsp@fe928000 { vsp@fe928000 {
compatible = "renesas,vsp1"; compatible = "renesas,vsp1";
reg = <0 0xfe928000 0 0x8000>; reg = <0 0xfe928000 0 0x8000>;
...@@ -835,14 +802,47 @@ vsp@fe938000 { ...@@ -835,14 +802,47 @@ vsp@fe938000 {
resets = <&cpg 127>; resets = <&cpg 127>;
}; };
cpg: clock-controller@e6150000 { jpu: jpeg-codec@fe980000 {
compatible = "renesas,r8a7792-cpg-mssr"; compatible = "renesas,jpu-r8a7792",
reg = <0 0xe6150000 0 0x1000>; "renesas,rcar-gen2-jpu";
clocks = <&extal_clk>; reg = <0 0xfe980000 0 0x10300>;
clock-names = "extal"; interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <2>; clocks = <&cpg CPG_MOD 106>;
#power-domain-cells = <0>; power-domains = <&sysc R8A7792_PD_ALWAYS_ON>;
#reset-cells = <1>; resets = <&cpg 106>;
};
du: display@feb00000 {
compatible = "renesas,du-r8a7792";
reg = <0 0xfeb00000 0 0x40000>;
reg-names = "du";
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>;
clock-names = "du.0", "du.1";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
du_out_rgb0: endpoint {
};
};
port@1 {
reg = <1>;
du_out_rgb1: endpoint {
};
};
};
};
prr: chipid@ff000044 {
compatible = "renesas,prr";
reg = <0 0xff000044 0 4>;
}; };
}; };
......
arch/arm/boot/dts/r8a7793-gose.dts
View file @ cdcdbbf3
...@@ -48,6 +48,10 @@ / { ...@@ -48,6 +48,10 @@ / {
aliases { aliases {
serial0 = &scif0; serial0 = &scif0;
serial1 = &scif1; serial1 = &scif1;
i2c9 = &gpioi2c2;
i2c10 = &gpioi2c4;
i2c11 = &i2chdmi;
i2c12 = &i2cexio4;
}; };
chosen { chosen {
...@@ -296,6 +300,146 @@ x13_clk: x13-clock { ...@@ -296,6 +300,146 @@ x13_clk: x13-clock {
#clock-cells = <0>; #clock-cells = <0>;
clock-frequency = <148500000>; clock-frequency = <148500000>;
}; };
gpioi2c2: i2c-9 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
gpioi2c4: i2c-10 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
scl-gpios = <&gpio7 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio7 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
/*
* A fallback to GPIO is provided for I2C2.
*/
i2chdmi: i2c-11 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&i2c2>, <&gpioi2c2>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180cp";
reg = <0x20>;
remote = <&vin1>;
port {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7180_in: endpoint {
remote-endpoint = <&composite_con_in>;
};
};
port@3 {
reg = <3>;
adv7180_out: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep>;
};
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
hdmi-in@4c {
compatible = "adi,adv7612";
reg = <0x4c>;
interrupt-parent = <&gpio4>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
default-input = <0>;
port {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7612_in: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
port@2 {
reg = <2>;
adv7612_out: endpoint {
remote-endpoint = <&vin0ep2>;
};
};
};
};
eeprom@50 {
compatible = "renesas,r1ex24002", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
};
/*
* I2C4 is routed to EXIO connector E, pins 37 (SCL) + 39 (SDA).
* A fallback to GPIO is provided.
*/
i2cexio4: i2c-12 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&i2c4>, <&gpioi2c4>;
i2c-bus-name = "i2c-exio4";
#address-cells = <1>;
#size-cells = <0>;
};
}; };
&du { &du {
...@@ -334,6 +478,11 @@ i2c2_pins: i2c2 { ...@@ -334,6 +478,11 @@ i2c2_pins: i2c2 {
function = "i2c2"; function = "i2c2";
}; };
i2c4_pins: i2c4 {
groups = "i2c4_c";
function = "i2c4";
};
du_pins: du { du_pins: du {
groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0"; groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
function = "du"; function = "du";
...@@ -544,107 +693,11 @@ partition@440000 { ...@@ -544,107 +693,11 @@ partition@440000 {
&i2c2 { &i2c2 {
pinctrl-0 = <&i2c2_pins>; pinctrl-0 = <&i2c2_pins>;
pinctrl-names = "default"; pinctrl-names = "i2c-hdmi";
status = "okay"; status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180cp";
reg = <0x20>;
remote = <&vin1>;
port {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7180_in: endpoint {
remote-endpoint = <&composite_con_in>;
};
};
port@3 {
reg = <3>;
adv7180_out: endpoint {
bus-width = <8>;
remote-endpoint = <&vin1ep>;
};
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio3>;
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con_out>;
};
};
};
};
hdmi-in@4c {
compatible = "adi,adv7612";
reg = <0x4c>;
interrupt-parent = <&gpio4>;
interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
default-input = <0>;
port {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7612_in: endpoint {
remote-endpoint = <&hdmi_con_in>;
};
};
port@2 {
reg = <2>;
adv7612_out: endpoint {
remote-endpoint = <&vin0ep2>;
};
};
};
};
eeprom@50 {
compatible = "renesas,r1ex24002", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
}; };
&i2c6 { &i2c6 {
...@@ -668,6 +721,11 @@ wdt { ...@@ -668,6 +721,11 @@ wdt {
}; };
}; };
&i2c4 {
pinctrl-0 = <&i2c4_pins>;
pinctrl-names = "i2c-exio4";
};
&rcar_sound { &rcar_sound {
pinctrl-0 = <&sound_pins &sound_clk_pins>; pinctrl-0 = <&sound_pins &sound_clk_pins>;
pinctrl-names = "default"; pinctrl-names = "default";
......
arch/arm/boot/dts/r8a7793.dtsi
View file @ cdcdbbf3
...@@ -15,7 +15,6 @@ ...@@ -15,7 +15,6 @@
/ { / {
compatible = "renesas,r8a7793"; compatible = "renesas,r8a7793";
interrupt-parent = <&gic>;
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
...@@ -32,6 +31,35 @@ aliases { ...@@ -32,6 +31,35 @@ aliases {
spi0 = &qspi; spi0 = &qspi;
}; };
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -74,1261 +102,1295 @@ L2_CA15: cache-controller-0 { ...@@ -74,1261 +102,1295 @@ L2_CA15: cache-controller-0 {
}; };
}; };
apmu@e6152000 { /* External root clock */
compatible = "renesas,r8a7793-apmu", "renesas,apmu"; extal_clk: extal {
reg = <0 0xe6152000 0 0x188>; compatible = "fixed-clock";
cpus = <&cpu0 &cpu1>; #clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
}; };
thermal-zones { /* External SCIF clock */
cpu_thermal: cpu-thermal { scif_clk: scif {
polling-delay-passive = <0>; compatible = "fixed-clock";
polling-delay = <0>; #clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
thermal-sensors = <&thermal>; soc {
compatible = "simple-bus";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
gpio0: gpio@e6050000 {
compatible = "renesas,gpio-r8a7793",
"renesas,rcar-gen2-gpio";
reg = <0 0xe6050000 0 0x50>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 912>;
};
trips { gpio1: gpio@e6051000 {
cpu-crit { compatible = "renesas,gpio-r8a7793",
temperature = <95000>; "renesas,rcar-gen2-gpio";
hysteresis = <0>; reg = <0 0xe6051000 0 0x50>;
type = "critical"; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
}; #gpio-cells = <2>;
}; gpio-controller;
cooling-maps { gpio-ranges = <&pfc 0 32 26>;
}; #interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 911>;
}; };
};
gic: interrupt-controller@f1001000 { gpio2: gpio@e6052000 {
compatible = "arm,gic-400"; compatible = "renesas,gpio-r8a7793",
#interrupt-cells = <3>; "renesas,rcar-gen2-gpio";
#address-cells = <0>; reg = <0 0xe6052000 0 0x50>;
interrupt-controller; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xf1001000 0 0x1000>, #gpio-cells = <2>;
<0 0xf1002000 0 0x2000>, gpio-controller;
<0 0xf1004000 0 0x2000>, gpio-ranges = <&pfc 0 64 32>;
<0 0xf1006000 0 0x2000>; #interrupt-cells = <2>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; interrupt-controller;
clocks = <&cpg CPG_MOD 408>; clocks = <&cpg CPG_MOD 910>;
clock-names = "clk"; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; resets = <&cpg 910>;
resets = <&cpg 408>; };
};
gpio0: gpio@e6050000 { gpio3: gpio@e6053000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7793",
reg = <0 0xe6050000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6053000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 0 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 96 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 912>; interrupt-controller;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 909>;
resets = <&cpg 912>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
}; resets = <&cpg 909>;
};
gpio1: gpio@e6051000 { gpio4: gpio@e6054000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7793",
reg = <0 0xe6051000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6054000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 32 26>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 128 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 911>; interrupt-controller;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 908>;
resets = <&cpg 911>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
}; resets = <&cpg 908>;
};
gpio2: gpio@e6052000 { gpio5: gpio@e6055000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7793",
reg = <0 0xe6052000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6055000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 64 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 160 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 910>; interrupt-controller;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 907>;
resets = <&cpg 910>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
}; resets = <&cpg 907>;
};
gpio3: gpio@e6053000 { gpio6: gpio@e6055400 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7793",
reg = <0 0xe6053000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6055400 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 96 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 192 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 909>; interrupt-controller;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 905>;
resets = <&cpg 909>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
}; resets = <&cpg 905>;
};
gpio4: gpio@e6054000 { gpio7: gpio@e6055800 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7793",
reg = <0 0xe6054000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6055800 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 128 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 224 26>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 908>; interrupt-controller;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 904>;
resets = <&cpg 908>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
}; resets = <&cpg 904>;
};
gpio5: gpio@e6055000 { pfc: pin-controller@e6060000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio"; compatible = "renesas,pfc-r8a7793";
reg = <0 0xe6055000 0 0x50>; reg = <0 0xe6060000 0 0x250>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; };
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 160 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 907>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 907>;
};
gpio6: gpio@e6055400 { /* Special CPG clocks */
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio"; cpg: clock-controller@e6150000 {
reg = <0 0xe6055400 0 0x50>; compatible = "renesas,r8a7793-cpg-mssr";
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6150000 0 0x1000>;
#gpio-cells = <2>; clocks = <&extal_clk>, <&usb_extal_clk>;
gpio-controller; clock-names = "extal", "usb_extal";
gpio-ranges = <&pfc 0 192 32>; #clock-cells = <2>;
#interrupt-cells = <2>; #power-domain-cells = <0>;
interrupt-controller; #reset-cells = <1>;
clocks = <&cpg CPG_MOD 905>; };
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 905>;
};
gpio7: gpio@e6055800 { apmu@e6152000 {
compatible = "renesas,gpio-r8a7793", "renesas,rcar-gen2-gpio"; compatible = "renesas,r8a7793-apmu", "renesas,apmu";
reg = <0 0xe6055800 0 0x50>; reg = <0 0xe6152000 0 0x188>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; cpus = <&cpu0 &cpu1>;
#gpio-cells = <2>; };
gpio-controller;
gpio-ranges = <&pfc 0 224 26>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 904>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 904>;
};
thermal: thermal@e61f0000 { rst: reset-controller@e6160000 {
compatible = "renesas,thermal-r8a7793", compatible = "renesas,r8a7793-rst";
"renesas,rcar-gen2-thermal", reg = <0 0xe6160000 0 0x0100>;
"renesas,rcar-thermal"; };
reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 522>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 522>;
#thermal-sensor-cells = <0>;
};
timer { sysc: system-controller@e6180000 {
compatible = "arm,armv7-timer"; compatible = "renesas,r8a7793-sysc";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, reg = <0 0xe6180000 0 0x0200>;
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, #power-domain-cells = <1>;
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, };
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
cmt0: timer@ffca0000 { irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,r8a7793-cmt0", "renesas,rcar-gen2-cmt0"; compatible = "renesas,irqc-r8a7793", "renesas,irqc";
reg = <0 0xffca0000 0 0x1004>; #interrupt-cells = <2>;
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, interrupt-controller;
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe61c0000 0 0x200>;
clocks = <&cpg CPG_MOD 124>; interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
clock-names = "fck"; <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
resets = <&cpg 124>; <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
status = "disabled"; <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
}; <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
cmt1: timer@e6130000 { thermal: thermal@e61f0000 {
compatible = "renesas,r8a7793-cmt1", "renesas,rcar-gen2-cmt1"; compatible = "renesas,thermal-r8a7793",
reg = <0 0xe6130000 0 0x1004>; "renesas,rcar-gen2-thermal",
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, "renesas,rcar-thermal";
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xe61f0000 0 0x10>, <0 0xe61f0100 0 0x38>;
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, clocks = <&cpg CPG_MOD 522>;
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, resets = <&cpg 522>;
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, #thermal-sensor-cells = <0>;
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled";
};
irqc0: interrupt-controller@e61c0000 { ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,irqc-r8a7793", "renesas,irqc"; compatible = "renesas,ipmmu-r8a7793",
#interrupt-cells = <2>; "renesas,ipmmu-vmsa";
interrupt-controller; reg = <0 0xe6280000 0 0x1000>;
reg = <0 0xe61c0000 0 0x200>; interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, #iommu-cells = <1>;
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, status = "disabled";
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, };
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
dmac0: dma-controller@e6700000 { ipmmu_sy1: mmu@e6290000 {
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; compatible = "renesas,ipmmu-r8a7793",
reg = <0 0xe6700000 0 0x20000>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6290000 0 0x1000>;
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
dmac1: dma-controller@e6720000 { ipmmu_ds: mmu@e6740000 {
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; compatible = "renesas,ipmmu-r8a7793",
reg = <0 0xe6720000 0 0x20000>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe6740000 0 0x1000>;
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
audma0: dma-controller@ec700000 { ipmmu_mp: mmu@ec680000 {
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; compatible = "renesas,ipmmu-r8a7793",
reg = <0 0xec700000 0 0x10000>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH reg = <0 0xec680000 0 0x1000>;
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
audma1: dma-controller@ec720000 { ipmmu_mx: mmu@fe951000 {
compatible = "renesas,dmac-r8a7793", "renesas,rcar-dmac"; compatible = "renesas,ipmmu-r8a7793",
reg = <0 0xec720000 0 0x10000>; "renesas,ipmmu-vmsa";
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH reg = <0 0xfe951000 0 0x1000>;
GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH #iommu-cells = <1>;
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH status = "disabled";
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
/* The memory map in the User's Manual maps the cores to bus numbers */ ipmmu_rt: mmu@ffc80000 {
i2c0: i2c@e6508000 { compatible = "renesas,ipmmu-r8a7793",
#address-cells = <1>; "renesas,ipmmu-vmsa";
#size-cells = <0>; reg = <0 0xffc80000 0 0x1000>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c"; interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
reg = <0 0xe6508000 0 0x40>; #iommu-cells = <1>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; status = "disabled";
clocks = <&cpg CPG_MOD 931>; };
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c1: i2c@e6518000 { ipmmu_gp: mmu@e62a0000 {
#address-cells = <1>; compatible = "renesas,ipmmu-r8a7793",
#size-cells = <0>; "renesas,ipmmu-vmsa";
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c"; reg = <0 0xe62a0000 0 0x1000>;
reg = <0 0xe6518000 0 0x40>; interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>; #iommu-cells = <1>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 930>; };
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c2: i2c@e6530000 { icram0: sram@e63a0000 {
#address-cells = <1>; compatible = "mmio-sram";
#size-cells = <0>; reg = <0 0xe63a0000 0 0x12000>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c"; };
reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 929>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c3: i2c@e6540000 { icram1: sram@e63c0000 {
#address-cells = <1>; compatible = "mmio-sram";
#size-cells = <0>; reg = <0 0xe63c0000 0 0x1000>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c"; #address-cells = <1>;
reg = <0 0xe6540000 0 0x40>; #size-cells = <1>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; ranges = <0 0 0xe63c0000 0x1000>;
clocks = <&cpg CPG_MOD 928>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 928>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c4: i2c@e6520000 { smp-sram@0 {
#address-cells = <1>; compatible = "renesas,smp-sram";
#size-cells = <0>; reg = <0 0x10>;
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c"; };
reg = <0 0xe6520000 0 0x40>; };
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 927>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c5: i2c@e6528000 { /* The memory map in the User's Manual maps the cores to
/* doesn't need pinmux */ * bus numbers
#address-cells = <1>; */
#size-cells = <0>; i2c0: i2c@e6508000 {
compatible = "renesas,i2c-r8a7793", "renesas,rcar-gen2-i2c"; #address-cells = <1>;
reg = <0 0xe6528000 0 0x40>; #size-cells = <0>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,i2c-r8a7793",
clocks = <&cpg CPG_MOD 925>; "renesas,rcar-gen2-i2c";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; reg = <0 0xe6508000 0 0x40>;
resets = <&cpg 925>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
i2c-scl-internal-delay-ns = <110>; clocks = <&cpg CPG_MOD 931>;
status = "disabled"; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
}; resets = <&cpg 931>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
i2c6: i2c@e60b0000 { i2c1: i2c@e6518000 {
/* doesn't need pinmux */ #address-cells = <1>;
#address-cells = <1>; #size-cells = <0>;
#size-cells = <0>; compatible = "renesas,i2c-r8a7793",
compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic", "renesas,rcar-gen2-i2c";
"renesas,rmobile-iic"; reg = <0 0xe6518000 0 0x40>;
reg = <0 0xe60b0000 0 0x425>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 930>;
clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
dmas = <&dmac0 0x77>, <&dmac0 0x78>, resets = <&cpg 930>;
<&dmac1 0x77>, <&dmac1 0x78>; i2c-scl-internal-delay-ns = <6>;
dma-names = "tx", "rx", "tx", "rx"; status = "disabled";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; };
resets = <&cpg 926>;
status = "disabled";
};
i2c7: i2c@e6500000 { i2c2: i2c@e6530000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic", compatible = "renesas,i2c-r8a7793",
"renesas,rmobile-iic"; "renesas,rcar-gen2-i2c";
reg = <0 0xe6500000 0 0x425>; reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>; clocks = <&cpg CPG_MOD 929>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>, power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
<&dmac1 0x61>, <&dmac1 0x62>; resets = <&cpg 929>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 318>; };
status = "disabled";
};
i2c8: i2c@e6510000 { i2c3: i2c@e6540000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,iic-r8a7793", "renesas,rcar-gen2-iic", compatible = "renesas,i2c-r8a7793",
"renesas,rmobile-iic"; "renesas,rcar-gen2-i2c";
reg = <0 0xe6510000 0 0x425>; reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 323>; clocks = <&cpg CPG_MOD 928>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>, power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
<&dmac1 0x65>, <&dmac1 0x66>; resets = <&cpg 928>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 323>; };
status = "disabled";
};
pfc: pin-controller@e6060000 { i2c4: i2c@e6520000 {
compatible = "renesas,pfc-r8a7793"; #address-cells = <1>;
reg = <0 0xe6060000 0 0x250>; #size-cells = <0>;
}; compatible = "renesas,i2c-r8a7793",
"renesas,rcar-gen2-i2c";
reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 927>;
i2c-scl-internal-delay-ns = <6>;
status = "disabled";
};
sdhi0: sd@ee100000 { i2c5: i2c@e6528000 {
compatible = "renesas,sdhi-r8a7793", /* doesn't need pinmux */
"renesas,rcar-gen2-sdhi"; #address-cells = <1>;
reg = <0 0xee100000 0 0x328>; #size-cells = <0>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,i2c-r8a7793",
clocks = <&cpg CPG_MOD 314>; "renesas,rcar-gen2-i2c";
dmas = <&dmac0 0xcd>, <&dmac0 0xce>, reg = <0 0xe6528000 0 0x40>;
<&dmac1 0xcd>, <&dmac1 0xce>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 925>;
max-frequency = <195000000>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; resets = <&cpg 925>;
resets = <&cpg 314>; i2c-scl-internal-delay-ns = <110>;
status = "disabled"; status = "disabled";
}; };
sdhi1: sd@ee140000 { i2c6: i2c@e60b0000 {
compatible = "renesas,sdhi-r8a7793", /* doesn't need pinmux */
"renesas,rcar-gen2-sdhi"; #address-cells = <1>;
reg = <0 0xee140000 0 0x100>; #size-cells = <0>;
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,iic-r8a7793",
clocks = <&cpg CPG_MOD 312>; "renesas,rcar-gen2-iic",
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, "renesas,rmobile-iic";
<&dmac1 0xc1>, <&dmac1 0xc2>; reg = <0 0xe60b0000 0 0x425>;
dma-names = "tx", "rx", "tx", "rx"; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <97500000>; clocks = <&cpg CPG_MOD 926>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; dmas = <&dmac0 0x77>, <&dmac0 0x78>,
resets = <&cpg 312>; <&dmac1 0x77>, <&dmac1 0x78>;
status = "disabled"; dma-names = "tx", "rx", "tx", "rx";
}; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 926>;
status = "disabled";
};
sdhi2: sd@ee160000 { i2c7: i2c@e6500000 {
compatible = "renesas,sdhi-r8a7793", #address-cells = <1>;
"renesas,rcar-gen2-sdhi"; #size-cells = <0>;
reg = <0 0xee160000 0 0x100>; compatible = "renesas,iic-r8a7793",
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; "renesas,rcar-gen2-iic",
clocks = <&cpg CPG_MOD 311>; "renesas,rmobile-iic";
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, reg = <0 0xe6500000 0 0x425>;
<&dmac1 0xd3>, <&dmac1 0xd4>; interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "tx", "rx", "tx", "rx"; clocks = <&cpg CPG_MOD 318>;
max-frequency = <97500000>; dmas = <&dmac0 0x61>, <&dmac0 0x62>,
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; <&dmac1 0x61>, <&dmac1 0x62>;
resets = <&cpg 311>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
}; resets = <&cpg 318>;
status = "disabled";
};
mmcif0: mmc@ee200000 { i2c8: i2c@e6510000 {
compatible = "renesas,mmcif-r8a7793", "renesas,sh-mmcif"; #address-cells = <1>;
reg = <0 0xee200000 0 0x80>; #size-cells = <0>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,iic-r8a7793",
clocks = <&cpg CPG_MOD 315>; "renesas,rcar-gen2-iic",
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, "renesas,rmobile-iic";
<&dmac1 0xd1>, <&dmac1 0xd2>; reg = <0 0xe6510000 0 0x425>;
dma-names = "tx", "rx", "tx", "rx"; interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 323>;
resets = <&cpg 315>; dmas = <&dmac0 0x65>, <&dmac0 0x66>,
reg-io-width = <4>; <&dmac1 0x65>, <&dmac1 0x66>;
status = "disabled"; dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
}; resets = <&cpg 323>;
status = "disabled";
};
scifa0: serial@e6c40000 { dmac0: dma-controller@e6700000 {
compatible = "renesas,scifa-r8a7793", compatible = "renesas,dmac-r8a7793",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,rcar-dmac";
reg = <0 0xe6c40000 0 64>; reg = <0 0xe6700000 0 0x20000>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 204>; GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
clock-names = "fck"; GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x21>, <&dmac0 0x22>, GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x21>, <&dmac1 0x22>; GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 204>; GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
scifa1: serial@e6c50000 { dmac1: dma-controller@e6720000 {
compatible = "renesas,scifa-r8a7793", compatible = "renesas,dmac-r8a7793",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,rcar-dmac";
reg = <0 0xe6c50000 0 64>; reg = <0 0xe6720000 0 0x20000>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 203>; GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
clock-names = "fck"; GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
dmas = <&dmac0 0x25>, <&dmac0 0x26>, GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
<&dmac1 0x25>, <&dmac1 0x26>; GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
dma-names = "tx", "rx", "tx", "rx"; GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 203>; GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
scifa2: serial@e6c60000 { qspi: spi@e6b10000 {
compatible = "renesas,scifa-r8a7793", compatible = "renesas,qspi-r8a7793", "renesas,qspi";
"renesas,rcar-gen2-scifa", "renesas,scifa"; reg = <0 0xe6b10000 0 0x2c>;
reg = <0 0xe6c60000 0 64>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 917>;
clocks = <&cpg CPG_MOD 202>; dmas = <&dmac0 0x17>, <&dmac0 0x18>,
clock-names = "fck"; <&dmac1 0x17>, <&dmac1 0x18>;
dmas = <&dmac0 0x27>, <&dmac0 0x28>, dma-names = "tx", "rx", "tx", "rx";
<&dmac1 0x27>, <&dmac1 0x28>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 917>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; num-cs = <1>;
resets = <&cpg 202>; #address-cells = <1>;
status = "disabled"; #size-cells = <0>;
}; status = "disabled";
};
scifa3: serial@e6c70000 { scifa0: serial@e6c40000 {
compatible = "renesas,scifa-r8a7793", compatible = "renesas,scifa-r8a7793",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c70000 0 64>; reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 1106>; clocks = <&cpg CPG_MOD 204>;
clock-names = "fck"; clock-names = "fck";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, dmas = <&dmac0 0x21>, <&dmac0 0x22>,
<&dmac1 0x1b>, <&dmac1 0x1c>; <&dmac1 0x21>, <&dmac1 0x22>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 1106>; resets = <&cpg 204>;
status = "disabled"; status = "disabled";
}; };
scifa4: serial@e6c78000 { scifa1: serial@e6c50000 {
compatible = "renesas,scifa-r8a7793", compatible = "renesas,scifa-r8a7793",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c78000 0 64>; reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 1107>; clocks = <&cpg CPG_MOD 203>;
clock-names = "fck"; clock-names = "fck";
dmas = <&dmac0 0x1f>, <&dmac0 0x20>, dmas = <&dmac0 0x25>, <&dmac0 0x26>,
<&dmac1 0x1f>, <&dmac1 0x20>; <&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 1107>; resets = <&cpg 203>;
status = "disabled"; status = "disabled";
}; };
scifa5: serial@e6c80000 { scifa2: serial@e6c60000 {
compatible = "renesas,scifa-r8a7793", compatible = "renesas,scifa-r8a7793",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c80000 0 64>; reg = <0 0xe6c60000 0 64>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 1108>; clocks = <&cpg CPG_MOD 202>;
clock-names = "fck"; clock-names = "fck";
dmas = <&dmac0 0x23>, <&dmac0 0x24>, dmas = <&dmac0 0x27>, <&dmac0 0x28>,
<&dmac1 0x23>, <&dmac1 0x24>; <&dmac1 0x27>, <&dmac1 0x28>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 1108>; resets = <&cpg 202>;
status = "disabled"; status = "disabled";
}; };
scifb0: serial@e6c20000 { scifa3: serial@e6c70000 {
compatible = "renesas,scifb-r8a7793", compatible = "renesas,scifa-r8a7793",
"renesas,rcar-gen2-scifb", "renesas,scifb"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c20000 0 0x100>; reg = <0 0xe6c70000 0 64>;
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>; clocks = <&cpg CPG_MOD 1106>;
clock-names = "fck"; clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>, dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
<&dmac1 0x3d>, <&dmac1 0x3e>; <&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 206>; resets = <&cpg 1106>;
status = "disabled"; status = "disabled";
}; };
scifb1: serial@e6c30000 { scifa4: serial@e6c78000 {
compatible = "renesas,scifb-r8a7793", compatible = "renesas,scifa-r8a7793",
"renesas,rcar-gen2-scifb", "renesas,scifb"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6c30000 0 0x100>; reg = <0 0xe6c78000 0 64>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>; clocks = <&cpg CPG_MOD 1107>;
clock-names = "fck"; clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>, dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
<&dmac1 0x19>, <&dmac1 0x1a>; <&dmac1 0x1f>, <&dmac1 0x20>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 207>; resets = <&cpg 1107>;
status = "disabled"; status = "disabled";
}; };
scifb2: serial@e6ce0000 { scifa5: serial@e6c80000 {
compatible = "renesas,scifb-r8a7793", compatible = "renesas,scifa-r8a7793",
"renesas,rcar-gen2-scifb", "renesas,scifb"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6ce0000 0 0x100>; reg = <0 0xe6c80000 0 64>;
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 216>; clocks = <&cpg CPG_MOD 1108>;
clock-names = "fck"; clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>, dmas = <&dmac0 0x23>, <&dmac0 0x24>,
<&dmac1 0x1d>, <&dmac1 0x1e>; <&dmac1 0x23>, <&dmac1 0x24>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 216>; resets = <&cpg 1108>;
status = "disabled"; status = "disabled";
}; };
scif0: serial@e6e60000 { scifb0: serial@e6c20000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", compatible = "renesas,scifb-r8a7793",
"renesas,scif"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6e60000 0 64>; reg = <0 0xe6c20000 0 0x100>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 206>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
dmas = <&dmac0 0x29>, <&dmac0 0x2a>, <&dmac1 0x3d>, <&dmac1 0x3e>;
<&dmac1 0x29>, <&dmac1 0x2a>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; resets = <&cpg 206>;
resets = <&cpg 721>; status = "disabled";
status = "disabled"; };
};
scif1: serial@e6e68000 { scifb1: serial@e6c30000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", compatible = "renesas,scifb-r8a7793",
"renesas,scif"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6e68000 0 64>; reg = <0 0xe6c30000 0 0x100>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 207>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, <&dmac1 0x19>, <&dmac1 0x1a>;
<&dmac1 0x2d>, <&dmac1 0x2e>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; resets = <&cpg 207>;
resets = <&cpg 720>; status = "disabled";
status = "disabled"; };
};
scif2: serial@e6e58000 { scifb2: serial@e6ce0000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", compatible = "renesas,scifb-r8a7793",
"renesas,scif"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6e58000 0 64>; reg = <0 0xe6ce0000 0 0x100>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 216>;
<&scif_clk>; clock-names = "fck";
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, <&dmac1 0x1d>, <&dmac1 0x1e>;
<&dmac1 0x2b>, <&dmac1 0x2c>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; resets = <&cpg 216>;
resets = <&cpg 719>; status = "disabled";
status = "disabled"; };
};
scif3: serial@e6ea8000 { scif0: serial@e6e60000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7793",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ea8000 0 64>; reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>; <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x2f>, <&dmac0 0x30>, dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
<&dmac1 0x2f>, <&dmac1 0x30>; <&dmac1 0x29>, <&dmac1 0x2a>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 718>; resets = <&cpg 721>;
status = "disabled"; status = "disabled";
}; };
scif4: serial@e6ee0000 { scif1: serial@e6e68000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7793",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ee0000 0 64>; reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>; <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
<&dmac1 0xfb>, <&dmac1 0xfc>; <&dmac1 0x2d>, <&dmac1 0x2e>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 715>; resets = <&cpg 720>;
status = "disabled"; status = "disabled";
}; };
scif5: serial@e6ee8000 { scif2: serial@e6e58000 {
compatible = "renesas,scif-r8a7793", "renesas,rcar-gen2-scif", compatible = "renesas,scif-r8a7793",
"renesas,scif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe6ee8000 0 64>; reg = <0 0xe6e58000 0 64>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>; <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
<&dmac1 0xfd>, <&dmac1 0xfe>; <&dmac1 0x2b>, <&dmac1 0x2c>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 714>; resets = <&cpg 719>;
status = "disabled"; status = "disabled";
}; };
hscif0: serial@e62c0000 { scif3: serial@e6ea8000 {
compatible = "renesas,hscif-r8a7793", compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe62c0000 0 96>; reg = <0 0xe6ea8000 0 64>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>; <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>, dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
<&dmac1 0x39>, <&dmac1 0x3a>; <&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 717>; resets = <&cpg 718>;
status = "disabled"; status = "disabled";
}; };
hscif1: serial@e62c8000 { scif4: serial@e6ee0000 {
compatible = "renesas,hscif-r8a7793", compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe62c8000 0 96>; reg = <0 0xe6ee0000 0 64>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>; <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
<&dmac1 0x4d>, <&dmac1 0x4e>; <&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 716>; resets = <&cpg 715>;
status = "disabled"; status = "disabled";
}; };
hscif2: serial@e62d0000 { scif5: serial@e6ee8000 {
compatible = "renesas,hscif-r8a7793", compatible = "renesas,scif-r8a7793",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xe62d0000 0 96>; reg = <0 0xe6ee8000 0 64>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>, clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>; <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk"; clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
<&dmac1 0x3b>, <&dmac1 0x3c>; <&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx"; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 713>; resets = <&cpg 714>;
status = "disabled"; status = "disabled";
}; };
icram0: sram@e63a0000 { hscif0: serial@e62c0000 {
compatible = "mmio-sram"; compatible = "renesas,hscif-r8a7793",
reg = <0 0xe63a0000 0 0x12000>; "renesas,rcar-gen2-hscif", "renesas,hscif";
}; reg = <0 0xe62c0000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 717>;
status = "disabled";
};
icram1: sram@e63c0000 { hscif1: serial@e62c8000 {
compatible = "mmio-sram"; compatible = "renesas,hscif-r8a7793",
reg = <0 0xe63c0000 0 0x1000>; "renesas,rcar-gen2-hscif", "renesas,hscif";
#address-cells = <1>; reg = <0 0xe62c8000 0 96>;
#size-cells = <1>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
ranges = <0 0 0xe63c0000 0x1000>; clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
<&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 716>;
status = "disabled";
};
smp-sram@0 { hscif2: serial@e62d0000 {
compatible = "renesas,smp-sram"; compatible = "renesas,hscif-r8a7793",
reg = <0 0x10>; "renesas,rcar-gen2-hscif", "renesas,hscif";
reg = <0 0xe62d0000 0 96>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7793_CLK_ZS>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 713>;
status = "disabled";
}; };
};
ether: ethernet@ee700000 { can0: can@e6e80000 {
compatible = "renesas,ether-r8a7793", compatible = "renesas,can-r8a7793",
"renesas,rcar-gen2-ether"; "renesas,rcar-gen2-can";
reg = <0 0xee700000 0 0x400>; reg = <0 0xe6e80000 0 0x1000>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>; clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; <&can_clk>;
resets = <&cpg 813>; clock-names = "clkp1", "clkp2", "can_clk";
phy-mode = "rmii"; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 916>;
#size-cells = <0>; status = "disabled";
status = "disabled"; };
};
vin0: video@e6ef0000 { can1: can@e6e88000 {
compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin"; compatible = "renesas,can-r8a7793",
reg = <0 0xe6ef0000 0 0x1000>; "renesas,rcar-gen2-can";
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e88000 0 0x1000>;
clocks = <&cpg CPG_MOD 811>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>,
resets = <&cpg 811>; <&can_clk>;
status = "disabled"; clock-names = "clkp1", "clkp2", "can_clk";
}; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 915>;
status = "disabled";
};
vin1: video@e6ef1000 { vin0: video@e6ef0000 {
compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin"; compatible = "renesas,vin-r8a7793",
reg = <0 0xe6ef1000 0 0x1000>; "renesas,rcar-gen2-vin";
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ef0000 0 0x1000>;
clocks = <&cpg CPG_MOD 810>; interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 811>;
resets = <&cpg 810>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 811>;
}; status = "disabled";
};
vin2: video@e6ef2000 { vin1: video@e6ef1000 {
compatible = "renesas,vin-r8a7793", "renesas,rcar-gen2-vin"; compatible = "renesas,vin-r8a7793",
reg = <0 0xe6ef2000 0 0x1000>; "renesas,rcar-gen2-vin";
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ef1000 0 0x1000>;
clocks = <&cpg CPG_MOD 809>; interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 810>;
resets = <&cpg 809>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 810>;
}; status = "disabled";
};
qspi: spi@e6b10000 { vin2: video@e6ef2000 {
compatible = "renesas,qspi-r8a7793", "renesas,qspi"; compatible = "renesas,vin-r8a7793",
reg = <0 0xe6b10000 0 0x2c>; "renesas,rcar-gen2-vin";
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ef2000 0 0x1000>;
clocks = <&cpg CPG_MOD 917>; interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>, clocks = <&cpg CPG_MOD 809>;
<&dmac1 0x17>, <&dmac1 0x18>; power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 809>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 917>; };
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
du: display@feb00000 { rcar_sound: sound@ec500000 {
compatible = "renesas,du-r8a7793"; /*
reg = <0 0xfeb00000 0 0x40000>, * #sound-dai-cells is required
<0 0xfeb90000 0 0x1c>; *
reg-names = "du", "lvds.0"; * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; */
clocks = <&cpg CPG_MOD 724>, compatible = "renesas,rcar_sound-r8a7793",
<&cpg CPG_MOD 723>, "renesas,rcar_sound-gen2";
<&cpg CPG_MOD 726>; reg = <0 0xec500000 0 0x1000>, /* SCU */
clock-names = "du.0", "du.1", "lvds.0"; <0 0xec5a0000 0 0x100>, /* ADG */
status = "disabled"; <0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
ports { <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
#address-cells = <1>; reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
#size-cells = <0>;
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7793_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6",
"src.5", "src.4", "src.3", "src.2",
"src.1", "src.0",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>,
<&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>,
<&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0";
status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma1 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma1 0xbe>;
dma-names = "tx";
};
};
port@0 { rcar_sound,src {
reg = <0>; src0: src-0 {
du_out_rgb: endpoint { interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x85>, <&audma1 0x9a>;
dma-names = "rx", "tx";
};
src1: src-1 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx";
};
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx";
};
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx";
};
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx";
};
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx";
};
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
}; };
}; };
port@1 {
reg = <1>; rcar_sound,ssi {
du_out_lvds0: endpoint { ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma1 0x02>,
<&audma0 0x15>, <&audma1 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>,
<&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>,
<&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>,
<&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>,
<&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>,
<&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>,
<&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>,
<&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>,
<&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>,
<&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
}; };
}; };
}; };
};
can0: can@e6e80000 { audma0: dma-controller@ec700000 {
compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can"; compatible = "renesas,dmac-r8a7793",
reg = <0 0xe6e80000 0 0x1000>; "renesas,rcar-dmac";
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xec700000 0 0x10000>;
clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7793_CLK_RCAN>, interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
<&can_clk>; GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
clock-names = "clkp1", "clkp2", "can_clk"; GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 916>; GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
can1: can@e6e88000 { GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
compatible = "renesas,can-r8a7793", "renesas,rcar-gen2-can"; GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
reg = <0 0xe6e88000 0 0x1000>; GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7793_CLK_RCAN>, GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
<&can_clk>; GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "clkp1", "clkp2", "can_clk"; interrupt-names = "error",
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>; "ch0", "ch1", "ch2", "ch3",
resets = <&cpg 915>; "ch4", "ch5", "ch6", "ch7",
status = "disabled"; "ch8", "ch9", "ch10", "ch11",
}; "ch12";
clocks = <&cpg CPG_MOD 502>;
/* External root clock */ clock-names = "fck";
extal_clk: extal { power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
compatible = "fixed-clock"; resets = <&cpg 502>;
#clock-cells = <0>; #dma-cells = <1>;
/* This value must be overridden by the board. */ dma-channels = <13>;
clock-frequency = <0>; };
};
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clk_a: audio_clk_a {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_b: audio_clk_b {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clk_c: audio_clk_c {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External USB clock - can be overridden by the board */
usb_extal_clk: usb_extal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
/* External CAN clock */ audma1: dma-controller@ec720000 {
can_clk: can { compatible = "renesas,dmac-r8a7793",
compatible = "fixed-clock"; "renesas,rcar-dmac";
#clock-cells = <0>; reg = <0 0xec720000 0 0x10000>;
/* This value must be overridden by the board. */ interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
clock-frequency = <0>; GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 501>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 501>;
#dma-cells = <1>;
dma-channels = <13>;
};
/* External SCIF clock */ sdhi0: sd@ee100000 {
scif_clk: scif { compatible = "renesas,sdhi-r8a7793",
compatible = "fixed-clock"; "renesas,rcar-gen2-sdhi";
#clock-cells = <0>; reg = <0 0xee100000 0 0x328>;
/* This value must be overridden by the board. */ interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <0>; clocks = <&cpg CPG_MOD 314>;
}; dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
/* Special CPG clocks */ sdhi1: sd@ee140000 {
cpg: clock-controller@e6150000 { compatible = "renesas,sdhi-r8a7793",
compatible = "renesas,r8a7793-cpg-mssr"; "renesas,rcar-gen2-sdhi";
reg = <0 0xe6150000 0 0x1000>; reg = <0 0xee140000 0 0x100>;
clocks = <&extal_clk>, <&usb_extal_clk>; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "extal", "usb_extal"; clocks = <&cpg CPG_MOD 312>;
#clock-cells = <2>; dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
#power-domain-cells = <0>; <&dmac1 0xc1>, <&dmac1 0xc2>;
#reset-cells = <1>; dma-names = "tx", "rx", "tx", "rx";
}; max-frequency = <97500000>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 312>;
status = "disabled";
};
rst: reset-controller@e6160000 { sdhi2: sd@ee160000 {
compatible = "renesas,r8a7793-rst"; compatible = "renesas,sdhi-r8a7793",
reg = <0 0xe6160000 0 0x0100>; "renesas,rcar-gen2-sdhi";
}; reg = <0 0xee160000 0 0x100>;
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 311>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
<&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 311>;
status = "disabled";
};
prr: chipid@ff000044 { mmcif0: mmc@ee200000 {
compatible = "renesas,prr"; compatible = "renesas,mmcif-r8a7793",
reg = <0 0xff000044 0 4>; "renesas,sh-mmcif";
}; reg = <0 0xee200000 0 0x80>;
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 315>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 315>;
reg-io-width = <4>;
status = "disabled";
max-frequency = <97500000>;
};
sysc: system-controller@e6180000 { ether: ethernet@ee700000 {
compatible = "renesas,r8a7793-sysc"; compatible = "renesas,ether-r8a7793",
reg = <0 0xe6180000 0 0x0200>; "renesas,rcar-gen2-ether";
#power-domain-cells = <1>; reg = <0 0xee700000 0 0x400>;
}; interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 813>;
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
ipmmu_sy0: mmu@e6280000 { gic: interrupt-controller@f1001000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; compatible = "arm,gic-400";
reg = <0 0xe6280000 0 0x1000>; #interrupt-cells = <3>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, #address-cells = <0>;
<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller;
#iommu-cells = <1>; reg = <0 0xf1001000 0 0x1000>,
status = "disabled"; <0 0xf1002000 0 0x2000>,
}; <0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
ipmmu_sy1: mmu@e6290000 { du: display@feb00000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; compatible = "renesas,du-r8a7793";
reg = <0 0xe6290000 0 0x1000>; reg = <0 0xfeb00000 0 0x40000>,
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; <0 0xfeb90000 0 0x1c>;
#iommu-cells = <1>; reg-names = "du", "lvds.0";
status = "disabled"; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
}; <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 724>,
<&cpg CPG_MOD 723>,
<&cpg CPG_MOD 726>;
clock-names = "du.0", "du.1", "lvds.0";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
du_out_rgb: endpoint {
};
};
port@1 {
reg = <1>;
du_out_lvds0: endpoint {
};
};
};
};
ipmmu_ds: mmu@e6740000 { prr: chipid@ff000044 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; compatible = "renesas,prr";
reg = <0 0xe6740000 0 0x1000>; reg = <0 0xff000044 0 4>;
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, };
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
status = "disabled";
};
ipmmu_mp: mmu@ec680000 { cmt0: timer@ffca0000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; compatible = "renesas,r8a7793-cmt0",
reg = <0 0xec680000 0 0x1000>; "renesas,rcar-gen2-cmt0";
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xffca0000 0 0x1004>;
#iommu-cells = <1>; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
status = "disabled"; <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
}; clocks = <&cpg CPG_MOD 124>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
};
ipmmu_mx: mmu@fe951000 { cmt1: timer@e6130000 {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; compatible = "renesas,r8a7793-cmt1",
reg = <0 0xfe951000 0 0x1000>; "renesas,rcar-gen2-cmt1";
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xe6130000 0 0x1004>;
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
#iommu-cells = <1>; <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
status = "disabled"; <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 329>;
clock-names = "fck";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 329>;
status = "disabled";
};
}; };
ipmmu_rt: mmu@ffc80000 { thermal-zones {
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa"; cpu_thermal: cpu-thermal {
reg = <0 0xffc80000 0 0x1000>; polling-delay-passive = <0>;
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>; polling-delay = <0>;
#iommu-cells = <1>;
status = "disabled";
};
ipmmu_gp: mmu@e62a0000 { thermal-sensors = <&thermal>;
compatible = "renesas,ipmmu-r8a7793", "renesas,ipmmu-vmsa";
reg = <0 0xe62a0000 0 0x1000>;
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>;
status = "disabled";
};
rcar_sound: sound@ec500000 { trips {
/* cpu-crit {
* #sound-dai-cells is required temperature = <95000>;
* hysteresis = <0>;
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; type = "critical";
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; };
*/
compatible = "renesas,rcar_sound-r8a7793", "renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
<&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
<&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
<&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
<&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
<&cpg CPG_CORE R8A7793_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6", "src.5",
"src.4", "src.3", "src.2", "src.1", "src.0",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7793_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma1 0xbc>;
dma-names = "tx";
}; };
dvc1: dvc-1 { cooling-maps {
dmas = <&audma1 0xbe>;
dma-names = "tx";
}; };
}; };
};
rcar_sound,src { timer {
src0: src-0 { compatible = "arm,armv7-timer";
interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
dmas = <&audma0 0x85>, <&audma1 0x9a>; <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
dma-names = "rx", "tx"; <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
}; <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
src1: src-1 { };
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma1 0x9c>;
dma-names = "rx", "tx";
};
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma1 0x9e>;
dma-names = "rx", "tx";
};
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma1 0xa0>;
dma-names = "rx", "tx";
};
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma1 0xb0>;
dma-names = "rx", "tx";
};
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma1 0xb2>;
dma-names = "rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma1 0xb4>;
dma-names = "rx", "tx";
};
src7: src-7 {
interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x93>, <&audma1 0xb6>;
dma-names = "rx", "tx";
};
src8: src-8 {
interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x95>, <&audma1 0xb8>;
dma-names = "rx", "tx";
};
src9: src-9 {
interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x97>, <&audma1 0xba>;
dma-names = "rx", "tx";
};
};
rcar_sound,ssi { /* External USB clock - can be overridden by the board */
ssi0: ssi-0 { usb_extal_clk: usb_extal {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; compatible = "fixed-clock";
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; #clock-cells = <0>;
dma-names = "rx", "tx", "rxu", "txu"; clock-frequency = <48000000>;
};
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
};
};
}; };
}; };
arch/arm/boot/dts/r8a7794-alt.dts
View file @ cdcdbbf3
...@@ -18,7 +18,9 @@ / { ...@@ -18,7 +18,9 @@ / {
aliases { aliases {
serial0 = &scif2; serial0 = &scif2;
i2c9 = &gpioi2c1;
i2c10 = &gpioi2c4; i2c10 = &gpioi2c4;
i2c11 = &i2chdmi;
i2c12 = &i2cexio4; i2c12 = &i2cexio4;
}; };
...@@ -138,16 +140,49 @@ x13_clk: x13-clock { ...@@ -138,16 +140,49 @@ x13_clk: x13-clock {
clock-frequency = <148500000>; clock-frequency = <148500000>;
}; };
gpioi2c1: i2c-9 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
};
gpioi2c4: i2c-10 { gpioi2c4: i2c-10 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "i2c-gpio"; compatible = "i2c-gpio";
status = "disabled"; status = "disabled";
sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>; i2c-gpio,delay-us = <5>;
}; };
/*
* A fallback to GPIO is provided for I2C1.
*/
i2chdmi: i2c-11 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&i2c1>, <&gpioi2c1>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin0>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin0ep>;
};
};
};
};
/* /*
* I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA). * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
* A fallback to GPIO is provided. * A fallback to GPIO is provided.
...@@ -324,23 +359,9 @@ &sdhi1 { ...@@ -324,23 +359,9 @@ &sdhi1 {
&i2c1 { &i2c1 {
pinctrl-0 = <&i2c1_pins>; pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default"; pinctrl-names = "i2c-hdmi";
status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin0>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin0ep>;
};
};
};
}; };
&i2c4 { &i2c4 {
......
arch/arm/boot/dts/r8a7794-silk.dts
View file @ cdcdbbf3
...@@ -24,6 +24,7 @@ ...@@ -24,6 +24,7 @@
/dts-v1/; /dts-v1/;
#include "r8a7794.dtsi" #include "r8a7794.dtsi"
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ { / {
model = "SILK"; model = "SILK";
...@@ -31,6 +32,8 @@ / { ...@@ -31,6 +32,8 @@ / {
aliases { aliases {
serial0 = &scif2; serial0 = &scif2;
i2c9 = &gpioi2c1;
i2c10 = &i2chdmi;
}; };
chosen { chosen {
...@@ -43,6 +46,60 @@ memory@40000000 { ...@@ -43,6 +46,60 @@ memory@40000000 {
reg = <0 0x40000000 0 0x40000000>; reg = <0 0x40000000 0 0x40000000>;
}; };
gpio-keys {
compatible = "gpio-keys";
key-3 {
gpios = <&gpio5 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_3>;
label = "SW3";
wakeup-source;
debounce-interval = <20>;
};
key-4 {
gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_4>;
label = "SW4";
wakeup-source;
debounce-interval = <20>;
};
key-6 {
gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_6>;
label = "SW6";
wakeup-source;
debounce-interval = <20>;
};
key-a {
gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
linux,code = <KEY_A>;
label = "SW12-1";
wakeup-source;
debounce-interval = <20>;
};
key-b {
gpios = <&gpio3 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_B>;
label = "SW12-2";
wakeup-source;
debounce-interval = <20>;
};
key-c {
gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
linux,code = <KEY_C>;
label = "SW12-3";
wakeup-source;
debounce-interval = <20>;
};
key-d {
gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_D>;
label = "SW12-4";
wakeup-source;
debounce-interval = <20>;
};
};
d3_3v: regulator-d3-3v { d3_3v: regulator-d3-3v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "D3.3V"; regulator-name = "D3.3V";
...@@ -153,6 +210,84 @@ soundcodec: simple-audio-card,codec { ...@@ -153,6 +210,84 @@ soundcodec: simple-audio-card,codec {
clocks = <&x9_clk>; clocks = <&x9_clk>;
}; };
}; };
gpioi2c1: i2c-9 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "i2c-gpio";
status = "disabled";
scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <5>;
};
/*
* A fallback to GPIO is provided for I2C1.
*/
i2chdmi: i2c-10 {
compatible = "i2c-demux-pinctrl";
i2c-parent = <&i2c1>, <&gpioi2c1>;
i2c-bus-name = "i2c-hdmi";
#address-cells = <1>;
#size-cells = <0>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin0>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin0ep>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio5>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb0>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
eeprom@50 {
compatible = "renesas,r1ex24002", "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
};
}; };
&extal_clk { &extal_clk {
...@@ -268,61 +403,9 @@ phy1: ethernet-phy@1 { ...@@ -268,61 +403,9 @@ phy1: ethernet-phy@1 {
&i2c1 { &i2c1 {
pinctrl-0 = <&i2c1_pins>; pinctrl-0 = <&i2c1_pins>;
pinctrl-names = "default"; pinctrl-names = "i2c-hdmi";
status = "okay";
clock-frequency = <400000>; clock-frequency = <400000>;
ak4643: codec@12 {
compatible = "asahi-kasei,ak4643";
#sound-dai-cells = <0>;
reg = <0x12>;
};
composite-in@20 {
compatible = "adi,adv7180";
reg = <0x20>;
remote = <&vin0>;
port {
adv7180: endpoint {
bus-width = <8>;
remote-endpoint = <&vin0ep>;
};
};
};
hdmi@39 {
compatible = "adi,adv7511w";
reg = <0x39>;
interrupt-parent = <&gpio5>;
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
adi,input-depth = <8>;
adi,input-colorspace = "rgb";
adi,input-clock = "1x";
adi,input-style = <1>;
adi,input-justification = "evenly";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
adv7511_in: endpoint {
remote-endpoint = <&du_out_rgb0>;
};
};
port@1 {
reg = <1>;
adv7511_out: endpoint {
remote-endpoint = <&hdmi_con>;
};
};
};
};
}; };
&mmcif0 { &mmcif0 {
......
arch/arm/boot/dts/r8a7794.dtsi
View file @ cdcdbbf3
...@@ -16,7 +16,6 @@ ...@@ -16,7 +16,6 @@
/ { / {
compatible = "renesas,r8a7794"; compatible = "renesas,r8a7794";
interrupt-parent = <&gic>;
#address-cells = <2>; #address-cells = <2>;
#size-cells = <2>; #size-cells = <2>;
...@@ -34,6 +33,35 @@ aliases { ...@@ -34,6 +33,35 @@ aliases {
vin1 = &vin1; vin1 = &vin1;
}; };
/*
* The external audio clocks are configured as 0 Hz fixed frequency
* clocks by default.
* Boards that provide audio clocks should override them.
*/
audio_clka: audio_clka {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clkb: audio_clkb {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clkc: audio_clkc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
/* External CAN clock */
can_clk: can {
compatible = "fixed-clock";
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
cpus { cpus {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
...@@ -67,1290 +95,1313 @@ L2_CA7: cache-controller-0 { ...@@ -67,1290 +95,1313 @@ L2_CA7: cache-controller-0 {
}; };
}; };
apmu@e6151000 { /* External root clock */
compatible = "renesas,r8a7794-apmu", "renesas,apmu"; extal_clk: extal {
reg = <0 0xe6151000 0 0x188>; compatible = "fixed-clock";
cpus = <&cpu0 &cpu1>; #clock-cells = <0>;
}; /* This value must be overridden by the board. */
clock-frequency = <0>;
gic: interrupt-controller@f1001000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
<0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 408>;
}; };
gpio0: gpio@e6050000 { /* External SCIF clock */
compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio"; scif_clk: scif {
reg = <0 0xe6050000 0 0x50>; compatible = "fixed-clock";
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; #clock-cells = <0>;
#gpio-cells = <2>; /* This value must be overridden by the board. */
gpio-controller; clock-frequency = <0>;
gpio-ranges = <&pfc 0 0 32>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 912>;
}; };
gpio1: gpio@e6051000 { soc {
compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio"; compatible = "simple-bus";
reg = <0 0xe6051000 0 0x50>; interrupt-parent = <&gic>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>;
gpio-controller;
gpio-ranges = <&pfc 0 32 26>;
#interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 911>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 911>;
};
gpio2: gpio@e6052000 { #address-cells = <2>;
compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio"; #size-cells = <2>;
reg = <0 0xe6052000 0 0x50>; ranges;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
#gpio-cells = <2>; gpio0: gpio@e6050000 {
gpio-controller; compatible = "renesas,gpio-r8a7794",
gpio-ranges = <&pfc 0 64 32>; "renesas,rcar-gen2-gpio";
#interrupt-cells = <2>; reg = <0 0xe6050000 0 0x50>;
interrupt-controller; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 910>; #gpio-cells = <2>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; gpio-controller;
resets = <&cpg 910>; gpio-ranges = <&pfc 0 0 32>;
}; #interrupt-cells = <2>;
interrupt-controller;
clocks = <&cpg CPG_MOD 912>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 912>;
};
gpio3: gpio@e6053000 { gpio1: gpio@e6051000 {
compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7794",
reg = <0 0xe6053000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6051000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 96 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 32 26>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 909>; interrupt-controller;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 911>;
resets = <&cpg 909>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 911>;
};
gpio4: gpio@e6054000 { gpio2: gpio@e6052000 {
compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7794",
reg = <0 0xe6054000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6052000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 128 32>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 64 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 908>; interrupt-controller;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 910>;
resets = <&cpg 908>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 910>;
};
gpio5: gpio@e6055000 { gpio3: gpio@e6053000 {
compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7794",
reg = <0 0xe6055000 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6053000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 160 28>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 96 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 907>; interrupt-controller;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 909>;
resets = <&cpg 907>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 909>;
};
gpio6: gpio@e6055400 { gpio4: gpio@e6054000 {
compatible = "renesas,gpio-r8a7794", "renesas,rcar-gen2-gpio"; compatible = "renesas,gpio-r8a7794",
reg = <0 0xe6055400 0 0x50>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6054000 0 0x50>;
#gpio-cells = <2>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller; #gpio-cells = <2>;
gpio-ranges = <&pfc 0 192 26>; gpio-controller;
#interrupt-cells = <2>; gpio-ranges = <&pfc 0 128 32>;
interrupt-controller; #interrupt-cells = <2>;
clocks = <&cpg CPG_MOD 905>; interrupt-controller;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 908>;
resets = <&cpg 905>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 908>;
};
cmt0: timer@ffca0000 { gpio5: gpio@e6055000 {
compatible = "renesas,r8a7794-cmt0", "renesas,rcar-gen2-cmt0"; compatible = "renesas,gpio-r8a7794",
reg = <0 0xffca0000 0 0x1004>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xe6055000 0 0x50>;
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 124>; #gpio-cells = <2>;
clock-names = "fck"; gpio-controller;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; gpio-ranges = <&pfc 0 160 28>;
resets = <&cpg 124>; #interrupt-cells = <2>;
interrupt-controller;
status = "disabled"; clocks = <&cpg CPG_MOD 907>;
}; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 907>;
};
cmt1: timer@e6130000 { gpio6: gpio@e6055400 {
compatible = "renesas,r8a7794-cmt1", "renesas,rcar-gen2-cmt1"; compatible = "renesas,gpio-r8a7794",
reg = <0 0xe6130000 0 0x1004>; "renesas,rcar-gen2-gpio";
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xe6055400 0 0x50>;
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, #gpio-cells = <2>;
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, gpio-controller;
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, gpio-ranges = <&pfc 0 192 26>;
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, #interrupt-cells = <2>;
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, interrupt-controller;
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 905>;
clocks = <&cpg CPG_MOD 329>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
clock-names = "fck"; resets = <&cpg 905>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; };
resets = <&cpg 329>;
status = "disabled";
};
timer { pfc: pin-controller@e6060000 {
compatible = "arm,armv7-timer"; compatible = "renesas,pfc-r8a7794";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, reg = <0 0xe6060000 0 0x11c>;
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, };
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
irqc0: interrupt-controller@e61c0000 { cpg: clock-controller@e6150000 {
compatible = "renesas,irqc-r8a7794", "renesas,irqc"; compatible = "renesas,r8a7794-cpg-mssr";
#interrupt-cells = <2>; reg = <0 0xe6150000 0 0x1000>;
interrupt-controller; clocks = <&extal_clk>, <&usb_extal_clk>;
reg = <0 0xe61c0000 0 0x200>; clock-names = "extal", "usb_extal";
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, #clock-cells = <2>;
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, #power-domain-cells = <0>;
<GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, #reset-cells = <1>;
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, };
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 407>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 407>;
};
pfc: pin-controller@e6060000 { apmu@e6151000 {
compatible = "renesas,pfc-r8a7794"; compatible = "renesas,r8a7794-apmu", "renesas,apmu";
reg = <0 0xe6060000 0 0x11c>; reg = <0 0xe6151000 0 0x188>;
}; cpus = <&cpu0 &cpu1>;
};
dmac0: dma-controller@e6700000 { rst: reset-controller@e6160000 {
compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; compatible = "renesas,r8a7794-rst";
reg = <0 0xe6700000 0 0x20000>; reg = <0 0xe6160000 0 0x0100>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
};
dmac1: dma-controller@e6720000 { sysc: system-controller@e6180000 {
compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; compatible = "renesas,r8a7794-sysc";
reg = <0 0xe6720000 0 0x20000>; reg = <0 0xe6180000 0 0x0200>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH #power-domain-cells = <1>;
GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH };
GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
audma0: dma-controller@ec700000 { irqc0: interrupt-controller@e61c0000 {
compatible = "renesas,dmac-r8a7794", "renesas,rcar-dmac"; compatible = "renesas,irqc-r8a7794", "renesas,irqc";
reg = <0 0xec700000 0 0x10000>; #interrupt-cells = <2>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH interrupt-controller;
GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH reg = <0 0xe61c0000 0 0x200>;
GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH clocks = <&cpg CPG_MOD 407>;
GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
interrupt-names = "error", resets = <&cpg 407>;
"ch0", "ch1", "ch2", "ch3", "ch4", "ch5", };
"ch6", "ch7", "ch8", "ch9", "ch10", "ch11",
"ch12";
clocks = <&cpg CPG_MOD 502>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 502>;
#dma-cells = <1>;
dma-channels = <13>;
};
scifa0: serial@e6c40000 { ipmmu_sy0: mmu@e6280000 {
compatible = "renesas,scifa-r8a7794", compatible = "renesas,ipmmu-r8a7794",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,ipmmu-vmsa";
reg = <0 0xe6c40000 0 64>; reg = <0 0xe6280000 0 0x1000>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
clocks = <&cpg CPG_MOD 204>; <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck"; #iommu-cells = <1>;
dmas = <&dmac0 0x21>, <&dmac0 0x22>, status = "disabled";
<&dmac1 0x21>, <&dmac1 0x22>; };
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 204>;
status = "disabled";
};
scifa1: serial@e6c50000 { ipmmu_sy1: mmu@e6290000 {
compatible = "renesas,scifa-r8a7794", compatible = "renesas,ipmmu-r8a7794",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,ipmmu-vmsa";
reg = <0 0xe6c50000 0 64>; reg = <0 0xe6290000 0 0x1000>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>; #iommu-cells = <1>;
clock-names = "fck"; status = "disabled";
dmas = <&dmac0 0x25>, <&dmac0 0x26>, };
<&dmac1 0x25>, <&dmac1 0x26>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 203>;
status = "disabled";
};
scifa2: serial@e6c60000 { ipmmu_ds: mmu@e6740000 {
compatible = "renesas,scifa-r8a7794", compatible = "renesas,ipmmu-r8a7794",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,ipmmu-vmsa";
reg = <0 0xe6c60000 0 64>; reg = <0 0xe6740000 0 0x1000>;
interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
clocks = <&cpg CPG_MOD 202>; <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck"; #iommu-cells = <1>;
dmas = <&dmac0 0x27>, <&dmac0 0x28>, status = "disabled";
<&dmac1 0x27>, <&dmac1 0x28>; };
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 202>;
status = "disabled";
};
scifa3: serial@e6c70000 { ipmmu_mp: mmu@ec680000 {
compatible = "renesas,scifa-r8a7794", compatible = "renesas,ipmmu-r8a7794",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,ipmmu-vmsa";
reg = <0 0xe6c70000 0 64>; reg = <0 0xec680000 0 0x1000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 1106>; #iommu-cells = <1>;
clock-names = "fck"; status = "disabled";
dmas = <&dmac0 0x1b>, <&dmac0 0x1c>, };
<&dmac1 0x1b>, <&dmac1 0x1c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 1106>;
status = "disabled";
};
scifa4: serial@e6c78000 { ipmmu_mx: mmu@fe951000 {
compatible = "renesas,scifa-r8a7794", compatible = "renesas,ipmmu-r8a7794",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,ipmmu-vmsa";
reg = <0 0xe6c78000 0 64>; reg = <0 0xfe951000 0 0x1000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
clocks = <&cpg CPG_MOD 1107>; <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck"; #iommu-cells = <1>;
dmas = <&dmac0 0x1f>, <&dmac0 0x20>, status = "disabled";
<&dmac1 0x1f>, <&dmac1 0x20>; };
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 1107>;
status = "disabled";
};
scifa5: serial@e6c80000 { ipmmu_gp: mmu@e62a0000 {
compatible = "renesas,scifa-r8a7794", compatible = "renesas,ipmmu-r8a7794",
"renesas,rcar-gen2-scifa", "renesas,scifa"; "renesas,ipmmu-vmsa";
reg = <0 0xe6c80000 0 64>; reg = <0 0xe62a0000 0 0x1000>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
clocks = <&cpg CPG_MOD 1108>; <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "fck"; #iommu-cells = <1>;
dmas = <&dmac0 0x23>, <&dmac0 0x24>, status = "disabled";
<&dmac1 0x23>, <&dmac1 0x24>; };
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 1108>;
status = "disabled";
};
scifb0: serial@e6c20000 { icram0: sram@e63a0000 {
compatible = "renesas,scifb-r8a7794", compatible = "mmio-sram";
"renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe63a0000 0 0x12000>;
reg = <0 0xe6c20000 0 0x100>; };
interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>;
clock-names = "fck";
dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
<&dmac1 0x3d>, <&dmac1 0x3e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 206>;
status = "disabled";
};
scifb1: serial@e6c30000 { icram1: sram@e63c0000 {
compatible = "renesas,scifb-r8a7794", compatible = "mmio-sram";
"renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0xe63c0000 0 0x1000>;
reg = <0 0xe6c30000 0 0x100>; #address-cells = <1>;
interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; #size-cells = <1>;
clocks = <&cpg CPG_MOD 207>; ranges = <0 0 0xe63c0000 0x1000>;
clock-names = "fck";
dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
<&dmac1 0x19>, <&dmac1 0x1a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 207>;
status = "disabled";
};
scifb2: serial@e6ce0000 { smp-sram@0 {
compatible = "renesas,scifb-r8a7794", compatible = "renesas,smp-sram";
"renesas,rcar-gen2-scifb", "renesas,scifb"; reg = <0 0x10>;
reg = <0 0xe6ce0000 0 0x100>; };
interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&cpg CPG_MOD 216>;
clock-names = "fck";
dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
<&dmac1 0x1d>, <&dmac1 0x1e>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 216>;
status = "disabled";
};
scif0: serial@e6e60000 { /* The memory map in the User's Manual maps the cores to
compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", * bus numbers
"renesas,scif"; */
reg = <0 0xe6e60000 0 64>; i2c0: i2c@e6508000 {
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; compatible = "renesas,i2c-r8a7794",
clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>, "renesas,rcar-gen2-i2c";
<&scif_clk>; reg = <0 0xe6508000 0 0x40>;
clock-names = "fck", "brg_int", "scif_clk"; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x29>, <&dmac0 0x2a>, clocks = <&cpg CPG_MOD 931>;
<&dmac1 0x29>, <&dmac1 0x2a>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
dma-names = "tx", "rx", "tx", "rx"; resets = <&cpg 931>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; #address-cells = <1>;
resets = <&cpg 721>; #size-cells = <0>;
status = "disabled"; i2c-scl-internal-delay-ns = <6>;
}; status = "disabled";
};
scif1: serial@e6e68000 { i2c1: i2c@e6518000 {
compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", compatible = "renesas,i2c-r8a7794",
"renesas,scif"; "renesas,rcar-gen2-i2c";
reg = <0 0xe6e68000 0 64>; reg = <0 0xe6518000 0 0x40>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>, clocks = <&cpg CPG_MOD 930>;
<&scif_clk>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
clock-names = "fck", "brg_int", "scif_clk"; resets = <&cpg 930>;
dmas = <&dmac0 0x2d>, <&dmac0 0x2e>, #address-cells = <1>;
<&dmac1 0x2d>, <&dmac1 0x2e>; #size-cells = <0>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 720>; };
status = "disabled";
};
scif2: serial@e6e58000 { i2c2: i2c@e6530000 {
compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", compatible = "renesas,i2c-r8a7794",
"renesas,scif"; "renesas,rcar-gen2-i2c";
reg = <0 0xe6e58000 0 64>; reg = <0 0xe6530000 0 0x40>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>, clocks = <&cpg CPG_MOD 929>;
<&scif_clk>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
clock-names = "fck", "brg_int", "scif_clk"; resets = <&cpg 929>;
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>, #address-cells = <1>;
<&dmac1 0x2b>, <&dmac1 0x2c>; #size-cells = <0>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 719>; };
status = "disabled";
};
scif3: serial@e6ea8000 { i2c3: i2c@e6540000 {
compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", compatible = "renesas,i2c-r8a7794",
"renesas,scif"; "renesas,rcar-gen2-i2c";
reg = <0 0xe6ea8000 0 64>; reg = <0 0xe6540000 0 0x40>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>, clocks = <&cpg CPG_MOD 928>;
<&scif_clk>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
clock-names = "fck", "brg_int", "scif_clk"; resets = <&cpg 928>;
dmas = <&dmac0 0x2f>, <&dmac0 0x30>, #address-cells = <1>;
<&dmac1 0x2f>, <&dmac1 0x30>; #size-cells = <0>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 718>; };
status = "disabled";
};
scif4: serial@e6ee0000 { i2c4: i2c@e6520000 {
compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", compatible = "renesas,i2c-r8a7794",
"renesas,scif"; "renesas,rcar-gen2-i2c";
reg = <0 0xe6ee0000 0 64>; reg = <0 0xe6520000 0 0x40>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>, clocks = <&cpg CPG_MOD 927>;
<&scif_clk>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
clock-names = "fck", "brg_int", "scif_clk"; resets = <&cpg 927>;
dmas = <&dmac0 0xfb>, <&dmac0 0xfc>, #address-cells = <1>;
<&dmac1 0xfb>, <&dmac1 0xfc>; #size-cells = <0>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 715>; };
status = "disabled";
};
scif5: serial@e6ee8000 { i2c5: i2c@e6528000 {
compatible = "renesas,scif-r8a7794", "renesas,rcar-gen2-scif", compatible = "renesas,i2c-r8a7794",
"renesas,scif"; "renesas,rcar-gen2-i2c";
reg = <0 0xe6ee8000 0 64>; reg = <0 0xe6528000 0 0x40>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>, clocks = <&cpg CPG_MOD 925>;
<&scif_clk>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
clock-names = "fck", "brg_int", "scif_clk"; resets = <&cpg 925>;
dmas = <&dmac0 0xfd>, <&dmac0 0xfe>, #address-cells = <1>;
<&dmac1 0xfd>, <&dmac1 0xfe>; #size-cells = <0>;
dma-names = "tx", "rx", "tx", "rx"; i2c-scl-internal-delay-ns = <6>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 714>; };
status = "disabled";
};
hscif0: serial@e62c0000 { i2c6: i2c@e6500000 {
compatible = "renesas,hscif-r8a7794", compatible = "renesas,iic-r8a7794",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-iic",
reg = <0 0xe62c0000 0 96>; "renesas,rmobile-iic";
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6500000 0 0x425>;
clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7794_CLK_ZS>, interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
<&scif_clk>; clocks = <&cpg CPG_MOD 318>;
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x61>, <&dmac0 0x62>,
dmas = <&dmac0 0x39>, <&dmac0 0x3a>, <&dmac1 0x61>, <&dmac1 0x62>;
<&dmac1 0x39>, <&dmac1 0x3a>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; resets = <&cpg 318>;
resets = <&cpg 717>; #address-cells = <1>;
status = "disabled"; #size-cells = <0>;
}; status = "disabled";
};
hscif1: serial@e62c8000 { i2c7: i2c@e6510000 {
compatible = "renesas,hscif-r8a7794", compatible = "renesas,iic-r8a7794",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-iic",
reg = <0 0xe62c8000 0 96>; "renesas,rmobile-iic";
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6510000 0 0x425>;
clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7794_CLK_ZS>, interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
<&scif_clk>; clocks = <&cpg CPG_MOD 323>;
clock-names = "fck", "brg_int", "scif_clk"; dmas = <&dmac0 0x65>, <&dmac0 0x66>,
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>, <&dmac1 0x65>, <&dmac1 0x66>;
<&dmac1 0x4d>, <&dmac1 0x4e>; dma-names = "tx", "rx", "tx", "rx";
dma-names = "tx", "rx", "tx", "rx"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; resets = <&cpg 323>;
resets = <&cpg 716>; #address-cells = <1>;
status = "disabled"; #size-cells = <0>;
}; status = "disabled";
};
hscif2: serial@e62d0000 { hsusb: usb@e6590000 {
compatible = "renesas,hscif-r8a7794", compatible = "renesas,usbhs-r8a7794",
"renesas,rcar-gen2-hscif", "renesas,hscif"; "renesas,rcar-gen2-usbhs";
reg = <0 0xe62d0000 0 96>; reg = <0 0xe6590000 0 0x100>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>, clocks = <&cpg CPG_MOD 704>;
<&scif_clk>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
clock-names = "fck", "brg_int", "scif_clk"; resets = <&cpg 704>;
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>, renesas,buswait = <4>;
<&dmac1 0x3b>, <&dmac1 0x3c>; phys = <&usb0 1>;
dma-names = "tx", "rx", "tx", "rx"; phy-names = "usb";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; status = "disabled";
resets = <&cpg 713>; };
status = "disabled";
};
icram0: sram@e63a0000 { usbphy: usb-phy@e6590100 {
compatible = "mmio-sram"; compatible = "renesas,usb-phy-r8a7794",
reg = <0 0xe63a0000 0 0x12000>; "renesas,rcar-gen2-usb-phy";
}; reg = <0 0xe6590100 0 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cpg CPG_MOD 704>;
clock-names = "usbhs";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 704>;
status = "disabled";
icram1: sram@e63c0000 { usb0: usb-channel@0 {
compatible = "mmio-sram"; reg = <0>;
reg = <0 0xe63c0000 0 0x1000>; #phy-cells = <1>;
#address-cells = <1>; };
#size-cells = <1>; usb2: usb-channel@2 {
ranges = <0 0 0xe63c0000 0x1000>; reg = <2>;
#phy-cells = <1>;
};
};
smp-sram@0 { dmac0: dma-controller@e6700000 {
compatible = "renesas,smp-sram"; compatible = "renesas,dmac-r8a7794",
reg = <0 0x10>; "renesas,rcar-dmac";
reg = <0 0xe6700000 0 0x20000>;
interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 219>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 219>;
#dma-cells = <1>;
dma-channels = <15>;
}; };
};
ether: ethernet@ee700000 { dmac1: dma-controller@e6720000 {
compatible = "renesas,ether-r8a7794", compatible = "renesas,dmac-r8a7794",
"renesas,rcar-gen2-ether"; "renesas,rcar-dmac";
reg = <0 0xee700000 0 0x400>; reg = <0 0xe6720000 0 0x20000>;
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
clocks = <&cpg CPG_MOD 813>; GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 813>; GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
phy-mode = "rmii"; GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
#address-cells = <1>; GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
#size-cells = <0>; GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3",
"ch4", "ch5", "ch6", "ch7",
"ch8", "ch9", "ch10", "ch11",
"ch12", "ch13", "ch14";
clocks = <&cpg CPG_MOD 218>;
clock-names = "fck";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 218>;
#dma-cells = <1>;
dma-channels = <15>;
};
avb: ethernet@e6800000 { avb: ethernet@e6800000 {
compatible = "renesas,etheravb-r8a7794", compatible = "renesas,etheravb-r8a7794",
"renesas,etheravb-rcar-gen2"; "renesas,etheravb-rcar-gen2";
reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>; reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 812>; clocks = <&cpg CPG_MOD 812>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 812>; resets = <&cpg 812>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
status = "disabled"; status = "disabled";
}; };
/* The memory map in the User's Manual maps the cores to bus numbers */ qspi: spi@e6b10000 {
i2c0: i2c@e6508000 { compatible = "renesas,qspi-r8a7794", "renesas,qspi";
compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c"; reg = <0 0xe6b10000 0 0x2c>;
reg = <0 0xe6508000 0 0x40>; interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 917>;
clocks = <&cpg CPG_MOD 931>; dmas = <&dmac0 0x17>, <&dmac0 0x18>,
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; <&dmac1 0x17>, <&dmac1 0x18>;
resets = <&cpg 931>; dma-names = "tx", "rx", "tx", "rx";
#address-cells = <1>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#size-cells = <0>; resets = <&cpg 917>;
i2c-scl-internal-delay-ns = <6>; num-cs = <1>;
status = "disabled"; #address-cells = <1>;
}; #size-cells = <0>;
status = "disabled";
};
i2c1: i2c@e6518000 { scifa0: serial@e6c40000 {
compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c"; compatible = "renesas,scifa-r8a7794",
reg = <0 0xe6518000 0 0x40>; "renesas,rcar-gen2-scifa", "renesas,scifa";
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6c40000 0 64>;
clocks = <&cpg CPG_MOD 930>; interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 204>;
resets = <&cpg 930>; clock-names = "fck";
#address-cells = <1>; dmas = <&dmac0 0x21>, <&dmac0 0x22>,
#size-cells = <0>; <&dmac1 0x21>, <&dmac1 0x22>;
i2c-scl-internal-delay-ns = <6>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 204>;
status = "disabled";
};
i2c2: i2c@e6530000 { scifa1: serial@e6c50000 {
compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c"; compatible = "renesas,scifa-r8a7794",
reg = <0 0xe6530000 0 0x40>; "renesas,rcar-gen2-scifa", "renesas,scifa";
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6c50000 0 64>;
clocks = <&cpg CPG_MOD 929>; interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 203>;
resets = <&cpg 929>; clock-names = "fck";
#address-cells = <1>; dmas = <&dmac0 0x25>, <&dmac0 0x26>,
#size-cells = <0>; <&dmac1 0x25>, <&dmac1 0x26>;
i2c-scl-internal-delay-ns = <6>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 203>;
status = "disabled";
};
i2c3: i2c@e6540000 { scifa2: serial@e6c60000 {
compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c"; compatible = "renesas,scifa-r8a7794",
reg = <0 0xe6540000 0 0x40>; "renesas,rcar-gen2-scifa", "renesas,scifa";
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6c60000 0 64>;
clocks = <&cpg CPG_MOD 928>; interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 202>;
resets = <&cpg 928>; clock-names = "fck";
#address-cells = <1>; dmas = <&dmac0 0x27>, <&dmac0 0x28>,
#size-cells = <0>; <&dmac1 0x27>, <&dmac1 0x28>;
i2c-scl-internal-delay-ns = <6>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 202>;
status = "disabled";
};
i2c4: i2c@e6520000 { scifa3: serial@e6c70000 {
compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c"; compatible = "renesas,scifa-r8a7794",
reg = <0 0xe6520000 0 0x40>; "renesas,rcar-gen2-scifa", "renesas,scifa";
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6c70000 0 64>;
clocks = <&cpg CPG_MOD 927>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 1106>;
resets = <&cpg 927>; clock-names = "fck";
#address-cells = <1>; dmas = <&dmac0 0x1b>, <&dmac0 0x1c>,
#size-cells = <0>; <&dmac1 0x1b>, <&dmac1 0x1c>;
i2c-scl-internal-delay-ns = <6>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 1106>;
status = "disabled";
};
i2c5: i2c@e6528000 { scifa4: serial@e6c78000 {
compatible = "renesas,i2c-r8a7794", "renesas,rcar-gen2-i2c"; compatible = "renesas,scifa-r8a7794",
reg = <0 0xe6528000 0 0x40>; "renesas,rcar-gen2-scifa", "renesas,scifa";
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6c78000 0 64>;
clocks = <&cpg CPG_MOD 925>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 1107>;
resets = <&cpg 925>; clock-names = "fck";
#address-cells = <1>; dmas = <&dmac0 0x1f>, <&dmac0 0x20>,
#size-cells = <0>; <&dmac1 0x1f>, <&dmac1 0x20>;
i2c-scl-internal-delay-ns = <6>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 1107>;
status = "disabled";
};
i2c6: i2c@e6500000 { scifa5: serial@e6c80000 {
compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic", compatible = "renesas,scifa-r8a7794",
"renesas,rmobile-iic"; "renesas,rcar-gen2-scifa", "renesas,scifa";
reg = <0 0xe6500000 0 0x425>; reg = <0 0xe6c80000 0 64>;
interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 318>; clocks = <&cpg CPG_MOD 1108>;
dmas = <&dmac0 0x61>, <&dmac0 0x62>, clock-names = "fck";
<&dmac1 0x61>, <&dmac1 0x62>; dmas = <&dmac0 0x23>, <&dmac0 0x24>,
dma-names = "tx", "rx", "tx", "rx"; <&dmac1 0x23>, <&dmac1 0x24>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; dma-names = "tx", "rx", "tx", "rx";
resets = <&cpg 318>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 1108>;
#size-cells = <0>; status = "disabled";
status = "disabled"; };
};
i2c7: i2c@e6510000 { scifb0: serial@e6c20000 {
compatible = "renesas,iic-r8a7794", "renesas,rcar-gen2-iic", compatible = "renesas,scifb-r8a7794",
"renesas,rmobile-iic"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xe6510000 0 0x425>; reg = <0 0xe6c20000 0 0x100>;
interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 323>; clocks = <&cpg CPG_MOD 206>;
dmas = <&dmac0 0x65>, <&dmac0 0x66>, clock-names = "fck";
<&dmac1 0x65>, <&dmac1 0x66>; dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
dma-names = "tx", "rx", "tx", "rx"; <&dmac1 0x3d>, <&dmac1 0x3e>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; dma-names = "tx", "rx", "tx", "rx";
resets = <&cpg 323>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#address-cells = <1>; resets = <&cpg 206>;
#size-cells = <0>; status = "disabled";
status = "disabled"; };
};
mmcif0: mmc@ee200000 { scifb1: serial@e6c30000 {
compatible = "renesas,mmcif-r8a7794", "renesas,sh-mmcif"; compatible = "renesas,scifb-r8a7794",
reg = <0 0xee200000 0 0x80>; "renesas,rcar-gen2-scifb", "renesas,scifb";
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6c30000 0 0x100>;
clocks = <&cpg CPG_MOD 315>; interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0xd1>, <&dmac0 0xd2>, clocks = <&cpg CPG_MOD 207>;
<&dmac1 0xd1>, <&dmac1 0xd2>; clock-names = "fck";
dma-names = "tx", "rx", "tx", "rx"; dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; <&dmac1 0x19>, <&dmac1 0x1a>;
resets = <&cpg 315>; dma-names = "tx", "rx", "tx", "rx";
reg-io-width = <4>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 207>;
}; status = "disabled";
};
sdhi0: sd@ee100000 { scifb2: serial@e6ce0000 {
compatible = "renesas,sdhi-r8a7794", compatible = "renesas,scifb-r8a7794",
"renesas,rcar-gen2-sdhi"; "renesas,rcar-gen2-scifb", "renesas,scifb";
reg = <0 0xee100000 0 0x328>; reg = <0 0xe6ce0000 0 0x100>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>; clocks = <&cpg CPG_MOD 216>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>, clock-names = "fck";
<&dmac1 0xcd>, <&dmac1 0xce>; dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
dma-names = "tx", "rx", "tx", "rx"; <&dmac1 0x1d>, <&dmac1 0x1e>;
max-frequency = <195000000>; dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 314>; resets = <&cpg 216>;
status = "disabled"; status = "disabled";
}; };
sdhi1: sd@ee140000 { scif0: serial@e6e60000 {
compatible = "renesas,sdhi-r8a7794", compatible = "renesas,scif-r8a7794",
"renesas,rcar-gen2-sdhi"; "renesas,rcar-gen2-scif",
reg = <0 0xee140000 0 0x100>; "renesas,scif";
interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e60000 0 64>;
clocks = <&cpg CPG_MOD 312>; interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>, clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
<&dmac1 0xc1>, <&dmac1 0xc2>; <&scif_clk>;
dma-names = "tx", "rx", "tx", "rx"; clock-names = "fck", "brg_int", "scif_clk";
max-frequency = <97500000>; dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; <&dmac1 0x29>, <&dmac1 0x2a>;
resets = <&cpg 312>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 721>;
status = "disabled";
};
sdhi2: sd@ee160000 { scif1: serial@e6e68000 {
compatible = "renesas,sdhi-r8a7794", compatible = "renesas,scif-r8a7794",
"renesas,rcar-gen2-sdhi"; "renesas,rcar-gen2-scif",
reg = <0 0xee160000 0 0x100>; "renesas,scif";
interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e68000 0 64>;
clocks = <&cpg CPG_MOD 311>; interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0xd3>, <&dmac0 0xd4>, clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
<&dmac1 0xd3>, <&dmac1 0xd4>; <&scif_clk>;
dma-names = "tx", "rx", "tx", "rx"; clock-names = "fck", "brg_int", "scif_clk";
max-frequency = <97500000>; dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; <&dmac1 0x2d>, <&dmac1 0x2e>;
resets = <&cpg 311>; dma-names = "tx", "rx", "tx", "rx";
status = "disabled"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 720>;
status = "disabled";
};
qspi: spi@e6b10000 { scif2: serial@e6e58000 {
compatible = "renesas,qspi-r8a7794", "renesas,qspi"; compatible = "renesas,scif-r8a7794",
reg = <0 0xe6b10000 0 0x2c>; "renesas,rcar-gen2-scif", "renesas,scif";
interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e58000 0 64>;
clocks = <&cpg CPG_MOD 917>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&dmac0 0x17>, <&dmac0 0x18>, clocks = <&cpg CPG_MOD 719>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
<&dmac1 0x17>, <&dmac1 0x18>; <&scif_clk>;
dma-names = "tx", "rx", "tx", "rx"; clock-names = "fck", "brg_int", "scif_clk";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
resets = <&cpg 917>; <&dmac1 0x2b>, <&dmac1 0x2c>;
num-cs = <1>; dma-names = "tx", "rx", "tx", "rx";
#address-cells = <1>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#size-cells = <0>; resets = <&cpg 719>;
status = "disabled"; status = "disabled";
}; };
vin0: video@e6ef0000 { scif3: serial@e6ea8000 {
compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin"; compatible = "renesas,scif-r8a7794",
reg = <0 0xe6ef0000 0 0x1000>; "renesas,rcar-gen2-scif", "renesas,scif";
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ea8000 0 64>;
clocks = <&cpg CPG_MOD 811>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 718>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
resets = <&cpg 811>; <&scif_clk>;
status = "disabled"; clock-names = "fck", "brg_int", "scif_clk";
}; dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
<&dmac1 0x2f>, <&dmac1 0x30>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 718>;
status = "disabled";
};
vin1: video@e6ef1000 { scif4: serial@e6ee0000 {
compatible = "renesas,vin-r8a7794", "renesas,rcar-gen2-vin"; compatible = "renesas,scif-r8a7794",
reg = <0 0xe6ef1000 0 0x1000>; "renesas,rcar-gen2-scif", "renesas,scif";
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6ee0000 0 64>;
clocks = <&cpg CPG_MOD 810>; interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 715>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
resets = <&cpg 810>; <&scif_clk>;
status = "disabled"; clock-names = "fck", "brg_int", "scif_clk";
}; dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
<&dmac1 0xfb>, <&dmac1 0xfc>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 715>;
status = "disabled";
};
pci0: pci@ee090000 { scif5: serial@e6ee8000 {
compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2"; compatible = "renesas,scif-r8a7794",
device_type = "pci"; "renesas,rcar-gen2-scif", "renesas,scif";
reg = <0 0xee090000 0 0xc00>, reg = <0 0xe6ee8000 0 64>;
<0 0xee080000 0 0x1100>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 714>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
clocks = <&cpg CPG_MOD 703>; <&scif_clk>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clock-names = "fck", "brg_int", "scif_clk";
resets = <&cpg 703>; dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
status = "disabled"; <&dmac1 0xfd>, <&dmac1 0xfe>;
dma-names = "tx", "rx", "tx", "rx";
bus-range = <0 0>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#address-cells = <3>; resets = <&cpg 714>;
#size-cells = <2>; status = "disabled";
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
}; };
usb@2,0 { hscif0: serial@e62c0000 {
reg = <0x1000 0 0 0 0>; compatible = "renesas,hscif-r8a7794",
phys = <&usb0 0>; "renesas,rcar-gen2-hscif", "renesas,hscif";
phy-names = "usb"; reg = <0 0xe62c0000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 717>,
<&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
<&dmac1 0x39>, <&dmac1 0x3a>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 717>;
status = "disabled";
}; };
};
pci1: pci@ee0d0000 { hscif1: serial@e62c8000 {
compatible = "renesas,pci-r8a7794", "renesas,pci-rcar-gen2"; compatible = "renesas,hscif-r8a7794",
device_type = "pci"; "renesas,rcar-gen2-hscif", "renesas,hscif";
reg = <0 0xee0d0000 0 0xc00>, reg = <0 0xe62c8000 0 96>;
<0 0xee0c0000 0 0x1100>; interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 716>,
clocks = <&cpg CPG_MOD 703>; <&cpg CPG_CORE R8A7794_CLK_ZS>, <&scif_clk>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clock-names = "fck", "brg_int", "scif_clk";
resets = <&cpg 703>; dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
status = "disabled"; <&dmac1 0x4d>, <&dmac1 0x4e>;
dma-names = "tx", "rx", "tx", "rx";
bus-range = <1 1>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
#address-cells = <3>; resets = <&cpg 716>;
#size-cells = <2>; status = "disabled";
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x10800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
}; };
usb@2,0 { hscif2: serial@e62d0000 {
reg = <0x11000 0 0 0 0>; compatible = "renesas,hscif-r8a7794",
phys = <&usb2 0>; "renesas,rcar-gen2-hscif", "renesas,hscif";
phy-names = "usb"; reg = <0 0xe62d0000 0 96>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 713>, <&cpg CPG_CORE R8A7794_CLK_ZS>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
<&dmac1 0x3b>, <&dmac1 0x3c>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 713>;
status = "disabled";
}; };
};
hsusb: usb@e6590000 { can0: can@e6e80000 {
compatible = "renesas,usbhs-r8a7794", "renesas,rcar-gen2-usbhs"; compatible = "renesas,can-r8a7794",
reg = <0 0xe6590000 0 0x100>; "renesas,rcar-gen2-can";
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xe6e80000 0 0x1000>;
clocks = <&cpg CPG_MOD 704>; interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
resets = <&cpg 704>; <&can_clk>;
renesas,buswait = <4>; clock-names = "clkp1", "clkp2", "can_clk";
phys = <&usb0 1>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
phy-names = "usb"; resets = <&cpg 916>;
status = "disabled"; status = "disabled";
}; };
usbphy: usb-phy@e6590100 { can1: can@e6e88000 {
compatible = "renesas,usb-phy-r8a7794", compatible = "renesas,can-r8a7794",
"renesas,rcar-gen2-usb-phy"; "renesas,rcar-gen2-can";
reg = <0 0xe6590100 0 0x100>; reg = <0 0xe6e88000 0 0x1000>;
#address-cells = <1>; interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
#size-cells = <0>; clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
clocks = <&cpg CPG_MOD 704>; <&can_clk>;
clock-names = "usbhs"; clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 704>; resets = <&cpg 915>;
status = "disabled"; status = "disabled";
};
usb0: usb-channel@0 { vin0: video@e6ef0000 {
reg = <0>; compatible = "renesas,vin-r8a7794",
#phy-cells = <1>; "renesas,rcar-gen2-vin";
reg = <0 0xe6ef0000 0 0x1000>;
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 811>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 811>;
status = "disabled";
}; };
usb2: usb-channel@2 {
reg = <2>; vin1: video@e6ef1000 {
#phy-cells = <1>; compatible = "renesas,vin-r8a7794",
"renesas,rcar-gen2-vin";
reg = <0 0xe6ef1000 0 0x1000>;
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 810>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 810>;
status = "disabled";
}; };
};
vsp@fe928000 { rcar_sound: sound@ec500000 {
compatible = "renesas,vsp1"; /*
reg = <0 0xfe928000 0 0x8000>; * #sound-dai-cells is required
interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; *
clocks = <&cpg CPG_MOD 131>; * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
resets = <&cpg 131>; */
}; compatible = "renesas,rcar_sound-r8a7794",
"renesas,rcar_sound-gen2";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */
<0 0xec540000 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>, /* SSI */
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
clocks = <&cpg CPG_MOD 1005>,
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
<&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>,
<&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>,
<&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clka>, <&audio_clkb>, <&audio_clkc>,
<&cpg CPG_CORE R8A7794_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0",
"src.6", "src.5", "src.4", "src.3",
"src.2", "src.1",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>,
<&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>,
<&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
"ssi.1", "ssi.0";
status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma0 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma0 0xbe>;
dma-names = "tx";
};
};
vsp@fe930000 { rcar_sound,mix {
compatible = "renesas,vsp1"; mix0: mix-0 { };
reg = <0 0xfe930000 0 0x8000>; mix1: mix-1 { };
interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; };
clocks = <&cpg CPG_MOD 128>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 128>;
};
du: display@feb00000 { rcar_sound,ctu {
compatible = "renesas,du-r8a7794"; ctu00: ctu-0 { };
reg = <0 0xfeb00000 0 0x40000>; ctu01: ctu-1 { };
reg-names = "du"; ctu02: ctu-2 { };
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, ctu03: ctu-3 { };
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; ctu10: ctu-4 { };
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; ctu11: ctu-5 { };
clock-names = "du.0", "du.1"; ctu12: ctu-6 { };
status = "disabled"; ctu13: ctu-7 { };
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 { rcar_sound,src {
reg = <0>; src-0 {
du_out_rgb0: endpoint { status = "disabled";
};
src1: src-1 {
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x87>, <&audma0 0x9c>;
dma-names = "rx", "tx";
};
src2: src-2 {
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x89>, <&audma0 0x9e>;
dma-names = "rx", "tx";
};
src3: src-3 {
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8b>, <&audma0 0xa0>;
dma-names = "rx", "tx";
};
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma0 0xb0>;
dma-names = "rx", "tx";
};
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma0 0xb2>;
dma-names = "rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma0 0xb4>;
dma-names = "rx", "tx";
}; };
}; };
port@1 {
reg = <1>; rcar_sound,ssi {
du_out_rgb1: endpoint { ssi0: ssi-0 {
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x01>, <&audma0 0x02>,
<&audma0 0x15>, <&audma0 0x16>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x03>, <&audma0 0x04>,
<&audma0 0x49>, <&audma0 0x4a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma0 0x06>,
<&audma0 0x63>, <&audma0 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma0 0x08>,
<&audma0 0x6f>, <&audma0 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma0 0x0a>,
<&audma0 0x71>, <&audma0 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma0 0x0c>,
<&audma0 0x73>, <&audma0 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma0 0x0e>,
<&audma0 0x75>, <&audma0 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma0 0x10>,
<&audma0 0x79>, <&audma0 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma0 0x12>,
<&audma0 0x7b>, <&audma0 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma0 0x14>,
<&audma0 0x7d>, <&audma0 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
}; };
}; };
}; };
};
can0: can@e6e80000 {
compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can";
reg = <0 0xe6e80000 0 0x1000>;
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7794_CLK_RCAN>,
<&can_clk>;
clock-names = "clkp1", "clkp2", "can_clk";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 916>;
status = "disabled";
};
can1: can@e6e88000 { audma0: dma-controller@ec700000 {
compatible = "renesas,can-r8a7794", "renesas,rcar-gen2-can"; compatible = "renesas,dmac-r8a7794",
reg = <0 0xe6e88000 0 0x1000>; "renesas,rcar-dmac";
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xec700000 0 0x10000>;
clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7794_CLK_RCAN>, interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
<&can_clk>; GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
clock-names = "clkp1", "clkp2", "can_clk"; GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>; GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
resets = <&cpg 915>; GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
status = "disabled"; GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
}; GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
/* External root clock */ GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
extal_clk: extal { GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
compatible = "fixed-clock"; GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
#clock-cells = <0>; GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
/* This value must be overridden by the board. */ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
clock-frequency = <0>; GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
}; interrupt-names = "error",
"ch0", "ch1", "ch2", "ch3", "ch4",
/* External USB clock - can be overridden by the board */ "ch5", "ch6", "ch7", "ch8", "ch9",
usb_extal_clk: usb_extal { "ch10", "ch11",
compatible = "fixed-clock"; "ch12";
#clock-cells = <0>; clocks = <&cpg CPG_MOD 502>;
clock-frequency = <48000000>; clock-names = "fck";
}; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 502>;
/* External CAN clock */ #dma-cells = <1>;
can_clk: can { dma-channels = <13>;
compatible = "fixed-clock"; };
#clock-cells = <0>;
/* This value must be overridden by the board. */
clock-frequency = <0>;
};
/* External SCIF clock */ pci0: pci@ee090000 {
scif_clk: scif { compatible = "renesas,pci-r8a7794",
compatible = "fixed-clock"; "renesas,pci-rcar-gen2";
#clock-cells = <0>; device_type = "pci";
/* This value must be overridden by the board. */ reg = <0 0xee090000 0 0xc00>,
clock-frequency = <0>; <0 0xee080000 0 0x1100>;
}; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 703>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <0 0>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x800 0 0 0 0>;
phys = <&usb0 0>;
phy-names = "usb";
};
/* usb@2,0 {
* The external audio clocks are configured as 0 Hz fixed reg = <0x1000 0 0 0 0>;
* frequency clocks by default. Boards that provide audio phys = <&usb0 0>;
* clocks should override them. phy-names = "usb";
*/ };
audio_clka: audio_clka { };
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clkb: audio_clkb {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
audio_clkc: audio_clkc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
cpg: clock-controller@e6150000 { pci1: pci@ee0d0000 {
compatible = "renesas,r8a7794-cpg-mssr"; compatible = "renesas,pci-r8a7794",
reg = <0 0xe6150000 0 0x1000>; "renesas,pci-rcar-gen2";
clocks = <&extal_clk>, <&usb_extal_clk>; device_type = "pci";
clock-names = "extal", "usb_extal"; reg = <0 0xee0d0000 0 0xc00>,
#clock-cells = <2>; <0 0xee0c0000 0 0x1100>;
#power-domain-cells = <0>; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>; clocks = <&cpg CPG_MOD 703>;
}; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 703>;
status = "disabled";
bus-range = <1 1>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
interrupt-map-mask = <0xff00 0 0 0x7>;
interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
usb@1,0 {
reg = <0x10800 0 0 0 0>;
phys = <&usb2 0>;
phy-names = "usb";
};
rst: reset-controller@e6160000 { usb@2,0 {
compatible = "renesas,r8a7794-rst"; reg = <0x11000 0 0 0 0>;
reg = <0 0xe6160000 0 0x0100>; phys = <&usb2 0>;
}; phy-names = "usb";
};
};
prr: chipid@ff000044 { sdhi0: sd@ee100000 {
compatible = "renesas,prr"; compatible = "renesas,sdhi-r8a7794",
reg = <0 0xff000044 0 4>; "renesas,rcar-gen2-sdhi";
}; reg = <0 0xee100000 0 0x328>;
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 314>;
dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
<&dmac1 0xcd>, <&dmac1 0xce>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <195000000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 314>;
status = "disabled";
};
sysc: system-controller@e6180000 { sdhi1: sd@ee140000 {
compatible = "renesas,r8a7794-sysc"; compatible = "renesas,sdhi-r8a7794",
reg = <0 0xe6180000 0 0x0200>; "renesas,rcar-gen2-sdhi";
#power-domain-cells = <1>; reg = <0 0xee140000 0 0x100>;
}; interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 312>;
dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
<&dmac1 0xc1>, <&dmac1 0xc2>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 312>;
status = "disabled";
};
ipmmu_sy0: mmu@e6280000 { sdhi2: sd@ee160000 {
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; compatible = "renesas,sdhi-r8a7794",
reg = <0 0xe6280000 0 0x1000>; "renesas,rcar-gen2-sdhi";
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xee160000 0 0x100>;
<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 311>;
status = "disabled"; dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
}; <&dmac1 0xd3>, <&dmac1 0xd4>;
dma-names = "tx", "rx", "tx", "rx";
max-frequency = <97500000>;
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 311>;
status = "disabled";
};
ipmmu_sy1: mmu@e6290000 { mmcif0: mmc@ee200000 {
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; compatible = "renesas,mmcif-r8a7794",
reg = <0 0xe6290000 0 0x1000>; "renesas,sh-mmcif";
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>; reg = <0 0xee200000 0 0x80>;
#iommu-cells = <1>; interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled"; clocks = <&cpg CPG_MOD 315>;
}; dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
<&dmac1 0xd1>, <&dmac1 0xd2>;
dma-names = "tx", "rx", "tx", "rx";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 315>;
reg-io-width = <4>;
status = "disabled";
};
ipmmu_ds: mmu@e6740000 { ether: ethernet@ee700000 {
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; compatible = "renesas,ether-r8a7794",
reg = <0 0xe6740000 0 0x1000>; "renesas,rcar-gen2-ether";
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, reg = <0 0xee700000 0 0x400>;
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
#iommu-cells = <1>; clocks = <&cpg CPG_MOD 813>;
status = "disabled"; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
}; resets = <&cpg 813>;
phy-mode = "rmii";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
ipmmu_mp: mmu@ec680000 { gic: interrupt-controller@f1001000 {
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; compatible = "arm,gic-400";
reg = <0 0xec680000 0 0x1000>; #interrupt-cells = <3>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <0>;
#iommu-cells = <1>; interrupt-controller;
status = "disabled"; reg = <0 0xf1001000 0 0x1000>,
}; <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&cpg CPG_MOD 408>;
clock-names = "clk";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 408>;
};
ipmmu_mx: mmu@fe951000 { vsp@fe928000 {
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; compatible = "renesas,vsp1";
reg = <0 0xfe951000 0 0x1000>; reg = <0 0xfe928000 0 0x8000>;
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 131>;
#iommu-cells = <1>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 131>;
}; };
ipmmu_gp: mmu@e62a0000 { vsp@fe930000 {
compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; compatible = "renesas,vsp1";
reg = <0 0xe62a0000 0 0x1000>; reg = <0 0xfe930000 0 0x8000>;
interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>, interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
<GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 128>;
#iommu-cells = <1>; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
status = "disabled"; resets = <&cpg 128>;
}; };
rcar_sound: sound@ec500000 { du: display@feb00000 {
/* compatible = "renesas,du-r8a7794";
* #sound-dai-cells is required reg = <0 0xfeb00000 0 0x40000>;
* reg-names = "du";
* Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
* Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
*/ clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
compatible = "renesas,rcar_sound-r8a7794", clock-names = "du.0", "du.1";
"renesas,rcar_sound-gen2"; status = "disabled";
reg = <0 0xec500000 0 0x1000>, /* SCU */
<0 0xec5a0000 0 0x100>, /* ADG */ ports {
<0 0xec540000 0 0x1000>, /* SSIU */ #address-cells = <1>;
<0 0xec541000 0 0x280>, /* SSI */ #size-cells = <0>;
<0 0xec740000 0 0x200>; /* Audio DMAC peri peri */
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; port@0 {
reg = <0>;
clocks = <&cpg CPG_MOD 1005>, du_out_rgb0: endpoint {
<&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, };
<&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, };
<&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, port@1 {
<&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, reg = <1>;
<&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, du_out_rgb1: endpoint {
<&cpg CPG_MOD 1025>, <&cpg CPG_MOD 1026>, };
<&cpg CPG_MOD 1027>, <&cpg CPG_MOD 1028>, };
<&cpg CPG_MOD 1029>, <&cpg CPG_MOD 1030>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
<&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
<&audio_clka>, <&audio_clkb>, <&audio_clkc>,
<&cpg CPG_CORE R8A7794_CLK_M2>;
clock-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
"src.6", "src.5", "src.4", "src.3", "src.2",
"src.1",
"ctu.0", "ctu.1",
"mix.0", "mix.1",
"dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i";
power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 1005>,
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
<&cpg 1014>, <&cpg 1015>;
reset-names = "ssi-all",
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
status = "disabled";
rcar_sound,dvc {
dvc0: dvc-0 {
dmas = <&audma0 0xbc>;
dma-names = "tx";
};
dvc1: dvc-1 {
dmas = <&audma0 0xbe>;
dma-names = "tx";
}; };
}; };
rcar_sound,mix { prr: chipid@ff000044 {
mix0: mix-0 { }; compatible = "renesas,prr";
mix1: mix-1 { }; reg = <0 0xff000044 0 4>;
}; };
rcar_sound,ctu { cmt0: timer@ffca0000 {
ctu00: ctu-0 { }; compatible = "renesas,r8a7794-cmt0",
ctu01: ctu-1 { }; "renesas,rcar-gen2-cmt0";
ctu02: ctu-2 { }; reg = <0 0xffca0000 0 0x1004>;
ctu03: ctu-3 { }; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
ctu10: ctu-4 { }; <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
ctu11: ctu-5 { }; clocks = <&cpg CPG_MOD 124>;
ctu12: ctu-6 { }; clock-names = "fck";
ctu13: ctu-7 { }; power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
resets = <&cpg 124>;
status = "disabled";
}; };
rcar_sound,src { cmt1: timer@e6130000 {
src-0 { compatible = "renesas,r8a7794-cmt1",
status = "disabled"; "renesas,rcar-gen2-cmt1";
}; reg = <0 0xe6130000 0 0x1004>;
src1: src-1 { interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
dmas = <&audma0 0x87>, <&audma0 0x9c>; <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
dma-names = "rx", "tx"; <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
}; <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
src2: src-2 { <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
dmas = <&audma0 0x89>, <&audma0 0x9e>; <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
dma-names = "rx", "tx"; clocks = <&cpg CPG_MOD 329>;
}; clock-names = "fck";
src3: src-3 { power-domains = <&sysc R8A7794_PD_ALWAYS_ON>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; resets = <&cpg 329>;
dmas = <&audma0 0x8b>, <&audma0 0xa0>;
dma-names = "rx", "tx"; status = "disabled";
};
src4: src-4 {
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8d>, <&audma0 0xb0>;
dma-names = "rx", "tx";
};
src5: src-5 {
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x8f>, <&audma0 0xb2>;
dma-names = "rx", "tx";
};
src6: src-6 {
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x91>, <&audma0 0xb4>;
dma-names = "rx", "tx";
};
}; };
};
rcar_sound,ssi { timer {
ssi0: ssi-0 { compatible = "arm,armv7-timer";
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
dmas = <&audma0 0x01>, <&audma0 0x02>, <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<&audma0 0x15>, <&audma0 0x16>; <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
dma-names = "rx", "tx", "rxu", "txu"; <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
}; };
ssi1: ssi-1 {
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; /* External USB clock - can be overridden by the board */
dmas = <&audma0 0x03>, <&audma0 0x04>, usb_extal_clk: usb_extal {
<&audma0 0x49>, <&audma0 0x4a>; compatible = "fixed-clock";
dma-names = "rx", "tx", "rxu", "txu"; #clock-cells = <0>;
}; clock-frequency = <48000000>;
ssi2: ssi-2 {
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x05>, <&audma0 0x06>,
<&audma0 0x63>, <&audma0 0x64>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi3: ssi-3 {
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x07>, <&audma0 0x08>,
<&audma0 0x6f>, <&audma0 0x70>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi4: ssi-4 {
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x09>, <&audma0 0x0a>,
<&audma0 0x71>, <&audma0 0x72>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi5: ssi-5 {
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0b>, <&audma0 0x0c>,
<&audma0 0x73>, <&audma0 0x74>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi6: ssi-6 {
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0d>, <&audma0 0x0e>,
<&audma0 0x75>, <&audma0 0x76>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi7: ssi-7 {
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x0f>, <&audma0 0x10>,
<&audma0 0x79>, <&audma0 0x7a>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi8: ssi-8 {
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x11>, <&audma0 0x12>,
<&audma0 0x7b>, <&audma0 0x7c>;
dma-names = "rx", "tx", "rxu", "txu";
};
ssi9: ssi-9 {
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
dmas = <&audma0 0x13>, <&audma0 0x14>,
<&audma0 0x7d>, <&audma0 0x7e>;
dma-names = "rx", "tx", "rxu", "txu";
};
};
}; };
}; };
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