Commit ce65e47b authored by Paulo Zanoni's avatar Paulo Zanoni Committed by Daniel Vetter

drm/i915: don't increment the FBC threshold at fbc_enable

We first set the threshold value when we're allocating the CFB, and
then later at {ilk,gen7}_fbc_enable() we increment it in case we're
using 16bpp. While that is correct, it is dangerous: if we rework the
code a little bit in a way that allows us to call intel_fbc_enable()
without necessarily calling i915_gem_stolen_setup_compression() first,
we might end up incrementing threshold more than once. To prevent
that, increment a temporary variable instead.

v2: Rebase.
Signed-off-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent ca1543be
...@@ -188,14 +188,15 @@ static void ilk_fbc_enable(struct drm_crtc *crtc) ...@@ -188,14 +188,15 @@ static void ilk_fbc_enable(struct drm_crtc *crtc)
struct drm_i915_gem_object *obj = intel_fb_obj(fb); struct drm_i915_gem_object *obj = intel_fb_obj(fb);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
u32 dpfc_ctl; u32 dpfc_ctl;
int threshold = dev_priv->fbc.threshold;
dev_priv->fbc.enabled = true; dev_priv->fbc.enabled = true;
dpfc_ctl = DPFC_CTL_PLANE(intel_crtc->plane); dpfc_ctl = DPFC_CTL_PLANE(intel_crtc->plane);
if (drm_format_plane_cpp(fb->pixel_format, 0) == 2) if (drm_format_plane_cpp(fb->pixel_format, 0) == 2)
dev_priv->fbc.threshold++; threshold++;
switch (dev_priv->fbc.threshold) { switch (threshold) {
case 4: case 4:
case 3: case 3:
dpfc_ctl |= DPFC_CTL_LIMIT_4X; dpfc_ctl |= DPFC_CTL_LIMIT_4X;
...@@ -259,6 +260,7 @@ static void gen7_fbc_enable(struct drm_crtc *crtc) ...@@ -259,6 +260,7 @@ static void gen7_fbc_enable(struct drm_crtc *crtc)
struct drm_i915_gem_object *obj = intel_fb_obj(fb); struct drm_i915_gem_object *obj = intel_fb_obj(fb);
struct intel_crtc *intel_crtc = to_intel_crtc(crtc); struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
u32 dpfc_ctl; u32 dpfc_ctl;
int threshold = dev_priv->fbc.threshold;
dev_priv->fbc.enabled = true; dev_priv->fbc.enabled = true;
...@@ -267,9 +269,9 @@ static void gen7_fbc_enable(struct drm_crtc *crtc) ...@@ -267,9 +269,9 @@ static void gen7_fbc_enable(struct drm_crtc *crtc)
dpfc_ctl |= IVB_DPFC_CTL_PLANE(intel_crtc->plane); dpfc_ctl |= IVB_DPFC_CTL_PLANE(intel_crtc->plane);
if (drm_format_plane_cpp(fb->pixel_format, 0) == 2) if (drm_format_plane_cpp(fb->pixel_format, 0) == 2)
dev_priv->fbc.threshold++; threshold++;
switch (dev_priv->fbc.threshold) { switch (threshold) {
case 4: case 4:
case 3: case 3:
dpfc_ctl |= DPFC_CTL_LIMIT_4X; dpfc_ctl |= DPFC_CTL_LIMIT_4X;
......
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