Commit cfcdf40e authored by Christian Lamparter's avatar Christian Lamparter Committed by John W. Linville

drivers/net/wireless/p54/net2280.h: silence checkpatch.pl

Signed-off-by: default avatarChristian Lamparter <chunkeey@web.de>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent fb269710
...@@ -37,7 +37,7 @@ ...@@ -37,7 +37,7 @@
/* main registers, BAR0 + 0x0000 */ /* main registers, BAR0 + 0x0000 */
struct net2280_regs { struct net2280_regs {
// offset 0x0000 /* offset 0x0000 */
__le32 devinit; __le32 devinit;
#define LOCAL_CLOCK_FREQUENCY 8 #define LOCAL_CLOCK_FREQUENCY 8
#define FORCE_PCI_RESET 7 #define FORCE_PCI_RESET 7
...@@ -61,7 +61,7 @@ struct net2280_regs { ...@@ -61,7 +61,7 @@ struct net2280_regs {
#define EEPROM_WRITE_DATA 0 #define EEPROM_WRITE_DATA 0
__le32 eeclkfreq; __le32 eeclkfreq;
u32 _unused0; u32 _unused0;
// offset 0x0010 /* offset 0x0010 */
__le32 pciirqenb0; /* interrupt PCI master ... */ __le32 pciirqenb0; /* interrupt PCI master ... */
#define SETUP_PACKET_INTERRUPT_ENABLE 7 #define SETUP_PACKET_INTERRUPT_ENABLE 7
...@@ -131,7 +131,7 @@ struct net2280_regs { ...@@ -131,7 +131,7 @@ struct net2280_regs {
#define RESUME_INTERRUPT_ENABLE 1 #define RESUME_INTERRUPT_ENABLE 1
#define SOF_INTERRUPT_ENABLE 0 #define SOF_INTERRUPT_ENABLE 0
// offset 0x0020 /* offset 0x0020 */
u32 _unused1; u32 _unused1;
__le32 usbirqenb1; __le32 usbirqenb1;
#define USB_INTERRUPT_ENABLE 31 #define USB_INTERRUPT_ENABLE 31
...@@ -194,7 +194,7 @@ struct net2280_regs { ...@@ -194,7 +194,7 @@ struct net2280_regs {
#define SUSPEND_REQUEST_CHANGE_INTERRUPT 2 #define SUSPEND_REQUEST_CHANGE_INTERRUPT 2
#define RESUME_INTERRUPT 1 #define RESUME_INTERRUPT 1
#define SOF_INTERRUPT 0 #define SOF_INTERRUPT 0
// offset 0x0030 /* offset 0x0030 */
__le32 idxaddr; __le32 idxaddr;
__le32 idxdata; __le32 idxdata;
__le32 fifoctl; __le32 fifoctl;
...@@ -203,7 +203,7 @@ struct net2280_regs { ...@@ -203,7 +203,7 @@ struct net2280_regs {
#define PCI_BASE2_SELECT 2 #define PCI_BASE2_SELECT 2
#define FIFO_CONFIGURATION_SELECT 0 #define FIFO_CONFIGURATION_SELECT 0
u32 _unused2; u32 _unused2;
// offset 0x0040 /* offset 0x0040 */
__le32 memaddr; __le32 memaddr;
#define START 28 #define START 28
#define DIRECTION 27 #define DIRECTION 27
...@@ -212,7 +212,7 @@ struct net2280_regs { ...@@ -212,7 +212,7 @@ struct net2280_regs {
__le32 memdata0; __le32 memdata0;
__le32 memdata1; __le32 memdata1;
u32 _unused3; u32 _unused3;
// offset 0x0050 /* offset 0x0050 */
__le32 gpioctl; __le32 gpioctl;
#define GPIO3_LED_SELECT 12 #define GPIO3_LED_SELECT 12
#define GPIO3_INTERRUPT_ENABLE 11 #define GPIO3_INTERRUPT_ENABLE 11
...@@ -236,7 +236,7 @@ struct net2280_regs { ...@@ -236,7 +236,7 @@ struct net2280_regs {
/* usb control, BAR0 + 0x0080 */ /* usb control, BAR0 + 0x0080 */
struct net2280_usb_regs { struct net2280_usb_regs {
// offset 0x0080 /* offset 0x0080 */
__le32 stdrsp; __le32 stdrsp;
#define STALL_UNSUPPORTED_REQUESTS 31 #define STALL_UNSUPPORTED_REQUESTS 31
#define SET_TEST_MODE 16 #define SET_TEST_MODE 16
...@@ -274,7 +274,7 @@ struct net2280_usb_regs { ...@@ -274,7 +274,7 @@ struct net2280_usb_regs {
#define PME_WAKEUP_ENABLE 2 #define PME_WAKEUP_ENABLE 2
#define DEVICE_REMOTE_WAKEUP_ENABLE 1 #define DEVICE_REMOTE_WAKEUP_ENABLE 1
#define SELF_POWERED_STATUS 0 #define SELF_POWERED_STATUS 0
// offset 0x0090 /* offset 0x0090 */
__le32 usbstat; __le32 usbstat;
#define HIGH_SPEED 7 #define HIGH_SPEED 7
#define FULL_SPEED 6 #define FULL_SPEED 6
...@@ -290,7 +290,7 @@ struct net2280_usb_regs { ...@@ -290,7 +290,7 @@ struct net2280_usb_regs {
#define TERMINATION_SELECT 0 #define TERMINATION_SELECT 0
__le32 setup0123; __le32 setup0123;
__le32 setup4567; __le32 setup4567;
// offset 0x0090 /* offset 0x0090 */
u32 _unused0; u32 _unused0;
__le32 ouraddr; __le32 ouraddr;
#define FORCE_IMMEDIATE 7 #define FORCE_IMMEDIATE 7
...@@ -300,7 +300,7 @@ struct net2280_usb_regs { ...@@ -300,7 +300,7 @@ struct net2280_usb_regs {
/* pci control, BAR0 + 0x0100 */ /* pci control, BAR0 + 0x0100 */
struct net2280_pci_regs { struct net2280_pci_regs {
// offset 0x0100 /* offset 0x0100 */
__le32 pcimstctl; __le32 pcimstctl;
#define PCI_ARBITER_PARK_SELECT 13 #define PCI_ARBITER_PARK_SELECT 13
#define PCI_MULTI LEVEL_ARBITER 12 #define PCI_MULTI LEVEL_ARBITER 12
...@@ -330,7 +330,7 @@ struct net2280_pci_regs { ...@@ -330,7 +330,7 @@ struct net2280_pci_regs {
* that can be loaded into some of these registers. * that can be loaded into some of these registers.
*/ */
struct net2280_dma_regs { /* [11.7] */ struct net2280_dma_regs { /* [11.7] */
// offset 0x0180, 0x01a0, 0x01c0, 0x01e0, /* offset 0x0180, 0x01a0, 0x01c0, 0x01e0, */
__le32 dmactl; __le32 dmactl;
#define DMA_SCATTER_GATHER_DONE_INTERRUPT_ENABLE 25 #define DMA_SCATTER_GATHER_DONE_INTERRUPT_ENABLE 25
#define DMA_CLEAR_COUNT_ENABLE 21 #define DMA_CLEAR_COUNT_ENABLE 21
...@@ -353,7 +353,7 @@ struct net2280_dma_regs { /* [11.7] */ ...@@ -353,7 +353,7 @@ struct net2280_dma_regs { /* [11.7] */
#define DMA_ABORT 1 #define DMA_ABORT 1
#define DMA_START 0 #define DMA_START 0
u32 _unused0[2]; u32 _unused0[2];
// offset 0x0190, 0x01b0, 0x01d0, 0x01f0, /* offset 0x0190, 0x01b0, 0x01d0, 0x01f0, */
__le32 dmacount; __le32 dmacount;
#define VALID_BIT 31 #define VALID_BIT 31
#define DMA_DIRECTION 30 #define DMA_DIRECTION 30
...@@ -369,9 +369,9 @@ struct net2280_dma_regs { /* [11.7] */ ...@@ -369,9 +369,9 @@ struct net2280_dma_regs { /* [11.7] */
/* dedicated endpoint registers, BAR0 + 0x0200 */ /* dedicated endpoint registers, BAR0 + 0x0200 */
struct net2280_dep_regs { /* [11.8] */ struct net2280_dep_regs { /* [11.8] */
// offset 0x0200, 0x0210, 0x220, 0x230, 0x240 /* offset 0x0200, 0x0210, 0x220, 0x230, 0x240 */
__le32 dep_cfg; __le32 dep_cfg;
// offset 0x0204, 0x0214, 0x224, 0x234, 0x244 /* offset 0x0204, 0x0214, 0x224, 0x234, 0x244 */
__le32 dep_rsp; __le32 dep_rsp;
u32 _unused[2]; u32 _unused[2];
} __attribute__ ((packed)); } __attribute__ ((packed));
...@@ -381,7 +381,7 @@ struct net2280_dep_regs { /* [11.8] */ ...@@ -381,7 +381,7 @@ struct net2280_dep_regs { /* [11.8] */
* ep0 reserved for control; E and F have only 64 bytes of fifo * ep0 reserved for control; E and F have only 64 bytes of fifo
*/ */
struct net2280_ep_regs { /* [11.9] */ struct net2280_ep_regs { /* [11.9] */
// offset 0x0300, 0x0320, 0x0340, 0x0360, 0x0380, 0x03a0, 0x03c0 /* offset 0x0300, 0x0320, 0x0340, 0x0360, 0x0380, 0x03a0, 0x03c0 */
__le32 ep_cfg; __le32 ep_cfg;
#define ENDPOINT_BYTE_COUNT 16 #define ENDPOINT_BYTE_COUNT 16
#define ENDPOINT_ENABLE 10 #define ENDPOINT_ENABLE 10
...@@ -433,7 +433,7 @@ struct net2280_ep_regs { /* [11.9] */ ...@@ -433,7 +433,7 @@ struct net2280_ep_regs { /* [11.9] */
#define DATA_PACKET_TRANSMITTED_INTERRUPT 2 #define DATA_PACKET_TRANSMITTED_INTERRUPT 2
#define DATA_OUT_PING_TOKEN_INTERRUPT 1 #define DATA_OUT_PING_TOKEN_INTERRUPT 1
#define DATA_IN_TOKEN_INTERRUPT 0 #define DATA_IN_TOKEN_INTERRUPT 0
// offset 0x0310, 0x0330, 0x0350, 0x0370, 0x0390, 0x03b0, 0x03d0 /* offset 0x0310, 0x0330, 0x0350, 0x0370, 0x0390, 0x03b0, 0x03d0 */
__le32 ep_avail; __le32 ep_avail;
__le32 ep_data; __le32 ep_data;
u32 _unused0[2]; u32 _unused0[2];
......
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