Commit d07822a7 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'xgene-dts-fixes-for-v4.5' of https://github.com/AppliedMicro/xgene-next into next/dt64

Merge "Fixes for X-Gene DTS for v4.5" from Duc Dang:

This patch set fixes the node names of X-Gene I2C, GPIO
controller DT nodes; and also removes I2C clock nodes as
the same clock is shared between 2 I2C controllers
on X-Gene SoC.

* tag 'xgene-dts-fixes-for-v4.5' of https://github.com/AppliedMicro/xgene-next:
  arm64: dts: X-Gene v2: I2C1 clock is always on
  arm64: dts: X-Gene v1: I2C0 clock is always on
  arm64: dts: Fix to use standard DT node names for X-Gene 1 and X-Gene 2 platforms
parents d50a8b48 9ebf47bb
......@@ -334,19 +334,6 @@ rngpkaclk: rngpkaclk@17000000 {
clock-output-names = "rngpkaclk";
};
i2c1clk: i2c1clk@17000000 {
compatible = "apm,xgene-device-clock";
#clock-cells = <1>;
clocks = <&sbapbclk 0>;
reg = <0x0 0x17000000 0x0 0x2000>;
reg-names = "csr-reg";
csr-offset = <0xc>;
csr-mask = <0x4>;
enable-offset = <0x10>;
enable-mask = <0x4>;
clock-output-names = "i2c1clk";
};
i2c4clk: i2c4clk@1704c000 {
compatible = "apm,xgene-device-clock";
#clock-cells = <1>;
......@@ -476,6 +463,7 @@ serial0: serial@10600000 {
interrupts = <0x0 0x4c 0x4>;
};
/* Do not change dwusb name, coded for backward compatibility */
usb0: dwusb@19000000 {
status = "disabled";
compatible = "snps,dwc3";
......@@ -575,14 +563,14 @@ mmc0: mmc@1c000000 {
clocks = <&sdioclk 0>, <&ahbclk 0>;
};
gfcgpio: gfcgpio@1f63c000 {
gfcgpio: gpio@1f63c000 {
compatible = "apm,xgene-gpio";
reg = <0x0 0x1f63c000 0x0 0x40>;
gpio-controller;
#gpio-cells = <2>;
};
dwgpio: dwgpio@1c024000 {
dwgpio: gpio@1c024000 {
compatible = "snps,dw-apb-gpio";
reg = <0x0 0x1c024000 0x0 0x1000>;
reg-io-width = <4>;
......@@ -597,7 +585,7 @@ porta: gpio-controller@0 {
};
};
sbgpio: sbgpio@17001000{
sbgpio: gpio@17001000{
compatible = "apm,xgene-gpio-sb";
reg = <0x0 0x17001000 0x0 0x400>;
#gpio-cells = <2>;
......@@ -648,18 +636,18 @@ rng: rng@10520000 {
clocks = <&rngpkaclk 0>;
};
i2c1: i2c1@10511000 {
i2c1: i2c@10511000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,designware-i2c";
reg = <0x0 0x10511000 0x0 0x1000>;
interrupts = <0 0x45 0x4>;
#clock-cells = <1>;
clocks = <&i2c1clk 0>;
clocks = <&sbapbclk 0>;
bus_num = <1>;
};
i2c4: i2c4@10640000 {
i2c4: i2c@10640000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,designware-i2c";
......
......@@ -437,20 +437,6 @@ dmaclk: dmaclk@1f27c000 {
reg-names = "csr-reg";
clock-output-names = "dmaclk";
};
i2cclk: i2cclk@17000000 {
status = "disabled";
compatible = "apm,xgene-device-clock";
#clock-cells = <1>;
clocks = <&ahbclk 0>;
reg = <0x0 0x17000000 0x0 0x2000>;
reg-names = "csr-reg";
csr-offset = <0xc>;
csr-mask = <0x4>;
enable-offset = <0x10>;
enable-mask = <0x4>;
clock-output-names = "i2cclk";
};
};
msi: msi@79000000 {
......@@ -759,14 +745,14 @@ mmc0: mmc@1c000000 {
clocks = <&sdioclk 0>, <&ahbclk 0>;
};
gfcgpio: gfcgpio0@1701c000 {
gfcgpio: gpio0@1701c000 {
compatible = "apm,xgene-gpio";
reg = <0x0 0x1701c000 0x0 0x40>;
gpio-controller;
#gpio-cells = <2>;
};
dwgpio: dwgpio@1c024000 {
dwgpio: gpio@1c024000 {
compatible = "snps,dw-apb-gpio";
reg = <0x0 0x1c024000 0x0 0x1000>;
reg-io-width = <4>;
......@@ -781,7 +767,7 @@ porta: gpio-controller@0 {
};
};
i2c0: i2c0@10512000 {
i2c0: i2c@10512000 {
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
......@@ -789,7 +775,7 @@ i2c0: i2c0@10512000 {
reg = <0x0 0x10512000 0x0 0x1000>;
interrupts = <0 0x44 0x4>;
#clock-cells = <1>;
clocks = <&i2cclk 0>;
clocks = <&ahbclk 0>;
bus_num = <0>;
};
......@@ -886,7 +872,7 @@ usb1: dwusb@19800000 {
dr_mode = "host";
};
sbgpio: sbgpio@17001000{
sbgpio: gpio@17001000{
compatible = "apm,xgene-gpio-sb";
reg = <0x0 0x17001000 0x0 0x400>;
#gpio-cells = <2>;
......
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