Commit d2a3e093 authored by Martin Kepplinger's avatar Martin Kepplinger Committed by Jonathan Cameron

iio: mma8452: support either of the available interrupt pins

This change is important in order for everyone to be easily able to use the
driver for one of the supported accelerometer chips!

Until now, the driver blindly assumed that the INT1 interrupt line is wired
on a user's board. But these devices have 2 interrupt lines and can route
their interrupt sources to one of them. Now, if "INT2" is found and matches
i2c_client->irq, INT2 will be used.

The chip's default actually is INT2, which is why probably many boards will
have it wired and can make use of this.

Of course, this also falls back to assuming INT1, so for existing users
nothing will break. The new functionality is described in the bindings doc.
Signed-off-by: default avatarMartin Kepplinger <martin.kepplinger@theobroma-systems.com>
For the binding: Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: default avatarJonathan Cameron <jic23@kernel.org>
parent c3af8a28
...@@ -7,13 +7,18 @@ Required properties: ...@@ -7,13 +7,18 @@ Required properties:
* "fsl,mma8453" * "fsl,mma8453"
* "fsl,mma8652" * "fsl,mma8652"
* "fsl,mma8653" * "fsl,mma8653"
- reg: the I2C address of the chip - reg: the I2C address of the chip
Optional properties: Optional properties:
- interrupt-parent: should be the phandle for the interrupt controller - interrupt-parent: should be the phandle for the interrupt controller
- interrupts: interrupt mapping for GPIO IRQ - interrupts: interrupt mapping for GPIO IRQ
- interrupt-names: should contain "INT1" and/or "INT2", the accelerometer's
interrupt line in use.
Example: Example:
mma8453fc@1d { mma8453fc@1d {
...@@ -21,4 +26,5 @@ Example: ...@@ -21,4 +26,5 @@ Example:
reg = <0x1d>; reg = <0x1d>;
interrupt-parent = <&gpio1>; interrupt-parent = <&gpio1>;
interrupts = <5 0>; interrupts = <5 0>;
interrupt-names = "INT2";
}; };
...@@ -29,6 +29,7 @@ ...@@ -29,6 +29,7 @@
#include <linux/iio/events.h> #include <linux/iio/events.h>
#include <linux/delay.h> #include <linux/delay.h>
#include <linux/of_device.h> #include <linux/of_device.h>
#include <linux/of_irq.h>
#define MMA8452_STATUS 0x00 #define MMA8452_STATUS 0x00
#define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0)) #define MMA8452_STATUS_DRDY (BIT(2) | BIT(1) | BIT(0))
...@@ -1130,14 +1131,22 @@ static int mma8452_probe(struct i2c_client *client, ...@@ -1130,14 +1131,22 @@ static int mma8452_probe(struct i2c_client *client,
MMA8452_INT_FF_MT; MMA8452_INT_FF_MT;
int enabled_interrupts = MMA8452_INT_TRANS | int enabled_interrupts = MMA8452_INT_TRANS |
MMA8452_INT_FF_MT; MMA8452_INT_FF_MT;
int irq2;
/* Assume wired to INT1 pin */ irq2 = of_irq_get_byname(client->dev.of_node, "INT2");
if (irq2 == client->irq) {
dev_dbg(&client->dev, "using interrupt line INT2\n");
} else {
ret = i2c_smbus_write_byte_data(client, ret = i2c_smbus_write_byte_data(client,
MMA8452_CTRL_REG5, MMA8452_CTRL_REG5,
supported_interrupts); supported_interrupts);
if (ret < 0) if (ret < 0)
return ret; return ret;
dev_dbg(&client->dev, "using interrupt line INT1\n");
}
ret = i2c_smbus_write_byte_data(client, ret = i2c_smbus_write_byte_data(client,
MMA8452_CTRL_REG4, MMA8452_CTRL_REG4,
enabled_interrupts); enabled_interrupts);
......
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