Merge branch 'for-rmk/samsung3' of git://git.fluff.org/bjdooks/linux into devel-stable

Conflicts:
	arch/arm/Kconfig

arch/arm/Kconfig

@@ -671,6 +671,7 @@ config ARCH_S5P6440
 	select CPU_V6
 	select GENERIC_GPIO
 	select HAVE_CLK
+	select ARCH_USES_GETTIMEOFFSET
 	help
 	  Samsung S5P6440 CPU based systems
 
@@ -679,17 +680,19 @@ config ARCH_S5P6442
 	select CPU_V6
 	select GENERIC_GPIO
 	select HAVE_CLK
+	select ARCH_USES_GETTIMEOFFSET
 	help
 	  Samsung S5P6442 CPU based systems
 
-config ARCH_S5PC1XX
-	bool "Samsung S5PC1XX"
+config ARCH_S5PC100
+	bool "Samsung S5PC100"
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select CPU_V7
 	select ARM_L1_CACHE_SHIFT_6
+	select ARCH_USES_GETTIMEOFFSET
 	help
-	  Samsung S5PC1XX series based systems
+	  Samsung S5PC100 series based systems
 
 config ARCH_S5PV210
 	bool "Samsung S5PV210/S5PC110"
@@ -697,6 +700,7 @@ config ARCH_S5PV210
 	select GENERIC_GPIO
 	select HAVE_CLK
 	select ARM_L1_CACHE_SHIFT_6
+	select ARCH_USES_GETTIMEOFFSET
 	help
 	  Samsung S5PV210/S5PC110 series based systems
 
@@ -876,7 +880,7 @@ source "arch/arm/mach-sa1100/Kconfig"
 source "arch/arm/plat-samsung/Kconfig"
 source "arch/arm/plat-s3c24xx/Kconfig"
 source "arch/arm/plat-s5p/Kconfig"
-source "arch/arm/plat-s5pc1xx/Kconfig"
+
 source "arch/arm/plat-spear/Kconfig"
 
 if ARCH_S3C2410
@@ -896,9 +900,7 @@ source "arch/arm/mach-s5p6440/Kconfig"
 
 source "arch/arm/mach-s5p6442/Kconfig"
 
-if ARCH_S5PC1XX
 source "arch/arm/mach-s5pc100/Kconfig"
-endif
 
 source "arch/arm/mach-s5pv210/Kconfig"
 

arch/arm/Makefile

@@ -168,7 +168,7 @@ machine-$(CONFIG_ARCH_S3C24A0)		:= s3c24a0
 machine-$(CONFIG_ARCH_S3C64XX)		:= s3c64xx
 machine-$(CONFIG_ARCH_S5P6440)		:= s5p6440
 machine-$(CONFIG_ARCH_S5P6442)		:= s5p6442
-machine-$(CONFIG_ARCH_S5PC1XX)		:= s5pc100
+machine-$(CONFIG_ARCH_S5PC100)		:= s5pc100
 machine-$(CONFIG_ARCH_S5PV210)		:= s5pv210
 machine-$(CONFIG_ARCH_SA1100)		:= sa1100
 machine-$(CONFIG_ARCH_SHARK)		:= shark
@@ -198,7 +198,6 @@ plat-$(CONFIG_PLAT_NOMADIK)	:= nomadik
 plat-$(CONFIG_PLAT_ORION)	:= orion
 plat-$(CONFIG_PLAT_PXA)		:= pxa
 plat-$(CONFIG_PLAT_S3C24XX)	:= s3c24xx samsung
-plat-$(CONFIG_PLAT_S5PC1XX)	:= s5pc1xx samsung
 plat-$(CONFIG_PLAT_S5P)		:= s5p samsung
 plat-$(CONFIG_PLAT_SPEAR)	:= spear
 plat-$(CONFIG_PLAT_VERSATILE)	:= versatile

arch/arm/configs/s5p6440_defconfig

 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc2
-# Sat Jan  9 16:33:55 2010
+# Linux kernel version: 2.6.34
+# Sat May 22 03:18:18 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
+CONFIG_HAVE_PROC_CPU=y
 CONFIG_NO_IOPORT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
@@ -17,6 +18,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -30,6 +32,12 @@ CONFIG_BROKEN_ON_SMP=y
 CONFIG_INIT_ENV_ARG_LIMIT=32
 CONFIG_LOCALVERSION=""
 CONFIG_LOCALVERSION_AUTO=y
+CONFIG_HAVE_KERNEL_GZIP=y
+CONFIG_HAVE_KERNEL_LZO=y
+CONFIG_KERNEL_GZIP=y
+# CONFIG_KERNEL_BZIP2 is not set
+# CONFIG_KERNEL_LZMA is not set
+# CONFIG_KERNEL_LZO is not set
 CONFIG_SWAP=y
 # CONFIG_SYSVIPC is not set
 # CONFIG_BSD_PROCESS_ACCT is not set
@@ -46,7 +54,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -60,6 +67,7 @@ CONFIG_INITRAMFS_SOURCE=""
 CONFIG_RD_GZIP=y
 CONFIG_RD_BZIP2=y
 CONFIG_RD_LZMA=y
+CONFIG_RD_LZO=y
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
 CONFIG_ANON_INODES=y
@@ -81,10 +89,14 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
 
 #
 # Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
 CONFIG_COMPAT_BRK=y
@@ -167,6 +179,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
@@ -176,7 +189,6 @@ CONFIG_MMU=y
 # CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -193,44 +205,50 @@ CONFIG_MMU=y
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
 CONFIG_ARCH_S5P6440=y
+# CONFIG_ARCH_S5P6442 is not set
 # CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_S5PV210 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_BCMRING is not set
-# CONFIG_ARCH_U8500 is not set
 CONFIG_PLAT_SAMSUNG=y
-CONFIG_SAMSUNG_CLKSRC=y
-CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
-CONFIG_SAMSUNG_IRQ_UART=y
-CONFIG_SAMSUNG_GPIO_EXTRA=0
-CONFIG_PLAT_S3C=y
 
 #
 # Boot options
 #
 CONFIG_S3C_BOOT_ERROR_RESET=y
 CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
+CONFIG_SAMSUNG_CLKSRC=y
+CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
+CONFIG_SAMSUNG_IRQ_UART=y
+CONFIG_SAMSUNG_GPIOLIB_4BIT=y
+CONFIG_S3C_GPIO_CFG_S3C24XX=y
+CONFIG_S3C_GPIO_CFG_S3C64XX=y
+CONFIG_S3C_GPIO_PULL_UPDOWN=y
+CONFIG_SAMSUNG_GPIO_EXTRA=0
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
+# CONFIG_S3C_ADC is not set
 
 #
 # Power management
 #
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_S3C_GPIO_SPACE=0
-CONFIG_S3C_GPIO_TRACK=y
 CONFIG_PLAT_S5P=y
-CONFIG_CPU_S5P6440_INIT=y
-CONFIG_CPU_S5P6440_CLOCK=y
 CONFIG_CPU_S5P6440=y
 CONFIG_MACH_SMDK6440=y
 
@@ -258,6 +276,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_CPU_HAS_PMU=y
 # CONFIG_ARM_ERRATA_411920 is not set
 CONFIG_ARM_VIC=y
 CONFIG_ARM_VIC_NR=2
@@ -382,6 +401,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -518,12 +538,14 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=3
 # Non-8250 serial port support
 #
 CONFIG_SERIAL_SAMSUNG=y
+CONFIG_SERIAL_SAMSUNG_UARTS_4=y
 CONFIG_SERIAL_SAMSUNG_UARTS=4
 # CONFIG_SERIAL_SAMSUNG_DEBUG is not set
 CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_SERIAL_S5P6440=y
+CONFIG_SERIAL_S3C6400=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
@@ -549,6 +571,7 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 
 #
 # I2C GPIO expanders:
@@ -704,6 +727,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
@@ -962,8 +986,10 @@ CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 # CONFIG_LIBCRC32C is not set
 CONFIG_ZLIB_INFLATE=y
+CONFIG_LZO_DECOMPRESS=y
 CONFIG_DECOMPRESS_GZIP=y
 CONFIG_DECOMPRESS_BZIP2=y
 CONFIG_DECOMPRESS_LZMA=y
+CONFIG_DECOMPRESS_LZO=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_DMA=y

arch/arm/configs/s5p6442_defconfig

 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc4
-# Mon Jan 25 08:50:28 2010
+# Linux kernel version: 2.6.34
+# Sat May 22 03:18:19 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
+CONFIG_HAVE_PROC_CPU=y
 CONFIG_NO_IOPORT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
@@ -17,6 +18,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -52,7 +54,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -88,10 +89,14 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
 
 #
 # Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
 CONFIG_COMPAT_BRK=y
@@ -174,6 +179,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
@@ -183,7 +189,6 @@ CONFIG_MMU=y
 # CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -200,9 +205,11 @@ CONFIG_MMU=y
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
@@ -210,14 +217,22 @@ CONFIG_MMU=y
 # CONFIG_ARCH_S5P6440 is not set
 CONFIG_ARCH_S5P6442=y
 # CONFIG_ARCH_S5PC1XX is not set
+# CONFIG_ARCH_S5PV210 is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_BCMRING is not set
-# CONFIG_ARCH_U8500 is not set
 CONFIG_PLAT_SAMSUNG=y
+
+#
+# Boot options
+#
+# CONFIG_S3C_BOOT_ERROR_RESET is not set
+CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
+CONFIG_S3C_LOWLEVEL_UART_PORT=1
 CONFIG_SAMSUNG_CLKSRC=y
 CONFIG_SAMSUNG_IRQ_VIC_TIMER=y
 CONFIG_SAMSUNG_IRQ_UART=y
@@ -226,21 +241,13 @@ CONFIG_S3C_GPIO_CFG_S3C24XX=y
 CONFIG_S3C_GPIO_CFG_S3C64XX=y
 CONFIG_S3C_GPIO_PULL_UPDOWN=y
 CONFIG_SAMSUNG_GPIO_EXTRA=0
+CONFIG_S3C_GPIO_SPACE=0
+CONFIG_S3C_GPIO_TRACK=y
 # CONFIG_S3C_ADC is not set
 
 #
 # Power management
 #
-CONFIG_PLAT_S3C=y
-
-#
-# Boot options
-#
-# CONFIG_S3C_BOOT_ERROR_RESET is not set
-CONFIG_S3C_BOOT_UART_FORCE_FIFO=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_S3C_GPIO_SPACE=0
-CONFIG_S3C_GPIO_TRACK=y
 CONFIG_PLAT_S5P=y
 CONFIG_CPU_S5P6442=y
 CONFIG_MACH_SMDK6442=y
@@ -269,6 +276,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_DCACHE_DISABLE is not set
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_ARM_L1_CACHE_SHIFT=5
+CONFIG_CPU_HAS_PMU=y
 # CONFIG_ARM_ERRATA_411920 is not set
 CONFIG_ARM_VIC=y
 CONFIG_ARM_VIC_NR=2
@@ -394,6 +402,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -515,6 +524,7 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y
 CONFIG_SERIAL_S5PV210=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
@@ -540,6 +550,7 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 
 #
 # I2C GPIO expanders:
@@ -685,6 +696,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set

arch/arm/configs/s5pc100_defconfig

@@ -171,7 +171,7 @@ CONFIG_DEFAULT_IOSCHED="cfq"
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
 # CONFIG_ARCH_S3C64XX is not set
-CONFIG_ARCH_S5PC1XX=y
+CONFIG_ARCH_S5PC100=y
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_U300 is not set

arch/arm/configs/s5pc110_defconfig

 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc4
-# Wed Feb 24 15:36:54 2010
+# Linux kernel version: 2.6.34
+# Sat May 22 03:18:21 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
+CONFIG_HAVE_PROC_CPU=y
 CONFIG_NO_IOPORT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
@@ -17,6 +18,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_ARM_L1_CACHE_SHIFT_6=y
 CONFIG_VECTORS_BASE=0xffff0000
@@ -54,7 +56,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -90,10 +91,14 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
 
 #
 # Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
 CONFIG_COMPAT_BRK=y
@@ -176,6 +181,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
@@ -185,7 +191,6 @@ CONFIG_MMU=y
 # CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -202,9 +207,11 @@ CONFIG_MMU=y
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
@@ -216,10 +223,10 @@ CONFIG_ARCH_S5PV210=y
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_BCMRING is not set
-# CONFIG_ARCH_U8500 is not set
 CONFIG_PLAT_SAMSUNG=y
 
 #
@@ -274,6 +281,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_HAS_TLS_REG=y
 CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_CPU_HAS_PMU=y
 # CONFIG_ARM_ERRATA_430973 is not set
 # CONFIG_ARM_ERRATA_458693 is not set
 # CONFIG_ARM_ERRATA_460075 is not set
@@ -404,6 +412,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -526,6 +535,7 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y
 CONFIG_SERIAL_S5PV210=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
@@ -551,6 +561,7 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 
 #
 # I2C GPIO expanders:
@@ -696,6 +707,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set

arch/arm/configs/s5pv210_defconfig

 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.33-rc4
-# Wed Feb 24 15:36:16 2010
+# Linux kernel version: 2.6.34
+# Sat May 22 03:18:22 2010
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
 CONFIG_GENERIC_GPIO=y
+CONFIG_HAVE_PROC_CPU=y
 CONFIG_NO_IOPORT=y
 CONFIG_GENERIC_HARDIRQS=y
 CONFIG_STACKTRACE_SUPPORT=y
@@ -17,6 +18,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
 CONFIG_RWSEM_GENERIC_SPINLOCK=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_NEED_DMA_MAP_STATE=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_ARM_L1_CACHE_SHIFT_6=y
 CONFIG_VECTORS_BASE=0xffff0000
@@ -54,7 +56,6 @@ CONFIG_RCU_FANOUT=32
 # CONFIG_TREE_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=17
-# CONFIG_GROUP_SCHED is not set
 # CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
@@ -90,10 +91,14 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_PERF_USE_VMALLOC=y
 
 #
 # Kernel Performance Events And Counters
 #
+# CONFIG_PERF_EVENTS is not set
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
 CONFIG_SLUB_DEBUG=y
 CONFIG_COMPAT_BRK=y
@@ -176,6 +181,7 @@ CONFIG_MMU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_BCMRING is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_EBSA110 is not set
@@ -185,7 +191,6 @@ CONFIG_MMU=y
 # CONFIG_ARCH_STMP3XXX is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
-# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_IOP13XX is not set
 # CONFIG_ARCH_IOP32X is not set
 # CONFIG_ARCH_IOP33X is not set
@@ -202,9 +207,11 @@ CONFIG_MMU=y
 # CONFIG_ARCH_KS8695 is not set
 # CONFIG_ARCH_NS9XXX is not set
 # CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_NUC93X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
 # CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_SHMOBILE is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
@@ -216,10 +223,10 @@ CONFIG_ARCH_S5PV210=y
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_U8500 is not set
+# CONFIG_ARCH_NOMADIK is not set
 # CONFIG_ARCH_DAVINCI is not set
 # CONFIG_ARCH_OMAP is not set
-# CONFIG_ARCH_BCMRING is not set
-# CONFIG_ARCH_U8500 is not set
 CONFIG_PLAT_SAMSUNG=y
 
 #
@@ -274,6 +281,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_HAS_TLS_REG=y
 CONFIG_ARM_L1_CACHE_SHIFT=6
+CONFIG_CPU_HAS_PMU=y
 # CONFIG_ARM_ERRATA_430973 is not set
 # CONFIG_ARM_ERRATA_458693 is not set
 # CONFIG_ARM_ERRATA_460075 is not set
@@ -404,6 +412,7 @@ CONFIG_HAVE_IDE=y
 #
 # SCSI device support
 #
+CONFIG_SCSI_MOD=y
 # CONFIG_RAID_ATTRS is not set
 CONFIG_SCSI=y
 CONFIG_SCSI_DMA=y
@@ -526,6 +535,7 @@ CONFIG_SERIAL_SAMSUNG_CONSOLE=y
 CONFIG_SERIAL_S5PV210=y
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_TIMBERDALE is not set
 CONFIG_UNIX98_PTYS=y
 # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 CONFIG_LEGACY_PTYS=y
@@ -551,6 +561,7 @@ CONFIG_GPIOLIB=y
 #
 # Memory mapped GPIO expanders:
 #
+# CONFIG_GPIO_IT8761E is not set
 
 #
 # I2C GPIO expanders:
@@ -696,6 +707,7 @@ CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_BEFS_FS is not set
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
+# CONFIG_LOGFS is not set
 CONFIG_CRAMFS=y
 # CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set

arch/arm/mach-s3c2410/include/mach/map.h

@@ -114,6 +114,7 @@
 #define S3C_PA_USBHOST	S3C2410_PA_USBHOST
 #define S3C_PA_HSMMC0	    S3C2443_PA_HSMMC
 #define S3C_PA_HSMMC1	    S3C2416_PA_HSMMC0
+#define S3C_PA_WDT	    S3C2410_PA_WATCHDOG
 #define S3C_PA_NAND	    S3C24XX_PA_NAND
 
 #endif /* __ASM_ARCH_MAP_H */

arch/arm/mach-s3c64xx/Kconfig

@@ -7,6 +7,7 @@
 config PLAT_S3C64XX
 	bool
 	depends on ARCH_S3C64XX
+	select SAMSUNG_WAKEMASK
 	default y
 	help
 	  Base platform code for any Samsung S3C64XX device
@@ -35,6 +36,11 @@ config S3C64XX_SETUP_SDHCI
 	  Internal configuration for default SDHCI setup for S3C6400 and
 	  S3C6410 SoCs.
 
+config S3C64XX_DEV_ONENAND1
+	bool
+	help
+	  Compile in platform device definition for OneNAND1 controller
+
 # platform specific device setup
 
 config S3C64XX_SETUP_I2C0
@@ -90,8 +96,11 @@ config MACH_SMDK6410
 	select S3C_DEV_HSMMC1
 	select S3C_DEV_I2C1
 	select S3C_DEV_FB
+	select SAMSUNG_DEV_TS
 	select S3C_DEV_USB_HOST
 	select S3C_DEV_USB_HSOTG
+	select S3C_DEV_WDT
+	select HAVE_S3C2410_WATCHDOG
 	select S3C64XX_SETUP_SDHCI
 	select S3C64XX_SETUP_I2C1
 	select S3C64XX_SETUP_FB_24BPP
@@ -179,3 +188,34 @@ config MACH_HMT
 	select HAVE_PWM
 	help
 	  Machine support for the Airgoo HMT
+
+config MACH_SMARTQ
+	bool
+	select CPU_S3C6410
+	select S3C_DEV_HSMMC
+	select S3C_DEV_HSMMC1
+	select S3C_DEV_HSMMC2
+	select S3C_DEV_FB
+	select S3C_DEV_HWMON
+	select S3C_DEV_RTC
+	select S3C_DEV_USB_HSOTG
+	select S3C_DEV_USB_HOST
+	select S3C64XX_SETUP_SDHCI
+	select S3C64XX_SETUP_FB_24BPP
+	select SAMSUNG_DEV_ADC
+	select SAMSUNG_DEV_TS
+	select HAVE_PWM
+	help
+	    Shared machine support for SmartQ 5/7
+
+config MACH_SMARTQ5
+	bool "SmartQ 5"
+	select MACH_SMARTQ
+	help
+	    Machine support for the SmartQ 5
+
+config MACH_SMARTQ7
+	bool "SmartQ 7"
+	select MACH_SMARTQ
+	help
+	    Machine support for the SmartQ 7

arch/arm/mach-s3c64xx/Makefile

@@ -52,6 +52,9 @@ obj-$(CONFIG_MACH_SMDK6400)	+= mach-smdk6400.o
 obj-$(CONFIG_MACH_SMDK6410)	+= mach-smdk6410.o
 obj-$(CONFIG_MACH_NCP)		+= mach-ncp.o
 obj-$(CONFIG_MACH_HMT)		+= mach-hmt.o
+obj-$(CONFIG_MACH_SMARTQ)	+= mach-smartq.o
+obj-$(CONFIG_MACH_SMARTQ5)	+= mach-smartq5.o
+obj-$(CONFIG_MACH_SMARTQ7)	+= mach-smartq7.o
 
 # device support
 
@@ -59,3 +62,4 @@ obj-y				+= dev-uart.o
 obj-y				+= dev-audio.o
 obj-$(CONFIG_S3C64XX_DEV_SPI)	+= dev-spi.o
 obj-$(CONFIG_S3C64XX_DEV_TS)	+= dev-ts.o
+obj-$(CONFIG_S3C64XX_DEV_ONENAND1)	+= dev-onenand1.o

arch/arm/mach-s3c64xx/dev-onenand1.c

+/*
+ * linux/arch/arm/mach-s3c64xx/dev-onenand1.c
+ *
+ *  Copyright (c) 2008-2010 Samsung Electronics
+ *  Kyungmin Park <kyungmin.park@samsung.com>
+ *
+ * S3C64XX series device definition for OneNAND devices
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/onenand.h>
+
+#include <mach/irqs.h>
+#include <mach/map.h>
+
+static struct resource s3c64xx_onenand1_resources[] = {
+	[0] = {
+		.start	= S3C64XX_PA_ONENAND1,
+		.end	= S3C64XX_PA_ONENAND1 + 0x400 - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= S3C64XX_PA_ONENAND1_BUF,
+		.end	= S3C64XX_PA_ONENAND1_BUF + S3C64XX_SZ_ONENAND1_BUF - 1,
+		.flags	= IORESOURCE_MEM,
+	},
+	[2] = {
+		.start	= IRQ_ONENAND1,
+		.end	= IRQ_ONENAND1,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device s3c64xx_device_onenand1 = {
+	.name		= "samsung-onenand",
+	.id		= 1,
+	.num_resources	= ARRAY_SIZE(s3c64xx_onenand1_resources),
+	.resource	= s3c64xx_onenand1_resources,
+};
+
+void s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
+{
+	struct onenand_platform_data *pd;
+
+	pd = kmemdup(pdata, sizeof(struct onenand_platform_data), GFP_KERNEL);
+	if (!pd)
+		printk(KERN_ERR "%s: no memory for platform data\n", __func__);
+	s3c64xx_device_onenand1.dev.platform_data = pd;
+}

arch/arm/mach-s3c64xx/include/mach/irqs.h

@@ -212,5 +212,9 @@
 
 #define NR_IRQS	(IRQ_BOARD_END + 1)
 
+/* Compatibility */
+
+#define IRQ_ONENAND	IRQ_ONENAND0
+
 #endif /* __ASM_MACH_S3C64XX_IRQS_H */
 

arch/arm/mach-s3c64xx/include/mach/map.h

@@ -52,6 +52,16 @@
 
 #define S3C64XX_PA_SROM		(0x70000000)
 
+#define S3C64XX_PA_ONENAND0	(0x70100000)
+#define S3C64XX_PA_ONENAND0_BUF	(0x20000000)
+#define S3C64XX_SZ_ONENAND0_BUF (SZ_64M)
+
+/* NAND and OneNAND1 controllers occupy the same register region
+   (depending on SoC POP version) */
+#define S3C64XX_PA_ONENAND1	(0x70200000)
+#define S3C64XX_PA_ONENAND1_BUF	(0x28000000)
+#define S3C64XX_SZ_ONENAND1_BUF	(SZ_64M)
+
 #define S3C64XX_PA_NAND		(0x70200000)
 #define S3C64XX_PA_FB		(0x77100000)
 #define S3C64XX_PA_USB_HSOTG	(0x7C000000)
@@ -99,11 +109,15 @@
 #define S3C_PA_IIC		S3C64XX_PA_IIC0
 #define S3C_PA_IIC1		S3C64XX_PA_IIC1
 #define S3C_PA_NAND		S3C64XX_PA_NAND
+#define S3C_PA_ONENAND		S3C64XX_PA_ONENAND0
+#define S3C_PA_ONENAND_BUF	S3C64XX_PA_ONENAND0_BUF
+#define S3C_SZ_ONENAND_BUF	S3C64XX_SZ_ONENAND0_BUF
 #define S3C_PA_FB		S3C64XX_PA_FB
 #define S3C_PA_USBHOST		S3C64XX_PA_USBHOST
 #define S3C_PA_USB_HSOTG	S3C64XX_PA_USB_HSOTG
 #define S3C_VA_USB_HSPHY	S3C64XX_VA_USB_HSPHY
 #define S3C_PA_RTC		S3C64XX_PA_RTC
+#define S3C_PA_WDT		S3C64XX_PA_WATCHDOG
 
 #define SAMSUNG_PA_ADC		S3C64XX_PA_ADC
 

arch/arm/mach-s3c64xx/mach-smartq.c

+/*
+ * linux/arch/arm/mach-s3c64xx/mach-smartq.c
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/delay.h>
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/pwm_backlight.h>
+#include <linux/serial_core.h>
+#include <linux/usb/gpio_vbus.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/map.h>
+
+#include <mach/map.h>
+#include <mach/regs-gpio.h>
+#include <mach/regs-modem.h>
+
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/iic.h>
+#include <plat/gpio-cfg.h>
+#include <plat/hwmon.h>
+#include <plat/regs-serial.h>
+#include <plat/udc-hs.h>
+#include <plat/usb-control.h>
+#include <plat/sdhci.h>
+#include <plat/ts.h>
+
+#include <video/platform_lcd.h>
+
+#define UCON S3C2410_UCON_DEFAULT
+#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
+#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
+
+static struct s3c2410_uartcfg smartq_uartcfgs[] __initdata = {
+	[0] = {
+		.hwport	     = 0,
+		.flags	     = 0,
+		.ucon	     = UCON,
+		.ulcon	     = ULCON,
+		.ufcon	     = UFCON,
+	},
+	[1] = {
+		.hwport	     = 1,
+		.flags	     = 0,
+		.ucon	     = UCON,
+		.ulcon	     = ULCON,
+		.ufcon	     = UFCON,
+	},
+	[2] = {
+		.hwport	     = 2,
+		.flags	     = 0,
+		.ucon	     = UCON,
+		.ulcon	     = ULCON,
+		.ufcon	     = UFCON,
+	},
+};
+
+static void smartq_usb_host_powercontrol(int port, int to)
+{
+	pr_debug("%s(%d, %d)\n", __func__, port, to);
+
+	if (port == 0) {
+		gpio_set_value(S3C64XX_GPL(0), to);
+		gpio_set_value(S3C64XX_GPL(1), to);
+	}
+}
+
+static irqreturn_t smartq_usb_host_ocirq(int irq, void *pw)
+{
+	struct s3c2410_hcd_info *info = pw;
+
+	if (gpio_get_value(S3C64XX_GPL(10)) == 0) {
+		pr_debug("%s: over-current irq (oc detected)\n", __func__);
+		s3c2410_usb_report_oc(info, 3);
+	} else {
+		pr_debug("%s: over-current irq (oc cleared)\n", __func__);
+		s3c2410_usb_report_oc(info, 0);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static void smartq_usb_host_enableoc(struct s3c2410_hcd_info *info, int on)
+{
+	int ret;
+
+	/* This isn't present on a SmartQ 5 board */
+	if (machine_is_smartq5())
+		return;
+
+	if (on) {
+		ret = request_irq(gpio_to_irq(S3C64XX_GPL(10)),
+				  smartq_usb_host_ocirq, IRQF_DISABLED |
+				  IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
+				  "USB host overcurrent", info);
+		if (ret != 0)
+			pr_err("failed to request usb oc irq: %d\n", ret);
+	} else {
+		free_irq(gpio_to_irq(S3C64XX_GPL(10)), info);
+	}
+}
+
+static struct s3c2410_hcd_info smartq_usb_host_info = {
+	.port[0]	= {
+		.flags	= S3C_HCDFLG_USED
+	},
+	.port[1]	= {
+		.flags	= 0
+	},
+
+	.power_control	= smartq_usb_host_powercontrol,
+	.enable_oc	= smartq_usb_host_enableoc,
+};
+
+static struct gpio_vbus_mach_info smartq_usb_otg_vbus_pdata = {
+	.gpio_vbus		= S3C64XX_GPL(9),
+	.gpio_pullup		= -1,
+	.gpio_vbus_inverted	= true,
+};
+
+static struct platform_device smartq_usb_otg_vbus_dev = {
+	.name			= "gpio-vbus",
+	.dev.platform_data	= &smartq_usb_otg_vbus_pdata,
+};
+
+static int __init smartq_bl_init(struct device *dev)
+{
+    s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2));
+
+    return 0;
+}
+
+static struct platform_pwm_backlight_data smartq_backlight_data = {
+	.pwm_id		= 1,
+	.max_brightness	= 1000,
+	.dft_brightness	= 600,
+	.pwm_period_ns	= 1000000000 / (1000 * 20),
+	.init		= smartq_bl_init,
+};
+
+static struct platform_device smartq_backlight_device = {
+	.name		= "pwm-backlight",
+	.dev		= {
+		.parent	= &s3c_device_timer[1].dev,
+		.platform_data = &smartq_backlight_data,
+	},
+};
+
+static struct s3c2410_ts_mach_info smartq_touchscreen_pdata __initdata = {
+	.delay			= 65535,
+	.presc			= 99,
+	.oversampling_shift	= 4,
+};
+
+static struct s3c_sdhci_platdata smartq_internal_hsmmc_pdata = {
+	.max_width		= 4,
+	/*.broken_card_detection	= true,*/
+};
+
+static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = {
+	/* Battery voltage (?-4.2V) */
+	.in[0] = &(struct s3c_hwmon_chcfg) {
+		.name		= "smartq:battery-voltage",
+		.mult		= 3300,
+		.div		= 2048,
+	},
+	/* Reference voltage (1.2V) */
+	.in[1] = &(struct s3c_hwmon_chcfg) {
+		.name		= "smartq:reference-voltage",
+		.mult		= 3300,
+		.div		= 4096,
+	},
+};
+
+static void smartq_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
+{
+	gpio_direction_output(S3C64XX_GPM(3), power);
+}
+
+static struct plat_lcd_data smartq_lcd_power_data = {
+	.set_power	= smartq_lcd_power_set,
+};
+
+static struct platform_device smartq_lcd_power_device = {
+	.name			= "platform-lcd",
+	.dev.parent		= &s3c_device_fb.dev,
+	.dev.platform_data	= &smartq_lcd_power_data,
+};
+
+
+static struct platform_device *smartq_devices[] __initdata = {
+	&s3c_device_hsmmc1,	/* Init iNAND first, ... */
+	&s3c_device_hsmmc0,	/* ... then the external SD card */
+	&s3c_device_hsmmc2,
+	&s3c_device_adc,
+	&s3c_device_fb,
+	&s3c_device_hwmon,
+	&s3c_device_i2c0,
+	&s3c_device_ohci,
+	&s3c_device_rtc,
+	&s3c_device_timer[1],
+	&s3c_device_ts,
+	&s3c_device_usb_hsotg,
+	&smartq_backlight_device,
+	&smartq_lcd_power_device,
+	&smartq_usb_otg_vbus_dev,
+};
+
+static void __init smartq_lcd_mode_set(void)
+{
+	u32 tmp;
+
+	/* set the LCD type */
+	tmp = __raw_readl(S3C64XX_SPCON);
+	tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
+	tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
+	__raw_writel(tmp, S3C64XX_SPCON);
+
+	/* remove the LCD bypass */
+	tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
+	tmp &= ~MIFPCON_LCD_BYPASS;
+	__raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
+}
+
+static void smartq_power_off(void)
+{
+	gpio_direction_output(S3C64XX_GPK(15), 1);
+}
+
+static int __init smartq_power_off_init(void)
+{
+	int ret;
+
+	ret = gpio_request(S3C64XX_GPK(15), "Power control");
+	if (ret < 0) {
+		pr_err("%s: failed to get GPK15\n", __func__);
+		return ret;
+	}
+
+	/* leave power on */
+	gpio_direction_output(S3C64XX_GPK(15), 0);
+
+
+	pm_power_off = smartq_power_off;
+
+	return ret;
+}
+
+static int __init smartq_usb_host_init(void)
+{
+	int ret;
+
+	ret = gpio_request(S3C64XX_GPL(0), "USB power control");
+	if (ret < 0) {
+		pr_err("%s: failed to get GPL0\n", __func__);
+		return ret;
+	}
+
+	ret = gpio_request(S3C64XX_GPL(1), "USB host power control");
+	if (ret < 0) {
+		pr_err("%s: failed to get GPL1\n", __func__);
+		goto err;
+	}
+
+	if (!machine_is_smartq5()) {
+		/* This isn't present on a SmartQ 5 board */
+		ret = gpio_request(S3C64XX_GPL(10), "USB host overcurrent");
+		if (ret < 0) {
+			pr_err("%s: failed to get GPL10\n", __func__);
+			goto err2;
+		}
+	}
+
+	/* turn power off */
+	gpio_direction_output(S3C64XX_GPL(0), 0);
+	gpio_direction_output(S3C64XX_GPL(1), 0);
+	if (!machine_is_smartq5())
+		gpio_direction_input(S3C64XX_GPL(10));
+
+	s3c_device_ohci.dev.platform_data = &smartq_usb_host_info;
+
+	return 0;
+
+err2:
+	gpio_free(S3C64XX_GPL(1));
+err:
+	gpio_free(S3C64XX_GPL(0));
+	return ret;
+}
+
+static int __init smartq_usb_otg_init(void)
+{
+	clk_xusbxti.rate = 12000000;
+
+	return 0;
+}
+
+static int __init smartq_wifi_init(void)
+{
+	int ret;
+
+	ret = gpio_request(S3C64XX_GPK(1), "wifi control");
+	if (ret < 0) {
+		pr_err("%s: failed to get GPK1\n", __func__);
+		return ret;
+	}
+
+	ret = gpio_request(S3C64XX_GPK(2), "wifi reset");
+	if (ret < 0) {
+		pr_err("%s: failed to get GPK2\n", __func__);
+		gpio_free(S3C64XX_GPK(1));
+		return ret;
+	}
+
+	/* turn power on */
+	gpio_direction_output(S3C64XX_GPK(1), 1);
+
+	/* reset device */
+	gpio_direction_output(S3C64XX_GPK(2), 0);
+	mdelay(100);
+	gpio_set_value(S3C64XX_GPK(2), 1);
+	gpio_direction_input(S3C64XX_GPK(2));
+
+	return 0;
+}
+
+static struct map_desc smartq_iodesc[] __initdata = {};
+void __init smartq_map_io(void)
+{
+	s3c64xx_init_io(smartq_iodesc, ARRAY_SIZE(smartq_iodesc));
+	s3c24xx_init_clocks(12000000);
+	s3c24xx_init_uarts(smartq_uartcfgs, ARRAY_SIZE(smartq_uartcfgs));
+
+	smartq_lcd_mode_set();
+}
+
+void __init smartq_machine_init(void)
+{
+	s3c_i2c0_set_platdata(NULL);
+	s3c_hwmon_set_platdata(&smartq_hwmon_pdata);
+	s3c_sdhci1_set_platdata(&smartq_internal_hsmmc_pdata);
+	s3c_sdhci2_set_platdata(&smartq_internal_hsmmc_pdata);
+	s3c24xx_ts_set_platdata(&smartq_touchscreen_pdata);
+
+	WARN_ON(smartq_power_off_init());
+	WARN_ON(smartq_usb_host_init());
+	WARN_ON(smartq_usb_otg_init());
+	WARN_ON(smartq_wifi_init());
+
+	platform_add_devices(smartq_devices, ARRAY_SIZE(smartq_devices));
+}

arch/arm/mach-s3c64xx/mach-smartq.h

+/*
+ * linux/arch/arm/mach-s3c64xx/mach-smartq.h
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __MACH_SMARTQ_H
+#define __MACH_SMARTQ_H __FILE__
+
+#include <linux/init.h>
+
+extern void __init smartq_map_io(void);
+extern void __init smartq_machine_init(void);
+
+#endif /* __MACH_SMARTQ_H */

arch/arm/mach-s3c64xx/mach-smartq5.c

+/*
+ * linux/arch/arm/mach-s3c64xx/mach-smartq5.c
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/i2c-gpio.h>
+#include <linux/init.h>
+#include <linux/input.h>
+#include <linux/leds.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/map.h>
+#include <mach/regs-fb.h>
+#include <mach/regs-gpio.h>
+#include <mach/s3c6410.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/fb.h>
+#include <plat/gpio-cfg.h>
+
+#include "mach-smartq.h"
+
+static void __init smartq5_lcd_setup_gpio(void)
+{
+	gpio_request(S3C64XX_GPM(0), "LCD SCEN pin");
+	gpio_request(S3C64XX_GPM(1), "LCD SCL pin");
+	gpio_request(S3C64XX_GPM(2), "LCD SDA pin");
+	gpio_request(S3C64XX_GPM(3), "LCD power");
+
+	/* turn power off */
+	gpio_direction_output(S3C64XX_GPM(0), 1);
+	gpio_direction_input(S3C64XX_GPM(1));
+	gpio_direction_input(S3C64XX_GPM(2));
+	gpio_direction_output(S3C64XX_GPM(3), 0);
+}
+
+static struct i2c_gpio_platform_data smartq5_lcd_control = {
+	.sda_pin		= S3C64XX_GPM(2),
+	.scl_pin		= S3C64XX_GPM(1),
+};
+
+static struct platform_device smartq5_lcd_control_device = {
+	.name			= "i2c-gpio",
+	.id			= 1,
+	.dev.platform_data	= &smartq5_lcd_control,
+};
+
+static struct gpio_led smartq5_leds[] __initdata = {
+	{
+		.name			= "smartq5:green",
+		.active_low		= 1,
+		.gpio			= S3C64XX_GPN(8),
+	},
+	{
+		.name			= "smartq5:red",
+		.active_low		= 1,
+		.gpio			= S3C64XX_GPN(9),
+	},
+};
+
+static struct gpio_led_platform_data smartq5_led_data = {
+	.num_leds = ARRAY_SIZE(smartq5_leds),
+	.leds = smartq5_leds,
+};
+
+static struct platform_device smartq5_leds_device = {
+	.name			= "leds-gpio",
+	.id			= -1,
+	.dev.platform_data	= &smartq5_led_data,
+};
+
+/* Labels according to the SmartQ manual */
+static struct gpio_keys_button smartq5_buttons[] = {
+	{
+		.gpio			= S3C64XX_GPL(14),
+		.code			= KEY_POWER,
+		.desc			= "Power",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+	{
+		.gpio			= S3C64XX_GPN(2),
+		.code			= KEY_KPMINUS,
+		.desc			= "Minus",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+	{
+		.gpio			= S3C64XX_GPN(12),
+		.code			= KEY_KPPLUS,
+		.desc			= "Plus",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+	{
+		.gpio			= S3C64XX_GPN(15),
+		.code			= KEY_ENTER,
+		.desc			= "Move",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+};
+
+static struct gpio_keys_platform_data smartq5_buttons_data  = {
+	.buttons	= smartq5_buttons,
+	.nbuttons	= ARRAY_SIZE(smartq5_buttons),
+};
+
+static struct platform_device smartq5_buttons_device  = {
+	.name		= "gpio-keys",
+	.id		= 0,
+	.num_resources	= 0,
+	.dev		= {
+		.platform_data	= &smartq5_buttons_data,
+	}
+};
+
+static struct s3c_fb_pd_win smartq5_fb_win0 = {
+	.win_mode	= {
+		.pixclock	= 1000000000000ULL /
+				((40+1+216+800)*(10+1+35+480)*80),
+		.left_margin	= 40,
+		.right_margin	= 216,
+		.upper_margin	= 10,
+		.lower_margin	= 35,
+		.hsync_len	= 1,
+		.vsync_len	= 1,
+		.xres		= 800,
+		.yres		= 480,
+	},
+	.max_bpp	= 32,
+	.default_bpp	= 16,
+};
+
+static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = {
+	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
+	.win[0]		= &smartq5_fb_win0,
+	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
+			  VIDCON1_INV_VDEN,
+};
+
+static struct platform_device *smartq5_devices[] __initdata = {
+	&smartq5_leds_device,
+	&smartq5_buttons_device,
+	&smartq5_lcd_control_device,
+};
+
+static void __init smartq5_machine_init(void)
+{
+	s3c_fb_set_platdata(&smartq5_lcd_pdata);
+
+	smartq_machine_init();
+	smartq5_lcd_setup_gpio();
+
+	platform_add_devices(smartq5_devices, ARRAY_SIZE(smartq5_devices));
+}
+
+MACHINE_START(SMARTQ5, "SmartQ 5")
+	/* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
+	.phys_io	= S3C_PA_UART & 0xfff00000,
+	.io_pg_offst	= (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+	.boot_params	= S3C64XX_PA_SDRAM + 0x100,
+	.init_irq	= s3c6410_init_irq,
+	.map_io		= smartq_map_io,
+	.init_machine	= smartq5_machine_init,
+	.timer		= &s3c24xx_timer,
+MACHINE_END

arch/arm/mach-s3c64xx/mach-smartq7.c

+/*
+ * linux/arch/arm/mach-s3c64xx/mach-smartq7.c
+ *
+ * Copyright (C) 2010 Maurus Cuelenaere
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/fb.h>
+#include <linux/gpio.h>
+#include <linux/gpio_keys.h>
+#include <linux/i2c-gpio.h>
+#include <linux/init.h>
+#include <linux/input.h>
+#include <linux/leds.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+
+#include <mach/map.h>
+#include <mach/regs-fb.h>
+#include <mach/regs-gpio.h>
+#include <mach/s3c6410.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/fb.h>
+#include <plat/gpio-cfg.h>
+
+#include "mach-smartq.h"
+
+static void __init smartq7_lcd_setup_gpio(void)
+{
+	gpio_request(S3C64XX_GPM(0), "LCD CSB pin");
+	gpio_request(S3C64XX_GPM(3), "LCD power");
+	gpio_request(S3C64XX_GPM(4), "LCD power status");
+
+	/* turn power off */
+	gpio_direction_output(S3C64XX_GPM(0), 1);
+	gpio_direction_output(S3C64XX_GPM(3), 0);
+	gpio_direction_input(S3C64XX_GPM(4));
+}
+
+static struct i2c_gpio_platform_data smartq7_lcd_control = {
+	.sda_pin		= S3C64XX_GPM(2),
+	.scl_pin		= S3C64XX_GPM(1),
+	.sda_is_open_drain	= 1,
+	.scl_is_open_drain	= 1,
+};
+
+static struct platform_device smartq7_lcd_control_device = {
+	.name			= "i2c-gpio",
+	.id			= 1,
+	.dev.platform_data	= &smartq7_lcd_control,
+};
+
+static struct gpio_led smartq7_leds[] __initdata = {
+	{
+		.name			= "smartq7:red",
+		.active_low		= 1,
+		.gpio			= S3C64XX_GPN(8),
+	},
+	{
+		.name			= "smartq7:green",
+		.active_low		= 1,
+		.gpio			= S3C64XX_GPN(9),
+	},
+};
+
+static struct gpio_led_platform_data smartq7_led_data = {
+	.num_leds = ARRAY_SIZE(smartq7_leds),
+	.leds = smartq7_leds,
+};
+
+static struct platform_device smartq7_leds_device = {
+	.name			= "leds-gpio",
+	.id			= -1,
+	.dev.platform_data	= &smartq7_led_data,
+};
+
+/* Labels according to the SmartQ manual */
+static struct gpio_keys_button smartq7_buttons[] = {
+	{
+		.gpio			= S3C64XX_GPL(14),
+		.code			= KEY_POWER,
+		.desc			= "Power",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+	{
+		.gpio			= S3C64XX_GPN(2),
+		.code			= KEY_FN,
+		.desc			= "Function",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+	{
+		.gpio			= S3C64XX_GPN(3),
+		.code			= KEY_KPMINUS,
+		.desc			= "Minus",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+	{
+		.gpio			= S3C64XX_GPN(4),
+		.code			= KEY_KPPLUS,
+		.desc			= "Plus",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+	{
+		.gpio			= S3C64XX_GPN(12),
+		.code			= KEY_ENTER,
+		.desc			= "Enter",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+	{
+		.gpio			= S3C64XX_GPN(15),
+		.code			= KEY_ESC,
+		.desc			= "Cancel",
+		.active_low		= 1,
+		.debounce_interval	= 5,
+		.type                   = EV_KEY,
+	},
+};
+
+static struct gpio_keys_platform_data smartq7_buttons_data  = {
+	.buttons	= smartq7_buttons,
+	.nbuttons	= ARRAY_SIZE(smartq7_buttons),
+};
+
+static struct platform_device smartq7_buttons_device  = {
+	.name		= "gpio-keys",
+	.id		= 0,
+	.num_resources	= 0,
+	.dev		= {
+		.platform_data	= &smartq7_buttons_data,
+	}
+};
+
+static struct s3c_fb_pd_win smartq7_fb_win0 = {
+	.win_mode	= {
+		.pixclock	= 1000000000000ULL /
+				((3+10+5+800)*(1+3+20+480)*80),
+		.left_margin	= 3,
+		.right_margin	= 5,
+		.upper_margin	= 1,
+		.lower_margin	= 20,
+		.hsync_len	= 10,
+		.vsync_len	= 3,
+		.xres		= 800,
+		.yres		= 480,
+	},
+	.max_bpp	= 32,
+	.default_bpp	= 16,
+};
+
+static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = {
+	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
+	.win[0]		= &smartq7_fb_win0,
+	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
+	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
+			  VIDCON1_INV_VCLK,
+};
+
+static struct platform_device *smartq7_devices[] __initdata = {
+	&smartq7_leds_device,
+	&smartq7_buttons_device,
+	&smartq7_lcd_control_device,
+};
+
+static void __init smartq7_machine_init(void)
+{
+	s3c_fb_set_platdata(&smartq7_lcd_pdata);
+
+	smartq_machine_init();
+	smartq7_lcd_setup_gpio();
+
+	platform_add_devices(smartq7_devices, ARRAY_SIZE(smartq7_devices));
+}
+
+MACHINE_START(SMARTQ7, "SmartQ 7")
+	/* Maintainer: Maurus Cuelenaere <mcuelenaere AT gmail DOT com> */
+	.phys_io	= S3C_PA_UART & 0xfff00000,
+	.io_pg_offst	= (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+	.boot_params	= S3C64XX_PA_SDRAM + 0x100,
+	.init_irq	= s3c6410_init_irq,
+	.map_io		= smartq_map_io,
+	.init_machine	= smartq7_machine_init,
+	.timer		= &s3c24xx_timer,
+MACHINE_END

arch/arm/mach-s3c64xx/mach-smdk6410.c

@@ -64,6 +64,8 @@
 #include <plat/clock.h>
 #include <plat/devs.h>
 #include <plat/cpu.h>
+#include <plat/adc.h>
+#include <plat/ts.h>
 
 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
@@ -262,6 +264,9 @@ static struct platform_device *smdk6410_devices[] __initdata = {
 	&smdk6410_lcd_powerdev,
 
 	&smdk6410_smsc911x,
+	&s3c_device_adc,
+	&s3c_device_ts,
+	&s3c_device_wdt,
 };
 
 #ifdef CONFIG_REGULATOR
@@ -596,6 +601,12 @@ static struct i2c_board_info i2c_devs1[] __initdata = {
 	{ I2C_BOARD_INFO("24c128", 0x57), },	/* Samsung S524AD0XD1 */
 };
 
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+	.delay			= 10000,
+	.presc			= 49,
+	.oversampling_shift	= 2,
+};
+
 static void __init smdk6410_map_io(void)
 {
 	u32 tmp;
@@ -625,6 +636,8 @@ static void __init smdk6410_machine_init(void)
 	s3c_i2c1_set_platdata(NULL);
 	s3c_fb_set_platdata(&smdk6410_lcd_pdata);
 
+	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
 	/* configure nCS1 width to 16 bits */
 
 	cs1 = __raw_readl(S3C64XX_SROM_BW) &

arch/arm/mach-s3c64xx/pm.c

@@ -18,8 +18,11 @@
 #include <linux/io.h>
 
 #include <mach/map.h>
+#include <mach/irqs.h>
 
 #include <plat/pm.h>
+#include <plat/wakeup-mask.h>
+
 #include <mach/regs-sys.h>
 #include <mach/regs-gpio.h>
 #include <mach/regs-clock.h>
@@ -153,8 +156,25 @@ static void s3c64xx_cpu_suspend(void)
 	panic("sleep resumed to originator?");
 }
 
+/* mapping of interrupts to parts of the wakeup mask */
+static struct samsung_wakeup_mask wake_irqs[] = {
+	{ .irq = IRQ_RTC_ALARM,	.bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, },
+	{ .irq = IRQ_RTC_TIC,	.bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, },
+	{ .irq = IRQ_PENDN,	.bit = S3C64XX_PWRCFG_TS_DISABLE, },
+	{ .irq = IRQ_HSMMC0,	.bit = S3C64XX_PWRCFG_MMC0_DISABLE, },
+	{ .irq = IRQ_HSMMC1,	.bit = S3C64XX_PWRCFG_MMC1_DISABLE, },
+	{ .irq = IRQ_HSMMC2,	.bit = S3C64XX_PWRCFG_MMC2_DISABLE, },
+	{ .irq = NO_WAKEUP_IRQ,	.bit = S3C64XX_PWRCFG_BATF_DISABLE},
+	{ .irq = NO_WAKEUP_IRQ,	.bit = S3C64XX_PWRCFG_MSM_DISABLE },
+	{ .irq = NO_WAKEUP_IRQ,	.bit = S3C64XX_PWRCFG_HSI_DISABLE },
+	{ .irq = NO_WAKEUP_IRQ,	.bit = S3C64XX_PWRCFG_MSM_DISABLE },
+};
+
 static void s3c64xx_pm_prepare(void)
 {
+	samsung_sync_wakemask(S3C64XX_PWR_CFG,
+			      wake_irqs, ARRAY_SIZE(wake_irqs));
+
 	/* store address of resume. */
 	__raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0);
 

arch/arm/mach-s3c64xx/s3c6400.c

@@ -37,6 +37,7 @@
 #include <plat/clock.h>
 #include <plat/sdhci.h>
 #include <plat/iic-core.h>
+#include <plat/onenand-core.h>
 #include <mach/s3c6400.h>
 
 void __init s3c6400_map_io(void)
@@ -51,6 +52,9 @@ void __init s3c6400_map_io(void)
 	s3c_i2c0_setname("s3c2440-i2c");
 
 	s3c_device_nand.name = "s3c6400-nand";
+
+	s3c_onenand_setname("s3c6400-onenand");
+	s3c64xx_onenand1_setname("s3c6400-onenand");
 }
 
 void __init s3c6400_init_clocks(int xtal)

arch/arm/mach-s3c64xx/s3c6410.c

@@ -39,6 +39,7 @@
 #include <plat/sdhci.h>
 #include <plat/iic-core.h>
 #include <plat/adc.h>
+#include <plat/onenand-core.h>
 #include <mach/s3c6400.h>
 #include <mach/s3c6410.h>
 
@@ -55,6 +56,8 @@ void __init s3c6410_map_io(void)
 
 	s3c_device_adc.name	= "s3c64xx-adc";
 	s3c_device_nand.name = "s3c6400-nand";
+	s3c_onenand_setname("s3c6410-onenand");
+	s3c64xx_onenand1_setname("s3c6410-onenand");
 }
 
 void __init s3c6410_init_clocks(int xtal)

arch/arm/mach-s5p6440/Kconfig

@@ -16,6 +16,10 @@ config CPU_S5P6440
 config MACH_SMDK6440
 	bool "SMDK6440"
 	select CPU_S5P6440
+	select SAMSUNG_DEV_TS
+	select SAMSUNG_DEV_ADC
+	select S3C_DEV_WDT
+	select HAVE_S3C2410_WATCHDOG
 	help
 	  Machine support for the Samsung SMDK6440
 

arch/arm/mach-s5p6440/Makefile

@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6440)	+= mach-smdk6440.o
 
 # device support
 obj-y				+= dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI)	+= dev-spi.o

arch/arm/mach-s5p6440/cpu.c

@@ -61,6 +61,7 @@ static void s5p6440_idle(void)
 void __init s5p6440_map_io(void)
 {
 	/* initialize any device information early */
+	s3c_device_adc.name	= "s3c64xx-adc";
 }
 
 void __init s5p6440_init_clocks(int xtal)

arch/arm/mach-s5p6440/dev-spi.c

+/* linux/arch/arm/mach-s5p6440/dev-spi.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ *	Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/irqs.h>
+#include <mach/gpio.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64xx-spi.h>
+#include <plat/gpio-cfg.h>
+
+static char *spi_src_clks[] = {
+	[S5P6440_SPI_SRCCLK_PCLK] = "pclk",
+	[S5P6440_SPI_SRCCLK_SCLK] = "spi_epll",
+};
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the CS.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
+{
+	switch (pdev->id) {
+	case 0:
+		s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
+		s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
+		break;
+
+	case 1:
+		s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
+		s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
+		break;
+
+	default:
+		dev_err(&pdev->dev, "Invalid SPI Controller number!");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct resource s5p6440_spi0_resource[] = {
+	[0] = {
+		.start = S5P6440_PA_SPI0,
+		.end   = S5P6440_PA_SPI0 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_SPI0_TX,
+		.end   = DMACH_SPI0_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_SPI0_RX,
+		.end   = DMACH_SPI0_RX,
+		.flags = IORESOURCE_DMA,
+	},
+	[3] = {
+		.start = IRQ_SPI0,
+		.end   = IRQ_SPI0,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
+	.cfg_gpio = s5p6440_spi_cfg_gpio,
+	.fifo_lvl_mask = 0x1ff,
+	.rx_lvl_offset = 15,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s5p6440_device_spi0 = {
+	.name		  = "s3c64xx-spi",
+	.id		  = 0,
+	.num_resources	  = ARRAY_SIZE(s5p6440_spi0_resource),
+	.resource	  = s5p6440_spi0_resource,
+	.dev = {
+		.dma_mask		= &spi_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data = &s5p6440_spi0_pdata,
+	},
+};
+
+static struct resource s5p6440_spi1_resource[] = {
+	[0] = {
+		.start = S5P6440_PA_SPI1,
+		.end   = S5P6440_PA_SPI1 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_SPI1_TX,
+		.end   = DMACH_SPI1_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_SPI1_RX,
+		.end   = DMACH_SPI1_RX,
+		.flags = IORESOURCE_DMA,
+	},
+	[3] = {
+		.start = IRQ_SPI1,
+		.end   = IRQ_SPI1,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
+	.cfg_gpio = s5p6440_spi_cfg_gpio,
+	.fifo_lvl_mask = 0x7f,
+	.rx_lvl_offset = 15,
+};
+
+struct platform_device s5p6440_device_spi1 = {
+	.name		  = "s3c64xx-spi",
+	.id		  = 1,
+	.num_resources	  = ARRAY_SIZE(s5p6440_spi1_resource),
+	.resource	  = s5p6440_spi1_resource,
+	.dev = {
+		.dma_mask		= &spi_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data = &s5p6440_spi1_pdata,
+	},
+};
+
+void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+	struct s3c64xx_spi_info *pd;
+
+	/* Reject invalid configuration */
+	if (!num_cs || src_clk_nr < 0
+			|| src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
+		printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+		return;
+	}
+
+	switch (cntrlr) {
+	case 0:
+		pd = &s5p6440_spi0_pdata;
+		break;
+	case 1:
+		pd = &s5p6440_spi1_pdata;
+		break;
+	default:
+		printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+							__func__, cntrlr);
+		return;
+	}
+
+	pd->num_cs = num_cs;
+	pd->src_clk_nr = src_clk_nr;
+	pd->src_clk_name = spi_src_clks[src_clk_nr];
+}

arch/arm/mach-s5p6440/gpio.c

@@ -46,6 +46,7 @@ static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
 	void __iomem *base = ourchip->base;
 	void __iomem *regcon = base;
 	unsigned long con;
+	unsigned long flags;
 
 	switch (offset) {
 	case 6:
@@ -63,10 +64,14 @@ static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
 		break;
 	}
 
+	s3c_gpio_lock(ourchip, flags);
+
 	con = __raw_readl(regcon);
 	con &= ~(0xf << con_4bit_shift(offset));
 	__raw_writel(con, regcon);
 
+	s3c_gpio_unlock(ourchip, flags);
+
 	return 0;
 }
 
@@ -78,6 +83,7 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
 	void __iomem *regcon = base;
 	unsigned long con;
 	unsigned long dat;
+	unsigned long flags;
 	unsigned con_offset  = offset;
 
 	switch (con_offset) {
@@ -96,6 +102,8 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
 		break;
 	}
 
+	s3c_gpio_lock(ourchip, flags);
+
 	con = __raw_readl(regcon);
 	con &= ~(0xf << con_4bit_shift(con_offset));
 	con |= 0x1 << con_4bit_shift(con_offset);
@@ -109,6 +117,8 @@ static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
 	__raw_writel(con, regcon);
 	__raw_writel(dat, base + GPIODAT_OFF);
 
+	s3c_gpio_unlock(ourchip, flags);
+
 	return 0;
 }
 
@@ -117,6 +127,7 @@ int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
 {
 	void __iomem *reg = chip->base;
 	unsigned int shift;
+	unsigned long flags;
 	u32 con;
 
 	switch (off) {
@@ -142,11 +153,15 @@ int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
 		cfg <<= shift;
 	}
 
+	s3c_gpio_lock(chip, flags);
+
 	con = __raw_readl(reg);
 	con &= ~(0xf << shift);
 	con |= cfg;
 	__raw_writel(con, reg);
 
+	s3c_gpio_unlock(chip, flags);
+
 	return 0;
 }
 

arch/arm/mach-s5p6440/include/mach/map.h

@@ -54,6 +54,9 @@
 
 #define S5P6440_PA_IIC0		(0xEC104000)
 
+#define S5P6440_PA_SPI0		0xEC400000
+#define S5P6440_PA_SPI1		0xEC500000
+
 #define S5P6440_PA_HSOTG	(0xED100000)
 
 #define S5P6440_PA_HSMMC0	(0xED800000)
@@ -69,8 +72,13 @@
 /* PCM */
 #define S5P6440_PA_PCM		0xF2100000
 
+#define S5P6440_PA_ADC		(0xF3000000)
+
 /* compatibiltiy defines. */
 #define S3C_PA_UART		S5P6440_PA_UART
 #define S3C_PA_IIC		S5P6440_PA_IIC0
+#define S3C_PA_WDT		S5P6440_PA_WDT
+
+#define SAMSUNG_PA_ADC		S5P6440_PA_ADC
 
 #endif /* __ASM_ARCH_MAP_H */

arch/arm/mach-s5p6440/include/mach/spi-clocks.h

+/* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ *	Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __S5P6440_PLAT_SPI_CLKS_H
+#define __S5P6440_PLAT_SPI_CLKS_H __FILE__
+
+#define S5P6440_SPI_SRCCLK_PCLK		0
+#define S5P6440_SPI_SRCCLK_SCLK		1
+
+#endif /* __S5P6440_PLAT_SPI_CLKS_H */

arch/arm/mach-s5p6440/mach-smdk6440.c

@@ -38,6 +38,8 @@
 #include <plat/devs.h>
 #include <plat/cpu.h>
 #include <plat/pll.h>
+#include <plat/adc.h>
+#include <plat/ts.h>
 
 #define S5P6440_UCON_DEFAULT    (S3C2410_UCON_TXILEVEL |	\
 				S3C2410_UCON_RXILEVEL |		\
@@ -85,6 +87,15 @@ static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
 
 static struct platform_device *smdk6440_devices[] __initdata = {
 	&s5p6440_device_iis,
+	&s3c_device_adc,
+	&s3c_device_ts,
+	&s3c_device_wdt,
+};
+
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+	.delay			= 10000,
+	.presc			= 49,
+	.oversampling_shift	= 2,
 };
 
 static void __init smdk6440_map_io(void)
@@ -96,6 +107,8 @@ static void __init smdk6440_map_io(void)
 
 static void __init smdk6440_machine_init(void)
 {
+	s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
 	platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
 }
 

arch/arm/mach-s5p6442/Makefile

@@ -21,3 +21,4 @@ obj-$(CONFIG_MACH_SMDK6442)	+= mach-smdk6442.o
 
 # device support
 obj-y				+= dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI)	+= dev-spi.o

arch/arm/mach-s5p6442/dev-spi.c

+/* linux/arch/arm/mach-s5p6442/dev-spi.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ *	Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/irqs.h>
+#include <mach/gpio.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64xx-spi.h>
+#include <plat/gpio-cfg.h>
+
+static char *spi_src_clks[] = {
+	[S5P6442_SPI_SRCCLK_PCLK] = "pclk",
+	[S5P6442_SPI_SRCCLK_SCLK] = "spi_epll",
+};
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the CS.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int s5p6442_spi_cfg_gpio(struct platform_device *pdev)
+{
+	switch (pdev->id) {
+	case 0:
+		s3c_gpio_cfgpin(S5P6442_GPB(0), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5P6442_GPB(2), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5P6442_GPB(3), S3C_GPIO_SFN(2));
+		s3c_gpio_setpull(S5P6442_GPB(0), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5P6442_GPB(2), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5P6442_GPB(3), S3C_GPIO_PULL_UP);
+		break;
+
+	default:
+		dev_err(&pdev->dev, "Invalid SPI Controller number!");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct resource s5p6442_spi0_resource[] = {
+	[0] = {
+		.start = S5P6442_PA_SPI,
+		.end   = S5P6442_PA_SPI + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_SPI0_TX,
+		.end   = DMACH_SPI0_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_SPI0_RX,
+		.end   = DMACH_SPI0_RX,
+		.flags = IORESOURCE_DMA,
+	},
+	[3] = {
+		.start = IRQ_SPI0,
+		.end   = IRQ_SPI0,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c64xx_spi_info s5p6442_spi0_pdata = {
+	.cfg_gpio = s5p6442_spi_cfg_gpio,
+	.fifo_lvl_mask = 0x1ff,
+	.rx_lvl_offset = 15,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s5p6442_device_spi = {
+	.name		  = "s3c64xx-spi",
+	.id		  = 0,
+	.num_resources	  = ARRAY_SIZE(s5p6442_spi0_resource),
+	.resource	  = s5p6442_spi0_resource,
+	.dev = {
+		.dma_mask		= &spi_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data = &s5p6442_spi0_pdata,
+	},
+};
+
+void __init s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+	struct s3c64xx_spi_info *pd;
+
+	/* Reject invalid configuration */
+	if (!num_cs || src_clk_nr < 0
+			|| src_clk_nr > S5P6442_SPI_SRCCLK_SCLK) {
+		printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+		return;
+	}
+
+	switch (cntrlr) {
+	case 0:
+		pd = &s5p6442_spi0_pdata;
+		break;
+	default:
+		printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+							__func__, cntrlr);
+		return;
+	}
+
+	pd->num_cs = num_cs;
+	pd->src_clk_nr = src_clk_nr;
+	pd->src_clk_name = spi_src_clks[src_clk_nr];
+}

arch/arm/mach-s5p6442/include/mach/map.h

@@ -54,6 +54,8 @@
 #define S5P6442_PA_SDRAM	(0x20000000)
 #define S5P_PA_SDRAM		S5P6442_PA_SDRAM
 
+#define S5P6442_PA_SPI		0xEC300000
+
 /* I2S */
 #define S5P6442_PA_I2S0		0xC0B00000
 #define S5P6442_PA_I2S1		0xF2200000

arch/arm/mach-s5p6442/include/mach/spi-clocks.h

+/* linux/arch/arm/mach-s5p6442/include/mach/spi-clocks.h
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ *	Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __S5P6442_PLAT_SPI_CLKS_H
+#define __S5P6442_PLAT_SPI_CLKS_H __FILE__
+
+#define S5P6442_SPI_SRCCLK_PCLK		0
+#define S5P6442_SPI_SRCCLK_SCLK		1
+
+#endif /* __S5P6442_PLAT_SPI_CLKS_H */

arch/arm/mach-s5pc100/Kconfig

@@ -5,10 +5,13 @@
 
 # Configuration options for the S5PC100 CPU
 
+if ARCH_S5PC100
+
 config CPU_S5PC100
 	bool
-	select CPU_S5PC100_INIT
-	select CPU_S5PC100_CLOCK
+	select PLAT_S5P
+	select S5P_EXT_INT
+	select S3C_PL330_DMA
 	help
 	  Enable S5PC100 CPU support
 
@@ -17,16 +20,21 @@ config S5PC100_SETUP_FB_24BPP
 	help
 	  Common setup code for S5PC1XX with an 24bpp RGB display helper.
 
+config S5PC100_SETUP_I2C1
+	bool
+	help
+	  Common setup code for i2c bus 1.
+
 config S5PC100_SETUP_SDHCI
 	bool
-        select S5PC1XX_SETUP_SDHCI_GPIO
+	select S5PC100_SETUP_SDHCI_GPIO
 	help
 	  Internal helper functions for S5PC100 based SDHCI systems
 
-config S5PC100_SETUP_I2C1
+config S5PC100_SETUP_SDHCI_GPIO
 	bool
 	help
-	  Common setup code for i2c bus 1.
+	  Common setup code for SDHCI gpio.
 
 config MACH_SMDKC100
 	bool "SMDKC100"
@@ -41,3 +49,5 @@ config MACH_SMDKC100
 	select S5PC100_SETUP_SDHCI
 	help
 	  Machine support for the Samsung SMDKC100
+
+endif

arch/arm/mach-s5pc100/Makefile

@@ -11,14 +11,24 @@ obj-				:=
 
 # Core support for S5PC100 system
 
-obj-$(CONFIG_CPU_S5PC100)	+= cpu.o gpiolib.o
+obj-$(CONFIG_CPU_S5PC100)	+= cpu.o init.o clock.o gpiolib.o irq-gpio.o
 obj-$(CONFIG_CPU_S5PC100)	+= setup-i2c0.o
+obj-$(CONFIG_CPU_S5PC100)	+= dma.o
 
 # Helper and device support
 
 obj-$(CONFIG_S5PC100_SETUP_FB_24BPP)	+= setup-fb-24bpp.o
 obj-$(CONFIG_S5PC100_SETUP_I2C1)	+= setup-i2c1.o
 obj-$(CONFIG_S5PC100_SETUP_SDHCI)	+= setup-sdhci.o
+obj-$(CONFIG_S5PC100_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
+
+# device support
+obj-y				+= dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI)	+= dev-spi.o
 
 # machine support
+
 obj-$(CONFIG_MACH_SMDKC100)	+= mach-smdkc100.o
+
+# device support
+obj-y				+= dev-audio.o

arch/arm/mach-s5pc100/cpu.c

@@ -22,47 +22,55 @@
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 
-#include <asm/proc-fns.h>
-
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
 
+#include <asm/proc-fns.h>
+
 #include <mach/hardware.h>
 #include <mach/map.h>
 #include <asm/irq.h>
 
-#include <plat/cpu-freq.h>
 #include <plat/regs-serial.h>
-#include <plat/regs-power.h>
+#include <mach/regs-clock.h>
 
 #include <plat/cpu.h>
 #include <plat/devs.h>
 #include <plat/clock.h>
-#include <plat/sdhci.h>
 #include <plat/iic-core.h>
+#include <plat/sdhci.h>
+#include <plat/onenand-core.h>
+
 #include <plat/s5pc100.h>
 
 /* Initial IO mappings */
 
 static struct map_desc s5pc100_iodesc[] __initdata = {
+	{
+		.virtual	= (unsigned long)S5P_VA_SYSTIMER,
+		.pfn		= __phys_to_pfn(S5PC100_PA_SYSTIMER),
+		.length		= SZ_16K,
+		.type		= MT_DEVICE,
+	}, {
+		.virtual	= (unsigned long)VA_VIC2,
+		.pfn		= __phys_to_pfn(S5P_PA_VIC2),
+		.length		= SZ_16K,
+		.type		= MT_DEVICE,
+	}, {
+		.virtual	= (unsigned long)S5PC100_VA_OTHERS,
+		.pfn		= __phys_to_pfn(S5PC100_PA_OTHERS),
+		.length		= SZ_4K,
+		.type		= MT_DEVICE,
+	}
 };
 
 static void s5pc100_idle(void)
 {
-	unsigned long tmp;
-
-	tmp = __raw_readl(S5PC100_PWR_CFG);
-	tmp &= ~S5PC100_PWRCFG_CFG_DEEP_IDLE;
-	tmp &= ~S5PC100_PWRCFG_CFG_WFI_MASK;
-	tmp |= S5PC100_PWRCFG_CFG_WFI_DEEP_IDLE;
-	__raw_writel(tmp, S5PC100_PWR_CFG);
-
-	tmp = __raw_readl(S5PC100_OTHERS);
-	tmp |= S5PC100_PMU_INT_DISABLE;
-	__raw_writel(tmp, S5PC100_OTHERS);
-
+	if (!need_resched())
 		cpu_do_idle();
+
+	local_irq_enable();
 }
 
 /* s5pc100_map_io
@@ -82,26 +90,29 @@ void __init s5pc100_map_io(void)
 	/* the i2c devices are directly compatible with s3c2440 */
 	s3c_i2c0_setname("s3c2440-i2c");
 	s3c_i2c1_setname("s3c2440-i2c");
+
+	s3c_onenand_setname("s5pc100-onenand");
 }
 
 void __init s5pc100_init_clocks(int xtal)
 {
-	printk(KERN_DEBUG "%s: initialising clocks\n", __func__);
+	printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
 	s3c24xx_register_baseclocks(xtal);
-	s5pc1xx_register_clocks();
+	s5p_register_clocks(xtal);
 	s5pc100_register_clocks();
 	s5pc100_setup_clocks();
 }
 
 void __init s5pc100_init_irq(void)
 {
-	u32 vic_valid[] = {~0, ~0, ~0};
+	u32 vic[] = {~0, ~0, ~0};
 
 	/* VIC0, VIC1, and VIC2 are fully populated. */
-	s5pc1xx_init_irq(vic_valid, ARRAY_SIZE(vic_valid));
+	s5p_init_irq(vic, ARRAY_SIZE(vic));
 }
 
-struct sysdev_class s5pc100_sysclass = {
+static struct sysdev_class s5pc100_sysclass = {
 	.name	= "s5pc100-core",
 };
 
@@ -118,9 +129,10 @@ core_initcall(s5pc100_core_init);
 
 int __init s5pc100_init(void)
 {
-	printk(KERN_DEBUG "S5PC100: Initialising architecture\n");
+	printk(KERN_INFO "S5PC100: Initializing architecture\n");
 
-	s5pc1xx_idle = s5pc100_idle;
+	/* set idle function */
+	pm_idle = s5pc100_idle;
 
 	return sysdev_register(&s5pc100_sysdev);
 }

arch/arm/mach-s5pc100/dev-audio.c

+/* linux/arch/arm/mach-s5pc100/dev-audio.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co. Ltd
+ *	Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/audio.h>
+
+#include <mach/gpio.h>
+#include <mach/map.h>
+#include <mach/dma.h>
+#include <mach/irqs.h>
+
+static int s5pc100_cfg_i2s(struct platform_device *pdev)
+{
+	/* configure GPIO for i2s port */
+	switch (pdev->id) {
+	case 1:
+		s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(2));
+		break;
+
+	case 2:
+		s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(4));
+		s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(4));
+		s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(4));
+		s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(4));
+		s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(4));
+		break;
+
+	case -1: /* Dedicated pins */
+		break;
+
+	default:
+		printk(KERN_ERR "Invalid Device %d\n", pdev->id);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct s3c_audio_pdata s3c_i2s_pdata = {
+	.cfg_gpio = s5pc100_cfg_i2s,
+};
+
+static struct resource s5pc100_iis0_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_I2S0,
+		.end   = S5PC100_PA_I2S0 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_I2S0_TX,
+		.end   = DMACH_I2S0_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_I2S0_RX,
+		.end   = DMACH_I2S0_RX,
+		.flags = IORESOURCE_DMA,
+	},
+};
+
+struct platform_device s5pc100_device_iis0 = {
+	.name		  = "s3c64xx-iis-v4",
+	.id		  = -1,
+	.num_resources	  = ARRAY_SIZE(s5pc100_iis0_resource),
+	.resource	  = s5pc100_iis0_resource,
+	.dev = {
+		.platform_data = &s3c_i2s_pdata,
+	},
+};
+
+static struct resource s5pc100_iis1_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_I2S1,
+		.end   = S5PC100_PA_I2S1 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_I2S1_TX,
+		.end   = DMACH_I2S1_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_I2S1_RX,
+		.end   = DMACH_I2S1_RX,
+		.flags = IORESOURCE_DMA,
+	},
+};
+
+struct platform_device s5pc100_device_iis1 = {
+	.name		  = "s3c64xx-iis",
+	.id		  = 1,
+	.num_resources	  = ARRAY_SIZE(s5pc100_iis1_resource),
+	.resource	  = s5pc100_iis1_resource,
+	.dev = {
+		.platform_data = &s3c_i2s_pdata,
+	},
+};
+
+static struct resource s5pc100_iis2_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_I2S2,
+		.end   = S5PC100_PA_I2S2 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_I2S2_TX,
+		.end   = DMACH_I2S2_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_I2S2_RX,
+		.end   = DMACH_I2S2_RX,
+		.flags = IORESOURCE_DMA,
+	},
+};
+
+struct platform_device s5pc100_device_iis2 = {
+	.name		  = "s3c64xx-iis",
+	.id		  = 2,
+	.num_resources	  = ARRAY_SIZE(s5pc100_iis2_resource),
+	.resource	  = s5pc100_iis2_resource,
+	.dev = {
+		.platform_data = &s3c_i2s_pdata,
+	},
+};
+
+/* PCM Controller platform_devices */
+
+static int s5pc100_pcm_cfg_gpio(struct platform_device *pdev)
+{
+	switch (pdev->id) {
+	case 0:
+		s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(5));
+		s3c_gpio_cfgpin(S5PC100_GPG3(1), S3C_GPIO_SFN(5));
+		s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(5));
+		s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(5));
+		s3c_gpio_cfgpin(S5PC100_GPG3(4), S3C_GPIO_SFN(5));
+		break;
+
+	case 1:
+		s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(3));
+		s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(3));
+		s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(3));
+		s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(3));
+		s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(3));
+		break;
+
+	default:
+		printk(KERN_DEBUG "Invalid PCM Controller number!");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct s3c_audio_pdata s3c_pcm_pdata = {
+	.cfg_gpio = s5pc100_pcm_cfg_gpio,
+};
+
+static struct resource s5pc100_pcm0_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_PCM0,
+		.end   = S5PC100_PA_PCM0 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_PCM0_TX,
+		.end   = DMACH_PCM0_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_PCM0_RX,
+		.end   = DMACH_PCM0_RX,
+		.flags = IORESOURCE_DMA,
+	},
+};
+
+struct platform_device s5pc100_device_pcm0 = {
+	.name		  = "samsung-pcm",
+	.id		  = 0,
+	.num_resources	  = ARRAY_SIZE(s5pc100_pcm0_resource),
+	.resource	  = s5pc100_pcm0_resource,
+	.dev = {
+		.platform_data = &s3c_pcm_pdata,
+	},
+};
+
+static struct resource s5pc100_pcm1_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_PCM1,
+		.end   = S5PC100_PA_PCM1 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_PCM1_TX,
+		.end   = DMACH_PCM1_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_PCM1_RX,
+		.end   = DMACH_PCM1_RX,
+		.flags = IORESOURCE_DMA,
+	},
+};
+
+struct platform_device s5pc100_device_pcm1 = {
+	.name		  = "samsung-pcm",
+	.id		  = 1,
+	.num_resources	  = ARRAY_SIZE(s5pc100_pcm1_resource),
+	.resource	  = s5pc100_pcm1_resource,
+	.dev = {
+		.platform_data = &s3c_pcm_pdata,
+	},
+};
+
+/* AC97 Controller platform devices */
+
+static int s5pc100_ac97_cfg_gpio(struct platform_device *pdev)
+{
+	s3c_gpio_cfgpin(S5PC100_GPC(0), S3C_GPIO_SFN(4));
+	s3c_gpio_cfgpin(S5PC100_GPC(1), S3C_GPIO_SFN(4));
+	s3c_gpio_cfgpin(S5PC100_GPC(2), S3C_GPIO_SFN(4));
+	s3c_gpio_cfgpin(S5PC100_GPC(3), S3C_GPIO_SFN(4));
+	s3c_gpio_cfgpin(S5PC100_GPC(4), S3C_GPIO_SFN(4));
+
+	return 0;
+}
+
+static struct resource s5pc100_ac97_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_AC97,
+		.end   = S5PC100_PA_AC97 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_AC97_PCMOUT,
+		.end   = DMACH_AC97_PCMOUT,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_AC97_PCMIN,
+		.end   = DMACH_AC97_PCMIN,
+		.flags = IORESOURCE_DMA,
+	},
+	[3] = {
+		.start = DMACH_AC97_MICIN,
+		.end   = DMACH_AC97_MICIN,
+		.flags = IORESOURCE_DMA,
+	},
+	[4] = {
+		.start = IRQ_AC97,
+		.end   = IRQ_AC97,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c_audio_pdata s3c_ac97_pdata = {
+	.cfg_gpio = s5pc100_ac97_cfg_gpio,
+};
+
+static u64 s5pc100_ac97_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s5pc100_device_ac97 = {
+	.name		  = "s3c-ac97",
+	.id		  = -1,
+	.num_resources	  = ARRAY_SIZE(s5pc100_ac97_resource),
+	.resource	  = s5pc100_ac97_resource,
+	.dev = {
+		.platform_data = &s3c_ac97_pdata,
+		.dma_mask = &s5pc100_ac97_dmamask,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
+	},
+};

arch/arm/mach-s5pc100/dev-spi.c

+/* linux/arch/arm/mach-s5pc100/dev-spi.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ *	Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/gpio.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64xx-spi.h>
+#include <plat/gpio-cfg.h>
+#include <plat/irqs.h>
+
+static char *spi_src_clks[] = {
+	[S5PC100_SPI_SRCCLK_PCLK] = "pclk",
+	[S5PC100_SPI_SRCCLK_48M] = "spi_48m",
+	[S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus",
+};
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the CS.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int s5pc100_spi_cfg_gpio(struct platform_device *pdev)
+{
+	switch (pdev->id) {
+	case 0:
+		s3c_gpio_cfgpin(S5PC100_GPB(0), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5PC100_GPB(1), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5PC100_GPB(2), S3C_GPIO_SFN(2));
+		s3c_gpio_setpull(S5PC100_GPB(0), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5PC100_GPB(1), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5PC100_GPB(2), S3C_GPIO_PULL_UP);
+		break;
+
+	case 1:
+		s3c_gpio_cfgpin(S5PC100_GPB(4), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5PC100_GPB(5), S3C_GPIO_SFN(2));
+		s3c_gpio_cfgpin(S5PC100_GPB(6), S3C_GPIO_SFN(2));
+		s3c_gpio_setpull(S5PC100_GPB(4), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5PC100_GPB(5), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5PC100_GPB(6), S3C_GPIO_PULL_UP);
+		break;
+
+	case 2:
+		s3c_gpio_cfgpin(S5PC100_GPG3(0), S3C_GPIO_SFN(3));
+		s3c_gpio_cfgpin(S5PC100_GPG3(2), S3C_GPIO_SFN(3));
+		s3c_gpio_cfgpin(S5PC100_GPG3(3), S3C_GPIO_SFN(3));
+		s3c_gpio_setpull(S5PC100_GPG3(0), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5PC100_GPG3(2), S3C_GPIO_PULL_UP);
+		s3c_gpio_setpull(S5PC100_GPG3(3), S3C_GPIO_PULL_UP);
+		break;
+
+	default:
+		dev_err(&pdev->dev, "Invalid SPI Controller number!");
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static struct resource s5pc100_spi0_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_SPI0,
+		.end   = S5PC100_PA_SPI0 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_SPI0_TX,
+		.end   = DMACH_SPI0_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_SPI0_RX,
+		.end   = DMACH_SPI0_RX,
+		.flags = IORESOURCE_DMA,
+	},
+	[3] = {
+		.start = IRQ_SPI0,
+		.end   = IRQ_SPI0,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c64xx_spi_info s5pc100_spi0_pdata = {
+	.cfg_gpio = s5pc100_spi_cfg_gpio,
+	.fifo_lvl_mask = 0x7f,
+	.rx_lvl_offset = 13,
+	.high_speed = 1,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s5pc100_device_spi0 = {
+	.name		  = "s3c64xx-spi",
+	.id		  = 0,
+	.num_resources	  = ARRAY_SIZE(s5pc100_spi0_resource),
+	.resource	  = s5pc100_spi0_resource,
+	.dev = {
+		.dma_mask		= &spi_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data = &s5pc100_spi0_pdata,
+	},
+};
+
+static struct resource s5pc100_spi1_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_SPI1,
+		.end   = S5PC100_PA_SPI1 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_SPI1_TX,
+		.end   = DMACH_SPI1_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_SPI1_RX,
+		.end   = DMACH_SPI1_RX,
+		.flags = IORESOURCE_DMA,
+	},
+	[3] = {
+		.start = IRQ_SPI1,
+		.end   = IRQ_SPI1,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c64xx_spi_info s5pc100_spi1_pdata = {
+	.cfg_gpio = s5pc100_spi_cfg_gpio,
+	.fifo_lvl_mask = 0x7f,
+	.rx_lvl_offset = 13,
+	.high_speed = 1,
+};
+
+struct platform_device s5pc100_device_spi1 = {
+	.name		  = "s3c64xx-spi",
+	.id		  = 1,
+	.num_resources	  = ARRAY_SIZE(s5pc100_spi1_resource),
+	.resource	  = s5pc100_spi1_resource,
+	.dev = {
+		.dma_mask		= &spi_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data = &s5pc100_spi1_pdata,
+	},
+};
+
+static struct resource s5pc100_spi2_resource[] = {
+	[0] = {
+		.start = S5PC100_PA_SPI2,
+		.end   = S5PC100_PA_SPI2 + 0x100 - 1,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start = DMACH_SPI2_TX,
+		.end   = DMACH_SPI2_TX,
+		.flags = IORESOURCE_DMA,
+	},
+	[2] = {
+		.start = DMACH_SPI2_RX,
+		.end   = DMACH_SPI2_RX,
+		.flags = IORESOURCE_DMA,
+	},
+	[3] = {
+		.start = IRQ_SPI2,
+		.end   = IRQ_SPI2,
+		.flags = IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c64xx_spi_info s5pc100_spi2_pdata = {
+	.cfg_gpio = s5pc100_spi_cfg_gpio,
+	.fifo_lvl_mask = 0x7f,
+	.rx_lvl_offset = 13,
+	.high_speed = 1,
+};
+
+struct platform_device s5pc100_device_spi2 = {
+	.name		  = "s3c64xx-spi",
+	.id		  = 2,
+	.num_resources	  = ARRAY_SIZE(s5pc100_spi2_resource),
+	.resource	  = s5pc100_spi2_resource,
+	.dev = {
+		.dma_mask		= &spi_dmamask,
+		.coherent_dma_mask	= DMA_BIT_MASK(32),
+		.platform_data = &s5pc100_spi2_pdata,
+	},
+};
+
+void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+	struct s3c64xx_spi_info *pd;
+
+	/* Reject invalid configuration */
+	if (!num_cs || src_clk_nr < 0
+			|| src_clk_nr > S5PC100_SPI_SRCCLK_SPIBUS) {
+		printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+		return;
+	}
+
+	switch (cntrlr) {
+	case 0:
+		pd = &s5pc100_spi0_pdata;
+		break;
+	case 1:
+		pd = &s5pc100_spi1_pdata;
+		break;
+	case 2:
+		pd = &s5pc100_spi2_pdata;
+		break;
+	default:
+		printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+							__func__, cntrlr);
+		return;
+	}
+
+	pd->num_cs = num_cs;
+	pd->src_clk_nr = src_clk_nr;
+	pd->src_clk_name = spi_src_clks[src_clk_nr];
+}

arch/arm/mach-s5pc100/dma.c

+/*
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ *	Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+
+#include <plat/devs.h>
+
+#include <mach/map.h>
+#include <mach/irqs.h>
+
+#include <plat/s3c-pl330-pdata.h>
+
+static u64 dma_dmamask = DMA_BIT_MASK(32);
+
+static struct resource s5pc100_pdma0_resource[] = {
+	[0] = {
+		.start  = S5PC100_PA_PDMA0,
+		.end    = S5PC100_PA_PDMA0 + SZ_4K,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_PDMA0,
+		.end	= IRQ_PDMA0,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c_pl330_platdata s5pc100_pdma0_pdata = {
+	.peri = {
+		[0] = DMACH_UART0_RX,
+		[1] = DMACH_UART0_TX,
+		[2] = DMACH_UART1_RX,
+		[3] = DMACH_UART1_TX,
+		[4] = DMACH_UART2_RX,
+		[5] = DMACH_UART2_TX,
+		[6] = DMACH_UART3_RX,
+		[7] = DMACH_UART3_TX,
+		[8] = DMACH_IRDA,
+		[9] = DMACH_I2S0_RX,
+		[10] = DMACH_I2S0_TX,
+		[11] = DMACH_I2S0S_TX,
+		[12] = DMACH_I2S1_RX,
+		[13] = DMACH_I2S1_TX,
+		[14] = DMACH_I2S2_RX,
+		[15] = DMACH_I2S2_TX,
+		[16] = DMACH_SPI0_RX,
+		[17] = DMACH_SPI0_TX,
+		[18] = DMACH_SPI1_RX,
+		[19] = DMACH_SPI1_TX,
+		[20] = DMACH_SPI2_RX,
+		[21] = DMACH_SPI2_TX,
+		[22] = DMACH_AC97_MICIN,
+		[23] = DMACH_AC97_PCMIN,
+		[24] = DMACH_AC97_PCMOUT,
+		[25] = DMACH_EXTERNAL,
+		[26] = DMACH_PWM,
+		[27] = DMACH_SPDIF,
+		[28] = DMACH_HSI_RX,
+		[29] = DMACH_HSI_TX,
+		[30] = DMACH_MAX,
+		[31] = DMACH_MAX,
+	},
+};
+
+static struct platform_device s5pc100_device_pdma0 = {
+	.name		= "s3c-pl330",
+	.id		= 1,
+	.num_resources	= ARRAY_SIZE(s5pc100_pdma0_resource),
+	.resource	= s5pc100_pdma0_resource,
+	.dev		= {
+		.dma_mask = &dma_dmamask,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
+		.platform_data = &s5pc100_pdma0_pdata,
+	},
+};
+
+static struct resource s5pc100_pdma1_resource[] = {
+	[0] = {
+		.start  = S5PC100_PA_PDMA1,
+		.end    = S5PC100_PA_PDMA1 + SZ_4K,
+		.flags = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= IRQ_PDMA1,
+		.end	= IRQ_PDMA1,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct s3c_pl330_platdata s5pc100_pdma1_pdata = {
+	.peri = {
+		[0] = DMACH_UART0_RX,
+		[1] = DMACH_UART0_TX,
+		[2] = DMACH_UART1_RX,
+		[3] = DMACH_UART1_TX,
+		[4] = DMACH_UART2_RX,
+		[5] = DMACH_UART2_TX,
+		[6] = DMACH_UART3_RX,
+		[7] = DMACH_UART3_TX,
+		[8] = DMACH_IRDA,
+		[9] = DMACH_I2S0_RX,
+		[10] = DMACH_I2S0_TX,
+		[11] = DMACH_I2S0S_TX,
+		[12] = DMACH_I2S1_RX,
+		[13] = DMACH_I2S1_TX,
+		[14] = DMACH_I2S2_RX,
+		[15] = DMACH_I2S2_TX,
+		[16] = DMACH_SPI0_RX,
+		[17] = DMACH_SPI0_TX,
+		[18] = DMACH_SPI1_RX,
+		[19] = DMACH_SPI1_TX,
+		[20] = DMACH_SPI2_RX,
+		[21] = DMACH_SPI2_TX,
+		[22] = DMACH_PCM0_RX,
+		[23] = DMACH_PCM0_TX,
+		[24] = DMACH_PCM1_RX,
+		[25] = DMACH_PCM1_TX,
+		[26] = DMACH_MSM_REQ0,
+		[27] = DMACH_MSM_REQ1,
+		[28] = DMACH_MSM_REQ2,
+		[29] = DMACH_MSM_REQ3,
+		[30] = DMACH_MAX,
+		[31] = DMACH_MAX,
+	},
+};
+
+static struct platform_device s5pc100_device_pdma1 = {
+	.name		= "s3c-pl330",
+	.id		= 2,
+	.num_resources	= ARRAY_SIZE(s5pc100_pdma1_resource),
+	.resource	= s5pc100_pdma1_resource,
+	.dev		= {
+		.dma_mask = &dma_dmamask,
+		.coherent_dma_mask = DMA_BIT_MASK(32),
+		.platform_data = &s5pc100_pdma1_pdata,
+	},
+};
+
+static struct platform_device *s5pc100_dmacs[] __initdata = {
+	&s5pc100_device_pdma0,
+	&s5pc100_device_pdma1,
+};
+
+static int __init s5pc100_dma_init(void)
+{
+	platform_add_devices(s5pc100_dmacs, ARRAY_SIZE(s5pc100_dmacs));
+
+	return 0;
+}
+arch_initcall(s5pc100_dma_init);

arch/arm/mach-s5pc100/include/mach/debug-macro.S

@@ -22,12 +22,14 @@
 	 * aligned and add in the offset when we load the value here.
 	 */
 
-	.macro addruart, rx, tmp
+	.macro addruart, rx, rtmp
 		mrc	p15, 0, \rx, c1, c0
 		tst	\rx, #1
 		ldreq	\rx, = S3C_PA_UART
-		ldrne	\rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
+		ldrne	\rx, = S3C_VA_UART
+#if CONFIG_DEBUG_S3C_UART != 0
 		add	\rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
 	.endm
 
 /* include the reset of the code which will do the work, we're only

arch/arm/mach-s5pc100/include/mach/dma.h

+/*
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ *	Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#ifndef __MACH_DMA_H
+#define __MACH_DMA_H
+
+/* This platform uses the common S3C DMA API driver for PL330 */
+#include <plat/s3c-dma-pl330.h>
+
+#endif /* __MACH_DMA_H */

arch/arm/mach-s5pc100/include/mach/entry-macro.S

@@ -20,7 +20,7 @@
 	.endm
 
 	.macro	get_irqnr_preamble, base, tmp
-	ldr	\base, =S3C_VA_VIC0
+	ldr	\base, =VA_VIC0
 	.endm
 
 	.macro	arch_ret_to_user, tmp1, tmp2
@@ -29,18 +29,18 @@
 	.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
 
 	@ check the vic0
-	mov	\irqnr, # S3C_IRQ_OFFSET + 31
+	mov	\irqnr, # S5P_IRQ_OFFSET + 31
 	ldr	\irqstat, [ \base, # VIC_IRQ_STATUS ]
 	teq	\irqstat, #0
 
 	@ otherwise try vic1
-	addeq	\tmp, \base, #(S3C_VA_VIC1 - S3C_VA_VIC0)
+	addeq	\tmp, \base, #(VA_VIC1 - VA_VIC0)
 	addeq	\irqnr, \irqnr, #32
 	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
 	teqeq	\irqstat, #0
 
 	@ otherwise try vic2
-	addeq	\tmp, \base, #(S3C_VA_VIC2 - S3C_VA_VIC0)
+	addeq	\tmp, \base, #(VA_VIC2 - VA_VIC0)
 	addeq	\irqnr, \irqnr, #32
 	ldreq	\irqstat, [ \tmp, # VIC_IRQ_STATUS ]
 	teqeq	\irqstat, #0

arch/arm/mach-s5pc100/include/mach/gpio.h

@@ -146,6 +146,13 @@ enum s5p_gpio_number {
 /* define the number of gpios we need to the one after the MP04() range */
 #define ARCH_NR_GPIOS		(S5PC100_GPIO_END + 1)
 
+#define EINT_MODE		S3C_GPIO_SFN(0x2)
+
+#define EINT_GPIO_0(x)		S5PC100_GPH0(x)
+#define EINT_GPIO_1(x)		S5PC100_GPH1(x)
+#define EINT_GPIO_2(x)		S5PC100_GPH2(x)
+#define EINT_GPIO_3(x)		S5PC100_GPH3(x)
+
 #include <asm-generic/gpio.h>
 
 #endif /* __ASM_ARCH_GPIO_H */