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Commit d8ebefc9 authored by Simon Horman's avatar Simon Horman
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arm64: dts: r8a7795: Use R-Car Gen 3 fallback binding for i2c nodes 

Use recently added R-Car Gen 3 fallback binding for i2c nodes in
DT for r8a7795 SoC.

This has no run-time effect for the current driver as the initialisation
sequence is the same for the SoC-specific binding for r8a7795 and the
fallback binding for R-Car Gen 3.
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent fb04f4b8
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Showing with 14 additions and 7 deletions
arch/arm64/boot/dts/renesas/r8a7795.dtsi
View file @ d8ebefc9
...@@ -792,7 +792,8 @@ scif5: serial@e6f30000 { ...@@ -792,7 +792,8 @@ scif5: serial@e6f30000 {
i2c0: i2c@e6500000 { i2c0: i2c@e6500000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7795"; compatible = "renesas,i2c-r8a7795",
"renesas,rcar-gen3-i2c";
reg = <0 0xe6500000 0 0x40>; reg = <0 0xe6500000 0 0x40>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 931>; clocks = <&cpg CPG_MOD 931>;
...@@ -806,7 +807,8 @@ i2c0: i2c@e6500000 { ...@@ -806,7 +807,8 @@ i2c0: i2c@e6500000 {
i2c1: i2c@e6508000 { i2c1: i2c@e6508000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7795"; compatible = "renesas,i2c-r8a7795",
"renesas,rcar-gen3-i2c";
reg = <0 0xe6508000 0 0x40>; reg = <0 0xe6508000 0 0x40>;
interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 930>; clocks = <&cpg CPG_MOD 930>;
...@@ -820,7 +822,8 @@ i2c1: i2c@e6508000 { ...@@ -820,7 +822,8 @@ i2c1: i2c@e6508000 {
i2c2: i2c@e6510000 { i2c2: i2c@e6510000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7795"; compatible = "renesas,i2c-r8a7795",
"renesas,rcar-gen3-i2c";
reg = <0 0xe6510000 0 0x40>; reg = <0 0xe6510000 0 0x40>;
interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 929>; clocks = <&cpg CPG_MOD 929>;
...@@ -834,7 +837,8 @@ i2c2: i2c@e6510000 { ...@@ -834,7 +837,8 @@ i2c2: i2c@e6510000 {
i2c3: i2c@e66d0000 { i2c3: i2c@e66d0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7795"; compatible = "renesas,i2c-r8a7795",
"renesas,rcar-gen3-i2c";
reg = <0 0xe66d0000 0 0x40>; reg = <0 0xe66d0000 0 0x40>;
interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 928>; clocks = <&cpg CPG_MOD 928>;
...@@ -848,7 +852,8 @@ i2c3: i2c@e66d0000 { ...@@ -848,7 +852,8 @@ i2c3: i2c@e66d0000 {
i2c4: i2c@e66d8000 { i2c4: i2c@e66d8000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7795"; compatible = "renesas,i2c-r8a7795",
"renesas,rcar-gen3-i2c";
reg = <0 0xe66d8000 0 0x40>; reg = <0 0xe66d8000 0 0x40>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 927>; clocks = <&cpg CPG_MOD 927>;
...@@ -862,7 +867,8 @@ i2c4: i2c@e66d8000 { ...@@ -862,7 +867,8 @@ i2c4: i2c@e66d8000 {
i2c5: i2c@e66e0000 { i2c5: i2c@e66e0000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7795"; compatible = "renesas,i2c-r8a7795",
"renesas,rcar-gen3-i2c";
reg = <0 0xe66e0000 0 0x40>; reg = <0 0xe66e0000 0 0x40>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 919>; clocks = <&cpg CPG_MOD 919>;
...@@ -876,7 +882,8 @@ i2c5: i2c@e66e0000 { ...@@ -876,7 +882,8 @@ i2c5: i2c@e66e0000 {
i2c6: i2c@e66e8000 { i2c6: i2c@e66e8000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "renesas,i2c-r8a7795"; compatible = "renesas,i2c-r8a7795",
"renesas,rcar-gen3-i2c";
reg = <0 0xe66e8000 0 0x40>; reg = <0 0xe66e8000 0 0x40>;
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 918>; clocks = <&cpg CPG_MOD 918>;
......
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