Commit d8ee398d authored by Luis R. Rodriguez's avatar Luis R. Rodriguez Committed by John W. Linville

ath5k: Port to new bitrate/channel API

Author: Nick Kossifidis <mickflemm@gmail.com>

Tested on 5211, 5213+5112, 5213A+2112A and it wors fine.

Also i figured out a way to process rate vallue found
on status descriptors, it's still buggy but we are getting
closer (i think it improved stability a little).

Changes to hw.c, initvals.c, phy.c
Changes-licensed-under: ISC

Changes to ath5k.h, base.c, base.h
Changes-licensed-under: 3-Clause-BSD
Acked-by: default avatarJiri Slaby <jirislaby@gmail.com>
Signed-off-by: default avatarNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: default avatarLuis R. Rodriguez <mcgrof@winlab.rutgers.edu>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 406f2388
...@@ -735,7 +735,6 @@ config P54_PCI ...@@ -735,7 +735,6 @@ config P54_PCI
config ATH5K config ATH5K
tristate "Atheros 5xxx wireless cards support" tristate "Atheros 5xxx wireless cards support"
depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
depends on BROKEN
---help--- ---help---
This module adds support for wireless adapters based on This module adds support for wireless adapters based on
Atheros 5xxx chipset. Atheros 5xxx chipset.
......
ath5k-objs = base.o hw.o regdom.o initvals.o phy.o debug.o ath5k-objs = base.o hw.o initvals.o phy.o debug.o
obj-$(CONFIG_ATH5K) += ath5k.o obj-$(CONFIG_ATH5K) += ath5k.o
...@@ -30,7 +30,6 @@ ...@@ -30,7 +30,6 @@
#include <net/mac80211.h> #include <net/mac80211.h>
#include "hw.h" #include "hw.h"
#include "regdom.h"
/* PCI IDs */ /* PCI IDs */
#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */ #define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */
...@@ -251,18 +250,20 @@ struct ath5k_srev_name { ...@@ -251,18 +250,20 @@ struct ath5k_srev_name {
*/ */
#define MODULATION_TURBO 0x00000080 #define MODULATION_TURBO 0x00000080
enum ath5k_vendor_mode { enum ath5k_driver_mode {
MODE_ATHEROS_TURBO = NUM_IEEE80211_MODES+1, AR5K_MODE_11A = 0,
MODE_ATHEROS_TURBOG AR5K_MODE_11A_TURBO = 1,
AR5K_MODE_11B = 2,
AR5K_MODE_11G = 3,
AR5K_MODE_11G_TURBO = 4,
AR5K_MODE_XR = 0,
AR5K_MODE_MAX = 5
}; };
/* Number of supported mac80211 enum ieee80211_phymode modes by this driver */
#define NUM_DRIVER_MODES 3
/* adding this flag to rate_code enables short preamble, see ar5212_reg.h */ /* adding this flag to rate_code enables short preamble, see ar5212_reg.h */
#define AR5K_SET_SHORT_PREAMBLE 0x04 #define AR5K_SET_SHORT_PREAMBLE 0x04
#define HAS_SHPREAMBLE(_ix) (rt->rates[_ix].modulation == IEEE80211_RATE_CCK_2) #define HAS_SHPREAMBLE(_ix) (rt->rates[_ix].modulation == IEEE80211_RATE_SHORT_PREAMBLE)
#define SHPREAMBLE_FLAG(_ix) (HAS_SHPREAMBLE(_ix) ? AR5K_SET_SHORT_PREAMBLE : 0) #define SHPREAMBLE_FLAG(_ix) (HAS_SHPREAMBLE(_ix) ? AR5K_SET_SHORT_PREAMBLE : 0)
/****************\ /****************\
...@@ -560,8 +561,8 @@ struct ath5k_desc { ...@@ -560,8 +561,8 @@ struct ath5k_desc {
* Used internaly in OpenHAL (ar5211.c/ar5212.c * Used internaly in OpenHAL (ar5211.c/ar5212.c
* for reset_tx_queue). Also see struct struct ieee80211_channel. * for reset_tx_queue). Also see struct struct ieee80211_channel.
*/ */
#define IS_CHAN_XR(_c) ((_c.val & CHANNEL_XR) != 0) #define IS_CHAN_XR(_c) ((_c.hw_value & CHANNEL_XR) != 0)
#define IS_CHAN_B(_c) ((_c.val & CHANNEL_B) != 0) #define IS_CHAN_B(_c) ((_c.hw_value & CHANNEL_B) != 0)
/* /*
* The following structure will be used to map 2GHz channels to * The following structure will be used to map 2GHz channels to
...@@ -584,7 +585,7 @@ struct ath5k_athchan_2ghz { ...@@ -584,7 +585,7 @@ struct ath5k_athchan_2ghz {
/** /**
* struct ath5k_rate - rate structure * struct ath5k_rate - rate structure
* @valid: is this a valid rate for the current mode * @valid: is this a valid rate for rate control (remove)
* @modulation: respective mac80211 modulation * @modulation: respective mac80211 modulation
* @rate_kbps: rate in kbit/s * @rate_kbps: rate in kbit/s
* @rate_code: hardware rate value, used in &struct ath5k_desc, on RX on * @rate_code: hardware rate value, used in &struct ath5k_desc, on RX on
...@@ -643,47 +644,48 @@ struct ath5k_rate_table { ...@@ -643,47 +644,48 @@ struct ath5k_rate_table {
/* /*
* Rate tables... * Rate tables...
* TODO: CLEAN THIS !!!
*/ */
#define AR5K_RATES_11A { 8, { \ #define AR5K_RATES_11A { 8, { \
255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0, \ 255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0, \
7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255, \ 7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255, \
255, 255, 255, 255, 255, 255, 255, 255 }, { \ 255, 255, 255, 255, 255, 255, 255, 255 }, { \
{ 1, IEEE80211_RATE_OFDM, 6000, 11, 140, 0 }, \ { 1, 0, 6000, 11, 140, 0 }, \
{ 1, IEEE80211_RATE_OFDM, 9000, 15, 18, 0 }, \ { 1, 0, 9000, 15, 18, 0 }, \
{ 1, IEEE80211_RATE_OFDM, 12000, 10, 152, 2 }, \ { 1, 0, 12000, 10, 152, 2 }, \
{ 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 2 }, \ { 1, 0, 18000, 14, 36, 2 }, \
{ 1, IEEE80211_RATE_OFDM, 24000, 9, 176, 4 }, \ { 1, 0, 24000, 9, 176, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 4 }, \ { 1, 0, 36000, 13, 72, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 4 }, \ { 1, 0, 48000, 8, 96, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 4 } } \ { 1, 0, 54000, 12, 108, 4 } } \
} }
#define AR5K_RATES_11B { 4, { \ #define AR5K_RATES_11B { 4, { \
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \ 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \ 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
3, 2, 1, 0, 255, 255, 255, 255 }, { \ 3, 2, 1, 0, 255, 255, 255, 255 }, { \
{ 1, IEEE80211_RATE_CCK, 1000, 27, 130, 0 }, \ { 1, 0, 1000, 27, 130, 0 }, \
{ 1, IEEE80211_RATE_CCK_2, 2000, 26, 132, 1 }, \ { 1, IEEE80211_RATE_SHORT_PREAMBLE, 2000, 26, 132, 1 }, \
{ 1, IEEE80211_RATE_CCK_2, 5500, 25, 139, 1 }, \ { 1, IEEE80211_RATE_SHORT_PREAMBLE, 5500, 25, 139, 1 }, \
{ 1, IEEE80211_RATE_CCK_2, 11000, 24, 150, 1 } } \ { 1, IEEE80211_RATE_SHORT_PREAMBLE, 11000, 24, 150, 1 } } \
} }
#define AR5K_RATES_11G { 12, { \ #define AR5K_RATES_11G { 12, { \
255, 255, 255, 255, 255, 255, 255, 255, 10, 8, 6, 4, \ 255, 255, 255, 255, 255, 255, 255, 255, 10, 8, 6, 4, \
11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255, \ 11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255, \
3, 2, 1, 0, 255, 255, 255, 255 }, { \ 3, 2, 1, 0, 255, 255, 255, 255 }, { \
{ 1, IEEE80211_RATE_CCK, 1000, 27, 2, 0 }, \ { 1, 0, 1000, 27, 2, 0 }, \
{ 1, IEEE80211_RATE_CCK_2, 2000, 26, 4, 1 }, \ { 1, IEEE80211_RATE_SHORT_PREAMBLE, 2000, 26, 4, 1 }, \
{ 1, IEEE80211_RATE_CCK_2, 5500, 25, 11, 1 }, \ { 1, IEEE80211_RATE_SHORT_PREAMBLE, 5500, 25, 11, 1 }, \
{ 1, IEEE80211_RATE_CCK_2, 11000, 24, 22, 1 }, \ { 1, IEEE80211_RATE_SHORT_PREAMBLE, 11000, 24, 22, 1 }, \
{ 0, IEEE80211_RATE_OFDM, 6000, 11, 12, 4 }, \ { 0, 0, 6000, 11, 12, 4 }, \
{ 0, IEEE80211_RATE_OFDM, 9000, 15, 18, 4 }, \ { 0, 0, 9000, 15, 18, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 12000, 10, 24, 6 }, \ { 1, 0, 12000, 10, 24, 6 }, \
{ 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 6 }, \ { 1, 0, 18000, 14, 36, 6 }, \
{ 1, IEEE80211_RATE_OFDM, 24000, 9, 48, 8 }, \ { 1, 0, 24000, 9, 48, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 8 }, \ { 1, 0, 36000, 13, 72, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 8 }, \ { 1, 0, 48000, 8, 96, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 8 } } \ { 1, 0, 54000, 12, 108, 8 } } \
} }
#define AR5K_RATES_TURBO { 8, { \ #define AR5K_RATES_TURBO { 8, { \
...@@ -708,14 +710,14 @@ struct ath5k_rate_table { ...@@ -708,14 +710,14 @@ struct ath5k_rate_table {
{ 1, MODULATION_XR, 1000, 2, 139, 1 }, \ { 1, MODULATION_XR, 1000, 2, 139, 1 }, \
{ 1, MODULATION_XR, 2000, 6, 150, 2 }, \ { 1, MODULATION_XR, 2000, 6, 150, 2 }, \
{ 1, MODULATION_XR, 3000, 1, 150, 3 }, \ { 1, MODULATION_XR, 3000, 1, 150, 3 }, \
{ 1, IEEE80211_RATE_OFDM, 6000, 11, 140, 4 }, \ { 1, 0, 6000, 11, 140, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 9000, 15, 18, 4 }, \ { 1, 0, 9000, 15, 18, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 12000, 10, 152, 6 }, \ { 1, 0, 12000, 10, 152, 6 }, \
{ 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 6 }, \ { 1, 0, 18000, 14, 36, 6 }, \
{ 1, IEEE80211_RATE_OFDM, 24000, 9, 176, 8 }, \ { 1, 0, 24000, 9, 176, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 8 }, \ { 1, 0, 36000, 13, 72, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 8 }, \ { 1, 0, 48000, 8, 96, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 8 } } \ { 1, 0, 54000, 12, 108, 8 } } \
} }
/* /*
...@@ -895,7 +897,7 @@ struct ath5k_capabilities { ...@@ -895,7 +897,7 @@ struct ath5k_capabilities {
* Supported PHY modes * Supported PHY modes
* (ie. CHANNEL_A, CHANNEL_B, ...) * (ie. CHANNEL_A, CHANNEL_B, ...)
*/ */
DECLARE_BITMAP(cap_mode, NUM_DRIVER_MODES); DECLARE_BITMAP(cap_mode, AR5K_MODE_MAX);
/* /*
* Frequency range (without regulation restrictions) * Frequency range (without regulation restrictions)
...@@ -907,14 +909,6 @@ struct ath5k_capabilities { ...@@ -907,14 +909,6 @@ struct ath5k_capabilities {
u16 range_5ghz_max; u16 range_5ghz_max;
} cap_range; } cap_range;
/*
* Active regulation domain settings
*/
struct {
enum ath5k_regdom reg_current;
enum ath5k_regdom reg_hw;
} cap_regdomain;
/* /*
* Values stored in the EEPROM (some of them...) * Values stored in the EEPROM (some of them...)
*/ */
...@@ -1129,8 +1123,6 @@ extern int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio); ...@@ -1129,8 +1123,6 @@ extern int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio);
extern u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio); extern u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio);
extern int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val); extern int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val);
extern void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, u32 interrupt_level); extern void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, u32 interrupt_level);
/* Regulatory Domain/Channels Setup */
extern u16 ath5k_get_regdomain(struct ath5k_hw *ah);
/* Misc functions */ /* Misc functions */
extern int ath5k_hw_get_capability(struct ath5k_hw *ah, enum ath5k_capability_type cap_type, u32 capability, u32 *result); extern int ath5k_hw_get_capability(struct ath5k_hw *ah, enum ath5k_capability_type cap_type, u32 capability, u32 *result);
......
This diff is collapsed.
...@@ -83,7 +83,7 @@ struct ath5k_txq { ...@@ -83,7 +83,7 @@ struct ath5k_txq {
#if CHAN_DEBUG #if CHAN_DEBUG
#define ATH_CHAN_MAX (26+26+26+200+200) #define ATH_CHAN_MAX (26+26+26+200+200)
#else #else
#define ATH_CHAN_MAX (14+14+14+252+20) /* XXX what's the max? */ #define ATH_CHAN_MAX (14+14+14+252+20)
#endif #endif
/* Software Carrier, keeps track of the driver state /* Software Carrier, keeps track of the driver state
...@@ -95,12 +95,19 @@ struct ath5k_softc { ...@@ -95,12 +95,19 @@ struct ath5k_softc {
struct ieee80211_tx_queue_stats tx_stats; struct ieee80211_tx_queue_stats tx_stats;
struct ieee80211_low_level_stats ll_stats; struct ieee80211_low_level_stats ll_stats;
struct ieee80211_hw *hw; /* IEEE 802.11 common */ struct ieee80211_hw *hw; /* IEEE 802.11 common */
struct ieee80211_hw_mode modes[NUM_DRIVER_MODES]; struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
struct ieee80211_channel channels[ATH_CHAN_MAX]; struct ieee80211_channel channels[ATH_CHAN_MAX];
struct ieee80211_rate rates[AR5K_MAX_RATES * NUM_DRIVER_MODES]; struct ieee80211_rate rates[AR5K_MAX_RATES * IEEE80211_NUM_BANDS];
enum ieee80211_if_types opmode; enum ieee80211_if_types opmode;
struct ath5k_hw *ah; /* Atheros HW */ struct ath5k_hw *ah; /* Atheros HW */
struct ieee80211_supported_band *curband;
u8 a_rates;
u8 b_rates;
u8 g_rates;
u8 xr_rates;
#if ATH5K_DEBUG #if ATH5K_DEBUG
struct ath5k_dbg_info debug; /* debug info */ struct ath5k_dbg_info debug; /* debug info */
#endif #endif
...@@ -169,6 +176,7 @@ struct ath5k_softc { ...@@ -169,6 +176,7 @@ struct ath5k_softc {
unsigned int nexttbtt; /* next beacon time in TU */ unsigned int nexttbtt; /* next beacon time in TU */
struct timer_list calib_tim; /* calibration timer */ struct timer_list calib_tim; /* calibration timer */
int power_level; /* Requested tx power in dbm */
}; };
#define ath5k_hw_hasbssidmask(_ah) \ #define ath5k_hw_hasbssidmask(_ah) \
......
This diff is collapsed.
...@@ -1317,7 +1317,7 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel) ...@@ -1317,7 +1317,7 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel)
/* For AR5211 */ /* For AR5211 */
} else if (ah->ah_version == AR5K_AR5211) { } else if (ah->ah_version == AR5K_AR5211) {
if(mode > 2){ /* AR5K_INI_VAL_11B */ if(mode > 2){ /* AR5K_MODE_11B */
ATH5K_ERR(ah->ah_sc,"unsupported channel mode: %d\n", mode); ATH5K_ERR(ah->ah_sc,"unsupported channel mode: %d\n", mode);
return -EINVAL; return -EINVAL;
} }
......
...@@ -1018,7 +1018,7 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah, ...@@ -1018,7 +1018,7 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
int obdb = -1, bank = -1; int obdb = -1, bank = -1;
u32 ee_mode; u32 ee_mode;
AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX); AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX);
rf = ah->ah_rf_banks; rf = ah->ah_rf_banks;
...@@ -1038,8 +1038,8 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah, ...@@ -1038,8 +1038,8 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
} }
/* Modify bank 0 */ /* Modify bank 0 */
if (channel->val & CHANNEL_2GHZ) { if (channel->hw_value & CHANNEL_2GHZ) {
if (channel->val & CHANNEL_CCK) if (channel->hw_value & CHANNEL_CCK)
ee_mode = AR5K_EEPROM_MODE_11B; ee_mode = AR5K_EEPROM_MODE_11B;
else else
ee_mode = AR5K_EEPROM_MODE_11G; ee_mode = AR5K_EEPROM_MODE_11G;
...@@ -1058,10 +1058,10 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah, ...@@ -1058,10 +1058,10 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
} else { } else {
/* For 11a, Turbo and XR */ /* For 11a, Turbo and XR */
ee_mode = AR5K_EEPROM_MODE_11A; ee_mode = AR5K_EEPROM_MODE_11A;
obdb = channel->freq >= 5725 ? 3 : obdb = channel->center_freq >= 5725 ? 3 :
(channel->freq >= 5500 ? 2 : (channel->center_freq >= 5500 ? 2 :
(channel->freq >= 5260 ? 1 : (channel->center_freq >= 5260 ? 1 :
(channel->freq > 4000 ? 0 : -1))); (channel->center_freq > 4000 ? 0 : -1)));
if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6], if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6],
ee->ee_pwd_84, 1, 51, 3, true)) ee->ee_pwd_84, 1, 51, 3, true))
...@@ -1119,12 +1119,12 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah, ...@@ -1119,12 +1119,12 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
int obdb = -1, bank = -1; int obdb = -1, bank = -1;
u32 ee_mode; u32 ee_mode;
AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX); AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX);
rf = ah->ah_rf_banks; rf = ah->ah_rf_banks;
if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_2112A if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_2112A
&& !test_bit(MODE_IEEE80211A, ah->ah_capabilities.cap_mode)){ && !test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)){
rf_ini = rfregs_2112a; rf_ini = rfregs_2112a;
rf_size = ARRAY_SIZE(rfregs_5112a); rf_size = ARRAY_SIZE(rfregs_5112a);
if (mode < 2) { if (mode < 2) {
...@@ -1156,8 +1156,8 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah, ...@@ -1156,8 +1156,8 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
} }
/* Modify bank 6 */ /* Modify bank 6 */
if (channel->val & CHANNEL_2GHZ) { if (channel->hw_value & CHANNEL_2GHZ) {
if (channel->val & CHANNEL_OFDM) if (channel->hw_value & CHANNEL_OFDM)
ee_mode = AR5K_EEPROM_MODE_11G; ee_mode = AR5K_EEPROM_MODE_11G;
else else
ee_mode = AR5K_EEPROM_MODE_11B; ee_mode = AR5K_EEPROM_MODE_11B;
...@@ -1173,10 +1173,10 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah, ...@@ -1173,10 +1173,10 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
} else { } else {
/* For 11a, Turbo and XR */ /* For 11a, Turbo and XR */
ee_mode = AR5K_EEPROM_MODE_11A; ee_mode = AR5K_EEPROM_MODE_11A;
obdb = channel->freq >= 5725 ? 3 : obdb = channel->center_freq >= 5725 ? 3 :
(channel->freq >= 5500 ? 2 : (channel->center_freq >= 5500 ? 2 :
(channel->freq >= 5260 ? 1 : (channel->center_freq >= 5260 ? 1 :
(channel->freq > 4000 ? 0 : -1))); (channel->center_freq > 4000 ? 0 : -1)));
if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6], if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6],
ee->ee_ob[ee_mode][obdb], 3, 279, 0, true)) ee->ee_ob[ee_mode][obdb], 3, 279, 0, true))
...@@ -1219,7 +1219,7 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah, ...@@ -1219,7 +1219,7 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
unsigned int rf_size, i; unsigned int rf_size, i;
int bank = -1; int bank = -1;
AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX); AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX);
rf = ah->ah_rf_banks; rf = ah->ah_rf_banks;
...@@ -1445,7 +1445,7 @@ static u32 ath5k_hw_rf5110_chan2athchan(struct ieee80211_channel *channel) ...@@ -1445,7 +1445,7 @@ static u32 ath5k_hw_rf5110_chan2athchan(struct ieee80211_channel *channel)
* newer chipsets like the AR5212A who have a completely * newer chipsets like the AR5212A who have a completely
* different RF/PHY part. * different RF/PHY part.
*/ */
athchan = (ath5k_hw_bitswap((channel->chan - 24) / 2, 5) << 1) | athchan = (ath5k_hw_bitswap((ieee80211_frequency_to_channel(channel->center_freq) - 24) / 2, 5) << 1) |
(1 << 6) | 0x1; (1 << 6) | 0x1;
return athchan; return athchan;
...@@ -1506,7 +1506,7 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah, ...@@ -1506,7 +1506,7 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah,
struct ieee80211_channel *channel) struct ieee80211_channel *channel)
{ {
struct ath5k_athchan_2ghz ath5k_channel_2ghz; struct ath5k_athchan_2ghz ath5k_channel_2ghz;
unsigned int ath5k_channel = channel->chan; unsigned int ath5k_channel = ieee80211_frequency_to_channel(channel->center_freq);
u32 data0, data1, clock; u32 data0, data1, clock;
int ret; int ret;
...@@ -1515,9 +1515,9 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah, ...@@ -1515,9 +1515,9 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah,
*/ */
data0 = data1 = 0; data0 = data1 = 0;
if (channel->val & CHANNEL_2GHZ) { if (channel->hw_value & CHANNEL_2GHZ) {
/* Map 2GHz channel to 5GHz Atheros channel ID */ /* Map 2GHz channel to 5GHz Atheros channel ID */
ret = ath5k_hw_rf5111_chan2athchan(channel->chan, ret = ath5k_hw_rf5111_chan2athchan(ieee80211_frequency_to_channel(channel->center_freq),
&ath5k_channel_2ghz); &ath5k_channel_2ghz);
if (ret) if (ret)
return ret; return ret;
...@@ -1555,7 +1555,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah, ...@@ -1555,7 +1555,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah,
u16 c; u16 c;
data = data0 = data1 = data2 = 0; data = data0 = data1 = data2 = 0;
c = channel->freq; c = channel->center_freq;
/* /*
* Set the channel on the RF5112 or newer * Set the channel on the RF5112 or newer
...@@ -1604,13 +1604,13 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) ...@@ -1604,13 +1604,13 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel)
* Check bounds supported by the PHY * Check bounds supported by the PHY
* (don't care about regulation restrictions at this point) * (don't care about regulation restrictions at this point)
*/ */
if ((channel->freq < ah->ah_capabilities.cap_range.range_2ghz_min || if ((channel->center_freq < ah->ah_capabilities.cap_range.range_2ghz_min ||
channel->freq > ah->ah_capabilities.cap_range.range_2ghz_max) && channel->center_freq > ah->ah_capabilities.cap_range.range_2ghz_max) &&
(channel->freq < ah->ah_capabilities.cap_range.range_5ghz_min || (channel->center_freq < ah->ah_capabilities.cap_range.range_5ghz_min ||
channel->freq > ah->ah_capabilities.cap_range.range_5ghz_max)) { channel->center_freq > ah->ah_capabilities.cap_range.range_5ghz_max)) {
ATH5K_ERR(ah->ah_sc, ATH5K_ERR(ah->ah_sc,
"channel out of supported range (%u MHz)\n", "channel out of supported range (%u MHz)\n",
channel->freq); channel->center_freq);
return -EINVAL; return -EINVAL;
} }
...@@ -1632,9 +1632,9 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel) ...@@ -1632,9 +1632,9 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel)
if (ret) if (ret)
return ret; return ret;
ah->ah_current_channel.freq = channel->freq; ah->ah_current_channel.center_freq = channel->center_freq;
ah->ah_current_channel.val = channel->val; ah->ah_current_channel.hw_value = channel->hw_value;
ah->ah_turbo = channel->val == CHANNEL_T ? true : false; ah->ah_turbo = channel->hw_value == CHANNEL_T ? true : false;
return 0; return 0;
} }
...@@ -1797,11 +1797,11 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah, ...@@ -1797,11 +1797,11 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah,
if (ret) { if (ret) {
ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n", ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n",
channel->freq); channel->center_freq);
return ret; return ret;
} }
ret = ath5k_hw_noise_floor_calibration(ah, channel->freq); ret = ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
if (ret) if (ret)
return ret; return ret;
...@@ -1848,10 +1848,10 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah, ...@@ -1848,10 +1848,10 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah,
((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S)); ((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S));
done: done:
ath5k_hw_noise_floor_calibration(ah, channel->freq); ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
/* Request RF gain */ /* Request RF gain */
if (channel->val & CHANNEL_5GHZ) { if (channel->hw_value & CHANNEL_5GHZ) {
ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txpower.txp_max, ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txpower.txp_max,
AR5K_PHY_PAPD_PROBE_TXPOWER) | AR5K_PHY_PAPD_PROBE_TXPOWER) |
AR5K_PHY_PAPD_PROBE_TX_NEXT, AR5K_PHY_PAPD_PROBE); AR5K_PHY_PAPD_PROBE_TX_NEXT, AR5K_PHY_PAPD_PROBE);
......
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