Commit deee7c81 authored by Pekka Enberg's avatar Pekka Enberg Committed by Greg Kroah-Hartman

Staging: w35und: remove timer wrappers

This patch removes the OS_TIMER and related wrappers from driver code. The
patch also changes the code to use msecs_to_jiffies() for setting up
timer->expires.
Acked-by: default avatarPavel Machek <pavel@suse.cz>
Signed-off-by: default avatarPekka Enberg <penberg@cs.helsinki.fi>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent a36e0894
......@@ -79,7 +79,7 @@ typedef struct BSSDescriptionElement
u16 wIndex; // THIS BSS element entry index
void* psadapter; // pointer to THIS adapter
OS_TIMER nTimer; // MLME timer
struct timer_list timer; // MLME timer
// Authentication
u16 wAuthAlgo; // peer MAC MLME use Auth algorithm, default OPEN_AUTH
......
......@@ -84,24 +84,5 @@
#define OS_MEMORY_CLEAR( _A, _S ) memset( (u8 *)_A,0,_S)
#define OS_MEMORY_COMPARE( _A, _B, _S ) (memcmp(_A,_B,_S)? 0 : 1) // Definition is reverse with Ndis 1: the same 0: different
#define OS_TIMER struct timer_list
#define OS_TIMER_INITIAL( _T, _F, _P ) \
{ \
init_timer( _T ); \
(_T)->function = (void *)_F##_1a; \
(_T)->data = (unsigned long)_P; \
}
// _S : Millisecond
// 20060420 At least 1 large than jiffies
#define OS_TIMER_SET( _T, _S ) \
{ \
(_T)->expires = jiffies + ((_S*HZ+999)/1000);\
add_timer( _T ); \
}
#define OS_TIMER_CANCEL( _T, _B ) del_timer_sync( _T )
#define OS_TIMER_GET_SYS_TIME( _T ) (*_T=jiffies)
#endif // COMMON_DEF
......@@ -12,13 +12,7 @@ extern void DataDmp(u8 *pdata, u32 len, u32 offset);
void vRxTimerInit(struct wb35_adapter *adapter);
void vRxTimerStart(struct wb35_adapter *adapter, int timeout_value);
void RxTimerHandler_1a( struct wb35_adapter *adapter);
void vRxTimerStop(struct wb35_adapter *adapter);
void RxTimerHandler( void* SystemSpecific1,
struct wb35_adapter * adapter,
void* SystemSpecific2,
void* SystemSpecific3);
// For Asynchronous indicating. The routine collocates with USB.
void Mds_MsduProcess( struct wb35_adapter *adapter, PRXLAYER1 pRxLayer1, u8 SlotIndex);
......
......@@ -133,8 +133,7 @@ typedef struct _MDS
u8 boCounterMeasureBlock;
u8 reserved_4[2];
//NDIS_MINIPORT_TIMER nTimer;
OS_TIMER nTimer;
struct timer_list timer;
u32 TxTsc; // 20060214
u32 TxTsc_2; // 20060214
......
#include "os_common.h"
void vRxTimerInit(struct wb35_adapter * adapter)
static void RxTimerHandler(unsigned long data)
{
OS_TIMER_INITIAL(&(adapter->Mds.nTimer), (void*) RxTimerHandler, (void*) adapter);
WARN_ON(1);
}
void vRxTimerStart(struct wb35_adapter * adapter, int timeout_value)
void vRxTimerInit(struct wb35_adapter *adapter)
{
if (timeout_value<MIN_TIMEOUT_VAL)
timeout_value=MIN_TIMEOUT_VAL;
OS_TIMER_SET( &(adapter->Mds.nTimer), timeout_value );
init_timer(&adapter->Mds.timer);
adapter->Mds.timer.function = RxTimerHandler;
adapter->Mds.timer.data = (unsigned long) adapter;
}
void vRxTimerStop(struct wb35_adapter * adapter)
void vRxTimerStart(struct wb35_adapter *adapter, int timeout_value)
{
OS_TIMER_CANCEL( &(adapter->Mds.nTimer), 0 );
}
if (timeout_value < MIN_TIMEOUT_VAL)
timeout_value = MIN_TIMEOUT_VAL;
void RxTimerHandler_1a( struct wb35_adapter * adapter)
{
RxTimerHandler(NULL, adapter, NULL, NULL);
adapter->Mds.timer.expires = jiffies + msecs_to_jiffies(timeout_value);
add_timer(&adapter->Mds.timer);
}
void RxTimerHandler(void* SystemSpecific1, struct wb35_adapter * adapter,
void* SystemSpecific2, void* SystemSpecific3)
void vRxTimerStop(struct wb35_adapter *adapter)
{
WARN_ON(1);
del_timer_sync(&adapter->Mds.timer);
}
......@@ -62,8 +62,7 @@ typedef struct _SCAN_PARAMETERS
u8 boCCAbusy; // Wb: HWMAC CCA busy status
u8 reserved_2;
//NDIS_MINIPORT_TIMER nTimer;
OS_TIMER nTimer;
struct timer_list timer;
u32 ScanTimeStamp; //Increase 1 per background scan(1 minute)
u32 BssTimeStamp; //Increase 1 per connect status check
......
......@@ -106,8 +106,7 @@ typedef struct _SME_PARAMETERS
u8 bDesiredPowerSave;
// SME timer and timeout value
//NDIS_MINIPORT_TIMER nTimer;
OS_TIMER nTimer;
struct timer_list timer;
u8 boInTimerHandler;
u8 boAuthRetryActive;
......
......@@ -28,416 +28,9 @@ void hal_get_permanent_address( phw_data_t pHwData, u8 *pethernet_address )
memcpy( pethernet_address, pHwData->PermanentMacAddress, 6 );
}
u8 hal_init_hardware(phw_data_t pHwData, struct wb35_adapter * adapter)
{
u16 SoftwareSet;
pHwData->adapter = adapter;
// Initial the variable
pHwData->MaxReceiveLifeTime = DEFAULT_MSDU_LIFE_TIME; // Setting Rx maximum MSDU life time
pHwData->FragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD; // Setting default fragment threshold
pHwData->InitialResource = 1;
if( Wb35Reg_initial(pHwData)) {
pHwData->InitialResource = 2;
if (Wb35Tx_initial(pHwData)) {
pHwData->InitialResource = 3;
if (Wb35Rx_initial(pHwData)) {
pHwData->InitialResource = 4;
OS_TIMER_INITIAL( &pHwData->LEDTimer, hal_led_control, pHwData );
OS_TIMER_SET( &pHwData->LEDTimer, 1000 ); // 20060623
//
// For restrict to vendor's hardware
//
SoftwareSet = hal_software_set( pHwData );
#ifdef Vendor2
// Try to make sure the EEPROM contain
SoftwareSet >>= 8;
if( SoftwareSet != 0x82 )
return false;
#endif
Wb35Rx_start( pHwData );
Wb35Tx_EP2VM_start( pHwData );
return true;
}
}
}
pHwData->SurpriseRemove = 1;
return false;
}
void hal_halt(phw_data_t pHwData, void *ppa_data)
{
switch( pHwData->InitialResource )
{
case 4:
case 3: OS_TIMER_CANCEL( &pHwData->LEDTimer, &cancel );
msleep(100); // Wait for Timer DPC exit 940623.2
Wb35Rx_destroy( pHwData ); // Release the Rx
case 2: Wb35Tx_destroy( pHwData ); // Release the Tx
case 1: Wb35Reg_destroy( pHwData ); // Release the Wb35 Regisster resources
}
}
//---------------------------------------------------------------------------------------------------
void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
u8 length, unsigned char basic_rate_set)
{
struct wb35_reg *reg = &pHwData->reg;
u32 tmp, tmp1;
u8 Rate[12]={ 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 };
u8 SupportedRate[16];
u8 i, j, k, Count1, Count2, Byte;
if( pHwData->SurpriseRemove ) return;
if (basic_rate_set) {
reg->M28_MacControl &= ~0x000fff00;
tmp1 = 0x00000100;
} else {
reg->M28_MacControl &= ~0xfff00000;
tmp1 = 0x00100000;
}
tmp = 0;
for (i=0; i<length; i++) {
Byte = pbss_rates[i] & 0x7f;
for (j=0; j<12; j++) {
if( Byte == Rate[j] )
break;
}
if (j < 12)
tmp |= (tmp1<<j);
}
reg->M28_MacControl |= tmp;
Wb35Reg_Write( pHwData, 0x0828, reg->M28_MacControl );
// 930206.2.c M78 setting
j = k = Count1 = Count2 = 0;
memset( SupportedRate, 0, 16 );
tmp = 0x00100000;
tmp1 = 0x00000100;
for (i=0; i<12; i++) { // Get the supported rate
if (tmp & reg->M28_MacControl) {
SupportedRate[j] = Rate[i];
if (tmp1 & reg->M28_MacControl)
SupportedRate[j] |= 0x80;
if (k)
Count2++;
else
Count1++;
j++;
}
if (i==4 && k==0) {
if( !(reg->M28_MacControl & 0x000ff000) ) // if basic rate in 11g domain)
{
k = 1;
j = 8;
}
}
tmp <<= 1;
tmp1 <<= 1;
}
// Fill data into support rate until buffer full
//---20060926 add by anson's endian
for (i=0; i<4; i++)
*(u32 *)(SupportedRate+(i<<2)) = cpu_to_le32( *(u32 *)(SupportedRate+(i<<2)) );
//--- end 20060926 add by anson's endian
Wb35Reg_BurstWrite( pHwData,0x087c, (u32 *)SupportedRate, 4, AUTO_INCREMENT );
reg->M7C_MacControl = ((u32 *)SupportedRate)[0];
reg->M80_MacControl = ((u32 *)SupportedRate)[1];
reg->M84_MacControl = ((u32 *)SupportedRate)[2];
reg->M88_MacControl = ((u32 *)SupportedRate)[3];
// Fill length
tmp = Count1<<28 | Count2<<24;
reg->M78_ERPInformation &= ~0xff000000;
reg->M78_ERPInformation |= tmp;
Wb35Reg_Write( pHwData, 0x0878, reg->M78_ERPInformation );
}
//---------------------------------------------------------------------------------------------------
void hal_set_beacon_period( phw_data_t pHwData, u16 beacon_period )
{
u32 tmp;
if( pHwData->SurpriseRemove ) return;
pHwData->BeaconPeriod = beacon_period;
tmp = pHwData->BeaconPeriod << 16;
tmp |= pHwData->ProbeDelay;
Wb35Reg_Write( pHwData, 0x0848, tmp );
}
void hal_set_current_channel_ex( phw_data_t pHwData, ChanInfo channel )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove )
return;
printk("Going to channel: %d/%d\n", channel.band, channel.ChanNo);
RFSynthesizer_SwitchingChannel( pHwData, channel );// Switch channel
pHwData->Channel = channel.ChanNo;
pHwData->band = channel.band;
#ifdef _PE_STATE_DUMP_
WBDEBUG(("Set channel is %d, band =%d\n", pHwData->Channel, pHwData->band));
#endif
reg->M28_MacControl &= ~0xff; // Clean channel information field
reg->M28_MacControl |= channel.ChanNo;
Wb35Reg_WriteWithCallbackValue( pHwData, 0x0828, reg->M28_MacControl,
(s8 *)&channel, sizeof(ChanInfo));
}
//---------------------------------------------------------------------------------------------------
void hal_set_current_channel( phw_data_t pHwData, ChanInfo channel )
{
hal_set_current_channel_ex( pHwData, channel );
}
//---------------------------------------------------------------------------------------------------
void hal_get_current_channel( phw_data_t pHwData, ChanInfo *channel )
{
channel->ChanNo = pHwData->Channel;
channel->band = pHwData->band;
}
//---------------------------------------------------------------------------------------------------
void hal_set_accept_broadcast( phw_data_t pHwData, u8 enable )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return;
reg->M00_MacControl &= ~0x02000000;//The HW value
if (enable)
reg->M00_MacControl |= 0x02000000;//The HW value
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
}
//for wep key error detection, we need to accept broadcast packets to be received temporary.
void hal_set_accept_promiscuous( phw_data_t pHwData, u8 enable)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove) return;
if (enable) {
reg->M00_MacControl |= 0x00400000;
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
} else {
reg->M00_MacControl&=~0x00400000;
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
}
}
void hal_set_accept_multicast( phw_data_t pHwData, u8 enable )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return;
reg->M00_MacControl &= ~0x01000000;//The HW value
if (enable) reg->M00_MacControl |= 0x01000000;//The HW value
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
}
void hal_set_accept_beacon( phw_data_t pHwData, u8 enable )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return;
// 20040108 debug
if( !enable )//Due to SME and MLME are not suitable for 35
return;
reg->M00_MacControl &= ~0x04000000;//The HW value
if( enable )
reg->M00_MacControl |= 0x04000000;//The HW value
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
}
//---------------------------------------------------------------------------------------------------
void hal_set_multicast_address( phw_data_t pHwData, u8 *address, u8 number )
{
struct wb35_reg *reg = &pHwData->reg;
u8 Byte, Bit;
if( pHwData->SurpriseRemove ) return;
//Erases and refills the card multicast registers. Used when an address
// has been deleted and all bits must be recomputed.
reg->M04_MulticastAddress1 = 0;
reg->M08_MulticastAddress2 = 0;
while( number )
{
number--;
CardGetMulticastBit( (address+(number*ETH_LENGTH_OF_ADDRESS)), &Byte, &Bit);
reg->Multicast[Byte] |= Bit;
}
// Updating register
Wb35Reg_BurstWrite( pHwData, 0x0804, (u32 *)reg->Multicast, 2, AUTO_INCREMENT );
}
//---------------------------------------------------------------------------------------------------
u8 hal_get_accept_beacon( phw_data_t pHwData )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return 0;
if( reg->M00_MacControl & 0x04000000 )
return 1;
else
return 0;
}
unsigned char hal_reset_hardware( phw_data_t pHwData, void* ppa )
{
// Not implement yet
return true;
}
void hal_stop( phw_data_t pHwData )
{
struct wb35_reg *reg = &pHwData->reg;
pHwData->Wb35Rx.rx_halt = 1;
Wb35Rx_stop( pHwData );
pHwData->Wb35Tx.tx_halt = 1;
Wb35Tx_stop( pHwData );
reg->D00_DmaControl &= ~0xc0000000;//Tx Off, Rx Off
Wb35Reg_Write( pHwData, 0x0400, reg->D00_DmaControl );
}
unsigned char hal_idle(phw_data_t pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
PWBUSB pWbUsb = &pHwData->WbUsb;
if( !pHwData->SurpriseRemove && ( pWbUsb->DetectCount || reg->EP0vm_state!=VM_STOP ) )
return false;
return true;
}
//---------------------------------------------------------------------------------------------------
void hal_set_cwmin( phw_data_t pHwData, u8 cwin_min )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return;
pHwData->cwmin = cwin_min;
reg->M2C_MacControl &= ~0x7c00; //bit 10 ~ 14
reg->M2C_MacControl |= (pHwData->cwmin<<10);
Wb35Reg_Write( pHwData, 0x082c, reg->M2C_MacControl );
}
s32 hal_get_rssi( phw_data_t pHwData, u32 *HalRssiArry, u8 Count )
{
struct wb35_reg *reg = &pHwData->reg;
R01_DESCRIPTOR r01;
s32 ltmp = 0, tmp;
u8 i;
if( pHwData->SurpriseRemove ) return -200;
if( Count > MAX_ACC_RSSI_COUNT ) // Because the TS may use this funtion
Count = MAX_ACC_RSSI_COUNT;
// RSSI = C1 + C2 * (agc_state[7:0] + offset_map(lna_state[1:0]))
// C1 = -195, C2 = 0.66 = 85/128
for (i=0; i<Count; i++)
{
r01.value = HalRssiArry[i];
tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
ltmp += tmp;
}
ltmp /= Count;
if( pHwData->phy_type == RF_AIROHA_2230 ) ltmp -= 5; // 10;
if( pHwData->phy_type == RF_AIROHA_2230S ) ltmp -= 5; // 10; 20060420 Add this
//if( ltmp < -200 ) ltmp = -200;
if( ltmp < -110 ) ltmp = -110;// 1.0.24.0 For NJRC
return ltmp;
}
//----------------------------------------------------------------------------------------------------
s32 hal_get_rssi_bss( phw_data_t pHwData, u16 idx, u8 Count )
{
struct wb35_reg *reg = &pHwData->reg;
R01_DESCRIPTOR r01;
s32 ltmp = 0, tmp;
u8 i, j;
struct wb35_adapter * adapter = pHwData->adapter;
// u32 *HalRssiArry = psBSS(idx)->HalRssi;
if( pHwData->SurpriseRemove ) return -200;
if( Count > MAX_ACC_RSSI_COUNT ) // Because the TS may use this funtion
Count = MAX_ACC_RSSI_COUNT;
// RSSI = C1 + C2 * (agc_state[7:0] + offset_map(lna_state[1:0]))
// C1 = -195, C2 = 0.66 = 85/128
#if 0
for (i=0; i<Count; i++)
{
r01.value = HalRssiArry[i];
tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
ltmp += tmp;
}
#else
if (psBSS(idx)->HalRssiIndex == 0)
psBSS(idx)->HalRssiIndex = MAX_ACC_RSSI_COUNT;
j = (u8)psBSS(idx)->HalRssiIndex-1;
for (i=0; i<Count; i++)
{
r01.value = psBSS(idx)->HalRssi[j];
tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
ltmp += tmp;
if (j == 0)
{
j = MAX_ACC_RSSI_COUNT;
}
j--;
}
#endif
ltmp /= Count;
if( pHwData->phy_type == RF_AIROHA_2230 ) ltmp -= 5; // 10;
if( pHwData->phy_type == RF_AIROHA_2230S ) ltmp -= 5; // 10; 20060420 Add this
//if( ltmp < -200 ) ltmp = -200;
if( ltmp < -110 ) ltmp = -110;// 1.0.24.0 For NJRC
return ltmp;
}
//---------------------------------------------------------------------------
void hal_led_control_1a( phw_data_t pHwData )
{
hal_led_control( NULL, pHwData, NULL, NULL );
}
void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
static void hal_led_control(unsigned long data)
{
phw_data_t pHwData = (phw_data_t) data;
struct wb35_adapter * adapter = pHwData->adapter;
struct wb35_reg *reg = &pHwData->reg;
u32 LEDSet = (pHwData->SoftwareSet & HAL_LED_SET_MASK) >> HAL_LED_SET_SHIFT;
......@@ -561,164 +154,572 @@ void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 )
}
else
{
reg->U1BC_LEDConfigure &= ~0x1f;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
pHwData->LED_Blinking = 0;
TimeInterval = 300;
reg->U1BC_LEDConfigure &= ~0x1f;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
pHwData->LED_Blinking = 0;
TimeInterval = 300;
}
}
else
{
// 20060901 Gray blinking if in disconnect state and not scanning
ltmp = reg->U1BC_LEDConfigure;
reg->U1BC_LEDConfigure &= ~0x1f;
if( LEDgray2[(pHwData->LED_Blinking%30)] )
{
reg->U1BC_LEDConfigure |= 0x10;
reg->U1BC_LEDConfigure |= LEDgray2[ (pHwData->LED_Blinking%30) ];
}
pHwData->LED_Blinking++;
if( reg->U1BC_LEDConfigure != ltmp )
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
TimeInterval = 100;
}
}
else
{
// Turn On LED_0
if( (reg->U1BC_LEDConfigure & 0x10) == 0 )
{
reg->U1BC_LEDConfigure |= 0x10;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
}
}
break;
case 5: // [101] Only 1 Led be placed on PCB and use LED_1 for showing
if( !pHwData->LED_LinkOn ) // Blink only if not Link On
{
// Blinking if scanning is on progress
if( pHwData->LED_Scanning )
{
if( pHwData->LED_Blinking == 0 )
{
reg->U1BC_LEDConfigure |= 0x1000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
pHwData->LED_Blinking = 1;
TimeInterval = 300;
}
else
{
reg->U1BC_LEDConfigure &= ~0x1000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 Off
pHwData->LED_Blinking = 0;
TimeInterval = 300;
}
}
else
{
//Turn Off LED_1
if( reg->U1BC_LEDConfigure & 0x1000 )
{
reg->U1BC_LEDConfigure &= ~0x1000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 Off
}
}
}
else
{
// Is transmitting/receiving ??
if( (OS_CURRENT_RX_BYTE( adapter ) != pHwData->RxByteCountLast ) ||
(OS_CURRENT_TX_BYTE( adapter ) != pHwData->TxByteCountLast ) )
{
if( (reg->U1BC_LEDConfigure & 0x3000) != 0x3000 )
{
reg->U1BC_LEDConfigure |= 0x3000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
}
// Update variable
pHwData->RxByteCountLast = OS_CURRENT_RX_BYTE( adapter );
pHwData->TxByteCountLast = OS_CURRENT_TX_BYTE( adapter );
TimeInterval = 200;
}
else
{
// Turn On LED_1 and blinking if transmitting/receiving
if( (reg->U1BC_LEDConfigure & 0x3000) != 0x1000 )
{
reg->U1BC_LEDConfigure &= ~0x3000;
reg->U1BC_LEDConfigure |= 0x1000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
}
}
}
break;
default: // Default setting. 2 LED be placed on PCB. LED_0: Link On LED_1 Active
if( (reg->U1BC_LEDConfigure & 0x3000) != 0x3000 )
{
reg->U1BC_LEDConfigure |= 0x3000;// LED_1 is always on and event enable
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
}
if( pHwData->LED_Blinking )
{
// Gray blinking
reg->U1BC_LEDConfigure &= ~0x0f;
reg->U1BC_LEDConfigure |= 0x10;
reg->U1BC_LEDConfigure |= LEDgray[ (pHwData->LED_Blinking-1)%20 ];
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
pHwData->LED_Blinking += 2;
if( pHwData->LED_Blinking < 40 )
TimeInterval = 100;
else
{
pHwData->LED_Blinking = 0; // Stop blinking
reg->U1BC_LEDConfigure &= ~0x0f;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
}
break;
}
else
if( pHwData->LED_LinkOn )
{
// 20060901 Gray blinking if in disconnect state and not scanning
ltmp = reg->U1BC_LEDConfigure;
reg->U1BC_LEDConfigure &= ~0x1f;
if( LEDgray2[(pHwData->LED_Blinking%30)] )
if( !(reg->U1BC_LEDConfigure & 0x10) ) // Check the LED_0
{
//Try to turn ON LED_0 after gray blinking
reg->U1BC_LEDConfigure |= 0x10;
reg->U1BC_LEDConfigure |= LEDgray2[ (pHwData->LED_Blinking%30) ];
}
pHwData->LED_Blinking++;
if( reg->U1BC_LEDConfigure != ltmp )
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
TimeInterval = 100;
pHwData->LED_Blinking = 1; //Start blinking
TimeInterval = 50;
}
}
else
{
// Turn On LED_0
if( (reg->U1BC_LEDConfigure & 0x10) == 0 )
if( reg->U1BC_LEDConfigure & 0x10 ) // Check the LED_0
{
reg->U1BC_LEDConfigure |= 0x10;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_0 Off
reg->U1BC_LEDConfigure &= ~0x10;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
}
}
break;
}
case 5: // [101] Only 1 Led be placed on PCB and use LED_1 for showing
if( !pHwData->LED_LinkOn ) // Blink only if not Link On
{
// Blinking if scanning is on progress
if( pHwData->LED_Scanning )
//20060828.1 Active send null packet to avoid AP disconnect
if( pHwData->LED_LinkOn )
{
if( pHwData->LED_Blinking == 0 )
pHwData->NullPacketCount += TimeInterval;
if( pHwData->NullPacketCount >= DEFAULT_NULL_PACKET_COUNT )
{
reg->U1BC_LEDConfigure |= 0x1000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
pHwData->LED_Blinking = 1;
TimeInterval = 300;
pHwData->NullPacketCount = 0;
}
else
{
reg->U1BC_LEDConfigure &= ~0x1000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 Off
pHwData->LED_Blinking = 0;
TimeInterval = 300;
}
}
else
{
//Turn Off LED_1
if( reg->U1BC_LEDConfigure & 0x1000 )
pHwData->time_count += TimeInterval;
Wb35Tx_CurrentTime( pHwData, pHwData->time_count ); // 20060928 add
pHwData->LEDTimer.expires = jiffies + msecs_to_jiffies(TimeInterval);
add_timer(&pHwData->LEDTimer);
}
u8 hal_init_hardware(phw_data_t pHwData, struct wb35_adapter * adapter)
{
u16 SoftwareSet;
pHwData->adapter = adapter;
// Initial the variable
pHwData->MaxReceiveLifeTime = DEFAULT_MSDU_LIFE_TIME; // Setting Rx maximum MSDU life time
pHwData->FragmentThreshold = DEFAULT_FRAGMENT_THRESHOLD; // Setting default fragment threshold
pHwData->InitialResource = 1;
if( Wb35Reg_initial(pHwData)) {
pHwData->InitialResource = 2;
if (Wb35Tx_initial(pHwData)) {
pHwData->InitialResource = 3;
if (Wb35Rx_initial(pHwData)) {
pHwData->InitialResource = 4;
init_timer(&pHwData->LEDTimer);
pHwData->LEDTimer.function = hal_led_control;
pHwData->LEDTimer.data = (unsigned long) pHwData;
pHwData->LEDTimer.expires = jiffies + msecs_to_jiffies(1000);
add_timer(&pHwData->LEDTimer);
//
// For restrict to vendor's hardware
//
SoftwareSet = hal_software_set( pHwData );
#ifdef Vendor2
// Try to make sure the EEPROM contain
SoftwareSet >>= 8;
if( SoftwareSet != 0x82 )
return false;
#endif
Wb35Rx_start( pHwData );
Wb35Tx_EP2VM_start( pHwData );
return true;
}
}
}
pHwData->SurpriseRemove = 1;
return false;
}
void hal_halt(phw_data_t pHwData, void *ppa_data)
{
switch( pHwData->InitialResource )
{
reg->U1BC_LEDConfigure &= ~0x1000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 Off
case 4:
case 3: del_timer_sync(&pHwData->LEDTimer);
msleep(100); // Wait for Timer DPC exit 940623.2
Wb35Rx_destroy( pHwData ); // Release the Rx
case 2: Wb35Tx_destroy( pHwData ); // Release the Tx
case 1: Wb35Reg_destroy( pHwData ); // Release the Wb35 Regisster resources
}
}
//---------------------------------------------------------------------------------------------------
void hal_set_rates(phw_data_t pHwData, u8 *pbss_rates,
u8 length, unsigned char basic_rate_set)
{
struct wb35_reg *reg = &pHwData->reg;
u32 tmp, tmp1;
u8 Rate[12]={ 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 };
u8 SupportedRate[16];
u8 i, j, k, Count1, Count2, Byte;
if( pHwData->SurpriseRemove ) return;
if (basic_rate_set) {
reg->M28_MacControl &= ~0x000fff00;
tmp1 = 0x00000100;
} else {
reg->M28_MacControl &= ~0xfff00000;
tmp1 = 0x00100000;
}
tmp = 0;
for (i=0; i<length; i++) {
Byte = pbss_rates[i] & 0x7f;
for (j=0; j<12; j++) {
if( Byte == Rate[j] )
break;
}
if (j < 12)
tmp |= (tmp1<<j);
}
reg->M28_MacControl |= tmp;
Wb35Reg_Write( pHwData, 0x0828, reg->M28_MacControl );
// 930206.2.c M78 setting
j = k = Count1 = Count2 = 0;
memset( SupportedRate, 0, 16 );
tmp = 0x00100000;
tmp1 = 0x00000100;
for (i=0; i<12; i++) { // Get the supported rate
if (tmp & reg->M28_MacControl) {
SupportedRate[j] = Rate[i];
if (tmp1 & reg->M28_MacControl)
SupportedRate[j] |= 0x80;
if (k)
Count2++;
else
Count1++;
j++;
}
if (i==4 && k==0) {
if( !(reg->M28_MacControl & 0x000ff000) ) // if basic rate in 11g domain)
{
// Is transmitting/receiving ??
if( (OS_CURRENT_RX_BYTE( adapter ) != pHwData->RxByteCountLast ) ||
(OS_CURRENT_TX_BYTE( adapter ) != pHwData->TxByteCountLast ) )
{
if( (reg->U1BC_LEDConfigure & 0x3000) != 0x3000 )
{
reg->U1BC_LEDConfigure |= 0x3000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
k = 1;
j = 8;
}
}
tmp <<= 1;
tmp1 <<= 1;
}
// Update variable
pHwData->RxByteCountLast = OS_CURRENT_RX_BYTE( adapter );
pHwData->TxByteCountLast = OS_CURRENT_TX_BYTE( adapter );
TimeInterval = 200;
}
else
{
// Turn On LED_1 and blinking if transmitting/receiving
if( (reg->U1BC_LEDConfigure & 0x3000) != 0x1000 )
{
reg->U1BC_LEDConfigure &= ~0x3000;
reg->U1BC_LEDConfigure |= 0x1000;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure ); // LED_1 On
}
}
// Fill data into support rate until buffer full
//---20060926 add by anson's endian
for (i=0; i<4; i++)
*(u32 *)(SupportedRate+(i<<2)) = cpu_to_le32( *(u32 *)(SupportedRate+(i<<2)) );
//--- end 20060926 add by anson's endian
Wb35Reg_BurstWrite( pHwData,0x087c, (u32 *)SupportedRate, 4, AUTO_INCREMENT );
reg->M7C_MacControl = ((u32 *)SupportedRate)[0];
reg->M80_MacControl = ((u32 *)SupportedRate)[1];
reg->M84_MacControl = ((u32 *)SupportedRate)[2];
reg->M88_MacControl = ((u32 *)SupportedRate)[3];
// Fill length
tmp = Count1<<28 | Count2<<24;
reg->M78_ERPInformation &= ~0xff000000;
reg->M78_ERPInformation |= tmp;
Wb35Reg_Write( pHwData, 0x0878, reg->M78_ERPInformation );
}
//---------------------------------------------------------------------------------------------------
void hal_set_beacon_period( phw_data_t pHwData, u16 beacon_period )
{
u32 tmp;
if( pHwData->SurpriseRemove ) return;
pHwData->BeaconPeriod = beacon_period;
tmp = pHwData->BeaconPeriod << 16;
tmp |= pHwData->ProbeDelay;
Wb35Reg_Write( pHwData, 0x0848, tmp );
}
void hal_set_current_channel_ex( phw_data_t pHwData, ChanInfo channel )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove )
return;
printk("Going to channel: %d/%d\n", channel.band, channel.ChanNo);
RFSynthesizer_SwitchingChannel( pHwData, channel );// Switch channel
pHwData->Channel = channel.ChanNo;
pHwData->band = channel.band;
#ifdef _PE_STATE_DUMP_
WBDEBUG(("Set channel is %d, band =%d\n", pHwData->Channel, pHwData->band));
#endif
reg->M28_MacControl &= ~0xff; // Clean channel information field
reg->M28_MacControl |= channel.ChanNo;
Wb35Reg_WriteWithCallbackValue( pHwData, 0x0828, reg->M28_MacControl,
(s8 *)&channel, sizeof(ChanInfo));
}
//---------------------------------------------------------------------------------------------------
void hal_set_current_channel( phw_data_t pHwData, ChanInfo channel )
{
hal_set_current_channel_ex( pHwData, channel );
}
//---------------------------------------------------------------------------------------------------
void hal_get_current_channel( phw_data_t pHwData, ChanInfo *channel )
{
channel->ChanNo = pHwData->Channel;
channel->band = pHwData->band;
}
//---------------------------------------------------------------------------------------------------
void hal_set_accept_broadcast( phw_data_t pHwData, u8 enable )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return;
reg->M00_MacControl &= ~0x02000000;//The HW value
if (enable)
reg->M00_MacControl |= 0x02000000;//The HW value
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
}
//for wep key error detection, we need to accept broadcast packets to be received temporary.
void hal_set_accept_promiscuous( phw_data_t pHwData, u8 enable)
{
struct wb35_reg *reg = &pHwData->reg;
if (pHwData->SurpriseRemove) return;
if (enable) {
reg->M00_MacControl |= 0x00400000;
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
} else {
reg->M00_MacControl&=~0x00400000;
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
}
break;
}
default: // Default setting. 2 LED be placed on PCB. LED_0: Link On LED_1 Active
if( (reg->U1BC_LEDConfigure & 0x3000) != 0x3000 )
void hal_set_accept_multicast( phw_data_t pHwData, u8 enable )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return;
reg->M00_MacControl &= ~0x01000000;//The HW value
if (enable) reg->M00_MacControl |= 0x01000000;//The HW value
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
}
void hal_set_accept_beacon( phw_data_t pHwData, u8 enable )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return;
// 20040108 debug
if( !enable )//Due to SME and MLME are not suitable for 35
return;
reg->M00_MacControl &= ~0x04000000;//The HW value
if( enable )
reg->M00_MacControl |= 0x04000000;//The HW value
Wb35Reg_Write( pHwData, 0x0800, reg->M00_MacControl );
}
//---------------------------------------------------------------------------------------------------
void hal_set_multicast_address( phw_data_t pHwData, u8 *address, u8 number )
{
struct wb35_reg *reg = &pHwData->reg;
u8 Byte, Bit;
if( pHwData->SurpriseRemove ) return;
//Erases and refills the card multicast registers. Used when an address
// has been deleted and all bits must be recomputed.
reg->M04_MulticastAddress1 = 0;
reg->M08_MulticastAddress2 = 0;
while( number )
{
reg->U1BC_LEDConfigure |= 0x3000;// LED_1 is always on and event enable
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
number--;
CardGetMulticastBit( (address+(number*ETH_LENGTH_OF_ADDRESS)), &Byte, &Bit);
reg->Multicast[Byte] |= Bit;
}
if( pHwData->LED_Blinking )
{
// Gray blinking
reg->U1BC_LEDConfigure &= ~0x0f;
reg->U1BC_LEDConfigure |= 0x10;
reg->U1BC_LEDConfigure |= LEDgray[ (pHwData->LED_Blinking-1)%20 ];
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
// Updating register
Wb35Reg_BurstWrite( pHwData, 0x0804, (u32 *)reg->Multicast, 2, AUTO_INCREMENT );
}
//---------------------------------------------------------------------------------------------------
u8 hal_get_accept_beacon( phw_data_t pHwData )
{
struct wb35_reg *reg = &pHwData->reg;
pHwData->LED_Blinking += 2;
if( pHwData->LED_Blinking < 40 )
TimeInterval = 100;
if( pHwData->SurpriseRemove ) return 0;
if( reg->M00_MacControl & 0x04000000 )
return 1;
else
{
pHwData->LED_Blinking = 0; // Stop blinking
reg->U1BC_LEDConfigure &= ~0x0f;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
}
break;
}
return 0;
}
if( pHwData->LED_LinkOn )
{
if( !(reg->U1BC_LEDConfigure & 0x10) ) // Check the LED_0
unsigned char hal_reset_hardware( phw_data_t pHwData, void* ppa )
{
// Not implement yet
return true;
}
void hal_stop( phw_data_t pHwData )
{
struct wb35_reg *reg = &pHwData->reg;
pHwData->Wb35Rx.rx_halt = 1;
Wb35Rx_stop( pHwData );
pHwData->Wb35Tx.tx_halt = 1;
Wb35Tx_stop( pHwData );
reg->D00_DmaControl &= ~0xc0000000;//Tx Off, Rx Off
Wb35Reg_Write( pHwData, 0x0400, reg->D00_DmaControl );
}
unsigned char hal_idle(phw_data_t pHwData)
{
struct wb35_reg *reg = &pHwData->reg;
PWBUSB pWbUsb = &pHwData->WbUsb;
if( !pHwData->SurpriseRemove && ( pWbUsb->DetectCount || reg->EP0vm_state!=VM_STOP ) )
return false;
return true;
}
//---------------------------------------------------------------------------------------------------
void hal_set_cwmin( phw_data_t pHwData, u8 cwin_min )
{
struct wb35_reg *reg = &pHwData->reg;
if( pHwData->SurpriseRemove ) return;
pHwData->cwmin = cwin_min;
reg->M2C_MacControl &= ~0x7c00; //bit 10 ~ 14
reg->M2C_MacControl |= (pHwData->cwmin<<10);
Wb35Reg_Write( pHwData, 0x082c, reg->M2C_MacControl );
}
s32 hal_get_rssi( phw_data_t pHwData, u32 *HalRssiArry, u8 Count )
{
struct wb35_reg *reg = &pHwData->reg;
R01_DESCRIPTOR r01;
s32 ltmp = 0, tmp;
u8 i;
if( pHwData->SurpriseRemove ) return -200;
if( Count > MAX_ACC_RSSI_COUNT ) // Because the TS may use this funtion
Count = MAX_ACC_RSSI_COUNT;
// RSSI = C1 + C2 * (agc_state[7:0] + offset_map(lna_state[1:0]))
// C1 = -195, C2 = 0.66 = 85/128
for (i=0; i<Count; i++)
{
//Try to turn ON LED_0 after gray blinking
reg->U1BC_LEDConfigure |= 0x10;
pHwData->LED_Blinking = 1; //Start blinking
TimeInterval = 50;
}
r01.value = HalRssiArry[i];
tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
ltmp += tmp;
}
else
{
if( reg->U1BC_LEDConfigure & 0x10 ) // Check the LED_0
ltmp /= Count;
if( pHwData->phy_type == RF_AIROHA_2230 ) ltmp -= 5; // 10;
if( pHwData->phy_type == RF_AIROHA_2230S ) ltmp -= 5; // 10; 20060420 Add this
//if( ltmp < -200 ) ltmp = -200;
if( ltmp < -110 ) ltmp = -110;// 1.0.24.0 For NJRC
return ltmp;
}
//----------------------------------------------------------------------------------------------------
s32 hal_get_rssi_bss( phw_data_t pHwData, u16 idx, u8 Count )
{
struct wb35_reg *reg = &pHwData->reg;
R01_DESCRIPTOR r01;
s32 ltmp = 0, tmp;
u8 i, j;
struct wb35_adapter * adapter = pHwData->adapter;
// u32 *HalRssiArry = psBSS(idx)->HalRssi;
if( pHwData->SurpriseRemove ) return -200;
if( Count > MAX_ACC_RSSI_COUNT ) // Because the TS may use this funtion
Count = MAX_ACC_RSSI_COUNT;
// RSSI = C1 + C2 * (agc_state[7:0] + offset_map(lna_state[1:0]))
// C1 = -195, C2 = 0.66 = 85/128
#if 0
for (i=0; i<Count; i++)
{
reg->U1BC_LEDConfigure &= ~0x10;
Wb35Reg_Write( pHwData, 0x03bc, reg->U1BC_LEDConfigure );
}
}
break;
r01.value = HalRssiArry[i];
tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
ltmp += tmp;
}
#else
if (psBSS(idx)->HalRssiIndex == 0)
psBSS(idx)->HalRssiIndex = MAX_ACC_RSSI_COUNT;
j = (u8)psBSS(idx)->HalRssiIndex-1;
//20060828.1 Active send null packet to avoid AP disconnect
if( pHwData->LED_LinkOn )
for (i=0; i<Count; i++)
{
pHwData->NullPacketCount += TimeInterval;
if( pHwData->NullPacketCount >= DEFAULT_NULL_PACKET_COUNT )
r01.value = psBSS(idx)->HalRssi[j];
tmp = ((( r01.R01_AGC_state + reg->LNAValue[r01.R01_LNA_state]) * 85 ) >>7 ) - 195;
ltmp += tmp;
if (j == 0)
{
pHwData->NullPacketCount = 0;
}
j = MAX_ACC_RSSI_COUNT;
}
j--;
}
#endif
ltmp /= Count;
if( pHwData->phy_type == RF_AIROHA_2230 ) ltmp -= 5; // 10;
if( pHwData->phy_type == RF_AIROHA_2230S ) ltmp -= 5; // 10; 20060420 Add this
pHwData->time_count += TimeInterval;
Wb35Tx_CurrentTime( pHwData, pHwData->time_count ); // 20060928 add
OS_TIMER_SET( &pHwData->LEDTimer, TimeInterval ); // 20060623.1
//if( ltmp < -200 ) ltmp = -200;
if( ltmp < -110 ) ltmp = -110;// 1.0.24.0 For NJRC
return ltmp;
}
//---------------------------------------------------------------------------
void hal_set_phy_type( phw_data_t pHwData, u8 PhyType )
{
......@@ -867,7 +868,8 @@ unsigned char hal_set_LED(phw_data_t pHwData, u32 Mode) // 20061108 for WPS led
{
pHwData->LED_Blinking = 0;
pHwData->LED_control = Mode;
OS_TIMER_SET( &pHwData->LEDTimer, 10 ); // 20060623
pHwData->LEDTimer.expires = jiffies + msecs_to_jiffies(10);
add_timer(&pHwData->LEDTimer);
return true;
}
......@@ -68,8 +68,6 @@ s32 hal_get_rssi( phw_data_t pHwData, u32 *HalRssiArry, u8 Count );
s32 hal_get_rssi_bss( phw_data_t pHwData, u16 idx, u8 Count );
void hal_set_connect_info( phw_data_t pHwData, unsigned char boConnect );
u8 hal_get_est_sq3( phw_data_t pHwData, u8 Count );
void hal_led_control_1a( phw_data_t pHwData );
void hal_led_control( void* S1, phw_data_t pHwData, void* S3, void* S4 );
void hal_set_rf_power( phw_data_t pHwData, u8 PowerIndex ); // 20060621 Modify
void hal_reset_counter( phw_data_t pHwData );
void hal_set_radio_mode( phw_data_t pHwData, unsigned char boValue);
......
......@@ -510,7 +510,7 @@ typedef struct _HW_DATA_T
WB35TX Wb35Tx; // Need Wb35Tx.h
WB35RX Wb35Rx; // Need Wb35Rx.h
OS_TIMER LEDTimer;// For LED
struct timer_list LEDTimer;// For LED
u32 LEDpoint;// For LED
......
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