drm/nv30-nv40/fb: call zcomp setup hook from tiling setup

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/core/include/subdev/fb.h

@@ -148,7 +148,6 @@ void nv20_fb_tile_prog(struct nouveau_fb *, int, struct nouveau_fb_tile *);
 int  nv30_fb_init(struct nouveau_object *);
 void nv30_fb_tile_init(struct nouveau_fb *, int i, u32 addr, u32 size,
 		       u32 pitch, u32 flags, struct nouveau_fb_tile *);
-void nv30_fb_tile_fini(struct nouveau_fb *, int i, struct nouveau_fb_tile *);
 
 int  nv41_fb_vram_init(struct nouveau_fb *);
 int  nv41_fb_init(struct nouveau_object *);

drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c

@@ -35,8 +35,13 @@ nv30_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
 		  u32 flags, struct nouveau_fb_tile *tile)
 {
 	/* for performance, select alternate bank offset for zeta */
-	if (!(flags & 4)) tile->addr = (0 << 4);
-	else              tile->addr = (1 << 4);
+	if (!(flags & 4)) {
+		tile->addr = (0 << 4);
+	} else {
+		if (pfb->tile.comp) /* z compression */
+			pfb->tile.comp(pfb, i, size, flags, tile);
+		tile->addr = (1 << 4);
+	}
 
 	tile->addr |= 0x00000001; /* enable */
 	tile->addr |= addr;
@@ -51,14 +56,6 @@ nv30_fb_tile_comp(struct nouveau_fb *pfb, int i, u32 size, u32 flags,
 	tile->zcomp = 0x00000000;
 }
 
-void
-nv30_fb_tile_fini(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
-{
-	tile->addr  = 0;
-	tile->limit = 0;
-	tile->pitch = 0;
-}
-
 static int
 calc_bias(struct nv30_fb_priv *priv, int k, int i, int j)
 {
@@ -135,7 +132,7 @@ nv30_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.tile.regions = 8;
 	priv->base.tile.init = nv30_fb_tile_init;
 	priv->base.tile.comp = nv30_fb_tile_comp;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv20_fb_tile_prog;
 	return nouveau_fb_preinit(&priv->base);
 }

drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c

@@ -55,7 +55,7 @@ nv35_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.tile.regions = 8;
 	priv->base.tile.init = nv30_fb_tile_init;
 	priv->base.tile.comp = nv35_fb_tile_comp;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv20_fb_tile_prog;
 	return nouveau_fb_preinit(&priv->base);
 }

drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c

@@ -84,7 +84,7 @@ nv40_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.tile.regions = 8;
 	priv->base.tile.init = nv30_fb_tile_init;
 	priv->base.tile.comp = nv40_fb_tile_comp;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv20_fb_tile_prog;
 	return nouveau_fb_preinit(&priv->base);
 }

drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c

@@ -86,7 +86,7 @@ nv41_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.ram.init = nv41_fb_vram_init;
 	priv->base.tile.regions = 12;
 	priv->base.tile.init = nv30_fb_tile_init;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv41_fb_tile_prog;
 	return nouveau_fb_preinit(&priv->base);
 }

drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c

@@ -96,7 +96,7 @@ nv44_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.ram.init = nv44_fb_vram_init;
 	priv->base.tile.regions = 12;
 	priv->base.tile.init = nv44_fb_tile_init;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv44_fb_tile_prog;
 	return nouveau_fb_preinit(&priv->base);
 }

drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c

@@ -61,7 +61,7 @@ nv46_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.ram.init = nv44_fb_vram_init;
 	priv->base.tile.regions = 15;
 	priv->base.tile.init = nv46_fb_tile_init;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv44_fb_tile_prog;
 	return nouveau_fb_preinit(&priv->base);
 }

drivers/gpu/drm/nouveau/core/subdev/fb/nv47.c

@@ -47,7 +47,7 @@ nv47_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.ram.init = nv41_fb_vram_init;
 	priv->base.tile.regions = 15;
 	priv->base.tile.init = nv30_fb_tile_init;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv41_fb_tile_prog;
 	return nouveau_fb_preinit(&priv->base);
 }

drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c

@@ -63,7 +63,7 @@ nv49_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.ram.init = nv49_fb_vram_init;
 	priv->base.tile.regions = 15;
 	priv->base.tile.init = nv30_fb_tile_init;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv41_fb_tile_prog;
 
 	return nouveau_fb_preinit(&priv->base);

drivers/gpu/drm/nouveau/core/subdev/fb/nv4e.c

@@ -55,7 +55,7 @@ nv4e_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 	priv->base.ram.init = nv4e_fb_vram_init;
 	priv->base.tile.regions = 12;
 	priv->base.tile.init = nv46_fb_tile_init;
-	priv->base.tile.fini = nv30_fb_tile_fini;
+	priv->base.tile.fini = nv20_fb_tile_fini;
 	priv->base.tile.prog = nv44_fb_tile_prog;
 	return nouveau_fb_preinit(&priv->base);
 }