Commit e16a3750 authored by Vandita Kulkarni's avatar Vandita Kulkarni Committed by Maarten Lankhorst

drm/i915: Enable hw workaround to bypass alpha

Alpha blending with alpha 0 and 0xff passes through
alpha math and rounding logic causing differences
compared to fully transparent or opaque plane,resulting
in CRC mismatch.
This WA on icl and above enables hardware to bypass alpha
math and rounding for per pixel alpha values of 00 and 0xff

v2: Fix patchwork checkpatch warnings.
Signed-off-by: default avatarVandita Kulkarni <vandita.kulkarni@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1529594036-25036-1-git-send-email-vandita.kulkarni@intel.com
parent bd99ce08
...@@ -7366,6 +7366,14 @@ enum { ...@@ -7366,6 +7366,14 @@ enum {
#define BDW_SCRATCH1 _MMIO(0xb11c) #define BDW_SCRATCH1 _MMIO(0xb11c)
#define GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE (1 << 2) #define GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE (1 << 2)
/*GEN11 chicken */
#define _PIPEA_CHICKEN 0x70038
#define _PIPEB_CHICKEN 0x71038
#define _PIPEC_CHICKEN 0x72038
#define PER_PIXEL_ALPHA_BYPASS_EN (1 << 7)
#define PIPE_CHICKEN(pipe) _MMIO_PIPE(pipe, _PIPEA_CHICKEN,\
_PIPEB_CHICKEN)
/* PCH */ /* PCH */
/* south display engine interrupt: IBX */ /* south display engine interrupt: IBX */
......
...@@ -5633,6 +5633,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -5633,6 +5633,7 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
struct intel_atomic_state *old_intel_state = struct intel_atomic_state *old_intel_state =
to_intel_atomic_state(old_state); to_intel_atomic_state(old_state);
bool psl_clkgate_wa; bool psl_clkgate_wa;
u32 pipe_chicken;
if (WARN_ON(intel_crtc->active)) if (WARN_ON(intel_crtc->active))
return; return;
...@@ -5692,6 +5693,17 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config, ...@@ -5692,6 +5693,17 @@ static void haswell_crtc_enable(struct intel_crtc_state *pipe_config,
*/ */
intel_color_load_luts(&pipe_config->base); intel_color_load_luts(&pipe_config->base);
/*
* Display WA #1153: enable hardware to bypass the alpha math
* and rounding for per-pixel values 00 and 0xff
*/
if (INTEL_GEN(dev_priv) >= 11) {
pipe_chicken = I915_READ(PIPE_CHICKEN(pipe));
if (!(pipe_chicken & PER_PIXEL_ALPHA_BYPASS_EN))
I915_WRITE_FW(PIPE_CHICKEN(pipe),
pipe_chicken | PER_PIXEL_ALPHA_BYPASS_EN);
}
intel_ddi_set_pipe_settings(pipe_config); intel_ddi_set_pipe_settings(pipe_config);
if (!transcoder_is_dsi(cpu_transcoder)) if (!transcoder_is_dsi(cpu_transcoder))
intel_ddi_enable_transcoder_func(pipe_config); intel_ddi_enable_transcoder_func(pipe_config);
......
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