Commit e1a7d981 authored by Heiner Kallweit's avatar Heiner Kallweit Committed by Mauro Carvalho Chehab

[media] nuvoton-cir: fix clearing wake fifo

At least on NVT6779D clearing the wake fifo works in learning mode only
(although this condition is not mentioned in the chip spec).
Setting the clear fifo bit has no effect in wake up mode.
Even if clearing the wake fifo should work in wake up mode on other
chips this workaround doesn't hurt.
If needed the caller of nvt_clear_cir_wake_fifo has to take care
of locking.
Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@osg.samsung.com>
parent a17ede9a
...@@ -370,11 +370,19 @@ static void nvt_clear_cir_fifo(struct nvt_dev *nvt) ...@@ -370,11 +370,19 @@ static void nvt_clear_cir_fifo(struct nvt_dev *nvt)
/* clear out the hardware's cir wake rx fifo */ /* clear out the hardware's cir wake rx fifo */
static void nvt_clear_cir_wake_fifo(struct nvt_dev *nvt) static void nvt_clear_cir_wake_fifo(struct nvt_dev *nvt)
{ {
u8 val; u8 val, config;
config = nvt_cir_wake_reg_read(nvt, CIR_WAKE_IRCON);
/* clearing wake fifo works in learning mode only */
nvt_cir_wake_reg_write(nvt, config & ~CIR_WAKE_IRCON_MODE0,
CIR_WAKE_IRCON);
val = nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFOCON); val = nvt_cir_wake_reg_read(nvt, CIR_WAKE_FIFOCON);
nvt_cir_wake_reg_write(nvt, val | CIR_WAKE_FIFOCON_RXFIFOCLR, nvt_cir_wake_reg_write(nvt, val | CIR_WAKE_FIFOCON_RXFIFOCLR,
CIR_WAKE_FIFOCON); CIR_WAKE_FIFOCON);
nvt_cir_wake_reg_write(nvt, config, CIR_WAKE_IRCON);
} }
/* clear out the hardware's cir tx fifo */ /* clear out the hardware's cir tx fifo */
......
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