Commit e4d1ae1f authored by Neil Armstrong's avatar Neil Armstrong

drm/meson: Add G12A Support for VPP setup

Amlogic G12A needs a different VPP setup code, handle it here.
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Tested-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Reviewed-by: default avatarJerome Brunet <jbrunet@baylibre.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190325141824.21259-4-narmstrong@baylibre.com
parent b93a66fa
...@@ -112,13 +112,19 @@ void meson_vpp_init(struct meson_drm *priv) ...@@ -112,13 +112,19 @@ void meson_vpp_init(struct meson_drm *priv)
writel_relaxed(0x20000, priv->io_base + _REG(VPP_DOLBY_CTRL)); writel_relaxed(0x20000, priv->io_base + _REG(VPP_DOLBY_CTRL));
writel_relaxed(0x1020080, writel_relaxed(0x1020080,
priv->io_base + _REG(VPP_DUMMY_DATA1)); priv->io_base + _REG(VPP_DUMMY_DATA1));
} } else if (meson_vpu_is_compatible(priv, "amlogic,meson-g12a-vpu"))
writel_relaxed(0xf, priv->io_base + _REG(DOLBY_PATH_CTRL));
/* Initialize vpu fifo control registers */ /* Initialize vpu fifo control registers */
if (meson_vpu_is_compatible(priv, "amlogic,meson-g12a-vpu"))
writel_relaxed(0xfff << 20 | 0x1000,
priv->io_base + _REG(VPP_OFIFO_SIZE));
else
writel_relaxed(readl_relaxed(priv->io_base + _REG(VPP_OFIFO_SIZE)) | writel_relaxed(readl_relaxed(priv->io_base + _REG(VPP_OFIFO_SIZE)) |
0x77f, priv->io_base + _REG(VPP_OFIFO_SIZE)); 0x77f, priv->io_base + _REG(VPP_OFIFO_SIZE));
writel_relaxed(0x08080808, priv->io_base + _REG(VPP_HOLD_LINES)); writel_relaxed(0x08080808, priv->io_base + _REG(VPP_HOLD_LINES));
if (!meson_vpu_is_compatible(priv, "amlogic,meson-g12a-vpu")) {
/* Turn off preblend */ /* Turn off preblend */
writel_bits_relaxed(VPP_PREBLEND_ENABLE, 0, writel_bits_relaxed(VPP_PREBLEND_ENABLE, 0,
priv->io_base + _REG(VPP_MISC)); priv->io_base + _REG(VPP_MISC));
...@@ -138,6 +144,7 @@ void meson_vpp_init(struct meson_drm *priv) ...@@ -138,6 +144,7 @@ void meson_vpp_init(struct meson_drm *priv)
priv->io_base + _REG(VPP_PREBLEND_VD1_H_START_END)); priv->io_base + _REG(VPP_PREBLEND_VD1_H_START_END));
writel_relaxed(4096, writel_relaxed(4096,
priv->io_base + _REG(VPP_BLEND_VD2_H_START_END)); priv->io_base + _REG(VPP_BLEND_VD2_H_START_END));
}
/* Disable Scalers */ /* Disable Scalers */
writel_relaxed(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0)); writel_relaxed(0, priv->io_base + _REG(VPP_OSD_SC_CTRL0));
......
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