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Commit e731f314 authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull ARM SoC platform updates from Olof Johansson:
 "SoC changes, a substantial part of this is cleanup of some of the
  older platforms that used to have a bunch of board files.

  In particular:

   - Remove non-DT i.MX platforms that haven't seen activity in years,
     it's time to remove them.

   - A bunch of cleanup and removal of platform data for TI/OMAP
     platforms, moving over to genpd for power/reset control (yay!)

   - Major cleanup of Samsung S3C24xx and S3C64xx platforms, moving them
     closer to multiplatform support (not quite there yet, but getting
     close).

  There are a few other changes too, smaller fixlets, etc. For new
  platform support, the primary ones are:

   - New SoC: Hisilicon SD5203, ARM926EJ-S platform.

   - Cpufreq support for i.MX7ULP"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (121 commits)
  ARM: mstar: Select MStar intc
  ARM: stm32: Replace HTTP links with HTTPS ones
  ARM: debug: add UART early console support for SD5203
  ARM: hisi: add support for SD5203 SoC
  ARM: omap3: enable off mode automatically
  clk: imx: imx35: Remove mx35_clocks_init()
  clk: imx: imx31: Remove mx31_clocks_init()
  clk: imx: imx27: Remove mx27_clocks_init()
  ARM: imx: Remove unused definitions
  ARM: imx35: Retrieve the IIM base address from devicetree
  ARM: imx3: Retrieve the AVIC base address from devicetree
  ARM: imx3: Retrieve the CCM base address from devicetree
  ARM: imx31: Retrieve the IIM base address from devicetree
  ARM: imx27: Retrieve the CCM base address from devicetree
  ARM: imx27: Retrieve the SYSCTRL base address from devicetree
  ARM: s3c64xx: bring back notes from removed debug-macro.S
  ARM: s3c24xx: fix Wunused-variable warning on !MMU
  ARM: samsung: fix PM debug build with DEBUG_LL but !MMU
  MAINTAINERS: mark linux-samsung-soc list non-moderated
  ARM: imx: Remove remnant board file support pieces
  ...
parents 1f70935f accdab6d
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Documentation/devicetree/bindings/arm/omap/prm-inst.txt
View file @ e731f314
...@@ -18,6 +18,7 @@ Required properties: ...@@ -18,6 +18,7 @@ Required properties:
(base address and length) (base address and length)
Optional properties: Optional properties:
- #power-domain-cells: Should be 0 if the instance is a power domain provider.
- #reset-cells: Should be 1 if the PRM instance in question supports resets. - #reset-cells: Should be 1 if the PRM instance in question supports resets.
Example: Example:
...@@ -25,5 +26,6 @@ Example: ...@@ -25,5 +26,6 @@ Example:
prm_dsp2: prm@1b00 { prm_dsp2: prm@1b00 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1b00 0x40>; reg = <0x1b00 0x40>;
#power-domain-cells = <0>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
MAINTAINERS
View file @ e731f314
...@@ -2199,8 +2199,8 @@ ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT ...@@ -2199,8 +2199,8 @@ ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT
L: openmoko-kernel@lists.openmoko.org (subscribers-only) L: openmoko-kernel@lists.openmoko.org (subscribers-only)
S: Orphan S: Orphan
W: http://wiki.openmoko.org/wiki/Neo_FreeRunner W: http://wiki.openmoko.org/wiki/Neo_FreeRunner
F: arch/arm/mach-s3c24xx/gta02.h F: arch/arm/mach-s3c/gta02.h
F: arch/arm/mach-s3c24xx/mach-gta02.c F: arch/arm/mach-s3c/mach-gta02.c
ARM/Orion SoC/Technologic Systems TS-78xx platform support ARM/Orion SoC/Technologic Systems TS-78xx platform support
M: Alexander Clouter <alex@digriz.org.uk> M: Alexander Clouter <alex@digriz.org.uk>
...@@ -2379,7 +2379,7 @@ ARM/SAMSUNG EXYNOS ARM ARCHITECTURES ...@@ -2379,7 +2379,7 @@ ARM/SAMSUNG EXYNOS ARM ARCHITECTURES
M: Kukjin Kim <kgene@kernel.org> M: Kukjin Kim <kgene@kernel.org>
M: Krzysztof Kozlowski <krzk@kernel.org> M: Krzysztof Kozlowski <krzk@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) L: linux-samsung-soc@vger.kernel.org
S: Maintained S: Maintained
Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/ Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
F: Documentation/arm/samsung/ F: Documentation/arm/samsung/
...@@ -2389,10 +2389,8 @@ F: arch/arm/boot/dts/exynos* ...@@ -2389,10 +2389,8 @@ F: arch/arm/boot/dts/exynos*
F: arch/arm/boot/dts/s3c* F: arch/arm/boot/dts/s3c*
F: arch/arm/boot/dts/s5p* F: arch/arm/boot/dts/s5p*
F: arch/arm/mach-exynos*/ F: arch/arm/mach-exynos*/
F: arch/arm/mach-s3c24*/ F: arch/arm/mach-s3c/
F: arch/arm/mach-s3c64xx/
F: arch/arm/mach-s5p*/ F: arch/arm/mach-s5p*/
F: arch/arm/plat-samsung/
F: arch/arm64/boot/dts/exynos/ F: arch/arm64/boot/dts/exynos/
F: drivers/*/*/*s3c24* F: drivers/*/*/*s3c24*
F: drivers/*/*s3c24* F: drivers/*/*s3c24*
...@@ -2403,6 +2401,9 @@ F: drivers/soc/samsung/ ...@@ -2403,6 +2401,9 @@ F: drivers/soc/samsung/
F: drivers/tty/serial/samsung* F: drivers/tty/serial/samsung*
F: include/linux/soc/samsung/ F: include/linux/soc/samsung/
N: exynos N: exynos
N: s3c2410
N: s3c64xx
N: s5pv210
ARM/SAMSUNG MOBILE MACHINE SUPPORT ARM/SAMSUNG MOBILE MACHINE SUPPORT
M: Kyungmin Park <kyungmin.park@samsung.com> M: Kyungmin Park <kyungmin.park@samsung.com>
...@@ -2421,7 +2422,7 @@ F: drivers/media/platform/s5p-g2d/ ...@@ -2421,7 +2422,7 @@ F: drivers/media/platform/s5p-g2d/
ARM/SAMSUNG S5P SERIES HDMI CEC SUBSYSTEM SUPPORT ARM/SAMSUNG S5P SERIES HDMI CEC SUBSYSTEM SUPPORT
M: Marek Szyprowski <m.szyprowski@samsung.com> M: Marek Szyprowski <m.szyprowski@samsung.com>
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) L: linux-samsung-soc@vger.kernel.org
L: linux-media@vger.kernel.org L: linux-media@vger.kernel.org
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/media/s5p-cec.txt F: Documentation/devicetree/bindings/media/s5p-cec.txt
...@@ -3415,7 +3416,7 @@ M: bcm-kernel-feedback-list@broadcom.com ...@@ -3415,7 +3416,7 @@ M: bcm-kernel-feedback-list@broadcom.com
L: linux-arm-kernel@lists.infradead.org L: linux-arm-kernel@lists.infradead.org
S: Maintained S: Maintained
F: arch/arm/boot/dts/bcm470* F: arch/arm/boot/dts/bcm470*
F: arch/arm/boot/dts/bcm5301x*.dtsi F: arch/arm/boot/dts/bcm5301*
F: arch/arm/boot/dts/bcm953012* F: arch/arm/boot/dts/bcm953012*
F: arch/arm/mach-bcm/bcm_5301x.c F: arch/arm/mach-bcm/bcm_5301x.c
...@@ -13447,7 +13448,7 @@ PCI DRIVER FOR SAMSUNG EXYNOS ...@@ -13447,7 +13448,7 @@ PCI DRIVER FOR SAMSUNG EXYNOS
M: Jingoo Han <jingoohan1@gmail.com> M: Jingoo Han <jingoohan1@gmail.com>
L: linux-pci@vger.kernel.org L: linux-pci@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) L: linux-samsung-soc@vger.kernel.org
S: Maintained S: Maintained
F: drivers/pci/controller/dwc/pci-exynos.c F: drivers/pci/controller/dwc/pci-exynos.c
...@@ -13854,7 +13855,7 @@ M: Tomasz Figa <tomasz.figa@gmail.com> ...@@ -13854,7 +13855,7 @@ M: Tomasz Figa <tomasz.figa@gmail.com>
M: Krzysztof Kozlowski <krzk@kernel.org> M: Krzysztof Kozlowski <krzk@kernel.org>
M: Sylwester Nawrocki <s.nawrocki@samsung.com> M: Sylwester Nawrocki <s.nawrocki@samsung.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) L: linux-samsung-soc@vger.kernel.org
S: Maintained S: Maintained
Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/ Q: https://patchwork.kernel.org/project/linux-samsung-soc/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung.git
...@@ -15415,7 +15416,7 @@ F: include/linux/mfd/samsung/ ...@@ -15415,7 +15416,7 @@ F: include/linux/mfd/samsung/
SAMSUNG S3C24XX/S3C64XX SOC SERIES CAMIF DRIVER SAMSUNG S3C24XX/S3C64XX SOC SERIES CAMIF DRIVER
M: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> M: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
L: linux-media@vger.kernel.org L: linux-media@vger.kernel.org
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) L: linux-samsung-soc@vger.kernel.org
S: Maintained S: Maintained
F: drivers/media/platform/s3c-camif/ F: drivers/media/platform/s3c-camif/
F: include/media/drv-intf/s3c_camif.h F: include/media/drv-intf/s3c_camif.h
...@@ -15465,7 +15466,7 @@ SAMSUNG SOC CLOCK DRIVERS ...@@ -15465,7 +15466,7 @@ SAMSUNG SOC CLOCK DRIVERS
M: Sylwester Nawrocki <s.nawrocki@samsung.com> M: Sylwester Nawrocki <s.nawrocki@samsung.com>
M: Tomasz Figa <tomasz.figa@gmail.com> M: Tomasz Figa <tomasz.figa@gmail.com>
M: Chanwoo Choi <cw00.choi@samsung.com> M: Chanwoo Choi <cw00.choi@samsung.com>
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) L: linux-samsung-soc@vger.kernel.org
S: Supported S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/snawrocki/clk.git
F: Documentation/devicetree/bindings/clock/exynos*.txt F: Documentation/devicetree/bindings/clock/exynos*.txt
...@@ -15473,17 +15474,20 @@ F: Documentation/devicetree/bindings/clock/samsung,s3c* ...@@ -15473,17 +15474,20 @@ F: Documentation/devicetree/bindings/clock/samsung,s3c*
F: Documentation/devicetree/bindings/clock/samsung,s5p* F: Documentation/devicetree/bindings/clock/samsung,s5p*
F: drivers/clk/samsung/ F: drivers/clk/samsung/
F: include/dt-bindings/clock/exynos*.h F: include/dt-bindings/clock/exynos*.h
F: include/linux/clk/samsung.h
F: include/linux/platform_data/clk-s3c2410.h
SAMSUNG SPI DRIVERS SAMSUNG SPI DRIVERS
M: Kukjin Kim <kgene@kernel.org> M: Kukjin Kim <kgene@kernel.org>
M: Krzysztof Kozlowski <krzk@kernel.org> M: Krzysztof Kozlowski <krzk@kernel.org>
M: Andi Shyti <andi@etezian.org> M: Andi Shyti <andi@etezian.org>
L: linux-spi@vger.kernel.org L: linux-spi@vger.kernel.org
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers) L: linux-samsung-soc@vger.kernel.org
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/spi/spi-samsung.txt F: Documentation/devicetree/bindings/spi/spi-samsung.txt
F: drivers/spi/spi-s3c* F: drivers/spi/spi-s3c*
F: include/linux/platform_data/spi-s3c64xx.h F: include/linux/platform_data/spi-s3c64xx.h
F: include/linux/spi/s3c24xx-fiq.h
SAMSUNG SXGBE DRIVERS SAMSUNG SXGBE DRIVERS
M: Byungho An <bh74.an@samsung.com> M: Byungho An <bh74.an@samsung.com>
...@@ -16001,19 +16005,17 @@ F: drivers/video/fbdev/simplefb.c ...@@ -16001,19 +16005,17 @@ F: drivers/video/fbdev/simplefb.c
F: include/linux/platform_data/simplefb.h F: include/linux/platform_data/simplefb.h
SIMTEC EB110ATX (Chalice CATS) SIMTEC EB110ATX (Chalice CATS)
M: Vincent Sanders <vince@simtec.co.uk>
M: Simtec Linux Team <linux@simtec.co.uk> M: Simtec Linux Team <linux@simtec.co.uk>
S: Supported S: Supported
W: http://www.simtec.co.uk/products/EB110ATX/ W: http://www.simtec.co.uk/products/EB110ATX/
SIMTEC EB2410ITX (BAST) SIMTEC EB2410ITX (BAST)
M: Vincent Sanders <vince@simtec.co.uk>
M: Simtec Linux Team <linux@simtec.co.uk> M: Simtec Linux Team <linux@simtec.co.uk>
S: Supported S: Supported
W: http://www.simtec.co.uk/products/EB2410ITX/ W: http://www.simtec.co.uk/products/EB2410ITX/
F: arch/arm/mach-s3c24xx/bast-ide.c F: arch/arm/mach-s3c/bast-ide.c
F: arch/arm/mach-s3c24xx/bast-irq.c F: arch/arm/mach-s3c/bast-irq.c
F: arch/arm/mach-s3c24xx/mach-bast.c F: arch/arm/mach-s3c/mach-bast.c
SIOX SIOX
M: Thorsten Scherer <t.scherer@eckelmann.de> M: Thorsten Scherer <t.scherer@eckelmann.de>
...@@ -18952,7 +18954,7 @@ F: Documentation/devicetree/bindings/mfd/wm831x.txt ...@@ -18952,7 +18954,7 @@ F: Documentation/devicetree/bindings/mfd/wm831x.txt
F: Documentation/devicetree/bindings/regulator/wlf,arizona.yaml F: Documentation/devicetree/bindings/regulator/wlf,arizona.yaml
F: Documentation/devicetree/bindings/sound/wlf,arizona.yaml F: Documentation/devicetree/bindings/sound/wlf,arizona.yaml
F: Documentation/hwmon/wm83??.rst F: Documentation/hwmon/wm83??.rst
F: arch/arm/mach-s3c64xx/mach-crag6410* F: arch/arm/mach-s3c/mach-crag6410*
F: drivers/clk/clk-wm83*.c F: drivers/clk/clk-wm83*.c
F: drivers/extcon/extcon-arizona.c F: drivers/extcon/extcon-arizona.c
F: drivers/gpio/gpio-*wm*.c F: drivers/gpio/gpio-*wm*.c
......
arch/arm/Kconfig
View file @ e731f314
...@@ -268,9 +268,7 @@ config PHYS_OFFSET ...@@ -268,9 +268,7 @@ config PHYS_OFFSET
depends on !ARM_PATCH_PHYS_VIRT depends on !ARM_PATCH_PHYS_VIRT
default DRAM_BASE if !MMU default DRAM_BASE if !MMU
default 0x00000000 if ARCH_EBSA110 || \ default 0x00000000 if ARCH_EBSA110 || \
ARCH_FOOTBRIDGE || \ ARCH_FOOTBRIDGE
ARCH_INTEGRATOR || \
ARCH_REALVIEW
default 0x10000000 if ARCH_OMAP1 || ARCH_RPC default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
default 0x20000000 if ARCH_S5PV210 default 0x20000000 if ARCH_S5PV210
default 0xc0000000 if ARCH_SA1100 default 0xc0000000 if ARCH_SA1100
...@@ -506,11 +504,12 @@ config ARCH_S3C24XX ...@@ -506,11 +504,12 @@ config ARCH_S3C24XX
select GPIOLIB select GPIOLIB
select GENERIC_IRQ_MULTI_HANDLER select GENERIC_IRQ_MULTI_HANDLER
select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_IO_H select NEED_MACH_IO_H
select S3C2410_WATCHDOG
select SAMSUNG_ATAGS select SAMSUNG_ATAGS
select USE_OF select USE_OF
select WATCHDOG
help help
Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
and S3C2450 SoCs based systems, such as the Simtec Electronics BAST and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
...@@ -639,7 +638,6 @@ source "arch/arm/mach-dove/Kconfig" ...@@ -639,7 +638,6 @@ source "arch/arm/mach-dove/Kconfig"
source "arch/arm/mach-ep93xx/Kconfig" source "arch/arm/mach-ep93xx/Kconfig"
source "arch/arm/mach-exynos/Kconfig" source "arch/arm/mach-exynos/Kconfig"
source "arch/arm/plat-samsung/Kconfig"
source "arch/arm/mach-footbridge/Kconfig" source "arch/arm/mach-footbridge/Kconfig"
...@@ -712,9 +710,7 @@ source "arch/arm/mach-realview/Kconfig" ...@@ -712,9 +710,7 @@ source "arch/arm/mach-realview/Kconfig"
source "arch/arm/mach-rockchip/Kconfig" source "arch/arm/mach-rockchip/Kconfig"
source "arch/arm/mach-s3c24xx/Kconfig" source "arch/arm/mach-s3c/Kconfig"
source "arch/arm/mach-s3c64xx/Kconfig"
source "arch/arm/mach-s5pv210/Kconfig" source "arch/arm/mach-s5pv210/Kconfig"
......
arch/arm/Kconfig.debug
View file @ e731f314
...@@ -1005,7 +1005,7 @@ choice ...@@ -1005,7 +1005,7 @@ choice
via SCIFA4 on Renesas SH-Mobile AG5 (SH73A0). via SCIFA4 on Renesas SH-Mobile AG5 (SH73A0).
config DEBUG_S3C_UART0 config DEBUG_S3C_UART0
depends on PLAT_SAMSUNG depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS
select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS
select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C24XX_UART if ARCH_S3C24XX
select DEBUG_S3C64XX_UART if ARCH_S3C64XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX
...@@ -1017,7 +1017,7 @@ choice ...@@ -1017,7 +1017,7 @@ choice
by the boot-loader before use. by the boot-loader before use.
config DEBUG_S3C_UART1 config DEBUG_S3C_UART1
depends on PLAT_SAMSUNG depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS
select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS
select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C24XX_UART if ARCH_S3C24XX
select DEBUG_S3C64XX_UART if ARCH_S3C64XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX
...@@ -1029,7 +1029,7 @@ choice ...@@ -1029,7 +1029,7 @@ choice
by the boot-loader before use. by the boot-loader before use.
config DEBUG_S3C_UART2 config DEBUG_S3C_UART2
depends on PLAT_SAMSUNG depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS
select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS
select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C24XX_UART if ARCH_S3C24XX
select DEBUG_S3C64XX_UART if ARCH_S3C64XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX
...@@ -1041,7 +1041,7 @@ choice ...@@ -1041,7 +1041,7 @@ choice
by the boot-loader before use. by the boot-loader before use.
config DEBUG_S3C_UART3 config DEBUG_S3C_UART3
depends on PLAT_SAMSUNG && (ARCH_EXYNOS || ARCH_S5PV210) depends on ARCH_EXYNOS || ARCH_S5PV210
select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS
select DEBUG_S3C64XX_UART if ARCH_S3C64XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX
select DEBUG_S5PV210_UART if ARCH_S5PV210 select DEBUG_S5PV210_UART if ARCH_S5PV210
...@@ -1086,6 +1086,14 @@ choice ...@@ -1086,6 +1086,14 @@ choice
on SA-11x0 UART ports. The kernel will check for the first on SA-11x0 UART ports. The kernel will check for the first
enabled UART in a sequence 3-1-2. enabled UART in a sequence 3-1-2.
config DEBUG_SD5203_UART
bool "Hisilicon SD5203 Debug UART"
depends on ARCH_SD5203
select DEBUG_UART_8250
help
Say Y here if you want kernel low-level debugging support
on SD5203 UART.
config DEBUG_SOCFPGA_UART0 config DEBUG_SOCFPGA_UART0
depends on ARCH_SOCFPGA depends on ARCH_SOCFPGA
bool "Use SOCFPGA UART0 for low-level debug" bool "Use SOCFPGA UART0 for low-level debug"
...@@ -1497,6 +1505,16 @@ config DEBUG_S3C64XX_UART ...@@ -1497,6 +1505,16 @@ config DEBUG_S3C64XX_UART
config DEBUG_S5PV210_UART config DEBUG_S5PV210_UART
bool bool
config DEBUG_S3C_UART
depends on DEBUG_S3C2410_UART || DEBUG_S3C24XX_UART || \
DEBUG_S3C64XX_UART || DEBUG_S5PV210_UART || \
DEBUG_EXYNOS_UART
int
default "0" if DEBUG_S3C_UART0
default "1" if DEBUG_S3C_UART1
default "2" if DEBUG_S3C_UART2
default "3" if DEBUG_S3C_UART3
config DEBUG_OMAP2PLUS_UART config DEBUG_OMAP2PLUS_UART
bool bool
depends on ARCH_OMAP2PLUS depends on ARCH_OMAP2PLUS
...@@ -1650,6 +1668,7 @@ config DEBUG_UART_PHYS ...@@ -1650,6 +1668,7 @@ config DEBUG_UART_PHYS
default 0x11006000 if DEBUG_MT6589_UART0 default 0x11006000 if DEBUG_MT6589_UART0
default 0x11009000 if DEBUG_MT8135_UART3 default 0x11009000 if DEBUG_MT8135_UART3
default 0x16000000 if DEBUG_INTEGRATOR default 0x16000000 if DEBUG_INTEGRATOR
default 0x1600d000 if DEBUG_SD5203_UART
default 0x18000300 if DEBUG_BCM_5301X default 0x18000300 if DEBUG_BCM_5301X
default 0x18000400 if DEBUG_BCM_HR2 default 0x18000400 if DEBUG_BCM_HR2
default 0x18010000 if DEBUG_SIRFATLAS7_UART0 default 0x18010000 if DEBUG_SIRFATLAS7_UART0
...@@ -1852,7 +1871,7 @@ config DEBUG_UART_VIRT ...@@ -1852,7 +1871,7 @@ config DEBUG_UART_VIRT
default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1 default 0xfec60000 if DEBUG_SIRFPRIMA2_UART1
default 0xfec90000 if DEBUG_RK32_UART2 default 0xfec90000 if DEBUG_RK32_UART2
default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1 default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1
default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2 || DEBUG_SD5203_UART
default 0xfed60000 if DEBUG_RK29_UART0 default 0xfed60000 if DEBUG_RK29_UART0
default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
......
arch/arm/Makefile
View file @ e731f314
...@@ -212,8 +212,7 @@ machine-$(CONFIG_ARCH_REALTEK) += realtek ...@@ -212,8 +212,7 @@ machine-$(CONFIG_ARCH_REALTEK) += realtek
machine-$(CONFIG_ARCH_REALVIEW) += realview machine-$(CONFIG_ARCH_REALVIEW) += realview
machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
machine-$(CONFIG_ARCH_RPC) += rpc machine-$(CONFIG_ARCH_RPC) += rpc
machine-$(CONFIG_ARCH_S3C24XX) += s3c24xx machine-$(CONFIG_PLAT_SAMSUNG) += s3c
machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx
machine-$(CONFIG_ARCH_S5PV210) += s5pv210 machine-$(CONFIG_ARCH_S5PV210) += s5pv210
machine-$(CONFIG_ARCH_SA1100) += sa1100 machine-$(CONFIG_ARCH_SA1100) += sa1100
machine-$(CONFIG_ARCH_RENESAS) += shmobile machine-$(CONFIG_ARCH_RENESAS) += shmobile
...@@ -235,13 +234,9 @@ machine-$(CONFIG_PLAT_SPEAR) += spear ...@@ -235,13 +234,9 @@ machine-$(CONFIG_PLAT_SPEAR) += spear
# Platform directory name. This list is sorted alphanumerically # Platform directory name. This list is sorted alphanumerically
# by CONFIG_* macro name. # by CONFIG_* macro name.
plat-$(CONFIG_ARCH_EXYNOS) += samsung
plat-$(CONFIG_ARCH_OMAP) += omap plat-$(CONFIG_ARCH_OMAP) += omap
plat-$(CONFIG_ARCH_S3C64XX) += samsung
plat-$(CONFIG_ARCH_S5PV210) += samsung
plat-$(CONFIG_PLAT_ORION) += orion plat-$(CONFIG_PLAT_ORION) += orion
plat-$(CONFIG_PLAT_PXA) += pxa plat-$(CONFIG_PLAT_PXA) += pxa
plat-$(CONFIG_PLAT_S3C24XX) += samsung
plat-$(CONFIG_PLAT_VERSATILE) += versatile plat-$(CONFIG_PLAT_VERSATILE) += versatile
ifeq ($(CONFIG_ARCH_EBSA110),y) ifeq ($(CONFIG_ARCH_EBSA110),y)
......
arch/arm/boot/dts/am33xx-l4.dtsi
View file @ e731f314
...@@ -425,7 +425,6 @@ target-module@39000 { /* 0x44e39000, ap 33 02.0 */ ...@@ -425,7 +425,6 @@ target-module@39000 { /* 0x44e39000, ap 33 02.0 */
target-module@3e000 { /* 0x44e3e000, ap 35 60.0 */ target-module@3e000 { /* 0x44e3e000, ap 35 60.0 */
compatible = "ti,sysc-omap4-simple", "ti,sysc"; compatible = "ti,sysc-omap4-simple", "ti,sysc";
ti,hwmods = "rtc";
reg = <0x3e074 0x4>, reg = <0x3e074 0x4>,
<0x3e078 0x4>; <0x3e078 0x4>;
reg-names = "rev", "sysc"; reg-names = "rev", "sysc";
......
arch/arm/boot/dts/am33xx.dtsi
View file @ e731f314
...@@ -578,6 +578,7 @@ target-module@56000000 { ...@@ -578,6 +578,7 @@ target-module@56000000 {
<SYSC_IDLE_SMART>; <SYSC_IDLE_SMART>;
clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>; clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>;
clock-names = "fck"; clock-names = "fck";
power-domains = <&prm_gfx>;
resets = <&prm_gfx 0>; resets = <&prm_gfx 0>;
reset-names = "rstctrl"; reset-names = "rstctrl";
#address-cells = <1>; #address-cells = <1>;
...@@ -617,6 +618,7 @@ prm_device: prm@f00 { ...@@ -617,6 +618,7 @@ prm_device: prm@f00 {
prm_gfx: prm@1100 { prm_gfx: prm@1100 {
compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
reg = <0x1100 0x100>; reg = <0x1100 0x100>;
#power-domain-cells = <0>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
}; };
......
arch/arm/boot/dts/am4372.dtsi
View file @ e731f314
...@@ -517,6 +517,7 @@ target-module@56000000 { ...@@ -517,6 +517,7 @@ target-module@56000000 {
<SYSC_IDLE_SMART>; <SYSC_IDLE_SMART>;
clocks = <&gfx_l3_clkctrl AM4_GFX_L3_GFX_CLKCTRL 0>; clocks = <&gfx_l3_clkctrl AM4_GFX_L3_GFX_CLKCTRL 0>;
clock-names = "fck"; clock-names = "fck";
power-domains = <&prm_gfx>;
resets = <&prm_gfx 0>; resets = <&prm_gfx 0>;
reset-names = "rstctrl"; reset-names = "rstctrl";
#address-cells = <1>; #address-cells = <1>;
...@@ -533,6 +534,7 @@ &prcm { ...@@ -533,6 +534,7 @@ &prcm {
prm_gfx: prm@400 { prm_gfx: prm@400 {
compatible = "ti,am4-prm-inst", "ti,omap-prm-inst"; compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
reg = <0x400 0x100>; reg = <0x400 0x100>;
#power-domain-cells = <0>;
#reset-cells = <1>; #reset-cells = <1>;
}; };
......
arch/arm/boot/dts/am437x-l4.dtsi
View file @ e731f314
...@@ -409,9 +409,8 @@ target-module@39000 { /* 0x44e39000, ap 32 02.0 */ ...@@ -409,9 +409,8 @@ target-module@39000 { /* 0x44e39000, ap 32 02.0 */
ranges = <0x0 0x39000 0x1000>; ranges = <0x0 0x39000 0x1000>;
}; };
target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */ rtc_target: target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */
compatible = "ti,sysc-omap4-simple", "ti,sysc"; compatible = "ti,sysc-omap4-simple", "ti,sysc";
ti,hwmods = "rtc";
reg = <0x3e074 0x4>, reg = <0x3e074 0x4>,
<0x3e078 0x4>; <0x3e078 0x4>;
reg-names = "rev", "sysc"; reg-names = "rev", "sysc";
......
arch/arm/boot/dts/am43x-epos-evm.dts
View file @ e731f314
...@@ -833,6 +833,10 @@ &epwmss0 { ...@@ -833,6 +833,10 @@ &epwmss0 {
status = "okay"; status = "okay";
}; };
&rtc_target {
status = "disabled";
};
&tscadc { &tscadc {
status = "okay"; status = "okay";
......
arch/arm/boot/dts/dra7-l4.dtsi
View file @ e731f314
...@@ -3561,7 +3561,6 @@ timer16: timer@0 { ...@@ -3561,7 +3561,6 @@ timer16: timer@0 {
rtctarget: target-module@38000 { /* 0x48838000, ap 29 12.0 */ rtctarget: target-module@38000 { /* 0x48838000, ap 29 12.0 */
compatible = "ti,sysc-omap4-simple", "ti,sysc"; compatible = "ti,sysc-omap4-simple", "ti,sysc";
ti,hwmods = "rtcss";
reg = <0x38074 0x4>, reg = <0x38074 0x4>,
<0x38078 0x4>; <0x38078 0x4>;
reg-names = "rev", "sysc"; reg-names = "rev", "sysc";
......
arch/arm/boot/dts/omap4-l4-abe.dtsi
View file @ e731f314
&l4_abe { /* 0x40100000 */ &l4_abe { /* 0x40100000 */
compatible = "ti,omap4-l4-abe", "simple-bus"; compatible = "ti,omap4-l4-abe", "simple-pm-bus";
reg = <0x40100000 0x400>, reg = <0x40100000 0x400>,
<0x40100400 0x400>; <0x40100400 0x400>;
reg-names = "la", "ap"; reg-names = "la", "ap";
power-domains = <&prm_abe>;
/* OMAP4_L4_ABE_CLKCTRL is read-only */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */ ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
<0x49000000 0x49000000 0x100000>; <0x49000000 0x49000000 0x100000>;
segment@0 { /* 0x40100000 */ segment@0 { /* 0x40100000 */
compatible = "simple-bus"; compatible = "simple-pm-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = ranges =
......
arch/arm/boot/dts/omap4.dtsi
View file @ e731f314
...@@ -658,6 +658,12 @@ prm_tesla: prm@400 { ...@@ -658,6 +658,12 @@ prm_tesla: prm@400 {
#reset-cells = <1>; #reset-cells = <1>;
}; };
prm_abe: prm@500 {
compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
reg = <0x500 0x100>;
#power-domain-cells = <0>;
};
prm_core: prm@700 { prm_core: prm@700 {
compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst";
reg = <0x700 0x100>; reg = <0x700 0x100>;
......
arch/arm/boot/dts/omap5-l4-abe.dtsi
View file @ e731f314
&l4_abe { /* 0x40100000 */ &l4_abe { /* 0x40100000 */
compatible = "ti,omap5-l4-abe", "simple-bus"; compatible = "ti,omap5-l4-abe", "simple-pm-bus";
reg = <0x40100000 0x400>, reg = <0x40100000 0x400>,
<0x40100400 0x400>; <0x40100400 0x400>;
reg-names = "la", "ap"; reg-names = "la", "ap";
power-domains = <&prm_abe>;
/* OMAP5_L4_ABE_CLKCTRL is read-only */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */ ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */
<0x49000000 0x49000000 0x100000>; <0x49000000 0x49000000 0x100000>;
segment@0 { /* 0x40100000 */ segment@0 { /* 0x40100000 */
compatible = "simple-bus"; compatible = "simple-pm-bus";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = ranges =
......
arch/arm/boot/dts/omap5.dtsi
View file @ e731f314
...@@ -676,6 +676,12 @@ prm_dsp: prm@400 { ...@@ -676,6 +676,12 @@ prm_dsp: prm@400 {
#reset-cells = <1>; #reset-cells = <1>;
}; };
prm_abe: prm@500 {
compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
reg = <0x500 0x100>;
#power-domain-cells = <0>;
};
prm_core: prm@700 { prm_core: prm@700 {
compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
reg = <0x700 0x100>; reg = <0x700 0x100>;
......
arch/arm/configs/imx_v4_v5_defconfig
View file @ e731f314
...@@ -20,9 +20,9 @@ CONFIG_MACH_MX27ADS=y ...@@ -20,9 +20,9 @@ CONFIG_MACH_MX27ADS=y
CONFIG_MACH_MX27_3DS=y CONFIG_MACH_MX27_3DS=y
CONFIG_MACH_IMX27_VISSTRIM_M10=y CONFIG_MACH_IMX27_VISSTRIM_M10=y
CONFIG_MACH_PCA100=y CONFIG_MACH_PCA100=y
CONFIG_MACH_IMX27_DT=y
CONFIG_SOC_IMX1=y CONFIG_SOC_IMX1=y
CONFIG_SOC_IMX25=y CONFIG_SOC_IMX25=y
CONFIG_SOC_IMX27=y
CONFIG_AEABI=y CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_ZBOOT_ROM_BSS=0x0
......
arch/arm/configs/imx_v6_v7_defconfig
View file @ e731f314
...@@ -15,20 +15,8 @@ CONFIG_PERF_EVENTS=y ...@@ -15,20 +15,8 @@ CONFIG_PERF_EVENTS=y
# CONFIG_COMPAT_BRK is not set # CONFIG_COMPAT_BRK is not set
CONFIG_ARCH_MULTI_V6=y CONFIG_ARCH_MULTI_V6=y
CONFIG_ARCH_MXC=y CONFIG_ARCH_MXC=y
CONFIG_MACH_MX31LILLY=y CONFIG_SOC_IMX31=y
CONFIG_MACH_MX31LITE=y CONFIG_SOC_IMX35=y
CONFIG_MACH_PCM037=y
CONFIG_MACH_PCM037_EET=y
CONFIG_MACH_MX31_3DS=y
CONFIG_MACH_MX31MOBOARD=y
CONFIG_MACH_QONG=y
CONFIG_MACH_ARMADILLO5X0=y
CONFIG_MACH_KZM_ARM11_01=y
CONFIG_MACH_IMX31_DT=y
CONFIG_MACH_IMX35_DT=y
CONFIG_MACH_PCM043=y
CONFIG_MACH_MX35_3DS=y
CONFIG_MACH_VPR200=y
CONFIG_SOC_IMX50=y CONFIG_SOC_IMX50=y
CONFIG_SOC_IMX51=y CONFIG_SOC_IMX51=y
CONFIG_SOC_IMX53=y CONFIG_SOC_IMX53=y
......
arch/arm/configs/multi_v5_defconfig
View file @ e731f314
...@@ -29,8 +29,8 @@ CONFIG_MACH_MX27ADS=y ...@@ -29,8 +29,8 @@ CONFIG_MACH_MX27ADS=y
CONFIG_MACH_MX27_3DS=y CONFIG_MACH_MX27_3DS=y
CONFIG_MACH_IMX27_VISSTRIM_M10=y CONFIG_MACH_IMX27_VISSTRIM_M10=y
CONFIG_MACH_PCA100=y CONFIG_MACH_PCA100=y
CONFIG_MACH_IMX27_DT=y
CONFIG_SOC_IMX25=y CONFIG_SOC_IMX25=y
CONFIG_SOC_IMX27=y
CONFIG_ARCH_MVEBU=y CONFIG_ARCH_MVEBU=y
CONFIG_MACH_KIRKWOOD=y CONFIG_MACH_KIRKWOOD=y
CONFIG_ARCH_ORION5X=y CONFIG_ARCH_ORION5X=y
......
arch/arm/include/debug/brcmstb.S
View file @ e731f314
...@@ -32,6 +32,8 @@ ...@@ -32,6 +32,8 @@
#define UARTA_7271 UARTA_7268 #define UARTA_7271 UARTA_7268
#define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000) #define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000)
#define UARTA_7216 UARTA_7278 #define UARTA_7216 UARTA_7278
#define UARTA_72164 UARTA_7278
#define UARTA_72165 UARTA_7278
#define UARTA_7364 REG_PHYS_ADDR(0x40b000) #define UARTA_7364 REG_PHYS_ADDR(0x40b000)
#define UARTA_7366 UARTA_7364 #define UARTA_7366 UARTA_7364
#define UARTA_74371 REG_PHYS_ADDR(0x406b00) #define UARTA_74371 REG_PHYS_ADDR(0x406b00)
...@@ -84,17 +86,19 @@ ARM_BE8( rev \rv, \rv ) ...@@ -84,17 +86,19 @@ ARM_BE8( rev \rv, \rv )
/* Chip specific detection starts here */ /* Chip specific detection starts here */
20: checkuart(\rp, \rv, 0x33900000, 3390) 20: checkuart(\rp, \rv, 0x33900000, 3390)
21: checkuart(\rp, \rv, 0x72160000, 7216) 21: checkuart(\rp, \rv, 0x72160000, 7216)
22: checkuart(\rp, \rv, 0x72500000, 7250) 22: checkuart(\rp, \rv, 0x07216400, 72164)
23: checkuart(\rp, \rv, 0x72550000, 7255) 23: checkuart(\rp, \rv, 0x07216500, 72165)
24: checkuart(\rp, \rv, 0x72600000, 7260) 24: checkuart(\rp, \rv, 0x72500000, 7250)
25: checkuart(\rp, \rv, 0x72680000, 7268) 25: checkuart(\rp, \rv, 0x72550000, 7255)
26: checkuart(\rp, \rv, 0x72710000, 7271) 26: checkuart(\rp, \rv, 0x72600000, 7260)
27: checkuart(\rp, \rv, 0x72780000, 7278) 27: checkuart(\rp, \rv, 0x72680000, 7268)
28: checkuart(\rp, \rv, 0x73640000, 7364) 28: checkuart(\rp, \rv, 0x72710000, 7271)
29: checkuart(\rp, \rv, 0x73660000, 7366) 29: checkuart(\rp, \rv, 0x72780000, 7278)
30: checkuart(\rp, \rv, 0x07437100, 74371) 30: checkuart(\rp, \rv, 0x73640000, 7364)
31: checkuart(\rp, \rv, 0x74390000, 7439) 31: checkuart(\rp, \rv, 0x73660000, 7366)
32: checkuart(\rp, \rv, 0x74450000, 7445) 32: checkuart(\rp, \rv, 0x07437100, 74371)
33: checkuart(\rp, \rv, 0x74390000, 7439)
34: checkuart(\rp, \rv, 0x74450000, 7445)
/* No valid UART found */ /* No valid UART found */
90: mov \rp, #0 90: mov \rp, #0
......
arch/arm/mach-at91/pm.c
View file @ e731f314
...@@ -53,6 +53,7 @@ static struct at91_soc_pm soc_pm = { ...@@ -53,6 +53,7 @@ static struct at91_soc_pm soc_pm = {
static const match_table_t pm_modes __initconst = { static const match_table_t pm_modes __initconst = {
{ AT91_PM_STANDBY, "standby" }, { AT91_PM_STANDBY, "standby" },
{ AT91_PM_ULP0, "ulp0" }, { AT91_PM_ULP0, "ulp0" },
{ AT91_PM_ULP0_FAST, "ulp0-fast" },
{ AT91_PM_ULP1, "ulp1" }, { AT91_PM_ULP1, "ulp1" },
{ AT91_PM_BACKUP, "backup" }, { AT91_PM_BACKUP, "backup" },
{ -1, NULL }, { -1, NULL },
...@@ -557,11 +558,6 @@ static void at91rm9200_idle(void) ...@@ -557,11 +558,6 @@ static void at91rm9200_idle(void)
writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR); writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);
} }
static void at91sam9x60_idle(void)
{
cpu_do_idle();
}
static void at91sam9_idle(void) static void at91sam9_idle(void)
{ {
writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR); writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR);
...@@ -789,6 +785,51 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = { ...@@ -789,6 +785,51 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = {
{ /* sentinel */ }, { /* sentinel */ },
}; };
static void __init at91_pm_modes_validate(const int *modes, int len)
{
u8 i, standby = 0, suspend = 0;
int mode;
for (i = 0; i < len; i++) {
if (standby && suspend)
break;
if (modes[i] == soc_pm.data.standby_mode && !standby) {
standby = 1;
continue;
}
if (modes[i] == soc_pm.data.suspend_mode && !suspend) {
suspend = 1;
continue;
}
}
if (!standby) {
if (soc_pm.data.suspend_mode == AT91_PM_STANDBY)
mode = AT91_PM_ULP0;
else
mode = AT91_PM_STANDBY;
pr_warn("AT91: PM: %s mode not supported! Using %s.\n",
pm_modes[soc_pm.data.standby_mode].pattern,
pm_modes[mode].pattern);
soc_pm.data.standby_mode = mode;
}
if (!suspend) {
if (soc_pm.data.standby_mode == AT91_PM_ULP0)
mode = AT91_PM_STANDBY;
else
mode = AT91_PM_ULP0;
pr_warn("AT91: PM: %s mode not supported! Using %s.\n",
pm_modes[soc_pm.data.suspend_mode].pattern,
pm_modes[mode].pattern);
soc_pm.data.suspend_mode = mode;
}
}
static void __init at91_pm_init(void (*pm_idle)(void)) static void __init at91_pm_init(void (*pm_idle)(void))
{ {
struct device_node *pmc_np; struct device_node *pmc_np;
...@@ -800,6 +841,7 @@ static void __init at91_pm_init(void (*pm_idle)(void)) ...@@ -800,6 +841,7 @@ static void __init at91_pm_init(void (*pm_idle)(void))
pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id); pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id);
soc_pm.data.pmc = of_iomap(pmc_np, 0); soc_pm.data.pmc = of_iomap(pmc_np, 0);
of_node_put(pmc_np);
if (!soc_pm.data.pmc) { if (!soc_pm.data.pmc) {
pr_err("AT91: PM not supported, PMC not found\n"); pr_err("AT91: PM not supported, PMC not found\n");
return; return;
...@@ -830,6 +872,14 @@ void __init at91rm9200_pm_init(void) ...@@ -830,6 +872,14 @@ void __init at91rm9200_pm_init(void)
if (!IS_ENABLED(CONFIG_SOC_AT91RM9200)) if (!IS_ENABLED(CONFIG_SOC_AT91RM9200))
return; return;
/*
* Force STANDBY and ULP0 mode to avoid calling
* at91_pm_modes_validate() which may increase booting time.
* Platform supports anyway only STANDBY and ULP0 modes.
*/
soc_pm.data.standby_mode = AT91_PM_STANDBY;
soc_pm.data.suspend_mode = AT91_PM_ULP0;
at91_dt_ramc(); at91_dt_ramc();
/* /*
...@@ -842,12 +892,17 @@ void __init at91rm9200_pm_init(void) ...@@ -842,12 +892,17 @@ void __init at91rm9200_pm_init(void)
void __init sam9x60_pm_init(void) void __init sam9x60_pm_init(void)
{ {
static const int modes[] __initconst = {
AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, AT91_PM_ULP1,
};
if (!IS_ENABLED(CONFIG_SOC_SAM9X60)) if (!IS_ENABLED(CONFIG_SOC_SAM9X60))
return; return;
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
at91_pm_modes_init(); at91_pm_modes_init();
at91_dt_ramc(); at91_dt_ramc();
at91_pm_init(at91sam9x60_idle); at91_pm_init(NULL);
soc_pm.ws_ids = sam9x60_ws_ids; soc_pm.ws_ids = sam9x60_ws_ids;
soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws; soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws;
...@@ -858,26 +913,46 @@ void __init at91sam9_pm_init(void) ...@@ -858,26 +913,46 @@ void __init at91sam9_pm_init(void)
if (!IS_ENABLED(CONFIG_SOC_AT91SAM9)) if (!IS_ENABLED(CONFIG_SOC_AT91SAM9))
return; return;
/*
* Force STANDBY and ULP0 mode to avoid calling
* at91_pm_modes_validate() which may increase booting time.
* Platform supports anyway only STANDBY and ULP0 modes.
*/
soc_pm.data.standby_mode = AT91_PM_STANDBY;
soc_pm.data.suspend_mode = AT91_PM_ULP0;
at91_dt_ramc(); at91_dt_ramc();
at91_pm_init(at91sam9_idle); at91_pm_init(at91sam9_idle);
} }
void __init sama5_pm_init(void) void __init sama5_pm_init(void)
{ {
static const int modes[] __initconst = {
AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST,
};
if (!IS_ENABLED(CONFIG_SOC_SAMA5)) if (!IS_ENABLED(CONFIG_SOC_SAMA5))
return; return;
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
at91_dt_ramc(); at91_dt_ramc();
at91_pm_init(NULL); at91_pm_init(NULL);
} }
void __init sama5d2_pm_init(void) void __init sama5d2_pm_init(void)
{ {
static const int modes[] __initconst = {
AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, AT91_PM_ULP1,
AT91_PM_BACKUP,
};
if (!IS_ENABLED(CONFIG_SOC_SAMA5D2)) if (!IS_ENABLED(CONFIG_SOC_SAMA5D2))
return; return;
at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
at91_pm_modes_init(); at91_pm_modes_init();
sama5_pm_init(); at91_dt_ramc();
at91_pm_init(NULL);
soc_pm.ws_ids = sama5d2_ws_ids; soc_pm.ws_ids = sama5d2_ws_ids;
soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws; soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws;
......
arch/arm/mach-at91/pm.h
View file @ e731f314
...@@ -19,8 +19,9 @@ ...@@ -19,8 +19,9 @@
#define AT91_PM_STANDBY 0x00 #define AT91_PM_STANDBY 0x00
#define AT91_PM_ULP0 0x01 #define AT91_PM_ULP0 0x01
#define AT91_PM_ULP1 0x02 #define AT91_PM_ULP0_FAST 0x02
#define AT91_PM_BACKUP 0x03 #define AT91_PM_ULP1 0x03
#define AT91_PM_BACKUP 0x04
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
struct at91_pm_data { struct at91_pm_data {
......
arch/arm/mach-at91/pm_suspend.S
View file @ e731f314
...@@ -164,7 +164,22 @@ ENDPROC(at91_backup_mode) ...@@ -164,7 +164,22 @@ ENDPROC(at91_backup_mode)
.macro at91_pm_ulp0_mode .macro at91_pm_ulp0_mode
ldr pmc, .pmc_base ldr pmc, .pmc_base
ldr tmp2, .pm_mode
ldr tmp3, .mckr_offset
/* Check if ULP0 fast variant has been requested. */
cmp tmp2, #AT91_PM_ULP0_FAST
bne 0f
/* Set highest prescaler for power saving */
ldr tmp1, [pmc, tmp3]
bic tmp1, tmp1, #AT91_PMC_PRES
orr tmp1, tmp1, #AT91_PMC_PRES_64
str tmp1, [pmc, tmp3]
wait_mckrdy
b 1f
0:
/* Turn off the crystal oscillator */ /* Turn off the crystal oscillator */
ldr tmp1, [pmc, #AT91_CKGR_MOR] ldr tmp1, [pmc, #AT91_CKGR_MOR]
bic tmp1, tmp1, #AT91_PMC_MOSCEN bic tmp1, tmp1, #AT91_PMC_MOSCEN
...@@ -192,7 +207,18 @@ ENDPROC(at91_backup_mode) ...@@ -192,7 +207,18 @@ ENDPROC(at91_backup_mode)
/* Wait for interrupt */ /* Wait for interrupt */
1: at91_cpu_idle 1: at91_cpu_idle
/* Restore RC oscillator state */ /* Check if ULP0 fast variant has been requested. */
cmp tmp2, #AT91_PM_ULP0_FAST
bne 5f
/* Set lowest prescaler for fast resume. */
ldr tmp1, [pmc, tmp3]
bic tmp1, tmp1, #AT91_PMC_PRES
str tmp1, [pmc, tmp3]
wait_mckrdy
b 6f
5: /* Restore RC oscillator state */
ldr tmp1, .saved_osc_status ldr tmp1, .saved_osc_status
tst tmp1, #AT91_PMC_MOSCRCS tst tmp1, #AT91_PMC_MOSCRCS
beq 4f beq 4f
...@@ -216,6 +242,7 @@ ENDPROC(at91_backup_mode) ...@@ -216,6 +242,7 @@ ENDPROC(at91_backup_mode)
str tmp1, [pmc, #AT91_CKGR_MOR] str tmp1, [pmc, #AT91_CKGR_MOR]
wait_moscrdy wait_moscrdy
6:
.endm .endm
/** /**
...@@ -473,23 +500,29 @@ ENDPROC(at91_backup_mode) ...@@ -473,23 +500,29 @@ ENDPROC(at91_backup_mode)
ENTRY(at91_ulp_mode) ENTRY(at91_ulp_mode)
ldr pmc, .pmc_base ldr pmc, .pmc_base
ldr tmp2, .mckr_offset ldr tmp2, .mckr_offset
ldr tmp3, .pm_mode
/* Save Master clock setting */ /* Save Master clock setting */
ldr tmp1, [pmc, tmp2] ldr tmp1, [pmc, tmp2]
str tmp1, .saved_mckr str tmp1, .saved_mckr
/* /*
* Set the Master clock source to slow clock * Set master clock source to:
* - MAINCK if using ULP0 fast variant
* - slow clock, otherwise
*/ */
bic tmp1, tmp1, #AT91_PMC_CSS bic tmp1, tmp1, #AT91_PMC_CSS
cmp tmp3, #AT91_PM_ULP0_FAST
bne save_mck
orr tmp1, tmp1, #AT91_PMC_CSS_MAIN
save_mck:
str tmp1, [pmc, tmp2] str tmp1, [pmc, tmp2]
wait_mckrdy wait_mckrdy
at91_plla_disable at91_plla_disable
ldr r0, .pm_mode cmp tmp3, #AT91_PM_ULP1
cmp r0, #AT91_PM_ULP1
beq ulp1_mode beq ulp1_mode
at91_pm_ulp0_mode at91_pm_ulp0_mode
......
arch/arm/mach-bcm/Kconfig
View file @ e731f314
...@@ -208,6 +208,7 @@ config ARCH_BRCMSTB ...@@ -208,6 +208,7 @@ config ARCH_BRCMSTB
select ARM_GIC select ARM_GIC
select ARM_ERRATA_798181 if SMP select ARM_ERRATA_798181 if SMP
select HAVE_ARM_ARCH_TIMER select HAVE_ARM_ARCH_TIMER
select BCM7038_L1_IRQ
select BRCMSTB_L2_IRQ select BRCMSTB_L2_IRQ
select BCM7120_L2_IRQ select BCM7120_L2_IRQ
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
......
arch/arm/mach-davinci/board-dm644x-evm.c
View file @ e731f314
...@@ -548,8 +548,7 @@ static const struct property_entry eeprom_properties[] = { ...@@ -548,8 +548,7 @@ static const struct property_entry eeprom_properties[] = {
*/ */
static struct i2c_client *dm6446evm_msp; static struct i2c_client *dm6446evm_msp;
static int dm6446evm_msp_probe(struct i2c_client *client, static int dm6446evm_msp_probe(struct i2c_client *client)
const struct i2c_device_id *id)
{ {
dm6446evm_msp = client; dm6446evm_msp = client;
return 0; return 0;
...@@ -569,7 +568,7 @@ static const struct i2c_device_id dm6446evm_msp_ids[] = { ...@@ -569,7 +568,7 @@ static const struct i2c_device_id dm6446evm_msp_ids[] = {
static struct i2c_driver dm6446evm_msp_driver = { static struct i2c_driver dm6446evm_msp_driver = {
.driver.name = "dm6446evm_msp", .driver.name = "dm6446evm_msp",
.id_table = dm6446evm_msp_ids, .id_table = dm6446evm_msp_ids,
.probe = dm6446evm_msp_probe, .probe_new = dm6446evm_msp_probe,
.remove = dm6446evm_msp_remove, .remove = dm6446evm_msp_remove,
}; };
......
arch/arm/mach-davinci/board-dm646x-evm.c
View file @ e731f314
...@@ -160,8 +160,7 @@ static struct platform_device davinci_aemif_device = { ...@@ -160,8 +160,7 @@ static struct platform_device davinci_aemif_device = {
#define DM646X_EVM_ATA_PWD BIT(1) #define DM646X_EVM_ATA_PWD BIT(1)
/* CPLD Register 0 Client: used for I/O Control */ /* CPLD Register 0 Client: used for I/O Control */
static int cpld_reg0_probe(struct i2c_client *client, static int cpld_reg0_probe(struct i2c_client *client)
const struct i2c_device_id *id)
{ {
if (HAS_ATA) { if (HAS_ATA) {
u8 data; u8 data;
...@@ -197,7 +196,7 @@ static const struct i2c_device_id cpld_reg_ids[] = { ...@@ -197,7 +196,7 @@ static const struct i2c_device_id cpld_reg_ids[] = {
static struct i2c_driver dm6467evm_cpld_driver = { static struct i2c_driver dm6467evm_cpld_driver = {
.driver.name = "cpld_reg0", .driver.name = "cpld_reg0",
.id_table = cpld_reg_ids, .id_table = cpld_reg_ids,
.probe = cpld_reg0_probe, .probe_new = cpld_reg0_probe,
}; };
/* LEDS */ /* LEDS */
...@@ -397,8 +396,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = { ...@@ -397,8 +396,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = {
#ifdef CONFIG_I2C #ifdef CONFIG_I2C
static struct i2c_client *cpld_client; static struct i2c_client *cpld_client;
static int cpld_video_probe(struct i2c_client *client, static int cpld_video_probe(struct i2c_client *client)
const struct i2c_device_id *id)
{ {
cpld_client = client; cpld_client = client;
return 0; return 0;
...@@ -419,7 +417,7 @@ static struct i2c_driver cpld_video_driver = { ...@@ -419,7 +417,7 @@ static struct i2c_driver cpld_video_driver = {
.driver = { .driver = {
.name = "cpld_video", .name = "cpld_video",
}, },
.probe = cpld_video_probe, .probe_new = cpld_video_probe,
.remove = cpld_video_remove, .remove = cpld_video_remove,
.id_table = cpld_video_id, .id_table = cpld_video_id,
}; };
......
arch/arm/mach-exynos/Kconfig
View file @ e731f314
...@@ -24,7 +24,6 @@ menuconfig ARCH_EXYNOS ...@@ -24,7 +24,6 @@ menuconfig ARCH_EXYNOS
select HAVE_ARM_ARCH_TIMER if ARCH_EXYNOS5 select HAVE_ARM_ARCH_TIMER if ARCH_EXYNOS5
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_S3C2410_I2C if I2C select HAVE_S3C2410_I2C if I2C
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C_RTC if RTC_CLASS
select PINCTRL select PINCTRL
select PINCTRL_EXYNOS select PINCTRL_EXYNOS
......
arch/arm/mach-exynos/Makefile
View file @ e731f314
...@@ -3,10 +3,6 @@ ...@@ -3,10 +3,6 @@
# Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
# http://www.samsung.com/ # http://www.samsung.com/
ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include
# Core
obj-$(CONFIG_ARCH_EXYNOS) += exynos.o exynos-smc.o firmware.o obj-$(CONFIG_ARCH_EXYNOS) += exynos.o exynos-smc.o firmware.o
obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o
......
arch/arm/mach-exynos/common.h
View file @ e731f314
...@@ -24,12 +24,12 @@ ...@@ -24,12 +24,12 @@
#define EXYNOS5800_SOC_ID 0xE5422000 #define EXYNOS5800_SOC_ID 0xE5422000
#define EXYNOS5_SOC_MASK 0xFFFFF000 #define EXYNOS5_SOC_MASK 0xFFFFF000
extern unsigned long samsung_cpu_id; extern unsigned long exynos_cpu_id;
#define IS_SAMSUNG_CPU(name, id, mask) \ #define IS_SAMSUNG_CPU(name, id, mask) \
static inline int is_samsung_##name(void) \ static inline int is_samsung_##name(void) \
{ \ { \
return ((samsung_cpu_id & mask) == (id & mask)); \ return ((exynos_cpu_id & mask) == (id & mask)); \
} }
IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK) IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK)
...@@ -147,7 +147,7 @@ extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data; ...@@ -147,7 +147,7 @@ extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
extern void exynos_set_delayed_reset_assertion(bool enable); extern void exynos_set_delayed_reset_assertion(bool enable);
extern unsigned int samsung_rev(void); extern unsigned int exynos_rev(void);
extern void exynos_core_restart(u32 core_id); extern void exynos_core_restart(u32 core_id);
extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr); extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr);
extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr); extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr);
......
arch/arm/mach-exynos/exynos.c
View file @ e731f314
...@@ -19,11 +19,12 @@ ...@@ -19,11 +19,12 @@
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <mach/map.h>
#include <plat/cpu.h>
#include "common.h" #include "common.h"
#define S3C_ADDR_BASE 0xF6000000
#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x))
#define S5P_VA_CHIPID S3C_ADDR(0x02000000)
static struct platform_device exynos_cpuidle = { static struct platform_device exynos_cpuidle = {
.name = "exynos_cpuidle", .name = "exynos_cpuidle",
#ifdef CONFIG_ARM_EXYNOS_CPUIDLE #ifdef CONFIG_ARM_EXYNOS_CPUIDLE
...@@ -36,6 +37,14 @@ void __iomem *sysram_base_addr __ro_after_init; ...@@ -36,6 +37,14 @@ void __iomem *sysram_base_addr __ro_after_init;
phys_addr_t sysram_base_phys __ro_after_init; phys_addr_t sysram_base_phys __ro_after_init;
void __iomem *sysram_ns_base_addr __ro_after_init; void __iomem *sysram_ns_base_addr __ro_after_init;
unsigned long exynos_cpu_id;
static unsigned int exynos_cpu_rev;
unsigned int exynos_rev(void)
{
return exynos_cpu_rev;
}
void __init exynos_sysram_init(void) void __init exynos_sysram_init(void)
{ {
struct device_node *node; struct device_node *node;
...@@ -86,7 +95,11 @@ static void __init exynos_init_io(void) ...@@ -86,7 +95,11 @@ static void __init exynos_init_io(void)
of_scan_flat_dt(exynos_fdt_map_chipid, NULL); of_scan_flat_dt(exynos_fdt_map_chipid, NULL);
/* detect cpu id and rev. */ /* detect cpu id and rev. */
s5p_init_cpu(S5P_VA_CHIPID); exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID);
exynos_cpu_rev = exynos_cpu_id & 0xFF;
pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id);
} }
/* /*
...@@ -193,8 +206,8 @@ static void __init exynos_dt_fixup(void) ...@@ -193,8 +206,8 @@ static void __init exynos_dt_fixup(void)
} }
DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)") DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)")
.l2c_aux_val = 0x3c400000, .l2c_aux_val = 0x38400000,
.l2c_aux_mask = 0xc20fffff, .l2c_aux_mask = 0xc60fffff,
.smp = smp_ops(exynos_smp_ops), .smp = smp_ops(exynos_smp_ops),
.map_io = exynos_init_io, .map_io = exynos_init_io,
.init_early = exynos_firmware_init, .init_early = exynos_firmware_init,
......
arch/arm/mach-exynos/include/mach/map.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
* http://www.samsung.com/
*
* Exynos - Memory map definitions
*/
#ifndef __ASM_ARCH_MAP_H
#define __ASM_ARCH_MAP_H __FILE__
#include <plat/map-base.h>
#include <plat/map-s5p.h>
#define EXYNOS_PA_CHIPID 0x10000000
#endif /* __ASM_ARCH_MAP_H */
arch/arm/mach-exynos/platsmp.c
View file @ e731f314
...@@ -22,8 +22,6 @@ ...@@ -22,8 +22,6 @@
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include <asm/firmware.h> #include <asm/firmware.h>
#include <mach/map.h>
#include "common.h" #include "common.h"
extern void exynos4_secondary_startup(void); extern void exynos4_secondary_startup(void);
...@@ -188,7 +186,7 @@ void exynos_scu_enable(void) ...@@ -188,7 +186,7 @@ void exynos_scu_enable(void)
static void __iomem *cpu_boot_reg_base(void) static void __iomem *cpu_boot_reg_base(void)
{ {
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) if (soc_is_exynos4210() && exynos_rev() == EXYNOS4210_REV_1_1)
return pmu_base_addr + S5P_INFORM5; return pmu_base_addr + S5P_INFORM5;
return sysram_base_addr; return sysram_base_addr;
} }
......
arch/arm/mach-exynos/pm.c
View file @ e731f314
...@@ -26,18 +26,18 @@ ...@@ -26,18 +26,18 @@
static inline void __iomem *exynos_boot_vector_addr(void) static inline void __iomem *exynos_boot_vector_addr(void)
{ {
if (samsung_rev() == EXYNOS4210_REV_1_1) if (exynos_rev() == EXYNOS4210_REV_1_1)
return pmu_base_addr + S5P_INFORM7; return pmu_base_addr + S5P_INFORM7;
else if (samsung_rev() == EXYNOS4210_REV_1_0) else if (exynos_rev() == EXYNOS4210_REV_1_0)
return sysram_base_addr + 0x24; return sysram_base_addr + 0x24;
return pmu_base_addr + S5P_INFORM0; return pmu_base_addr + S5P_INFORM0;
} }
static inline void __iomem *exynos_boot_vector_flag(void) static inline void __iomem *exynos_boot_vector_flag(void)
{ {
if (samsung_rev() == EXYNOS4210_REV_1_1) if (exynos_rev() == EXYNOS4210_REV_1_1)
return pmu_base_addr + S5P_INFORM6; return pmu_base_addr + S5P_INFORM6;
else if (samsung_rev() == EXYNOS4210_REV_1_0) else if (exynos_rev() == EXYNOS4210_REV_1_0)
return sysram_base_addr + 0x20; return sysram_base_addr + 0x20;
return pmu_base_addr + S5P_INFORM1; return pmu_base_addr + S5P_INFORM1;
} }
......
arch/arm/mach-hisi/Kconfig
View file @ e731f314
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
config ARCH_HISI config ARCH_HISI
bool "Hisilicon SoC Support" bool "Hisilicon SoC Support"
depends on ARCH_MULTI_V7 depends on ARCH_MULTI_V7 || ARCH_MULTI_V5
select ARM_AMBA select ARM_AMBA
select ARM_GIC select ARM_GIC if ARCH_MULTI_V7
select ARM_TIMER_SP804 select ARM_TIMER_SP804
select POWER_RESET select POWER_RESET
select POWER_RESET_HISI select POWER_RESET_HISI
...@@ -15,6 +15,7 @@ menu "Hisilicon platform type" ...@@ -15,6 +15,7 @@ menu "Hisilicon platform type"
config ARCH_HI3xxx config ARCH_HI3xxx
bool "Hisilicon Hi36xx family" bool "Hisilicon Hi36xx family"
depends on ARCH_MULTI_V7
select CACHE_L2X0 select CACHE_L2X0
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP select HAVE_ARM_TWD if SMP
...@@ -25,6 +26,7 @@ config ARCH_HI3xxx ...@@ -25,6 +26,7 @@ config ARCH_HI3xxx
config ARCH_HIP01 config ARCH_HIP01
bool "Hisilicon HIP01 family" bool "Hisilicon HIP01 family"
depends on ARCH_MULTI_V7
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP select HAVE_ARM_TWD if SMP
select ARM_GLOBAL_TIMER select ARM_GLOBAL_TIMER
...@@ -33,6 +35,7 @@ config ARCH_HIP01 ...@@ -33,6 +35,7 @@ config ARCH_HIP01
config ARCH_HIP04 config ARCH_HIP04
bool "Hisilicon HiP04 Cortex A15 family" bool "Hisilicon HiP04 Cortex A15 family"
depends on ARCH_MULTI_V7
select ARM_ERRATA_798181 if SMP select ARM_ERRATA_798181 if SMP
select HAVE_ARM_ARCH_TIMER select HAVE_ARM_ARCH_TIMER
select MCPM if SMP select MCPM if SMP
...@@ -43,6 +46,7 @@ config ARCH_HIP04 ...@@ -43,6 +46,7 @@ config ARCH_HIP04
config ARCH_HIX5HD2 config ARCH_HIX5HD2
bool "Hisilicon X5HD2 family" bool "Hisilicon X5HD2 family"
depends on ARCH_MULTI_V7
select CACHE_L2X0 select CACHE_L2X0
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP select HAVE_ARM_TWD if SMP
...@@ -50,6 +54,14 @@ config ARCH_HIX5HD2 ...@@ -50,6 +54,14 @@ config ARCH_HIX5HD2
select PINCTRL_SINGLE select PINCTRL_SINGLE
help help
Support for Hisilicon HIX5HD2 SoC family Support for Hisilicon HIX5HD2 SoC family
config ARCH_SD5203
bool "Hisilicon SD5203 family"
depends on ARCH_MULTI_V5
select DW_APB_ICTL
help
Support for Hisilicon SD5203 SoC family
endmenu endmenu
endif endif
arch/arm/mach-imx/3ds_debugboard.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2010 Jason Wang <jason77.wang@gmail.com>
*/
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/irqdomain.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/smsc911x.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include "3ds_debugboard.h"
#include "hardware.h"
/* LAN9217 ethernet base address */
#define LAN9217_BASE_ADDR(n) (n + 0x0)
/* External UART */
#define UARTA_BASE_ADDR(n) (n + 0x8000)
#define UARTB_BASE_ADDR(n) (n + 0x10000)
#define BOARD_IO_ADDR(n) (n + 0x20000)
/* LED switchs */
#define LED_SWITCH_REG 0x00
/* buttons */
#define SWITCH_BUTTONS_REG 0x08
/* status, interrupt */
#define INTR_STATUS_REG 0x10
#define INTR_MASK_REG 0x38
#define INTR_RESET_REG 0x20
/* magic word for debug CPLD */
#define MAGIC_NUMBER1_REG 0x40
#define MAGIC_NUMBER2_REG 0x48
/* CPLD code version */
#define CPLD_CODE_VER_REG 0x50
/* magic word for debug CPLD */
#define MAGIC_NUMBER3_REG 0x58
/* module reset register*/
#define MODULE_RESET_REG 0x60
/* CPU ID and Personality ID */
#define MCU_BOARD_ID_REG 0x68
#define MXC_MAX_EXP_IO_LINES 16
/* interrupts like external uart , external ethernet etc*/
#define EXPIO_INT_ENET 0
#define EXPIO_INT_XUART_A 1
#define EXPIO_INT_XUART_B 2
#define EXPIO_INT_BUTTON_A 3
#define EXPIO_INT_BUTTON_B 4
static void __iomem *brd_io;
static struct irq_domain *domain;
static struct resource smsc911x_resources[] = {
{
.flags = IORESOURCE_MEM,
} , {
.flags = IORESOURCE_IRQ,
},
};
static struct smsc911x_platform_config smsc911x_config = {
.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
.flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
};
static struct platform_device smsc_lan9217_device = {
.name = "smsc911x",
.id = -1,
.dev = {
.platform_data = &smsc911x_config,
},
.num_resources = ARRAY_SIZE(smsc911x_resources),
.resource = smsc911x_resources,
};
static void mxc_expio_irq_handler(struct irq_desc *desc)
{
u32 imr_val;
u32 int_valid;
u32 expio_irq;
/* irq = gpio irq number */
desc->irq_data.chip->irq_mask(&desc->irq_data);
imr_val = imx_readw(brd_io + INTR_MASK_REG);
int_valid = imx_readw(brd_io + INTR_STATUS_REG) & ~imr_val;
expio_irq = 0;
for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
if ((int_valid & 1) == 0)
continue;
generic_handle_irq(irq_find_mapping(domain, expio_irq));
}
desc->irq_data.chip->irq_ack(&desc->irq_data);
desc->irq_data.chip->irq_unmask(&desc->irq_data);
}
/*
* Disable an expio pin's interrupt by setting the bit in the imr.
* Irq is an expio virtual irq number
*/
static void expio_mask_irq(struct irq_data *d)
{
u16 reg;
u32 expio = d->hwirq;
reg = imx_readw(brd_io + INTR_MASK_REG);
reg |= (1 << expio);
imx_writew(reg, brd_io + INTR_MASK_REG);
}
static void expio_ack_irq(struct irq_data *d)
{
u32 expio = d->hwirq;
imx_writew(1 << expio, brd_io + INTR_RESET_REG);
imx_writew(0, brd_io + INTR_RESET_REG);
expio_mask_irq(d);
}
static void expio_unmask_irq(struct irq_data *d)
{
u16 reg;
u32 expio = d->hwirq;
reg = imx_readw(brd_io + INTR_MASK_REG);
reg &= ~(1 << expio);
imx_writew(reg, brd_io + INTR_MASK_REG);
}
static struct irq_chip expio_irq_chip = {
.irq_ack = expio_ack_irq,
.irq_mask = expio_mask_irq,
.irq_unmask = expio_unmask_irq,
};
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
REGULATOR_SUPPLY("vddvario", "smsc911x"),
};
int __init mxc_expio_init(u32 base, u32 intr_gpio)
{
u32 p_irq = gpio_to_irq(intr_gpio);
int irq_base;
int i;
brd_io = ioremap(BOARD_IO_ADDR(base), SZ_4K);
if (brd_io == NULL)
return -ENOMEM;
if ((imx_readw(brd_io + MAGIC_NUMBER1_REG) != 0xAAAA) ||
(imx_readw(brd_io + MAGIC_NUMBER2_REG) != 0x5555) ||
(imx_readw(brd_io + MAGIC_NUMBER3_REG) != 0xCAFE)) {
pr_info("3-Stack Debug board not detected\n");
iounmap(brd_io);
brd_io = NULL;
return -ENODEV;
}
pr_info("3-Stack Debug board detected, rev = 0x%04X\n",
readw(brd_io + CPLD_CODE_VER_REG));
/*
* Configure INT line as GPIO input
*/
gpio_request(intr_gpio, "expio_pirq");
gpio_direction_input(intr_gpio);
/* disable the interrupt and clear the status */
imx_writew(0, brd_io + INTR_MASK_REG);
imx_writew(0xFFFF, brd_io + INTR_RESET_REG);
imx_writew(0, brd_io + INTR_RESET_REG);
imx_writew(0x1F, brd_io + INTR_MASK_REG);
irq_base = irq_alloc_descs(-1, 0, MXC_MAX_EXP_IO_LINES, numa_node_id());
WARN_ON(irq_base < 0);
domain = irq_domain_add_legacy(NULL, MXC_MAX_EXP_IO_LINES, irq_base, 0,
&irq_domain_simple_ops, NULL);
WARN_ON(!domain);
for (i = irq_base; i < irq_base + MXC_MAX_EXP_IO_LINES; i++) {
irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq);
irq_clear_status_flags(i, IRQ_NOREQUEST);
}
irq_set_irq_type(p_irq, IRQF_TRIGGER_LOW);
irq_set_chained_handler(p_irq, mxc_expio_irq_handler);
/* Register Lan device on the debugboard */
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
smsc911x_resources[0].start = LAN9217_BASE_ADDR(base);
smsc911x_resources[0].end = LAN9217_BASE_ADDR(base) + 0x100 - 1;
smsc911x_resources[1].start = irq_find_mapping(domain, EXPIO_INT_ENET);
smsc911x_resources[1].end = irq_find_mapping(domain, EXPIO_INT_ENET);
platform_device_register(&smsc_lan9217_device);
return 0;
}
arch/arm/mach-imx/3ds_debugboard.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#ifndef __ASM_ARCH_MXC_3DS_DB_H__
#define __ASM_ARCH_MXC_3DS_DB_H__
extern int __init mxc_expio_init(u32 base, u32 intr_gpio);
#endif /* __ASM_ARCH_MXC_3DS_DB_H__ */
arch/arm/mach-imx/Kconfig
View file @ e731f314
This diff is collapsed.
arch/arm/mach-imx/Makefile
View file @ e731f314
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
obj-y := cpu.o system.o irq-common.o obj-y := cpu.o system.o irq-common.o
obj-$(CONFIG_SOC_IMX21) += mm-imx21.o
obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o obj-$(CONFIG_SOC_IMX25) += cpu-imx25.o mach-imx25.o pm-imx25.o
obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o mach-imx27.o
obj-$(CONFIG_SOC_IMX27) += mm-imx27.o ehci-imx27.o
obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o iomux-imx31.o ehci-imx31.o obj-$(CONFIG_SOC_IMX31) += mm-imx3.o cpu-imx31.o mach-imx31.o
obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o ehci-imx35.o obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o
imx5-pm-$(CONFIG_PM) += pm-imx5.o imx5-pm-$(CONFIG_PM) += pm-imx5.o
obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y) obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y)
obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
obj-$(CONFIG_MXC_TZIC) += tzic.o obj-$(CONFIG_MXC_TZIC) += tzic.o
obj-$(CONFIG_MXC_AVIC) += avic.o obj-$(CONFIG_MXC_AVIC) += avic.o
...@@ -37,37 +31,6 @@ obj-y += ssi-fiq.o ...@@ -37,37 +31,6 @@ obj-y += ssi-fiq.o
obj-y += ssi-fiq-ksym.o obj-y += ssi-fiq-ksym.o
endif endif
# i.MX21 based machines
obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
# i.MX27 based machines
obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
obj-$(CONFIG_MACH_MX27_3DS) += mach-mx27_3ds.o
obj-$(CONFIG_MACH_IMX27_VISSTRIM_M10) += mach-imx27_visstrim_m10.o
obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o
# i.MX31 based machines
obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
obj-$(CONFIG_MACH_MX31LILLY) += mach-mx31lilly.o mx31lilly-db.o
obj-$(CONFIG_MACH_MX31LITE) += mach-mx31lite.o mx31lite-db.o
obj-$(CONFIG_MACH_PCM037) += mach-pcm037.o
obj-$(CONFIG_MACH_PCM037_EET) += mach-pcm037_eet.o
obj-$(CONFIG_MACH_MX31_3DS) += mach-mx31_3ds.o
obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
mx31moboard-marxbot.o mx31moboard-smartbot.o
obj-$(CONFIG_MACH_QONG) += mach-qong.o
obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
obj-$(CONFIG_MACH_BUG) += mach-bug.o
obj-$(CONFIG_MACH_IMX31_DT) += imx31-dt.o
# i.MX35 based machines
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
obj-$(CONFIG_MACH_VPR200) += mach-vpr200.o
obj-$(CONFIG_MACH_IMX35_DT) += imx35-dt.o
obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o obj-$(CONFIG_HAVE_IMX_MMDC) += mmdc.o
...@@ -105,5 +68,3 @@ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o ...@@ -105,5 +68,3 @@ obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
obj-$(CONFIG_SOC_VF610) += mach-vf610.o obj-$(CONFIG_SOC_VF610) += mach-vf610.o
obj-$(CONFIG_SOC_LS1021A) += mach-ls1021a.o obj-$(CONFIG_SOC_LS1021A) += mach-ls1021a.o
obj-y += devices/
arch/arm/mach-imx/board-mx31lilly.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
*
* Based on code for mobots boards,
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#ifndef __ASM_ARCH_MXC_BOARD_MX31LILLY_H__
#define __ASM_ARCH_MXC_BOARD_MX31LILLY_H__
#ifndef __ASSEMBLY__
enum mx31lilly_boards {
MX31LILLY_NOBOARD = 0,
MX31LILLY_DB = 1,
};
/*
* This CPU module needs a baseboard to work. After basic initializing
* its own devices, it calls the baseboard's init function.
*/
extern void mx31lilly_db_init(void);
#endif
#endif /* __ASM_ARCH_MXC_BOARD_MX31LILLY_H__ */
arch/arm/mach-imx/board-mx31lite.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
*
* Based on code for mobots boards,
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#ifndef __ASM_ARCH_MXC_BOARD_MX31LITE_H__
#define __ASM_ARCH_MXC_BOARD_MX31LITE_H__
#ifndef __ASSEMBLY__
enum mx31lite_boards {
MX31LITE_NOBOARD = 0,
MX31LITE_DB = 1,
};
/*
* This CPU module needs a baseboard to work. After basic initializing
* its own devices, it calls the baseboard's init function.
*/
extern void mx31lite_db_init(void);
#endif
#endif /* __ASM_ARCH_MXC_BOARD_MX31LITE_H__ */
arch/arm/mach-imx/board-mx31moboard.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
*/
#ifndef __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__
#define __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__
#ifndef __ASSEMBLY__
enum mx31moboard_boards {
MX31NOBOARD = 0,
MX31DEVBOARD = 1,
MX31MARXBOT = 2,
MX31SMARTBOT = 3,
MX31EYEBOT = 4,
};
/*
* This CPU module needs a baseboard to work. After basic initializing
* its own devices, it calls the baseboard's init function.
*/
extern void mx31moboard_devboard_init(void);
extern void mx31moboard_marxbot_init(void);
extern void mx31moboard_smartbot_init(int board);
#endif
#endif /* __ASM_ARCH_MXC_BOARD_MX31MOBOARD_H__ */
arch/arm/mach-imx/common.h
View file @ e731f314
...@@ -17,29 +17,14 @@ struct device_node; ...@@ -17,29 +17,14 @@ struct device_node;
enum mxc_cpu_pwr_mode; enum mxc_cpu_pwr_mode;
struct of_device_id; struct of_device_id;
void mx21_map_io(void);
void mx27_map_io(void);
void mx31_map_io(void); void mx31_map_io(void);
void mx35_map_io(void); void mx35_map_io(void);
void imx21_init_early(void); void imx21_init_early(void);
void imx27_init_early(void);
void imx31_init_early(void); void imx31_init_early(void);
void imx35_init_early(void); void imx35_init_early(void);
void mxc_init_irq(void __iomem *); void mxc_init_irq(void __iomem *);
void mx21_init_irq(void);
void mx27_init_irq(void);
void mx31_init_irq(void); void mx31_init_irq(void);
void mx35_init_irq(void); void mx35_init_irq(void);
void imx21_soc_init(void);
void imx27_soc_init(void);
void imx31_soc_init(void);
void imx35_soc_init(void);
int mx21_clocks_init(unsigned long lref, unsigned long fref);
int mx27_clocks_init(unsigned long fref);
int mx31_clocks_init(unsigned long fref);
int mx35_clocks_init(void);
struct platform_device *mxc_register_gpio(char *name, int id,
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
void mxc_set_cpu_type(unsigned int type); void mxc_set_cpu_type(unsigned int type);
void mxc_restart(enum reboot_mode, const char *); void mxc_restart(enum reboot_mode, const char *);
void mxc_arch_reset_init(void __iomem *); void mxc_arch_reset_init(void __iomem *);
......
arch/arm/mach-imx/cpu-imx27.c
View file @ e731f314
...@@ -9,6 +9,7 @@ ...@@ -9,6 +9,7 @@
*/ */
#include <linux/io.h> #include <linux/io.h>
#include <linux/of_address.h>
#include <linux/module.h> #include <linux/module.h>
#include "hardware.h" #include "hardware.h"
...@@ -17,16 +18,23 @@ static int mx27_cpu_rev = -1; ...@@ -17,16 +18,23 @@ static int mx27_cpu_rev = -1;
static int mx27_cpu_partnumber; static int mx27_cpu_partnumber;
#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
#define SYSCTRL_OFFSET 0x800 /* Offset from CCM base address */
static int mx27_read_cpu_rev(void) static int mx27_read_cpu_rev(void)
{ {
void __iomem *ccm_base;
struct device_node *np;
u32 val; u32 val;
np = of_find_compatible_node(NULL, NULL, "fsl,imx27-ccm");
ccm_base = of_iomap(np, 0);
BUG_ON(!ccm_base);
/* /*
* now we have access to the IO registers. As we need * now we have access to the IO registers. As we need
* the silicon revision very early we read it here to * the silicon revision very early we read it here to
* avoid any further hooks * avoid any further hooks
*/ */
val = imx_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR + SYS_CHIP_ID)); val = imx_readl(ccm_base + SYSCTRL_OFFSET + SYS_CHIP_ID);
mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF); mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
......
arch/arm/mach-imx/cpu-imx31.c
View file @ e731f314
...@@ -6,6 +6,7 @@ ...@@ -6,6 +6,7 @@
*/ */
#include <linux/module.h> #include <linux/module.h>
#include <linux/of_address.h>
#include <linux/io.h> #include <linux/io.h>
#include "common.h" #include "common.h"
...@@ -32,10 +33,16 @@ static struct { ...@@ -32,10 +33,16 @@ static struct {
static int mx31_read_cpu_rev(void) static int mx31_read_cpu_rev(void)
{ {
void __iomem *iim_base;
struct device_node *np;
u32 i, srev; u32 i, srev;
np = of_find_compatible_node(NULL, NULL, "fsl,imx31-iim");
iim_base = of_iomap(np, 0);
BUG_ON(!iim_base);
/* read SREV register from IIM module */ /* read SREV register from IIM module */
srev = imx_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV)); srev = imx_readl(iim_base + MXC_IIMSREV);
srev &= 0xff; srev &= 0xff;
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
......
arch/arm/mach-imx/cpu-imx35.c
View file @ e731f314
...@@ -5,6 +5,7 @@ ...@@ -5,6 +5,7 @@
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
*/ */
#include <linux/module.h> #include <linux/module.h>
#include <linux/of_address.h>
#include <linux/io.h> #include <linux/io.h>
#include "hardware.h" #include "hardware.h"
...@@ -14,9 +15,15 @@ static int mx35_cpu_rev = -1; ...@@ -14,9 +15,15 @@ static int mx35_cpu_rev = -1;
static int mx35_read_cpu_rev(void) static int mx35_read_cpu_rev(void)
{ {
void __iomem *iim_base;
struct device_node *np;
u32 rev; u32 rev;
rev = imx_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); np = of_find_compatible_node(NULL, NULL, "fsl,imx35-iim");
iim_base = of_iomap(np, 0);
BUG_ON(!iim_base);
rev = imx_readl(iim_base + MXC_IIMSREV);
switch (rev) { switch (rev) {
case 0x00: case 0x00:
return IMX_CHIP_REVISION_1_0; return IMX_CHIP_REVISION_1_0;
......
arch/arm/mach-imx/devices-imx21.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices/devices-common.h"
extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data;
#define imx21_add_imx21_hcd(pdata) \
imx_add_imx21_hcd(&imx21_imx21_hcd_data, pdata)
extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data;
#define imx21_add_imx2_wdt() \
imx_add_imx2_wdt(&imx21_imx2_wdt_data)
extern const struct imx_imx_fb_data imx21_imx_fb_data;
#define imx21_add_imx_fb(pdata) \
imx_add_imx_fb(&imx21_imx_fb_data, pdata)
extern const struct imx_imx_i2c_data imx21_imx_i2c_data;
#define imx21_add_imx_i2c(pdata) \
imx_add_imx_i2c(&imx21_imx_i2c_data, pdata)
extern const struct imx_imx_keypad_data imx21_imx_keypad_data;
#define imx21_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx21_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx21_imx_ssi_data[];
#define imx21_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx21_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx21_imx_uart_data[];
#define imx21_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx21_imx_uart_data[id], pdata)
#define imx21_add_imx_uart0(pdata) imx21_add_imx_uart(0, pdata)
#define imx21_add_imx_uart1(pdata) imx21_add_imx_uart(1, pdata)
#define imx21_add_imx_uart2(pdata) imx21_add_imx_uart(2, pdata)
#define imx21_add_imx_uart3(pdata) imx21_add_imx_uart(3, pdata)
extern const struct imx_mxc_mmc_data imx21_mxc_mmc_data[];
#define imx21_add_mxc_mmc(id, pdata) \
imx_add_mxc_mmc(&imx21_mxc_mmc_data[id], pdata)
extern const struct imx_mxc_nand_data imx21_mxc_nand_data;
#define imx21_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx21_mxc_nand_data, pdata)
extern const struct imx_mxc_w1_data imx21_mxc_w1_data;
#define imx21_add_mxc_w1() \
imx_add_mxc_w1(&imx21_mxc_w1_data)
extern const struct imx_spi_imx_data imx21_cspi_data[];
#define imx21_add_cspi(id, pdata) \
imx_add_spi_imx(&imx21_cspi_data[id], pdata)
#define imx21_add_spi_imx0(pdata) imx21_add_cspi(0, pdata)
#define imx21_add_spi_imx1(pdata) imx21_add_cspi(1, pdata)
arch/arm/mach-imx/devices-imx27.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices/devices-common.h"
extern const struct imx_fec_data imx27_fec_data;
#define imx27_add_fec(pdata) \
imx_add_fec(&imx27_fec_data, pdata)
extern const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data;
#define imx27_add_fsl_usb2_udc(pdata) \
imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata)
extern const struct imx_imx27_coda_data imx27_coda_data;
#define imx27_add_coda() \
imx_add_imx27_coda(&imx27_coda_data)
extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data;
#define imx27_add_imx2_wdt() \
imx_add_imx2_wdt(&imx27_imx2_wdt_data)
extern const struct imx_imx_fb_data imx27_imx_fb_data;
#define imx27_add_imx_fb(pdata) \
imx_add_imx_fb(&imx27_imx_fb_data, pdata)
extern const struct imx_imx_i2c_data imx27_imx_i2c_data[];
#define imx27_add_imx_i2c(id, pdata) \
imx_add_imx_i2c(&imx27_imx_i2c_data[id], pdata)
extern const struct imx_imx_keypad_data imx27_imx_keypad_data;
#define imx27_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx27_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx27_imx_ssi_data[];
#define imx27_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx27_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[];
#define imx27_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx27_imx_uart_data[id], pdata)
#define imx27_add_imx_uart0(pdata) imx27_add_imx_uart(0, pdata)
#define imx27_add_imx_uart1(pdata) imx27_add_imx_uart(1, pdata)
#define imx27_add_imx_uart2(pdata) imx27_add_imx_uart(2, pdata)
#define imx27_add_imx_uart3(pdata) imx27_add_imx_uart(3, pdata)
#define imx27_add_imx_uart4(pdata) imx27_add_imx_uart(4, pdata)
#define imx27_add_imx_uart5(pdata) imx27_add_imx_uart(5, pdata)
extern const struct imx_mx2_camera_data imx27_mx2_camera_data;
#define imx27_add_mx2_camera(pdata) \
imx_add_mx2_camera(&imx27_mx2_camera_data, pdata)
extern const struct imx_mx2_emma_data imx27_mx2_emmaprp_data;
#define imx27_add_mx2_emmaprp() \
imx_add_mx2_emmaprp(&imx27_mx2_emmaprp_data)
extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data;
#define imx27_add_mxc_ehci_otg(pdata) \
imx_add_mxc_ehci(&imx27_mxc_ehci_otg_data, pdata)
extern const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[];
#define imx27_add_mxc_ehci_hs(id, pdata) \
imx_add_mxc_ehci(&imx27_mxc_ehci_hs_data[id - 1], pdata)
extern const struct imx_mxc_mmc_data imx27_mxc_mmc_data[];
#define imx27_add_mxc_mmc(id, pdata) \
imx_add_mxc_mmc(&imx27_mxc_mmc_data[id], pdata)
extern const struct imx_mxc_nand_data imx27_mxc_nand_data;
#define imx27_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx27_mxc_nand_data, pdata)
extern const struct imx_mxc_w1_data imx27_mxc_w1_data;
#define imx27_add_mxc_w1() \
imx_add_mxc_w1(&imx27_mxc_w1_data)
extern const struct imx_spi_imx_data imx27_cspi_data[];
#define imx27_add_cspi(id, gtable) \
imx_add_spi_imx(&imx27_cspi_data[id], gtable)
#define imx27_add_spi_imx0(gtable) imx27_add_cspi(0, gtable)
#define imx27_add_spi_imx1(gtable) imx27_add_cspi(1, gtable)
#define imx27_add_spi_imx2(gtable) imx27_add_cspi(2, gtable)
extern const struct imx_pata_imx_data imx27_pata_imx_data;
#define imx27_add_pata_imx() \
imx_add_pata_imx(&imx27_pata_imx_data)
arch/arm/mach-imx/devices-imx31.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices/devices-common.h"
extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data;
#define imx31_add_fsl_usb2_udc(pdata) \
imx_add_fsl_usb2_udc(&imx31_fsl_usb2_udc_data, pdata)
extern const struct imx_imx2_wdt_data imx31_imx2_wdt_data;
#define imx31_add_imx2_wdt() \
imx_add_imx2_wdt(&imx31_imx2_wdt_data)
extern const struct imx_imx_i2c_data imx31_imx_i2c_data[];
#define imx31_add_imx_i2c(id, pdata) \
imx_add_imx_i2c(&imx31_imx_i2c_data[id], pdata)
#define imx31_add_imx_i2c0(pdata) imx31_add_imx_i2c(0, pdata)
#define imx31_add_imx_i2c1(pdata) imx31_add_imx_i2c(1, pdata)
#define imx31_add_imx_i2c2(pdata) imx31_add_imx_i2c(2, pdata)
extern const struct imx_imx_keypad_data imx31_imx_keypad_data;
#define imx31_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx31_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx31_imx_ssi_data[];
#define imx31_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx31_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx31_imx_uart_data[];
#define imx31_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx31_imx_uart_data[id], pdata)
#define imx31_add_imx_uart0(pdata) imx31_add_imx_uart(0, pdata)
#define imx31_add_imx_uart1(pdata) imx31_add_imx_uart(1, pdata)
#define imx31_add_imx_uart2(pdata) imx31_add_imx_uart(2, pdata)
#define imx31_add_imx_uart3(pdata) imx31_add_imx_uart(3, pdata)
#define imx31_add_imx_uart4(pdata) imx31_add_imx_uart(4, pdata)
extern const struct imx_ipu_core_data imx31_ipu_core_data;
#define imx31_add_ipu_core() \
imx_add_ipu_core(&imx31_ipu_core_data)
#define imx31_alloc_mx3_camera(pdata) \
imx_alloc_mx3_camera(&imx31_ipu_core_data, pdata)
#define imx31_add_mx3_sdc_fb(pdata) \
imx_add_mx3_sdc_fb(&imx31_ipu_core_data, pdata)
extern const struct imx_mxc_ehci_data imx31_mxc_ehci_otg_data;
#define imx31_add_mxc_ehci_otg(pdata) \
imx_add_mxc_ehci(&imx31_mxc_ehci_otg_data, pdata)
extern const struct imx_mxc_ehci_data imx31_mxc_ehci_hs_data[];
#define imx31_add_mxc_ehci_hs(id, pdata) \
imx_add_mxc_ehci(&imx31_mxc_ehci_hs_data[id - 1], pdata)
extern const struct imx_mxc_mmc_data imx31_mxc_mmc_data[];
#define imx31_add_mxc_mmc(id, pdata) \
imx_add_mxc_mmc(&imx31_mxc_mmc_data[id], pdata)
extern const struct imx_mxc_nand_data imx31_mxc_nand_data;
#define imx31_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx31_mxc_nand_data, pdata)
extern const struct imx_mxc_rtc_data imx31_mxc_rtc_data;
#define imx31_add_mxc_rtc() \
imx_add_mxc_rtc(&imx31_mxc_rtc_data)
extern const struct imx_mxc_w1_data imx31_mxc_w1_data;
#define imx31_add_mxc_w1() \
imx_add_mxc_w1(&imx31_mxc_w1_data)
extern const struct imx_spi_imx_data imx31_cspi_data[];
#define imx31_add_cspi(id, gtable) \
imx_add_spi_imx(&imx31_cspi_data[id], gtable)
#define imx31_add_spi_imx0(gtable) imx31_add_cspi(0, gtable)
#define imx31_add_spi_imx1(gtable) imx31_add_cspi(1, gtable)
#define imx31_add_spi_imx2(gtable) imx31_add_cspi(2, gtable)
extern const struct imx_pata_imx_data imx31_pata_imx_data;
#define imx31_add_pata_imx() \
imx_add_pata_imx(&imx31_pata_imx_data)
arch/arm/mach-imx/devices-imx35.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices/devices-common.h"
extern const struct imx_fec_data imx35_fec_data;
#define imx35_add_fec(pdata) \
imx_add_fec(&imx35_fec_data, pdata)
extern const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data;
#define imx35_add_fsl_usb2_udc(pdata) \
imx_add_fsl_usb2_udc(&imx35_fsl_usb2_udc_data, pdata)
extern const struct imx_flexcan_data imx35_flexcan_data[];
#define imx35_add_flexcan(id) \
imx_add_flexcan(&imx35_flexcan_data[id])
#define imx35_add_flexcan0() imx35_add_flexcan(0)
#define imx35_add_flexcan1() imx35_add_flexcan(1)
extern const struct imx_imx2_wdt_data imx35_imx2_wdt_data;
#define imx35_add_imx2_wdt() \
imx_add_imx2_wdt(&imx35_imx2_wdt_data)
extern const struct imx_imx_i2c_data imx35_imx_i2c_data[];
#define imx35_add_imx_i2c(id, pdata) \
imx_add_imx_i2c(&imx35_imx_i2c_data[id], pdata)
#define imx35_add_imx_i2c0(pdata) imx35_add_imx_i2c(0, pdata)
#define imx35_add_imx_i2c1(pdata) imx35_add_imx_i2c(1, pdata)
#define imx35_add_imx_i2c2(pdata) imx35_add_imx_i2c(2, pdata)
extern const struct imx_imx_keypad_data imx35_imx_keypad_data;
#define imx35_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx35_imx_keypad_data, pdata)
extern const struct imx_imx_ssi_data imx35_imx_ssi_data[];
#define imx35_add_imx_ssi(id, pdata) \
imx_add_imx_ssi(&imx35_imx_ssi_data[id], pdata)
extern const struct imx_imx_uart_1irq_data imx35_imx_uart_data[];
#define imx35_add_imx_uart(id, pdata) \
imx_add_imx_uart_1irq(&imx35_imx_uart_data[id], pdata)
#define imx35_add_imx_uart0(pdata) imx35_add_imx_uart(0, pdata)
#define imx35_add_imx_uart1(pdata) imx35_add_imx_uart(1, pdata)
#define imx35_add_imx_uart2(pdata) imx35_add_imx_uart(2, pdata)
extern const struct imx_ipu_core_data imx35_ipu_core_data;
#define imx35_add_ipu_core() \
imx_add_ipu_core(&imx35_ipu_core_data)
#define imx35_alloc_mx3_camera(pdata) \
imx_alloc_mx3_camera(&imx35_ipu_core_data, pdata)
#define imx35_add_mx3_sdc_fb(pdata) \
imx_add_mx3_sdc_fb(&imx35_ipu_core_data, pdata)
extern const struct imx_mxc_ehci_data imx35_mxc_ehci_otg_data;
#define imx35_add_mxc_ehci_otg(pdata) \
imx_add_mxc_ehci(&imx35_mxc_ehci_otg_data, pdata)
extern const struct imx_mxc_ehci_data imx35_mxc_ehci_hs_data;
#define imx35_add_mxc_ehci_hs(pdata) \
imx_add_mxc_ehci(&imx35_mxc_ehci_hs_data, pdata)
extern const struct imx_mxc_nand_data imx35_mxc_nand_data;
#define imx35_add_mxc_nand(pdata) \
imx_add_mxc_nand(&imx35_mxc_nand_data, pdata)
extern const struct imx_mxc_rtc_data imx35_mxc_rtc_data;
#define imx35_add_mxc_rtc() \
imx_add_mxc_rtc(&imx35_mxc_rtc_data)
extern const struct imx_mxc_w1_data imx35_mxc_w1_data;
#define imx35_add_mxc_w1() \
imx_add_mxc_w1(&imx35_mxc_w1_data)
extern const struct imx_sdhci_esdhc_imx_data imx35_sdhci_esdhc_imx_data[];
#define imx35_add_sdhci_esdhc_imx(id, pdata) \
imx_add_sdhci_esdhc_imx(&imx35_sdhci_esdhc_imx_data[id], pdata)
extern const struct imx_spi_imx_data imx35_cspi_data[];
#define imx35_add_cspi(id, pdata) \
imx_add_spi_imx(&imx35_cspi_data[id], pdata)
#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata)
#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata)
extern const struct imx_pata_imx_data imx35_pata_imx_data;
#define imx35_add_pata_imx() \
imx_add_pata_imx(&imx35_pata_imx_data)
arch/arm/mach-imx/devices/Kconfig deleted 100644 → 0
View file @ 1f70935f
# SPDX-License-Identifier: GPL-2.0-only
config IMX_HAVE_PLATFORM_FEC
bool
default y if SOC_IMX25 || SOC_IMX27 || SOC_IMX35
config IMX_HAVE_PLATFORM_FLEXCAN
bool
config IMX_HAVE_PLATFORM_FSL_USB2_UDC
bool
config IMX_HAVE_PLATFORM_GPIO_KEYS
bool
config IMX_HAVE_PLATFORM_IMX21_HCD
bool
config IMX_HAVE_PLATFORM_IMX27_CODA
bool
default y if SOC_IMX27
config IMX_HAVE_PLATFORM_IMX2_WDT
bool
config IMX_HAVE_PLATFORM_IMX_FB
bool
config IMX_HAVE_PLATFORM_IMX_I2C
bool
config IMX_HAVE_PLATFORM_IMX_KEYPAD
bool
config IMX_HAVE_PLATFORM_PATA_IMX
bool
config IMX_HAVE_PLATFORM_IMX_SSI
bool
config IMX_HAVE_PLATFORM_IMX_UART
bool
config IMX_HAVE_PLATFORM_IPU_CORE
bool
config IMX_HAVE_PLATFORM_MX2_CAMERA
bool
config IMX_HAVE_PLATFORM_MX2_EMMA
bool
config IMX_HAVE_PLATFORM_MXC_EHCI
bool
config IMX_HAVE_PLATFORM_MXC_MMC
bool
config IMX_HAVE_PLATFORM_MXC_NAND
bool
config IMX_HAVE_PLATFORM_MXC_RTC
bool
config IMX_HAVE_PLATFORM_MXC_W1
bool
config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
bool
config IMX_HAVE_PLATFORM_SPI_IMX
bool
arch/arm/mach-imx/devices/Makefile deleted 100644 → 0
View file @ 1f70935f
# SPDX-License-Identifier: GPL-2.0
obj-y := devices.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_GPIO_KEYS) += platform-gpio_keys.o
obj-y += platform-gpio-mxc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX21_HCD) += platform-imx21-hcd.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX27_CODA) += platform-imx27-coda.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX2_WDT) += platform-imx2-wdt.o
obj-y += platform-imx-dma.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FB) += platform-imx-fb.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_KEYPAD) += platform-imx-keypad.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_PATA_IMX) += platform-pata_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IPU_CORE) += platform-ipu-core.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_CAMERA) += platform-mx2-camera.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_EHCI) += platform-mxc-ehci.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_MMC) += platform-mxc-mmc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_NAND) += platform-mxc_nand.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_RTC) += platform-mxc_rtc.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o
arch/arm/mach-imx/devices/devices-common.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/kernel.h>
#include <linux/platform_device.h>
#include <linux/init.h>
#include <linux/gpio/machine.h>
#include <linux/platform_data/dma-imx-sdma.h>
extern struct device mxc_aips_bus;
extern struct device mxc_ahb_bus;
static inline struct platform_device *imx_add_platform_device_dmamask(
const char *name, int id,
const struct resource *res, unsigned int num_resources,
const void *data, size_t size_data, u64 dmamask)
{
struct platform_device_info pdevinfo = {
.name = name,
.id = id,
.res = res,
.num_res = num_resources,
.data = data,
.size_data = size_data,
.dma_mask = dmamask,
};
return platform_device_register_full(&pdevinfo);
}
static inline struct platform_device *imx_add_platform_device(
const char *name, int id,
const struct resource *res, unsigned int num_resources,
const void *data, size_t size_data)
{
return imx_add_platform_device_dmamask(
name, id, res, num_resources, data, size_data, 0);
}
#include <linux/fec.h>
struct imx_fec_data {
const char *devid;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_fec(
const struct imx_fec_data *data,
const struct fec_platform_data *pdata);
struct imx_flexcan_data {
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_flexcan(
const struct imx_flexcan_data *data);
#include <linux/fsl_devices.h>
struct imx_fsl_usb2_udc_data {
const char *devid;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_fsl_usb2_udc(
const struct imx_fsl_usb2_udc_data *data,
const struct fsl_usb2_platform_data *pdata);
#include <linux/gpio_keys.h>
struct platform_device *__init imx_add_gpio_keys(
const struct gpio_keys_platform_data *pdata);
#include <linux/platform_data/usb-mx2.h>
struct imx_imx21_hcd_data {
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx21_hcd(
const struct imx_imx21_hcd_data *data,
const struct mx21_usbh_platform_data *pdata);
struct imx_imx27_coda_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx27_coda(
const struct imx_imx27_coda_data *data);
struct imx_imx2_wdt_data {
int id;
resource_size_t iobase;
resource_size_t iosize;
};
struct platform_device *__init imx_add_imx2_wdt(
const struct imx_imx2_wdt_data *data);
struct imx_imxdi_rtc_data {
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_imxdi_rtc(
const struct imx_imxdi_rtc_data *data);
#include <linux/platform_data/video-imxfb.h>
struct imx_imx_fb_data {
const char *devid;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx_fb(
const struct imx_imx_fb_data *data,
const struct imx_fb_platform_data *pdata);
#include <linux/platform_data/i2c-imx.h>
struct imx_imx_i2c_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx_i2c(
const struct imx_imx_i2c_data *data,
const struct imxi2c_platform_data *pdata);
#include <linux/input/matrix_keypad.h>
struct imx_imx_keypad_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx_keypad(
const struct imx_imx_keypad_data *data,
const struct matrix_keymap_data *pdata);
#include <linux/platform_data/asoc-imx-ssi.h>
struct imx_imx_ssi_data {
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
resource_size_t dmatx0;
resource_size_t dmarx0;
resource_size_t dmatx1;
resource_size_t dmarx1;
};
struct platform_device *__init imx_add_imx_ssi(
const struct imx_imx_ssi_data *data,
const struct imx_ssi_platform_data *pdata);
#include <linux/platform_data/serial-imx.h>
struct imx_imx_uart_1irq_data {
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_imx_uart_1irq(
const struct imx_imx_uart_1irq_data *data,
const struct imxuart_platform_data *pdata);
#include <linux/platform_data/video-mx3fb.h>
#include <linux/platform_data/media/camera-mx3.h>
struct imx_ipu_core_data {
resource_size_t iobase;
resource_size_t synirq;
resource_size_t errirq;
};
struct platform_device *__init imx_add_ipu_core(
const struct imx_ipu_core_data *data);
struct platform_device *__init imx_alloc_mx3_camera(
const struct imx_ipu_core_data *data,
const struct mx3_camera_pdata *pdata);
struct platform_device *__init imx_add_mx3_sdc_fb(
const struct imx_ipu_core_data *data,
struct mx3fb_platform_data *pdata);
#include <linux/platform_data/media/camera-mx2.h>
struct imx_mx2_camera_data {
const char *devid;
resource_size_t iobasecsi;
resource_size_t iosizecsi;
resource_size_t irqcsi;
resource_size_t iobaseemmaprp;
resource_size_t iosizeemmaprp;
resource_size_t irqemmaprp;
};
struct platform_device *__init imx_add_mx2_camera(
const struct imx_mx2_camera_data *data,
const struct mx2_camera_platform_data *pdata);
struct imx_mx2_emma_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_mx2_emmaprp(
const struct imx_mx2_emma_data *data);
#include <linux/platform_data/usb-ehci-mxc.h>
struct imx_mxc_ehci_data {
int id;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_mxc_ehci(
const struct imx_mxc_ehci_data *data,
const struct mxc_usbh_platform_data *pdata);
#include <linux/platform_data/mmc-mxcmmc.h>
struct imx_mxc_mmc_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
resource_size_t dmareq;
};
struct platform_device *__init imx_add_mxc_mmc(
const struct imx_mxc_mmc_data *data,
const struct imxmmc_platform_data *pdata);
#include <linux/platform_data/mtd-mxc_nand.h>
struct imx_mxc_nand_data {
const char *devid;
/*
* id is traditionally 0, but -1 is more appropriate. We use -1 for new
* machines but don't change existing devices as the nand device usually
* appears in the kernel command line to pass its partitioning.
*/
int id;
resource_size_t iobase;
resource_size_t iosize;
resource_size_t axibase;
resource_size_t irq;
};
struct platform_device *__init imx_add_mxc_nand(
const struct imx_mxc_nand_data *data,
const struct mxc_nand_platform_data *pdata);
struct imx_pata_imx_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_pata_imx(
const struct imx_pata_imx_data *data);
/* mxc_rtc */
struct imx_mxc_rtc_data {
const char *devid;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_mxc_rtc(
const struct imx_mxc_rtc_data *data);
/* mxc_w1 */
struct imx_mxc_w1_data {
resource_size_t iobase;
};
struct platform_device *__init imx_add_mxc_w1(
const struct imx_mxc_w1_data *data);
#include <linux/platform_data/mmc-esdhc-imx.h>
struct imx_sdhci_esdhc_imx_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t irq;
};
struct platform_device *__init imx_add_sdhci_esdhc_imx(
const struct imx_sdhci_esdhc_imx_data *data,
const struct esdhc_platform_data *pdata);
struct imx_spi_imx_data {
const char *devid;
int id;
resource_size_t iobase;
resource_size_t iosize;
int irq;
};
struct platform_device *__init imx_add_spi_imx(
const struct imx_spi_imx_data *data, struct gpiod_lookup_table *gtable);
struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
int irq);
struct platform_device *imx_add_imx_sdma(char *name,
resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
arch/arm/mach-imx/devices/devices.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
*/
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include "../common.h"
#include "devices-common.h"
struct device mxc_aips_bus = {
.init_name = "mxc_aips",
};
struct device mxc_ahb_bus = {
.init_name = "mxc_ahb",
};
int __init mxc_device_init(void)
{
int ret;
ret = device_register(&mxc_aips_bus);
if (ret < 0)
goto done;
ret = device_register(&mxc_ahb_bus);
done:
return ret;
}
arch/arm/mach-imx/devices/platform-fec.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include <linux/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_fec_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobase = soc ## _FEC_BASE_ADDR, \
.irq = soc ## _INT_FEC, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_fec_data imx27_fec_data __initconst =
imx_fec_data_entry_single(MX27, "imx27-fec");
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX35
/* i.mx35 has the i.mx27 type fec */
const struct imx_fec_data imx35_fec_data __initconst =
imx_fec_data_entry_single(MX35, "imx27-fec");
#endif
struct platform_device *__init imx_add_fec(
const struct imx_fec_data *data,
const struct fec_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask(data->devid, 0,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-flexcan.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix, Marc Kleine-Budde <kernel@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \
{ \
.id = _id, \
.iobase = soc ## _CAN ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_CAN ## _hwid, \
}
#define imx_flexcan_data_entry(soc, _id, _hwid, _size) \
[_id] = imx_flexcan_data_entry_single(soc, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX35
const struct imx_flexcan_data imx35_flexcan_data[] __initconst = {
#define imx35_flexcan_data_entry(_id, _hwid) \
imx_flexcan_data_entry(MX35, _id, _hwid, SZ_16K)
imx35_flexcan_data_entry(0, 1),
imx35_flexcan_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_flexcan(
const struct imx_flexcan_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("flexcan", data->id,
res, ARRAY_SIZE(res), NULL, 0);
}
arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_fsl_usb2_udc_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobase = soc ## _USB_OTG_BASE_ADDR, \
.irq = soc ## _INT_USB_OTG, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27");
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx27");
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx27");
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_fsl_usb2_udc(
const struct imx_fsl_usb2_udc_data *data,
const struct fsl_usb2_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_512 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask(data->devid, -1,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-gpio-mxc.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2011 Linaro Limited
*/
#include "devices-common.h"
#include "../common.h"
struct platform_device *__init mxc_register_gpio(char *name, int id,
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
{
struct resource res[] = {
{
.start = iobase,
.end = iobase + iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = irq,
.end = irq,
.flags = IORESOURCE_IRQ,
}, {
.start = irq_high,
.end = irq_high,
.flags = IORESOURCE_IRQ,
},
};
unsigned int nres;
nres = irq_high ? ARRAY_SIZE(res) : ARRAY_SIZE(res) - 1;
return platform_device_register_resndata(&mxc_aips_bus, name, id, res, nres, NULL, 0);
}
arch/arm/mach-imx/devices/platform-gpio_keys.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
*/
#include <linux/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
struct platform_device *__init imx_add_gpio_keys(
const struct gpio_keys_platform_data *pdata)
{
return imx_add_platform_device("gpio-keys", -1, NULL,
0, pdata, sizeof(*pdata));
}
arch/arm/mach-imx/devices/platform-imx-dma.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "devices-common.h"
struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
resource_size_t iobase, int irq)
{
struct resource res[] = {
{
.start = iobase,
.end = iobase + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = irq,
.end = irq,
.flags = IORESOURCE_IRQ,
},
};
return platform_device_register_resndata(&mxc_ahb_bus,
name, -1, res, ARRAY_SIZE(res), NULL, 0);
}
struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name,
resource_size_t iobase, int irq, struct sdma_platform_data *pdata)
{
struct resource res[] = {
{
.start = iobase,
.end = iobase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = irq,
.end = irq,
.flags = IORESOURCE_IRQ,
},
};
return platform_device_register_resndata(&mxc_ahb_bus, name,
-1, res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
}
arch/arm/mach-imx/devices/platform-imx-fb.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_fb_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.iobase = soc ## _LCDC_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_LCDC, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_imx_fb(
const struct imx_imx_fb_data *data,
const struct imx_fb_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask(data->devid, 0,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-imx-i2c.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_I2C ## _hwid, \
}
#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \
[_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
#define imx27_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
imx27_imx_i2c_data_entry(0, 1),
imx27_imx_i2c_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
#define imx31_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
imx31_imx_i2c_data_entry(0, 1),
imx31_imx_i2c_data_entry(1, 2),
imx31_imx_i2c_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
#define imx35_imx_i2c_data_entry(_id, _hwid) \
imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K)
imx35_imx_i2c_data_entry(0, 1),
imx35_imx_i2c_data_entry(1, 2),
imx35_imx_i2c_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx_i2c(
const struct imx_imx_i2c_data *data,
const struct imxi2c_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata));
}
arch/arm/mach-imx/devices/platform-imx-keypad.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_keypad_data_entry_single(soc, _size) \
{ \
.iobase = soc ## _KPP_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_KPP, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_keypad_data imx21_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX21, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_keypad_data imx27_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX27, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_keypad_data imx31_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX31, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_keypad_data imx35_imx_keypad_data __initconst =
imx_imx_keypad_data_entry_single(MX35, SZ_16);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx_keypad(
const struct imx_imx_keypad_data *data,
const struct matrix_keymap_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("imx-keypad", -1,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
}
arch/arm/mach-imx/devices/platform-imx-ssi.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
.id = _id, \
.iobase = soc ## _SSI ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_SSI ## _hwid, \
.dmatx0 = soc ## _DMA_REQ_SSI ## _hwid ## _TX0, \
.dmarx0 = soc ## _DMA_REQ_SSI ## _hwid ## _RX0, \
.dmatx1 = soc ## _DMA_REQ_SSI ## _hwid ## _TX1, \
.dmarx1 = soc ## _DMA_REQ_SSI ## _hwid ## _RX1, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_ssi_data imx21_imx_ssi_data[] __initconst = {
#define imx21_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX21, _id, _hwid, SZ_4K)
imx21_imx_ssi_data_entry(0, 1),
imx21_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_ssi_data imx27_imx_ssi_data[] __initconst = {
#define imx27_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX27, _id, _hwid, SZ_4K)
imx27_imx_ssi_data_entry(0, 1),
imx27_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_ssi_data imx31_imx_ssi_data[] __initconst = {
#define imx31_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX31, _id, _hwid, SZ_4K)
imx31_imx_ssi_data_entry(0, 1),
imx31_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_ssi_data imx35_imx_ssi_data[] __initconst = {
#define imx35_imx_ssi_data_entry(_id, _hwid) \
imx_imx_ssi_data_entry(MX35, _id, _hwid, SZ_4K)
imx35_imx_ssi_data_entry(0, 1),
imx35_imx_ssi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx_ssi(
const struct imx_imx_ssi_data *data,
const struct imx_ssi_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
#define DMARES(_name) { \
.name = #_name, \
.start = data->dma ## _name, \
.end = data->dma ## _name, \
.flags = IORESOURCE_DMA, \
}
DMARES(tx0),
DMARES(rx0),
DMARES(tx1),
DMARES(rx1),
};
return imx_add_platform_device("imx-ssi", data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata));
}
arch/arm/mach-imx/devices/platform-imx-uart.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
.id = _id, \
.iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irqrx = soc ## _INT_UART ## _hwid ## RX, \
.irqtx = soc ## _INT_UART ## _hwid ## TX, \
.irqrts = soc ## _INT_UART ## _hwid ## RTS, \
}
#define imx_imx_uart_1irq_data_entry(soc, _id, _hwid, _size) \
[_id] = { \
.id = _id, \
.iobase = soc ## _UART ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_UART ## _hwid, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx_uart_1irq_data imx21_imx_uart_data[] __initconst = {
#define imx21_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX21, _id, _hwid, SZ_4K)
imx21_imx_uart_data_entry(0, 1),
imx21_imx_uart_data_entry(1, 2),
imx21_imx_uart_data_entry(2, 3),
imx21_imx_uart_data_entry(3, 4),
};
#endif
#ifdef CONFIG_SOC_IMX27
const struct imx_imx_uart_1irq_data imx27_imx_uart_data[] __initconst = {
#define imx27_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX27, _id, _hwid, SZ_4K)
imx27_imx_uart_data_entry(0, 1),
imx27_imx_uart_data_entry(1, 2),
imx27_imx_uart_data_entry(2, 3),
imx27_imx_uart_data_entry(3, 4),
imx27_imx_uart_data_entry(4, 5),
imx27_imx_uart_data_entry(5, 6),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx_uart_1irq_data imx31_imx_uart_data[] __initconst = {
#define imx31_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX31, _id, _hwid, SZ_4K)
imx31_imx_uart_data_entry(0, 1),
imx31_imx_uart_data_entry(1, 2),
imx31_imx_uart_data_entry(2, 3),
imx31_imx_uart_data_entry(3, 4),
imx31_imx_uart_data_entry(4, 5),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx_uart_1irq_data imx35_imx_uart_data[] __initconst = {
#define imx35_imx_uart_data_entry(_id, _hwid) \
imx_imx_uart_1irq_data_entry(MX35, _id, _hwid, SZ_16K)
imx35_imx_uart_data_entry(0, 1),
imx35_imx_uart_data_entry(1, 2),
imx35_imx_uart_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx_uart_1irq(
const struct imx_imx_uart_1irq_data *data,
const struct imxuart_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
/* i.mx21 type uart runs on all i.mx except i.mx1 */
return imx_add_platform_device("imx21-uart", data->id,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata));
}
arch/arm/mach-imx/devices/platform-imx2-wdt.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \
{ \
.id = _id, \
.iobase = soc ## _WDOG ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
}
#define imx_imx2_wdt_data_entry(soc, _id, _hwid, _size) \
[_id] = imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX21
const struct imx_imx2_wdt_data imx21_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX21, 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_imx2_wdt_data imx27_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX27, 0, , SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_imx2_wdt_data imx31_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX31, 0, , SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_imx2_wdt_data imx35_imx2_wdt_data __initconst =
imx_imx2_wdt_data_entry_single(MX35, 0, , SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_imx2_wdt(
const struct imx_imx2_wdt_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
},
};
return imx_add_platform_device("imx2-wdt", data->id,
res, ARRAY_SIZE(res), NULL, 0);
}
arch/arm/mach-imx/devices/platform-imx21-hcd.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_imx21_hcd_data_entry_single(soc) \
{ \
.iobase = soc ## _USBOTG_BASE_ADDR, \
.irq = soc ## _INT_USBHOST, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_imx21_hcd_data imx21_imx21_hcd_data __initconst =
imx_imx21_hcd_data_entry_single(MX21);
#endif /* ifdef CONFIG_SOC_IMX21 */
struct platform_device *__init imx_add_imx21_hcd(
const struct imx_imx21_hcd_data *data,
const struct mx21_usbh_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_8K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("imx21-hcd", 0,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-imx27-coda.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Vista Silicon
* Javier Martin <javier.martin@vista-silicon.com>
*/
#include "../hardware.h"
#include "devices-common.h"
#ifdef CONFIG_SOC_IMX27
const struct imx_imx27_coda_data imx27_coda_data __initconst = {
.iobase = MX27_VPU_BASE_ADDR,
.iosize = SZ_512,
.irq = MX27_INT_VPU,
};
#endif
struct platform_device *__init imx_add_imx27_coda(
const struct imx_imx27_coda_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("coda-imx27", 0, res, 2, NULL,
0, DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-ipu-core.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2011 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_ipu_core_entry_single(soc) \
{ \
.iobase = soc ## _IPU_CTRL_BASE_ADDR, \
.synirq = soc ## _INT_IPU_SYN, \
.errirq = soc ## _INT_IPU_ERR, \
}
#ifdef CONFIG_SOC_IMX31
const struct imx_ipu_core_data imx31_ipu_core_data __initconst =
imx_ipu_core_entry_single(MX31);
#endif
#ifdef CONFIG_SOC_IMX35
const struct imx_ipu_core_data imx35_ipu_core_data __initconst =
imx_ipu_core_entry_single(MX35);
#endif
static struct platform_device *imx_ipu_coredev __initdata;
struct platform_device *__init imx_add_ipu_core(
const struct imx_ipu_core_data *data)
{
/* The resource order is important! */
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + 0x5f,
.flags = IORESOURCE_MEM,
}, {
.start = data->iobase + 0x88,
.end = data->iobase + 0xb3,
.flags = IORESOURCE_MEM,
}, {
.start = data->synirq,
.end = data->synirq,
.flags = IORESOURCE_IRQ,
}, {
.start = data->errirq,
.end = data->errirq,
.flags = IORESOURCE_IRQ,
},
};
return imx_ipu_coredev = imx_add_platform_device("ipu-core", -1,
res, ARRAY_SIZE(res), NULL, 0);
}
struct platform_device *__init imx_alloc_mx3_camera(
const struct imx_ipu_core_data *data,
const struct mx3_camera_pdata *pdata)
{
struct resource res[] = {
{
.start = data->iobase + 0x60,
.end = data->iobase + 0x87,
.flags = IORESOURCE_MEM,
},
};
int ret = -ENOMEM;
struct platform_device *pdev;
if (IS_ERR_OR_NULL(imx_ipu_coredev))
return ERR_PTR(-ENODEV);
pdev = platform_device_alloc("mx3-camera", 0);
if (!pdev)
return ERR_PTR(-ENOMEM);
pdev->dev.dma_mask = kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL);
if (!pdev->dev.dma_mask)
goto err;
*pdev->dev.dma_mask = DMA_BIT_MASK(32);
pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
if (ret)
goto err;
if (pdata) {
struct mx3_camera_pdata *copied_pdata;
ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
if (ret) {
err:
kfree(pdev->dev.dma_mask);
platform_device_put(pdev);
return ERR_PTR(-ENODEV);
}
copied_pdata = dev_get_platdata(&pdev->dev);
copied_pdata->dma_dev = &imx_ipu_coredev->dev;
}
return pdev;
}
struct platform_device *__init imx_add_mx3_sdc_fb(
const struct imx_ipu_core_data *data,
struct mx3fb_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase + 0xb4,
.end = data->iobase + 0x1bf,
.flags = IORESOURCE_MEM,
},
};
if (IS_ERR_OR_NULL(imx_ipu_coredev))
return ERR_PTR(-ENODEV);
pdata->dma_dev = &imx_ipu_coredev->dev;
return imx_add_platform_device_dmamask("mx3_sdc_fb", -1,
res, ARRAY_SIZE(res), pdata, sizeof(*pdata),
DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-mx2-camera.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_mx2_camera_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobasecsi = soc ## _CSI_BASE_ADDR, \
.iosizecsi = SZ_4K, \
.irqcsi = soc ## _INT_CSI, \
}
#define imx_mx2_camera_data_entry_single_emma(soc, _devid) \
{ \
.devid = _devid, \
.iobasecsi = soc ## _CSI_BASE_ADDR, \
.iosizecsi = SZ_32, \
.irqcsi = soc ## _INT_CSI, \
.iobaseemmaprp = soc ## _EMMAPRP_BASE_ADDR, \
.iosizeemmaprp = SZ_32, \
.irqemmaprp = soc ## _INT_EMMAPRP, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera");
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_mx2_camera(
const struct imx_mx2_camera_data *data,
const struct mx2_camera_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobasecsi,
.end = data->iobasecsi + data->iosizecsi - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irqcsi,
.end = data->irqcsi,
.flags = IORESOURCE_IRQ,
}, {
.start = data->iobaseemmaprp,
.end = data->iobaseemmaprp + data->iosizeemmaprp - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irqemmaprp,
.end = data->irqemmaprp,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask(data->devid, 0,
res, data->iobaseemmaprp ? 4 : 2,
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-mx2-emma.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_mx2_emmaprp_data_entry_single(soc) \
{ \
.iobase = soc ## _EMMAPRP_BASE_ADDR, \
.iosize = SZ_256, \
.irq = soc ## _INT_EMMAPRP, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_mx2_emma_data imx27_mx2_emmaprp_data __initconst =
imx_mx2_emmaprp_data_entry_single(MX27);
#endif /* ifdef CONFIG_SOC_IMX27 */
struct platform_device *__init imx_add_mx2_emmaprp(
const struct imx_mx2_emma_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("m2m-emmaprp", 0,
res, 2, NULL, 0, DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-mxc-ehci.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \
{ \
.id = _id, \
.iobase = soc ## _USB_ ## hs ## _BASE_ADDR, \
.irq = soc ## _INT_USB_ ## hs, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX27, 0, OTG);
const struct imx_mxc_ehci_data imx27_mxc_ehci_hs_data[] __initconst = {
imx_mxc_ehci_data_entry_single(MX27, 1, HS1),
imx_mxc_ehci_data_entry_single(MX27, 2, HS2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_ehci_data imx31_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX31, 0, OTG);
const struct imx_mxc_ehci_data imx31_mxc_ehci_hs_data[] __initconst = {
imx_mxc_ehci_data_entry_single(MX31, 1, HS1),
imx_mxc_ehci_data_entry_single(MX31, 2, HS2),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_ehci_data imx35_mxc_ehci_otg_data __initconst =
imx_mxc_ehci_data_entry_single(MX35, 0, OTG);
const struct imx_mxc_ehci_data imx35_mxc_ehci_hs_data __initconst =
imx_mxc_ehci_data_entry_single(MX35, 1, HS);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_mxc_ehci(
const struct imx_mxc_ehci_data *data,
const struct mxc_usbh_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_512 - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device_dmamask("mxc-ehci", data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-mxc-mmc.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/dma-mapping.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_SDHC ## _hwid, \
.dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \
}
#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \
[_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
#define imx21_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
imx21_mxc_mmc_data_entry(0, 1),
imx21_mxc_mmc_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
#define imx27_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
imx27_mxc_mmc_data_entry(0, 1),
imx27_mxc_mmc_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = {
#define imx31_mxc_mmc_data_entry(_id, _hwid) \
imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K)
imx31_mxc_mmc_data_entry(0, 1),
imx31_mxc_mmc_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
struct platform_device *__init imx_add_mxc_mmc(
const struct imx_mxc_mmc_data *data,
const struct imxmmc_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
}, {
.start = data->dmareq,
.end = data->dmareq,
.flags = IORESOURCE_DMA,
},
};
return imx_add_platform_device_dmamask(data->devid, data->id,
res, ARRAY_SIZE(res),
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-mxc_nand.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/sizes.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_nand_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_NFC \
}
#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \
{ \
.devid = _devid, \
.id = -1, \
.iobase = soc ## _NFC_BASE_ADDR, \
.iosize = _size, \
.axibase = soc ## _NFC_AXI_BASE_ADDR, \
.irq = soc ## _INT_NFC \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K);
#endif
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K);
#endif
struct platform_device *__init imx_add_mxc_nand(
const struct imx_mxc_nand_data *data,
const struct mxc_nand_platform_data *pdata)
{
/* AXI has to come first, that's how the mxc_nand driver expect it */
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
}, {
.start = data->axibase,
.end = data->axibase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
},
};
return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res) - !data->axibase,
pdata, sizeof(*pdata));
}
arch/arm/mach-imx/devices/platform-mxc_rtc.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010-2011 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_rtc_data_entry_single(soc, _devid) \
{ \
.devid = _devid, \
.iobase = soc ## _RTC_BASE_ADDR, \
.irq = soc ## _INT_RTC, \
}
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst =
imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc");
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst =
imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc");
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_mxc_rtc(
const struct imx_mxc_rtc_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device(data->devid, -1,
res, ARRAY_SIZE(res), NULL, 0);
}
arch/arm/mach-imx/devices/platform-mxc_w1.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include "../hardware.h"
#include "devices-common.h"
#define imx_mxc_w1_data_entry_single(soc) \
{ \
.iobase = soc ## _OWIRE_BASE_ADDR, \
}
#ifdef CONFIG_SOC_IMX21
const struct imx_mxc_w1_data imx21_mxc_w1_data __initconst =
imx_mxc_w1_data_entry_single(MX21);
#endif /* ifdef CONFIG_SOC_IMX21 */
#ifdef CONFIG_SOC_IMX27
const struct imx_mxc_w1_data imx27_mxc_w1_data __initconst =
imx_mxc_w1_data_entry_single(MX27);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_mxc_w1_data imx31_mxc_w1_data __initconst =
imx_mxc_w1_data_entry_single(MX31);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_mxc_w1_data imx35_mxc_w1_data __initconst =
imx_mxc_w1_data_entry_single(MX35);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_mxc_w1(
const struct imx_mxc_w1_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
};
return imx_add_platform_device("mxc_w1", 0,
res, ARRAY_SIZE(res), NULL, 0);
}
arch/arm/mach-imx/devices/platform-pata_imx.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
#include "../hardware.h"
#include "devices-common.h"
#define imx_pata_imx_data_entry_single(soc, _size) \
{ \
.iobase = soc ## _ATA_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_ATA, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_pata_imx_data imx27_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX27, SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_pata_imx_data imx31_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX31, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_pata_imx_data imx35_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX35, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_pata_imx(
const struct imx_pata_imx_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
},
{
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("pata_imx", -1,
res, ARRAY_SIZE(res), NULL, 0);
}
arch/arm/mach-imx/devices/platform-sdhci-esdhc-imx.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2010 Pengutronix, Wolfram Sang <kernel@pengutronix.de>
*/
#include <linux/platform_data/mmc-esdhc-imx.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _ESDHC ## hwid ## _BASE_ADDR, \
.irq = soc ## _INT_ESDHC ## hwid, \
}
#define imx_sdhci_esdhc_imx_data_entry(soc, devid, id, hwid) \
[id] = imx_sdhci_esdhc_imx_data_entry_single(soc, devid, id, hwid)
#ifdef CONFIG_SOC_IMX35
const struct imx_sdhci_esdhc_imx_data
imx35_sdhci_esdhc_imx_data[] __initconst = {
#define imx35_sdhci_esdhc_imx_data_entry(_id, _hwid) \
imx_sdhci_esdhc_imx_data_entry(MX35, "sdhci-esdhc-imx35", _id, _hwid)
imx35_sdhci_esdhc_imx_data_entry(0, 1),
imx35_sdhci_esdhc_imx_data_entry(1, 2),
imx35_sdhci_esdhc_imx_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
static const struct esdhc_platform_data default_esdhc_pdata __initconst = {
.wp_type = ESDHC_WP_NONE,
.cd_type = ESDHC_CD_NONE,
};
struct platform_device *__init imx_add_sdhci_esdhc_imx(
const struct imx_sdhci_esdhc_imx_data *data,
const struct esdhc_platform_data *pdata)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_16K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
/*
* If machine does not provide pdata, use the default one
* which means no WP/CD support
*/
if (!pdata)
pdata = &default_esdhc_pdata;
return imx_add_platform_device_dmamask(data->devid, data->id, res,
ARRAY_SIZE(res), pdata, sizeof(*pdata),
DMA_BIT_MASK(32));
}
arch/arm/mach-imx/devices/platform-spi_imx.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2009-2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*/
#include <linux/gpio/machine.h>
#include "../hardware.h"
#include "devices-common.h"
#define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \
{ \
.devid = _devid, \
.id = _id, \
.iobase = soc ## _ ## type ## hwid ## _BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_ ## type ## hwid, \
}
#define imx_spi_imx_data_entry(soc, type, devid, id, hwid, size) \
[id] = imx_spi_imx_data_entry_single(soc, type, devid, id, hwid, size)
#ifdef CONFIG_SOC_IMX21
const struct imx_spi_imx_data imx21_cspi_data[] __initconst = {
#define imx21_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX21, CSPI, "imx21-cspi", _id, _hwid, SZ_4K)
imx21_cspi_data_entry(0, 1),
imx21_cspi_data_entry(1, 2),
};
#endif
#ifdef CONFIG_SOC_IMX27
const struct imx_spi_imx_data imx27_cspi_data[] __initconst = {
#define imx27_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX27, CSPI, "imx27-cspi", _id, _hwid, SZ_4K)
imx27_cspi_data_entry(0, 1),
imx27_cspi_data_entry(1, 2),
imx27_cspi_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_spi_imx_data imx31_cspi_data[] __initconst = {
#define imx31_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX31, CSPI, "imx31-cspi", _id, _hwid, SZ_4K)
imx31_cspi_data_entry(0, 1),
imx31_cspi_data_entry(1, 2),
imx31_cspi_data_entry(2, 3),
};
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_spi_imx_data imx35_cspi_data[] __initconst = {
#define imx35_cspi_data_entry(_id, _hwid) \
imx_spi_imx_data_entry(MX35, CSPI, "imx35-cspi", _id, _hwid, SZ_4K)
imx35_cspi_data_entry(0, 1),
imx35_cspi_data_entry(1, 2),
};
#endif /* ifdef CONFIG_SOC_IMX35 */
struct platform_device *__init imx_add_spi_imx(
const struct imx_spi_imx_data *data, struct gpiod_lookup_table *gtable)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iosize - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
if (gtable)
gpiod_add_lookup_table(gtable);
return imx_add_platform_device(data->devid, data->id,
res, ARRAY_SIZE(res), NULL, 0);
}
arch/arm/mach-imx/ehci-imx27.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "ehci.h"
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX27_OTG_SIC_SHIFT 29
#define MX27_OTG_SIC_MASK (0x3 << MX27_OTG_SIC_SHIFT)
#define MX27_OTG_PM_BIT (1 << 24)
#define MX27_H2_SIC_SHIFT 21
#define MX27_H2_SIC_MASK (0x3 << MX27_H2_SIC_SHIFT)
#define MX27_H2_PM_BIT (1 << 16)
#define MX27_H2_DT_BIT (1 << 5)
#define MX27_H1_SIC_SHIFT 13
#define MX27_H1_SIC_MASK (0x3 << MX27_H1_SIC_SHIFT)
#define MX27_H1_PM_BIT (1 << 8)
#define MX27_H1_DT_BIT (1 << 4)
int mx27_initialize_usb_hw(int port, unsigned int flags)
{
unsigned int v;
v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
switch (port) {
case 0: /* OTG port */
v &= ~(MX27_OTG_SIC_MASK | MX27_OTG_PM_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_OTG_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX27_OTG_PM_BIT;
break;
case 1: /* H1 port */
v &= ~(MX27_H1_SIC_MASK | MX27_H1_PM_BIT | MX27_H1_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H1_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX27_H1_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX27_H1_DT_BIT;
break;
case 2: /* H2 port */
v &= ~(MX27_H2_SIC_MASK | MX27_H2_PM_BIT | MX27_H2_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H2_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX27_H2_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX27_H2_DT_BIT;
break;
default:
return -EINVAL;
}
writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
return 0;
}
arch/arm/mach-imx/ehci-imx31.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "ehci.h"
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX31_OTG_SIC_SHIFT 29
#define MX31_OTG_SIC_MASK (0x3 << MX31_OTG_SIC_SHIFT)
#define MX31_OTG_PM_BIT (1 << 24)
#define MX31_H2_SIC_SHIFT 21
#define MX31_H2_SIC_MASK (0x3 << MX31_H2_SIC_SHIFT)
#define MX31_H2_PM_BIT (1 << 16)
#define MX31_H2_DT_BIT (1 << 5)
#define MX31_H1_SIC_SHIFT 13
#define MX31_H1_SIC_MASK (0x3 << MX31_H1_SIC_SHIFT)
#define MX31_H1_PM_BIT (1 << 8)
#define MX31_H1_DT_BIT (1 << 4)
int mx31_initialize_usb_hw(int port, unsigned int flags)
{
unsigned int v;
v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
switch (port) {
case 0: /* OTG port */
v &= ~(MX31_OTG_SIC_MASK | MX31_OTG_PM_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_OTG_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX31_OTG_PM_BIT;
break;
case 1: /* H1 port */
v &= ~(MX31_H1_SIC_MASK | MX31_H1_PM_BIT | MX31_H1_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H1_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX31_H1_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX31_H1_DT_BIT;
break;
case 2: /* H2 port */
v &= ~(MX31_H2_SIC_MASK | MX31_H2_PM_BIT | MX31_H2_DT_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX31_H2_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX31_H2_PM_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX31_H2_DT_BIT;
break;
default:
return -EINVAL;
}
writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
return 0;
}
arch/arm/mach-imx/ehci-imx35.c deleted 100644 → 0
View file @ 1f70935f
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
* Copyright (C) 2010 Freescale Semiconductor, Inc.
*/
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/platform_data/usb-ehci-mxc.h>
#include "ehci.h"
#include "hardware.h"
#define USBCTRL_OTGBASE_OFFSET 0x600
#define MX35_OTG_SIC_SHIFT 29
#define MX35_OTG_SIC_MASK (0x3 << MX35_OTG_SIC_SHIFT)
#define MX35_OTG_PM_BIT (1 << 24)
#define MX35_OTG_PP_BIT (1 << 11)
#define MX35_OTG_OCPOL_BIT (1 << 3)
#define MX35_H1_SIC_SHIFT 21
#define MX35_H1_SIC_MASK (0x3 << MX35_H1_SIC_SHIFT)
#define MX35_H1_PP_BIT (1 << 18)
#define MX35_H1_PM_BIT (1 << 16)
#define MX35_H1_IPPUE_UP_BIT (1 << 7)
#define MX35_H1_IPPUE_DOWN_BIT (1 << 6)
#define MX35_H1_TLL_BIT (1 << 5)
#define MX35_H1_USBTE_BIT (1 << 4)
#define MX35_H1_OCPOL_BIT (1 << 2)
int mx35_initialize_usb_hw(int port, unsigned int flags)
{
unsigned int v;
v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
switch (port) {
case 0: /* OTG port */
v &= ~(MX35_OTG_SIC_MASK | MX35_OTG_PM_BIT | MX35_OTG_PP_BIT |
MX35_OTG_OCPOL_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_OTG_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX35_OTG_PM_BIT;
if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
v |= MX35_OTG_PP_BIT;
if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
v |= MX35_OTG_OCPOL_BIT;
break;
case 1: /* H1 port */
v &= ~(MX35_H1_SIC_MASK | MX35_H1_PM_BIT | MX35_H1_PP_BIT |
MX35_H1_OCPOL_BIT | MX35_H1_TLL_BIT | MX35_H1_USBTE_BIT |
MX35_H1_IPPUE_DOWN_BIT | MX35_H1_IPPUE_UP_BIT);
v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX35_H1_SIC_SHIFT;
if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
v |= MX35_H1_PM_BIT;
if (flags & MXC_EHCI_PWR_PIN_ACTIVE_HIGH)
v |= MX35_H1_PP_BIT;
if (!(flags & MXC_EHCI_OC_PIN_ACTIVE_LOW))
v |= MX35_H1_OCPOL_BIT;
if (!(flags & MXC_EHCI_TTL_ENABLED))
v |= MX35_H1_TLL_BIT;
if (flags & MXC_EHCI_INTERNAL_PHY)
v |= MX35_H1_USBTE_BIT;
if (flags & MXC_EHCI_IPPUE_DOWN)
v |= MX35_H1_IPPUE_DOWN_BIT;
if (flags & MXC_EHCI_IPPUE_UP)
v |= MX35_H1_IPPUE_UP_BIT;
break;
default:
return -EINVAL;
}
writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
return 0;
}
arch/arm/mach-imx/ehci.h deleted 100644 → 0
View file @ 1f70935f
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __MACH_IMX_EHCI_H
#define __MACH_IMX_EHCI_H
/* values for portsc field */
#define MXC_EHCI_PHY_LOW_POWER_SUSPEND (1 << 23)
#define MXC_EHCI_FORCE_FS (1 << 24)
#define MXC_EHCI_UTMI_8BIT (0 << 28)
#define MXC_EHCI_UTMI_16BIT (1 << 28)
#define MXC_EHCI_SERIAL (1 << 29)
#define MXC_EHCI_MODE_UTMI (0 << 30)
#define MXC_EHCI_MODE_PHILIPS (1 << 30)
#define MXC_EHCI_MODE_ULPI (2 << 30)
#define MXC_EHCI_MODE_SERIAL (3 << 30)
/* values for flags field */
#define MXC_EHCI_INTERFACE_DIFF_UNI (0 << 0)
#define MXC_EHCI_INTERFACE_DIFF_BI (1 << 0)
#define MXC_EHCI_INTERFACE_SINGLE_UNI (2 << 0)
#define MXC_EHCI_INTERFACE_SINGLE_BI (3 << 0)
#define MXC_EHCI_INTERFACE_MASK (0xf)
#define MXC_EHCI_POWER_PINS_ENABLED (1 << 5)
#define MXC_EHCI_PWR_PIN_ACTIVE_HIGH (1 << 6)
#define MXC_EHCI_OC_PIN_ACTIVE_LOW (1 << 7)
#define MXC_EHCI_TTL_ENABLED (1 << 8)
#define MXC_EHCI_INTERNAL_PHY (1 << 9)
#define MXC_EHCI_IPPUE_DOWN (1 << 10)
#define MXC_EHCI_IPPUE_UP (1 << 11)
#define MXC_EHCI_WAKEUP_ENABLED (1 << 12)
#define MXC_EHCI_ITC_NO_THRESHOLD (1 << 13)
#define MXC_USBCTRL_OFFSET 0
#define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8
#define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc
#define MXC_USBH2CTRL_OFFSET 0x14
int mx25_initialize_usb_hw(int port, unsigned int flags);
int mx31_initialize_usb_hw(int port, unsigned int flags);
int mx35_initialize_usb_hw(int port, unsigned int flags);
int mx27_initialize_usb_hw(int port, unsigned int flags);
#endif /* __MACH_IMX_EHCI_H */
arch/arm/mach-imx/hardware.h
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...@@ -97,7 +97,6 @@ ...@@ -97,7 +97,6 @@
#include "mx31.h" #include "mx31.h"
#include "mx35.h" #include "mx35.h"
#include "mx2x.h" #include "mx2x.h"
#include "mx21.h"
#include "mx27.h" #include "mx27.h"
#define imx_map_entry(soc, name, _type) { \ #define imx_map_entry(soc, name, _type) { \
......
arch/arm/mach-imx/imx27-dt.c deleted 100644 → 0
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2012 Sascha Hauer, Pengutronix
*/
#include <linux/irq.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include "common.h"
#include "mx27.h"
static const char * const imx27_dt_board_compat[] __initconst = {
"fsl,imx27",
NULL
};
DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
.map_io = mx27_map_io,
.init_early = imx27_init_early,
.init_irq = mx27_init_irq,
.init_late = imx27_pm_init,
.dt_compat = imx27_dt_board_compat,
MACHINE_END
arch/arm/mach-imx/iomux-imx31.c deleted 100644 → 0
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (C) 2008 by Sascha Hauer <kernel@pengutronix.de>
* Copyright (C) 2009 by Valentin Longchamp <valentin.longchamp@epfl.ch>
*/
#include <linux/gpio.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include "hardware.h"
#include "iomux-mx3.h"
/*
* IOMUX register (base) addresses
*/
#define IOMUX_BASE MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)
#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)
#define IOMUXGPR (IOMUX_BASE + 0x008)
#define IOMUXSW_MUX_CTL (IOMUX_BASE + 0x00C)
#define IOMUXSW_PAD_CTL (IOMUX_BASE + 0x154)
static DEFINE_SPINLOCK(gpio_mux_lock);
#define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3)
static DECLARE_BITMAP(mxc_pin_alloc_map, NB_PORTS * 32);
/*
* set the mode for a IOMUX pin.
*/
void mxc_iomux_mode(unsigned int pin_mode)
{
u32 field;
u32 l;
u32 mode;
void __iomem *reg;
reg = IOMUXSW_MUX_CTL + (pin_mode & IOMUX_REG_MASK);
field = pin_mode & 0x3;
mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT;
spin_lock(&gpio_mux_lock);
l = imx_readl(reg);
l &= ~(0xff << (field * 8));
l |= mode << (field * 8);
imx_writel(l, reg);
spin_unlock(&gpio_mux_lock);
}
/*
* This function configures the pad value for a IOMUX pin.
*/
void mxc_iomux_set_pad(enum iomux_pins pin, u32 config)
{
u32 field, l;
void __iomem *reg;
pin &= IOMUX_PADNUM_MASK;
reg = IOMUXSW_PAD_CTL + (pin + 2) / 3 * 4;
field = (pin + 2) % 3;
pr_debug("%s: reg offset = 0x%x, field = %d\n",
__func__, (pin + 2) / 3, field);
spin_lock(&gpio_mux_lock);
l = imx_readl(reg);
l &= ~(0x1ff << (field * 10));
l |= config << (field * 10);
imx_writel(l, reg);
spin_unlock(&gpio_mux_lock);
}
/*
* allocs a single pin:
* - reserves the pin so that it is not claimed by another driver
* - setups the iomux according to the configuration
*/
int mxc_iomux_alloc_pin(unsigned int pin, const char *label)
{
unsigned pad = pin & IOMUX_PADNUM_MASK;
if (pad >= (PIN_MAX + 1)) {
printk(KERN_ERR "mxc_iomux: Attempt to request nonexistent pin %u for \"%s\"\n",
pad, label ? label : "?");
return -EINVAL;
}
if (test_and_set_bit(pad, mxc_pin_alloc_map)) {
printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n",
pad, label ? label : "?");
return -EBUSY;
}
mxc_iomux_mode(pin);
return 0;
}
int mxc_iomux_setup_multiple_pins(const unsigned int *pin_list, unsigned count,
const char *label)
{
const unsigned int *p = pin_list;
int i;
int ret = -EINVAL;
for (i = 0; i < count; i++) {
ret = mxc_iomux_alloc_pin(*p, label);
if (ret)
goto setup_error;
p++;
}
return 0;
setup_error:
mxc_iomux_release_multiple_pins(pin_list, i);
return ret;
}
void mxc_iomux_release_pin(unsigned int pin)
{
unsigned pad = pin & IOMUX_PADNUM_MASK;
if (pad < (PIN_MAX + 1))
clear_bit(pad, mxc_pin_alloc_map);
}
void mxc_iomux_release_multiple_pins(const unsigned int *pin_list, int count)
{
const unsigned int *p = pin_list;
int i;
for (i = 0; i < count; i++) {
mxc_iomux_release_pin(*p);
p++;
}
}
/*
* This function enables/disables the general purpose function for a particular
* signal.
*/
void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en)
{
u32 l;
spin_lock(&gpio_mux_lock);
l = imx_readl(IOMUXGPR);
if (en)
l |= gp;
else
l &= ~gp;
imx_writel(l, IOMUXGPR);
spin_unlock(&gpio_mux_lock);
}
arch/arm/mach-imx/iomux-mx21.h deleted 100644 → 0
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/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* Copyright (C) 2009 by Holger Schurig <hs4233@mail.mn-solutions.de>
*/
#ifndef __MACH_IOMUX_MX21_H__
#define __MACH_IOMUX_MX21_H__
#include "iomux-mx2x.h"
#include "iomux-v1.h"
/* Primary GPIO pin functions */
#define PB22_PF_USBH1_BYP (GPIO_PORTB | GPIO_PF | 22)
#define PB25_PF_USBH1_ON (GPIO_PORTB | GPIO_PF | 25)
#define PC5_PF_USBOTG_SDA (GPIO_PORTC | GPIO_PF | 5)
#define PC6_PF_USBOTG_SCL (GPIO_PORTC | GPIO_PF | 6)
#define PC7_PF_USBOTG_ON (GPIO_PORTC | GPIO_PF | 7)
#define PC8_PF_USBOTG_FS (GPIO_PORTC | GPIO_PF | 8)
#define PC9_PF_USBOTG_OE (GPIO_PORTC | GPIO_PF | 9)
#define PC10_PF_USBOTG_TXDM (GPIO_PORTC | GPIO_PF | 10)
#define PC11_PF_USBOTG_TXDP (GPIO_PORTC | GPIO_PF | 11)
#define PC12_PF_USBOTG_RXDM (GPIO_PORTC | GPIO_PF | 12)
#define PC13_PF_USBOTG_RXDP (GPIO_PORTC | GPIO_PF | 13)
#define PC16_PF_SAP_FS (GPIO_PORTC | GPIO_PF | 16)
#define PC17_PF_SAP_RXD (GPIO_PORTC | GPIO_PF | 17)
#define PC18_PF_SAP_TXD (GPIO_PORTC | GPIO_PF | 18)
#define PC19_PF_SAP_CLK (GPIO_PORTC | GPIO_PF | 19)
#define PE0_PF_TEST_WB2 (GPIO_PORTE | GPIO_PF | 0)
#define PE1_PF_TEST_WB1 (GPIO_PORTE | GPIO_PF | 1)
#define PE2_PF_TEST_WB0 (GPIO_PORTE | GPIO_PF | 2)
#define PF1_PF_NFCE (GPIO_PORTF | GPIO_PF | 1)
#define PF3_PF_NFCLE (GPIO_PORTF | GPIO_PF | 3)
#define PF7_PF_NFIO0 (GPIO_PORTF | GPIO_PF | 7)
#define PF8_PF_NFIO1 (GPIO_PORTF | GPIO_PF | 8)
#define PF9_PF_NFIO2 (GPIO_PORTF | GPIO_PF | 9)
#define PF10_PF_NFIO3 (GPIO_PORTF | GPIO_PF | 10)
#define PF11_PF_NFIO4 (GPIO_PORTF | GPIO_PF | 11)
#define PF12_PF_NFIO5 (GPIO_PORTF | GPIO_PF | 12)
#define PF13_PF_NFIO6 (GPIO_PORTF | GPIO_PF | 13)
#define PF14_PF_NFIO7 (GPIO_PORTF | GPIO_PF | 14)
#define PF16_PF_RES (GPIO_PORTF | GPIO_PF | 16)
/* Alternate GPIO pin functions */
#define PA5_AF_BMI_CLK_CS (GPIO_PORTA | GPIO_AF | 5)
#define PA6_AF_BMI_D0 (GPIO_PORTA | GPIO_AF | 6)
#define PA7_AF_BMI_D1 (GPIO_PORTA | GPIO_AF | 7)
#define PA8_AF_BMI_D2 (GPIO_PORTA | GPIO_AF | 8)
#define PA9_AF_BMI_D3 (GPIO_PORTA | GPIO_AF | 9)
#define PA10_AF_BMI_D4 (GPIO_PORTA | GPIO_AF | 10)
#define PA11_AF_BMI_D5 (GPIO_PORTA | GPIO_AF | 11)
#define PA12_AF_BMI_D6 (GPIO_PORTA | GPIO_AF | 12)
#define PA13_AF_BMI_D7 (GPIO_PORTA | GPIO_AF | 13)
#define PA14_AF_BMI_D8 (GPIO_PORTA | GPIO_AF | 14)
#define PA15_AF_BMI_D9 (GPIO_PORTA | GPIO_AF | 15)
#define PA16_AF_BMI_D10 (GPIO_PORTA | GPIO_AF | 16)
#define PA17_AF_BMI_D11 (GPIO_PORTA | GPIO_AF | 17)
#define PA18_AF_BMI_D12 (GPIO_PORTA | GPIO_AF | 18)
#define PA19_AF_BMI_D13 (GPIO_PORTA | GPIO_AF | 19)
#define PA20_AF_BMI_D14 (GPIO_PORTA | GPIO_AF | 20)
#define PA21_AF_BMI_D15 (GPIO_PORTA | GPIO_AF | 21)
#define PA22_AF_BMI_READ_REQ (GPIO_PORTA | GPIO_AF | 22)
#define PA23_AF_BMI_WRITE (GPIO_PORTA | GPIO_AF | 23)
#define PA29_AF_BMI_RX_FULL (GPIO_PORTA | GPIO_AF | 29)
#define PA30_AF_BMI_READ (GPIO_PORTA | GPIO_AF | 30)
/* AIN GPIO pin functions */
#define PC14_AIN_SYS_CLK (GPIO_PORTC | GPIO_AIN | GPIO_OUT | 14)
#define PD21_AIN_USBH2_FS (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 21)
#define PD22_AIN_USBH2_OE (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 22)
#define PD23_AIN_USBH2_TXDM (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 23)
#define PD24_AIN_USBH2_TXDP (GPIO_PORTD | GPIO_AIN | GPIO_OUT | 24)
#define PE8_AIN_IR_TXD (GPIO_PORTE | GPIO_AIN | GPIO_OUT | 8)
#define PF0_AIN_PC_RST (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 0)
#define PF1_AIN_PC_CE1 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 1)
#define PF2_AIN_PC_CE2 (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 2)
#define PF3_AIN_PC_POE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 3)
#define PF4_AIN_PC_OE (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 4)
#define PF5_AIN_PC_RW (GPIO_PORTF | GPIO_AIN | GPIO_OUT | 5)
/* BIN GPIO pin functions */
#define PC14_BIN_SYS_CLK (GPIO_PORTC | GPIO_BIN | GPIO_OUT | 14)
#define PD27_BIN_EXT_DMA_GRANT (GPIO_PORTD | GPIO_BIN | GPIO_OUT | 27)
/* CIN GPIO pin functions */
#define PB26_CIN_USBH1_RXDAT (GPIO_PORTB | GPIO_CIN | GPIO_OUT | 26)
/* AOUT GPIO pin functions */
#define PA29_AOUT_BMI_WAIT (GPIO_PORTA | GPIO_AOUT | GPIO_IN | 29)
#define PD19_AOUT_USBH2_RXDM (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 19)
#define PD20_AOUT_USBH2_RXDP (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 20)
#define PD25_AOUT_EXT_DMAREQ (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 25)
#define PD26_AOUT_USBOTG_RXDAT (GPIO_PORTD | GPIO_AOUT | GPIO_IN | 26)
#define PE9_AOUT_IR_RXD (GPIO_PORTE | GPIO_AOUT | GPIO_IN | 9)
#define PF6_AOUT_PC_BVD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 6)
#define PF7_AOUT_PC_BVD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 7)
#define PF8_AOUT_PC_VS2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 8)
#define PF9_AOUT_PC_VS1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 9)
#define PF10_AOUT_PC_WP (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 10)
#define PF11_AOUT_PC_READY (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 11)
#define PF12_AOUT_PC_WAIT (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 12)
#define PF13_AOUT_PC_CD2 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 13)
#define PF14_AOUT_PC_CD1 (GPIO_PORTF | GPIO_AOUT | GPIO_IN | 14)
#endif /* ifndef __MACH_IOMUX_MX21_H__ */
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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* arch/arm/plat-mxc/iomux-v1.c
*
* Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
* Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
*
* Common code for i.MX1, i.MX21 and i.MX27
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/gpio.h>
#include <asm/mach/map.h>
#include "hardware.h"
#include "iomux-v1.h"
static void __iomem *imx_iomuxv1_baseaddr;
static unsigned imx_iomuxv1_numports;
static inline unsigned long imx_iomuxv1_readl(unsigned offset)
{
return imx_readl(imx_iomuxv1_baseaddr + offset);
}
static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
{
imx_writel(val, imx_iomuxv1_baseaddr + offset);
}
static inline void imx_iomuxv1_rmwl(unsigned offset,
unsigned long mask, unsigned long value)
{
unsigned long reg = imx_iomuxv1_readl(offset);
reg &= ~mask;
reg |= value;
imx_iomuxv1_writel(reg, offset);
}
static inline void imx_iomuxv1_set_puen(
unsigned int port, unsigned int pin, int on)
{
unsigned long mask = 1 << pin;
imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
}
static inline void imx_iomuxv1_set_ddir(
unsigned int port, unsigned int pin, int out)
{
unsigned long mask = 1 << pin;
imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
}
static inline void imx_iomuxv1_set_gpr(
unsigned int port, unsigned int pin, int af)
{
unsigned long mask = 1 << pin;
imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
}
static inline void imx_iomuxv1_set_gius(
unsigned int port, unsigned int pin, int inuse)
{
unsigned long mask = 1 << pin;
imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
}
static inline void imx_iomuxv1_set_ocr(
unsigned int port, unsigned int pin, unsigned int ocr)
{
unsigned long shift = (pin & 0xf) << 1;
unsigned long mask = 3 << shift;
unsigned long value = ocr << shift;
unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
imx_iomuxv1_rmwl(offset, mask, value);
}
static inline void imx_iomuxv1_set_iconfa(
unsigned int port, unsigned int pin, unsigned int aout)
{
unsigned long shift = (pin & 0xf) << 1;
unsigned long mask = 3 << shift;
unsigned long value = aout << shift;
unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
imx_iomuxv1_rmwl(offset, mask, value);
}
static inline void imx_iomuxv1_set_iconfb(
unsigned int port, unsigned int pin, unsigned int bout)
{
unsigned long shift = (pin & 0xf) << 1;
unsigned long mask = 3 << shift;
unsigned long value = bout << shift;
unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
imx_iomuxv1_rmwl(offset, mask, value);
}
int mxc_gpio_mode(int gpio_mode)
{
unsigned int pin = gpio_mode & GPIO_PIN_MASK;
unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
if (port >= imx_iomuxv1_numports)
return -EINVAL;
/* Pullup enable */
imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
/* Data direction */
imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
/* Primary / alternate function */
imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
/* use as gpio? */
imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
imx_iomuxv1_set_ocr(port, pin, ocr);
imx_iomuxv1_set_iconfa(port, pin, aout);
imx_iomuxv1_set_iconfb(port, pin, bout);
return 0;
}
static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
{
size_t i;
int ret = 0;
for (i = 0; i < count; ++i) {
ret = mxc_gpio_mode(list[i]);
if (ret)
return ret;
}
return ret;
}
int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
const char *label)
{
int ret;
ret = imx_iomuxv1_setup_multiple(pin_list, count);
return ret;
}
int __init imx_iomuxv1_init(void __iomem *base, int numports)
{
imx_iomuxv1_baseaddr = base;
imx_iomuxv1_numports = numports;
return 0;
}
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