[PATCH] EDAC: formatting cleanup

Cosmetic indentation/formatting cleanup for EDAC code.  Make sure we
are using tabs rather than spaces to indent, etc.
Signed-off-by: David S. Peterson <dsp@llnl.gov>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

drivers/edac/amd76x_edac.c

@@ -12,33 +12,26 @@
  *
  */
 
-
 #include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
-
 #include <linux/pci.h>
 #include <linux/pci_ids.h>
-
 #include <linux/slab.h>
-
 #include "edac_mc.h"
 
-
 #define amd76x_printk(level, fmt, arg...) \
 	edac_printk(level, "amd76x", fmt, ##arg)
 
-
 #define amd76x_mc_printk(mci, level, fmt, arg...) \
 	edac_mc_chipset_printk(mci, level, "amd76x", fmt, ##arg)
 
-
 #define AMD76X_NR_CSROWS 8
 #define AMD76X_NR_CHANS  1
 #define AMD76X_NR_DIMMS  4
 
-
 /* AMD 76x register addresses - device 0 function 0 - PCI bridge */
+
 #define AMD76X_ECC_MODE_STATUS	0x48	/* Mode and status of ECC (32b)
 					 *
 					 * 31:16 reserved
@@ -50,6 +43,7 @@
 					 *  7:4  UE cs row
 					 *  3:0  CE cs row
 					 */
+
 #define AMD76X_DRAM_MODE_STATUS	0x58	/* DRAM Mode and status (32b)
 					 *
 					 * 31:26 clock disable 5 - 0
@@ -64,6 +58,7 @@
 					 * 15:8  reserved
 					 *  7:0  x4 mode enable 7 - 0
 					 */
+
 #define AMD76X_MEM_BASE_ADDR	0xC0	/* Memory base address (8 x 32b)
 					 *
 					 * 31:23 chip-select base
@@ -74,29 +69,28 @@
 					 *  0    chip-select enable
 					 */
 
-
 struct amd76x_error_info {
 	u32 ecc_mode_status;
 };
 
-
 enum amd76x_chips {
 	AMD761 = 0,
 	AMD762
 };
 
-
 struct amd76x_dev_info {
 	const char *ctl_name;
 };
 
-
 static const struct amd76x_dev_info amd76x_devs[] = {
-	[AMD761] = {.ctl_name = "AMD761"},
-	[AMD762] = {.ctl_name = "AMD762"},
+	[AMD761] = {
+		.ctl_name = "AMD761"
+	},
+	[AMD762] = {
+		.ctl_name = "AMD762"
+	},
 };
 
-
 /**
  *	amd76x_get_error_info	-	fetch error information
  *	@mci: Memory controller
@@ -105,8 +99,7 @@ static const struct amd76x_dev_info amd76x_devs[] = {
  *	Fetch and store the AMD76x ECC status. Clear pending status
  *	on the chip so that further errors will be reported
  */
-
-static void amd76x_get_error_info (struct mem_ctl_info *mci,
+static void amd76x_get_error_info(struct mem_ctl_info *mci,
 		struct amd76x_error_info *info)
 {
 	pci_read_config_dword(mci->pdev, AMD76X_ECC_MODE_STATUS,
@@ -121,7 +114,6 @@ static void amd76x_get_error_info (struct mem_ctl_info *mci,
 				(u32) BIT(9), (u32) BIT(9));
 }
 
-
 /**
  *	amd76x_process_error_info	-	Error check
  *	@mci: Memory controller
@@ -132,8 +124,7 @@ static void amd76x_get_error_info (struct mem_ctl_info *mci,
  *	A return of 1 indicates an error. Also if handle_errors is true
  *	then attempt to handle and clean up after the error
  */
-
-static int amd76x_process_error_info (struct mem_ctl_info *mci,
+static int amd76x_process_error_info(struct mem_ctl_info *mci,
 		struct amd76x_error_info *info, int handle_errors)
 {
 	int error_found;
@@ -149,9 +140,8 @@ static int amd76x_process_error_info (struct mem_ctl_info *mci,
 
 		if (handle_errors) {
 			row = (info->ecc_mode_status >> 4) & 0xf;
-			edac_mc_handle_ue(mci,
-			    mci->csrows[row].first_page, 0, row,
-			    mci->ctl_name);
+			edac_mc_handle_ue(mci, mci->csrows[row].first_page, 0,
+				row, mci->ctl_name);
 		}
 	}
 
@@ -163,11 +153,11 @@ static int amd76x_process_error_info (struct mem_ctl_info *mci,
 
 		if (handle_errors) {
 			row = info->ecc_mode_status & 0xf;
-			edac_mc_handle_ce(mci,
-			    mci->csrows[row].first_page, 0, 0, row, 0,
-			    mci->ctl_name);
+			edac_mc_handle_ce(mci, mci->csrows[row].first_page, 0,
+				0, row, 0, mci->ctl_name);
 		}
 	}
+
 	return error_found;
 }
 
@@ -178,7 +168,6 @@ static int amd76x_process_error_info (struct mem_ctl_info *mci,
  *	Called by the poll handlers this function reads the status
  *	from the controller and checks for errors.
  */
-
 static void amd76x_check(struct mem_ctl_info *mci)
 {
 	struct amd76x_error_info info;
@@ -187,7 +176,6 @@ static void amd76x_check(struct mem_ctl_info *mci)
 	amd76x_process_error_info(mci, &info, 1);
 }
 
-
 /**
  *	amd76x_probe1	-	Perform set up for detected device
  *	@pdev; PCI device detected
@@ -197,7 +185,6 @@ static void amd76x_check(struct mem_ctl_info *mci)
  *	controller status reporting. We configure and set up the
  *	memory controller reporting and claim the device.
  */
-
 static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
 {
 	int rc = -ENODEV;
@@ -214,10 +201,8 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
 	struct amd76x_error_info discard;
 
 	debugf0("%s()\n", __func__);
-
 	pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems);
 	ems_mode = (ems >> 10) & 0x3;
-
 	mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS);
 
 	if (mci == NULL) {
@@ -226,14 +211,11 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
 	}
 
 	debugf0("%s(): mci = %p\n", __func__, mci);
-
 	mci->pdev = pdev;
 	mci->mtype_cap = MEM_FLAG_RDDR;
-
 	mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
 	mci->edac_cap = ems_mode ?
 			(EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE;
-
 	mci->mod_name = EDAC_MOD_STR;
 	mci->mod_ver = "$Revision: 1.4.2.5 $";
 	mci->ctl_name = amd76x_devs[dev_idx].ctl_name;
@@ -249,18 +231,15 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
 
 		/* find the DRAM Chip Select Base address and mask */
 		pci_read_config_dword(mci->pdev,
-				      AMD76X_MEM_BASE_ADDR + (index * 4),
-				      &mba);
+				AMD76X_MEM_BASE_ADDR + (index * 4), &mba);
 
 		if (!(mba & BIT(0)))
 			continue;
 
 		mba_base = mba & 0xff800000UL;
 		mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
-
 		pci_read_config_dword(mci->pdev, AMD76X_DRAM_MODE_STATUS,
 				&dms);
-
 		csrow->first_page = mba_base >> PAGE_SHIFT;
 		csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
 		csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
@@ -298,7 +277,6 @@ static int __devinit amd76x_init_one(struct pci_dev *pdev,
 	return amd76x_probe1(pdev, ent->driver_data);
 }
 
-
 /**
  *	amd76x_remove_one	-	driver shutdown
  *	@pdev: PCI device being handed back
@@ -307,7 +285,6 @@ static int __devinit amd76x_init_one(struct pci_dev *pdev,
  *	structure for the device then delete the mci and free the
  *	resources.
  */
-
 static void __devexit amd76x_remove_one(struct pci_dev *pdev)
 {
 	struct mem_ctl_info *mci;
@@ -320,18 +297,22 @@ static void __devexit amd76x_remove_one(struct pci_dev *pdev)
 	edac_mc_free(mci);
 }
 
-
 static const struct pci_device_id amd76x_pci_tbl[] __devinitdata = {
-	{PCI_VEND_DEV(AMD, FE_GATE_700C), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-	 AMD762},
-	{PCI_VEND_DEV(AMD, FE_GATE_700E), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-	 AMD761},
-	{0,}			/* 0 terminated list. */
+	{
+		PCI_VEND_DEV(AMD, FE_GATE_700C), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+		AMD762
+	},
+	{
+		PCI_VEND_DEV(AMD, FE_GATE_700E), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+		AMD761
+	},
+	{
+		0,
+	}	/* 0 terminated list. */
 };
 
 MODULE_DEVICE_TABLE(pci, amd76x_pci_tbl);
 
-
 static struct pci_driver amd76x_driver = {
 	.name = EDAC_MOD_STR,
 	.probe = amd76x_init_one,

drivers/edac/edac_mc.h

@@ -15,11 +15,9 @@
  *
  */
 
-
 #ifndef _EDAC_MC_H_
 #define _EDAC_MC_H_
 
-
 #include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
@@ -33,7 +31,6 @@
 #include <linux/completion.h>
 #include <linux/kobject.h>
 
-
 #define EDAC_MC_LABEL_LEN	31
 #define MC_PROC_NAME_MAX_LEN 7
 
@@ -71,14 +68,16 @@ extern int edac_debug_level;
 #define debugf2( ... ) edac_debug_printk(2, __VA_ARGS__ )
 #define debugf3( ... ) edac_debug_printk(3, __VA_ARGS__ )
 #define debugf4( ... ) edac_debug_printk(4, __VA_ARGS__ )
+
 #else  /* !CONFIG_EDAC_DEBUG */
+
 #define debugf0( ... )
 #define debugf1( ... )
 #define debugf2( ... )
 #define debugf3( ... )
 #define debugf4( ... )
-#endif				/* !CONFIG_EDAC_DEBUG */
 
+#endif  /* !CONFIG_EDAC_DEBUG */
 
 #define edac_xstr(s) edac_str(s)
 #define edac_str(s) #s
@@ -86,7 +85,8 @@ extern int edac_debug_level;
 
 #define BIT(x) (1 << (x))
 
-#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, PCI_DEVICE_ID_ ## vend ## _ ## dev
+#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
+	PCI_DEVICE_ID_ ## vend ## _ ## dev
 
 /* memory devices */
 enum dev_type {
@@ -136,7 +136,6 @@ enum mem_type {
 #define MEM_FLAG_RDDR		BIT(MEM_RDDR)
 #define MEM_FLAG_RMBS		BIT(MEM_RMBS)
 
-
 /* chipset Error Detection and Correction capabilities and mode */
 enum edac_type {
 	EDAC_UNKNOWN = 0,	/* Unknown if ECC is available */
@@ -161,7 +160,6 @@ enum edac_type {
 #define EDAC_FLAG_S8ECD8ED	BIT(EDAC_S8ECD8ED)
 #define EDAC_FLAG_S16ECD16ED	BIT(EDAC_S16ECD16ED)
 
-
 /* scrubbing capabilities */
 enum scrub_type {
 	SCRUB_UNKNOWN = 0,	/* Unknown if scrubber is available */
@@ -269,7 +267,6 @@ enum scrub_type {
  * PS - I enjoyed writing all that about as much as you enjoyed reading it.
  */
 
-
 struct channel_info {
 	int chan_idx;		/* channel index */
 	u32 ce_count;		/* Correctable Errors for this CHANNEL */
@@ -277,12 +274,12 @@ struct channel_info {
 	struct csrow_info *csrow;	/* the parent */
 };
 
-
 struct csrow_info {
 	unsigned long first_page;	/* first page number in dimm */
 	unsigned long last_page;	/* last page number in dimm */
 	unsigned long page_mask;	/* used for interleaving -
-					   0UL for non intlv */
+					 * 0UL for non intlv
+					 */
 	u32 nr_pages;		/* number of pages in csrow */
 	u32 grain;		/* granularity of reported error in bytes */
 	int csrow_idx;		/* the chip-select row */
@@ -301,18 +298,18 @@ struct csrow_info {
 	struct channel_info *channels;
 };
 
-
 struct mem_ctl_info {
 	struct list_head link;  /* for global list of mem_ctl_info structs */
 	unsigned long mtype_cap;	/* memory types supported by mc */
 	unsigned long edac_ctl_cap;	/* Mem controller EDAC capabilities */
 	unsigned long edac_cap;	/* configuration capabilities - this is
-				   closely related to edac_ctl_cap.  The
-				   difference is that the controller
-				   may be capable of s4ecd4ed which would
-				   be listed in edac_ctl_cap, but if
-				   channels aren't capable of s4ecd4ed then the
-				   edac_cap would not have that capability. */
+				 * closely related to edac_ctl_cap.  The
+				 * difference is that the controller may be
+				 * capable of s4ecd4ed which would be listed
+				 * in edac_ctl_cap, but if channels aren't
+				 * capable of s4ecd4ed then the edac_cap would
+				 * not have that capability.
+				 */
 	unsigned long scrub_cap;	/* chipset scrub capabilities */
 	enum scrub_type scrub_mode;	/* current scrub mode */
 
@@ -356,53 +353,54 @@ struct mem_ctl_info {
 	struct completion kobj_complete;
 };
 
-
-
 /* write all or some bits in a byte-register*/
-static inline void pci_write_bits8(struct pci_dev *pdev, int offset,
-				   u8 value, u8 mask)
+static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
+		u8 mask)
 {
 	if (mask != 0xff) {
 		u8 buf;
+
 		pci_read_config_byte(pdev, offset, &buf);
 		value &= mask;
 		buf &= ~mask;
 		value |= buf;
 	}
+
 	pci_write_config_byte(pdev, offset, value);
 }
 
-
 /* write all or some bits in a word-register*/
 static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
 		u16 value, u16 mask)
 {
 	if (mask != 0xffff) {
 		u16 buf;
+
 		pci_read_config_word(pdev, offset, &buf);
 		value &= mask;
 		buf &= ~mask;
 		value |= buf;
 	}
+
 	pci_write_config_word(pdev, offset, value);
 }
 
-
 /* write all or some bits in a dword-register*/
 static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
 		u32 value, u32 mask)
 {
 	if (mask != 0xffff) {
 		u32 buf;
+
 		pci_read_config_dword(pdev, offset, &buf);
 		value &= mask;
 		buf &= ~mask;
 		value |= buf;
 	}
+
 	pci_write_config_dword(pdev, offset, value);
 }
 
-
 #ifdef CONFIG_EDAC_DEBUG
 void edac_mc_dump_channel(struct channel_info *chan);
 void edac_mc_dump_mci(struct mem_ctl_info *mci);
@@ -411,12 +409,10 @@ void edac_mc_dump_csrow(struct csrow_info *csrow);
 
 extern int edac_mc_add_mc(struct mem_ctl_info *mci);
 extern struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev);
-
 extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
 					unsigned long page);
-
-extern void edac_mc_scrub_block(unsigned long page,
-				     unsigned long offset, u32 size);
+extern void edac_mc_scrub_block(unsigned long page, unsigned long offset,
+		u32 size);
 
 /*
  * The no info errors are used when error overflows are reported.
@@ -429,19 +425,14 @@ extern void edac_mc_scrub_block(unsigned long page,
  * statement clutter and extra function arguments.
  */
 extern void edac_mc_handle_ce(struct mem_ctl_info *mci,
-				   unsigned long page_frame_number,
-				   unsigned long offset_in_page,
-				   unsigned long syndrome,
-				   int row, int channel, const char *msg);
-
+		unsigned long page_frame_number, unsigned long offset_in_page,
+		unsigned long syndrome, int row, int channel,
+		const char *msg);
 extern void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci,
 		const char *msg);
-
 extern void edac_mc_handle_ue(struct mem_ctl_info *mci,
-				   unsigned long page_frame_number,
-				   unsigned long offset_in_page,
+		unsigned long page_frame_number, unsigned long offset_in_page,
 		int row, const char *msg);
-
 extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,
 		const char *msg);
 
@@ -449,11 +440,10 @@ extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,
  * This kmalloc's and initializes all the structures.
  * Can't be used if all structures don't have the same lifetime.
  */
-extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt,
-		unsigned nr_csrows, unsigned nr_chans);
+extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
+		unsigned nr_chans);
 
 /* Free an mc previously allocated by edac_mc_alloc() */
 extern void edac_mc_free(struct mem_ctl_info *mci);
 
-
 #endif				/* _EDAC_MC_H_ */

drivers/edac/i82860_edac.c

@@ -9,7 +9,6 @@
  * by Thayne Harbaugh of Linux Networx. (http://lnxi.com)
  */
 
-
 #include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
@@ -18,15 +17,12 @@
 #include <linux/slab.h>
 #include "edac_mc.h"
 
-
 #define i82860_printk(level, fmt, arg...) \
 	edac_printk(level, "i82860", fmt, ##arg)
 
-
 #define i82860_mc_printk(mci, level, fmt, arg...) \
 	edac_mc_chipset_printk(mci, level, "i82860", fmt, ##arg)
 
-
 #ifndef PCI_DEVICE_ID_INTEL_82860_0
 #define PCI_DEVICE_ID_INTEL_82860_0	0x2531
 #endif				/* PCI_DEVICE_ID_INTEL_82860_0 */
@@ -56,13 +52,15 @@ struct i82860_error_info {
 
 static const struct i82860_dev_info i82860_devs[] = {
 	[I82860] = {
-		    .ctl_name = "i82860"},
+		.ctl_name = "i82860"
+	},
 };
 
 static struct pci_dev *mci_pdev = NULL;	/* init dev: in case that AGP code
-					   has already registered driver */
+					 * has already registered driver
+					 */
 
-static void i82860_get_error_info (struct mem_ctl_info *mci,
+static void i82860_get_error_info(struct mem_ctl_info *mci,
 		struct i82860_error_info *info)
 {
 	/*
@@ -84,6 +82,7 @@ static void i82860_get_error_info (struct mem_ctl_info *mci,
 	 */
 	if (!(info->errsts2 & 0x0003))
 		return;
+
 	if ((info->errsts ^ info->errsts2) & 0x0003) {
 		pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
 		pci_read_config_word(mci->pdev, I82860_DERRCTL_STS,
@@ -91,7 +90,7 @@ static void i82860_get_error_info (struct mem_ctl_info *mci,
 	}
 }
 
-static int i82860_process_error_info (struct mem_ctl_info *mci,
+static int i82860_process_error_info(struct mem_ctl_info *mci,
 		struct i82860_error_info *info, int handle_errors)
 {
 	int row;
@@ -113,8 +112,8 @@ static int i82860_process_error_info (struct mem_ctl_info *mci,
 	if (info->errsts & 0x0002)
 		edac_mc_handle_ue(mci, info->eap, 0, row, "i82860 UE");
 	else
-		edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
-				       0, "i82860 UE");
+		edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row, 0,
+				"i82860 UE");
 
 	return 1;
 }
@@ -147,15 +146,14 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
 	   going to make 1 channel for group.
 	 */
 	mci = edac_mc_alloc(0, 16, 1);
+
 	if (!mci)
 		return -ENOMEM;
 
 	debugf3("%s(): init mci\n", __func__);
-
 	mci->pdev = pdev;
 	mci->mtype_cap = MEM_FLAG_DDR;
 
-
 	mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
 	/* I"m not sure about this but I think that all RDRAM is SECDED */
 	mci->edac_cap = EDAC_FLAG_SECDED;
@@ -188,6 +186,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
 		    (I82860_GBA_SHIFT - PAGE_SHIFT);
 		debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
 			cumul_size);
+
 		if (cumul_size == last_cumul_size)
 			continue;	/* not populated */
 
@@ -211,6 +210,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
 		debugf3("%s(): success\n", __func__);
 		rc = 0;
 	}
+
 	return rc;
 }
 
@@ -221,13 +221,16 @@ static int __devinit i82860_init_one(struct pci_dev *pdev,
 	int rc;
 
 	debugf0("%s()\n", __func__);
-
 	i82860_printk(KERN_INFO, "i82860 init one\n");
-	if(pci_enable_device(pdev) < 0)
+
+	if (pci_enable_device(pdev) < 0)
 		return -EIO;
+
 	rc = i82860_probe1(pdev, ent->driver_data);
-	if(rc == 0)
+
+	if (rc == 0)
 		mci_pdev = pci_dev_get(pdev);
+
 	return rc;
 }
 
@@ -244,9 +247,13 @@ static void __devexit i82860_remove_one(struct pci_dev *pdev)
 }
 
 static const struct pci_device_id i82860_pci_tbl[] __devinitdata = {
-	{PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-	 I82860},
-	{0,}			/* 0 terminated list. */
+	{
+		PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+		I82860
+	},
+	{
+		0,
+	}	/* 0 terminated list. */
 };
 
 MODULE_DEVICE_TABLE(pci, i82860_pci_tbl);
@@ -263,24 +270,29 @@ static int __init i82860_init(void)
 	int pci_rc;
 
 	debugf3("%s()\n", __func__);
+
 	if ((pci_rc = pci_register_driver(&i82860_driver)) < 0)
 		goto fail0;
 
 	if (!mci_pdev) {
 		mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
 					PCI_DEVICE_ID_INTEL_82860_0, NULL);
+
 		if (mci_pdev == NULL) {
 			debugf0("860 pci_get_device fail\n");
 			pci_rc = -ENODEV;
 			goto fail1;
 		}
+
 		pci_rc = i82860_init_one(mci_pdev, i82860_pci_tbl);
+
 		if (pci_rc < 0) {
 			debugf0("860 init fail\n");
 			pci_rc = -ENODEV;
 			goto fail1;
 		}
 	}
+
 	return 0;
 
 fail1:
@@ -307,6 +319,6 @@ module_init(i82860_init);
 module_exit(i82860_exit);
 
 MODULE_LICENSE("GPL");
-MODULE_AUTHOR
-    ("Red Hat Inc. (http://www.redhat.com) Ben Woodard <woodard@redhat.com>");
+MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com) "
+	"Ben Woodard <woodard@redhat.com>");
 MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers");

drivers/edac/i82875p_edac.c

@@ -13,27 +13,20 @@
  * Note: E7210 appears same as D82875P - zhenyu.z.wang at intel.com
  */
 
-
 #include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
-
 #include <linux/pci.h>
 #include <linux/pci_ids.h>
-
 #include <linux/slab.h>
-
 #include "edac_mc.h"
 
-
 #define i82875p_printk(level, fmt, arg...) \
 	edac_printk(level, "i82875p", fmt, ##arg)
 
-
 #define i82875p_mc_printk(mci, level, fmt, arg...) \
 	edac_mc_chipset_printk(mci, level, "i82875p", fmt, ##arg)
 
-
 #ifndef PCI_DEVICE_ID_INTEL_82875_0
 #define PCI_DEVICE_ID_INTEL_82875_0	0x2578
 #endif				/* PCI_DEVICE_ID_INTEL_82875_0 */
@@ -42,11 +35,9 @@
 #define PCI_DEVICE_ID_INTEL_82875_6	0x257e
 #endif				/* PCI_DEVICE_ID_INTEL_82875_6 */
 
-
 /* four csrows in dual channel, eight in single channel */
 #define I82875P_NR_CSROWS(nr_chans) (8/(nr_chans))
 
-
 /* Intel 82875p register addresses - device 0 function 0 - DRAM Controller */
 #define I82875P_EAP		0x58	/* Error Address Pointer (32b)
 					 *
@@ -95,7 +86,6 @@
 					 *  0    reserved
 					 */
 
-
 /* Intel 82875p register addresses - device 6 function 0 - DRAM Controller */
 #define I82875P_PCICMD6		0x04	/* PCI Command Register (16b)
 					 *
@@ -159,23 +149,19 @@
 					 *  1:0  DRAM type 01=DDR
 					 */
 
-
 enum i82875p_chips {
 	I82875P = 0,
 };
 
-
 struct i82875p_pvt {
 	struct pci_dev *ovrfl_pdev;
 	void __iomem *ovrfl_window;
 };
 
-
 struct i82875p_dev_info {
 	const char *ctl_name;
 };
 
-
 struct i82875p_error_info {
 	u16 errsts;
 	u32 eap;
@@ -184,17 +170,19 @@ struct i82875p_error_info {
 	u16 errsts2;
 };
 
-
 static const struct i82875p_dev_info i82875p_devs[] = {
 	[I82875P] = {
-		     .ctl_name = "i82875p"},
+		.ctl_name = "i82875p"
+	},
 };
 
-static struct pci_dev *mci_pdev = NULL;	/* init dev: in case that AGP code
-					   has already registered driver */
+static struct pci_dev *mci_pdev = NULL;	/* init dev: in case that AGP code has
+					 * already registered driver
+					 */
+
 static int i82875p_registered = 1;
 
-static void i82875p_get_error_info (struct mem_ctl_info *mci,
+static void i82875p_get_error_info(struct mem_ctl_info *mci,
 		struct i82875p_error_info *info)
 {
 	/*
@@ -218,6 +206,7 @@ static void i82875p_get_error_info (struct mem_ctl_info *mci,
 	 */
 	if (!(info->errsts2 & 0x0081))
 		return;
+
 	if ((info->errsts ^ info->errsts2) & 0x0081) {
 		pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap);
 		pci_read_config_byte(mci->pdev, I82875P_DES, &info->des);
@@ -226,7 +215,7 @@ static void i82875p_get_error_info (struct mem_ctl_info *mci,
 	}
 }
 
-static int i82875p_process_error_info (struct mem_ctl_info *mci,
+static int i82875p_process_error_info(struct mem_ctl_info *mci,
 		struct i82875p_error_info *info, int handle_errors)
 {
 	int row, multi_chan;
@@ -257,7 +246,6 @@ static int i82875p_process_error_info (struct mem_ctl_info *mci,
 	return 1;
 }
 
-
 static void i82875p_check(struct mem_ctl_info *mci)
 {
 	struct i82875p_error_info info;
@@ -267,7 +255,6 @@ static void i82875p_check(struct mem_ctl_info *mci)
 	i82875p_process_error_info(mci, &info, 1);
 }
 
-
 #ifdef CONFIG_PROC_FS
 extern int pci_proc_attach_device(struct pci_dev *);
 #endif
@@ -281,7 +268,6 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 	unsigned long last_cumul_size;
 	struct pci_dev *ovrfl_pdev;
 	void __iomem *ovrfl_window = NULL;
-
 	u32 drc;
 	u32 drc_chan;		/* Number of channels 0=1chan,1=2chan */
 	u32 nr_chans;
@@ -289,7 +275,6 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 	struct i82875p_error_info discard;
 
 	debugf0("%s()\n", __func__);
-
 	ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
 
 	if (!ovrfl_pdev) {
@@ -302,21 +287,22 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 		pci_write_bits8(pdev, 0xf4, 0x2, 0x2);
 		ovrfl_pdev =
 			pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
+
 		if (!ovrfl_pdev)
 			return -ENODEV;
 	}
+
 #ifdef CONFIG_PROC_FS
 	if (!ovrfl_pdev->procent && pci_proc_attach_device(ovrfl_pdev)) {
 		i82875p_printk(KERN_ERR,
-			       "%s(): Failed to attach overflow device\n",
-			       __func__);
+			"%s(): Failed to attach overflow device\n", __func__);
 		return -ENODEV;
 	}
-#endif				/* CONFIG_PROC_FS */
+#endif
+				/* CONFIG_PROC_FS */
 	if (pci_enable_device(ovrfl_pdev)) {
 		i82875p_printk(KERN_ERR,
-			       "%s(): Failed to enable overflow device\n",
-			       __func__);
+			"%s(): Failed to enable overflow device\n", __func__);
 		return -ENODEV;
 	}
 
@@ -325,6 +311,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 		goto fail0;
 #endif
 	}
+
 	/* cache is irrelevant for PCI bus reads/writes */
 	ovrfl_window = ioremap_nocache(pci_resource_start(ovrfl_pdev, 0),
 				pci_resource_len(ovrfl_pdev, 0));
@@ -339,8 +326,8 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 	drc = readl(ovrfl_window + I82875P_DRC);
 	drc_chan = ((drc >> 21) & 0x1);
 	nr_chans = drc_chan + 1;
-	drc_ddim = (drc >> 18) & 0x1;
 
+	drc_ddim = (drc >> 18) & 0x1;
 	mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
 				nr_chans);
 
@@ -350,10 +337,8 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 	}
 
 	debugf3("%s(): init mci\n", __func__);
-
 	mci->pdev = pdev;
 	mci->mtype_cap = MEM_FLAG_DDR;
-
 	mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
 	mci->edac_cap = EDAC_FLAG_UNKNOWN;
 	/* adjust FLAGS */
@@ -363,9 +348,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 	mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
 	mci->edac_check = i82875p_check;
 	mci->ctl_page_to_phys = NULL;
-
 	debugf3("%s(): init pvt\n", __func__);
-
 	pvt = (struct i82875p_pvt *) mci->pvt_info;
 	pvt->ovrfl_pdev = ovrfl_pdev;
 	pvt->ovrfl_window = ovrfl_window;
@@ -385,6 +368,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 		cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
 		debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
 			cumul_size);
+
 		if (cumul_size == last_cumul_size)
 			continue;	/* not populated */
 
@@ -426,7 +410,6 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
 	return rc;
 }
 
-
 /* returns count (>= 0), or negative on error */
 static int __devinit i82875p_init_one(struct pci_dev *pdev,
 		const struct pci_device_id *ent)
@@ -434,17 +417,19 @@ static int __devinit i82875p_init_one(struct pci_dev *pdev,
 	int rc;
 
 	debugf0("%s()\n", __func__);
-
 	i82875p_printk(KERN_INFO, "i82875p init one\n");
-	if(pci_enable_device(pdev) < 0)
+
+	if (pci_enable_device(pdev) < 0)
 		return -EIO;
+
 	rc = i82875p_probe1(pdev, ent->driver_data);
+
 	if (mci_pdev == NULL)
 		mci_pdev = pci_dev_get(pdev);
+
 	return rc;
 }
 
-
 static void __devexit i82875p_remove_one(struct pci_dev *pdev)
 {
 	struct mem_ctl_info *mci;
@@ -456,6 +441,7 @@ static void __devexit i82875p_remove_one(struct pci_dev *pdev)
 		return;
 
 	pvt = (struct i82875p_pvt *) mci->pvt_info;
+
 	if (pvt->ovrfl_window)
 		iounmap(pvt->ovrfl_window);
 
@@ -470,16 +456,18 @@ static void __devexit i82875p_remove_one(struct pci_dev *pdev)
 	edac_mc_free(mci);
 }
 
-
 static const struct pci_device_id i82875p_pci_tbl[] __devinitdata = {
-	{PCI_VEND_DEV(INTEL, 82875_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
-	 I82875P},
-	{0,}			/* 0 terminated list. */
+	{
+		PCI_VEND_DEV(INTEL, 82875_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
+		I82875P
+	},
+	{
+		0,
+	}	/* 0 terminated list. */
 };
 
 MODULE_DEVICE_TABLE(pci, i82875p_pci_tbl);
 
-
 static struct pci_driver i82875p_driver = {
 	.name = EDAC_MOD_STR,
 	.probe = i82875p_init_one,
@@ -487,31 +475,35 @@ static struct pci_driver i82875p_driver = {
 	.id_table = i82875p_pci_tbl,
 };
 
-
 static int __init i82875p_init(void)
 {
 	int pci_rc;
 
 	debugf3("%s()\n", __func__);
 	pci_rc = pci_register_driver(&i82875p_driver);
+
 	if (pci_rc < 0)
 		goto fail0;
+
 	if (mci_pdev == NULL) {
-		mci_pdev =
-		    pci_get_device(PCI_VENDOR_ID_INTEL,
+		mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
 				PCI_DEVICE_ID_INTEL_82875_0, NULL);
+
 		if (!mci_pdev) {
 			debugf0("875p pci_get_device fail\n");
 			pci_rc = -ENODEV;
 			goto fail1;
 		}
+
 		pci_rc = i82875p_init_one(mci_pdev, i82875p_pci_tbl);
+
 		if (pci_rc < 0) {
 			debugf0("875p init fail\n");
 			pci_rc = -ENODEV;
 			goto fail1;
 		}
 	}
+
 	return 0;
 
 fail1:
@@ -524,23 +516,21 @@ static int __init i82875p_init(void)
 	return pci_rc;
 }
 
-
 static void __exit i82875p_exit(void)
 {
 	debugf3("%s()\n", __func__);
 
 	pci_unregister_driver(&i82875p_driver);
+
 	if (!i82875p_registered) {
 		i82875p_remove_one(mci_pdev);
 		pci_dev_put(mci_pdev);
 	}
 }
 
-
 module_init(i82875p_init);
 module_exit(i82875p_exit);
 
-
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh");
 MODULE_DESCRIPTION("MC support for Intel 82875 memory hub controllers");

drivers/edac/r82600_edac.c

@@ -18,12 +18,9 @@
 #include <linux/config.h>
 #include <linux/module.h>
 #include <linux/init.h>
-
 #include <linux/pci.h>
 #include <linux/pci_ids.h>
-
 #include <linux/slab.h>
-
 #include "edac_mc.h"
 
 #define r82600_printk(level, fmt, arg...) \
@@ -132,10 +129,8 @@ struct r82600_error_info {
 	u32 eapr;
 };
 
-
 static unsigned int disable_hardware_scrub = 0;
 
-
 static void r82600_get_error_info (struct mem_ctl_info *mci,
 		struct r82600_error_info *info)
 {
@@ -154,7 +149,6 @@ static void r82600_get_error_info (struct mem_ctl_info *mci,
 				((u32) BIT(0) & (u32) BIT(1)));
 }
 
-
 static int r82600_process_error_info (struct mem_ctl_info *mci,
 		struct r82600_error_info *info, int handle_errors)
 {
@@ -177,8 +171,7 @@ static int r82600_process_error_info (struct mem_ctl_info *mci,
 		error_found = 1;
 
 		if (handle_errors)
-			edac_mc_handle_ce(
-			    mci, page, 0,	/* not avail */
+			edac_mc_handle_ce(mci, page, 0,  /* not avail */
 					syndrome,
 					edac_mc_find_csrow_by_page(mci, page),
 					0,  /* channel */
@@ -222,21 +215,15 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
 	struct r82600_error_info discard;
 
 	debugf0("%s()\n", __func__);
-
-
 	pci_read_config_byte(pdev, R82600_DRAMC, &dramcr);
 	pci_read_config_dword(pdev, R82600_EAP, &eapr);
-
 	ecc_on = dramcr & BIT(5);
 	reg_sdram = dramcr & BIT(4);
 	scrub_disabled = eapr & BIT(31);
 	sdram_refresh_rate = dramcr & (BIT(0) | BIT(1));
-
 	debugf2("%s(): sdram refresh rate = %#0x\n", __func__,
 		sdram_refresh_rate);
-
 	debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
-
 	mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS);
 
 	if (mci == NULL) {
@@ -245,19 +232,19 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
 	}
 
 	debugf0("%s(): mci = %p\n", __func__, mci);
-
 	mci->pdev = pdev;
 	mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
-
 	mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
-	/* FIXME try to work out if the chip leads have been                 *
-	 * used for COM2 instead on this board? [MA6?]       MAYBE:          */
+	/* FIXME try to work out if the chip leads have been used for COM2
+	 * instead on this board? [MA6?] MAYBE:
+	 */
 
 	/* On the R82600, the pins for memory bits 72:65 - i.e. the   *
 	 * EC bits are shared with the pins for COM2 (!), so if COM2  *
 	 * is enabled, we assume COM2 is wired up, and thus no EDAC   *
 	 * is possible.                                               */
 	mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
+
 	if (ecc_on) {
 		if (scrub_disabled)
 			debugf3("%s(): mci = %p - Scrubbing disabled! EAP: "
@@ -295,7 +282,6 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
 			continue;
 
 		row_base = row_high_limit_last;
-
 		csrow->first_page = row_base >> PAGE_SHIFT;
 		csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
 		csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
@@ -346,7 +332,6 @@ static int __devinit r82600_init_one(struct pci_dev *pdev,
 	return r82600_probe1(pdev, ent->driver_data);
 }
 
-
 static void __devexit r82600_remove_one(struct pci_dev *pdev)
 {
 	struct mem_ctl_info *mci;
@@ -359,15 +344,17 @@ static void __devexit r82600_remove_one(struct pci_dev *pdev)
 	edac_mc_free(mci);
 }
 
-
 static const struct pci_device_id r82600_pci_tbl[] __devinitdata = {
-	{PCI_DEVICE(PCI_VENDOR_ID_RADISYS, R82600_BRIDGE_ID)},
-	{0,}			/* 0 terminated list. */
+	{
+		PCI_DEVICE(PCI_VENDOR_ID_RADISYS, R82600_BRIDGE_ID)
+	},
+	{
+		0,
+	}	/* 0 terminated list. */
 };
 
 MODULE_DEVICE_TABLE(pci, r82600_pci_tbl);
 
-
 static struct pci_driver r82600_driver = {
 	.name = EDAC_MOD_STR,
 	.probe = r82600_init_one,
@@ -375,23 +362,19 @@ static struct pci_driver r82600_driver = {
 	.id_table = r82600_pci_tbl,
 };
 
-
 static int __init r82600_init(void)
 {
 	return pci_register_driver(&r82600_driver);
 }
 
-
 static void __exit r82600_exit(void)
 {
 	pci_unregister_driver(&r82600_driver);
 }
 
-
 module_init(r82600_init);
 module_exit(r82600_exit);
 
-
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD Ltd. "
 	"on behalf of EADS Astrium");