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Commit eed1e576 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge branch 'stericsson/cleanup' into next/timer 

The timer and cleanup branches from stericsson conflict,
so I'm merging them here.

Conflicts:
	arch/arm/mach-ux500/Makefile
	arch/arm/mach-ux500/cpu.c
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 65af7c46 76525ec2
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Showing with 270 additions and 196 deletions
arch/arm/mach-ux500/Makefile
View file @ eed1e576
......@@ -4,6 +4,7 @@
obj-y := clock.o cpu.o devices.o devices-common.o \
id.o usb.o timer.o
obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o
obj-$(CONFIG_UX500_SOC_DB5500) += cpu-db5500.o dma-db5500.o
obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o devices-db8500.o
obj-$(CONFIG_MACH_U8500) += board-mop500.o board-mop500-sdi.o \
......
arch/arm/mach-ux500/board-mop500-pins.c
View file @ eed1e576
......@@ -153,7 +153,7 @@ static pin_cfg_t mop500_pins_default[] = {
GPIO7_U1_RTSn | PIN_OUTPUT_HIGH,
};
static pin_cfg_t mop500_pins_hrefv60[] = {
static pin_cfg_t hrefv60_pins[] = {
/* WLAN */
GPIO4_GPIO | PIN_INPUT_PULLUP,/* WLAN_IRQ */
GPIO85_GPIO | PIN_OUTPUT_LOW,/* WLAN_ENA */
......@@ -280,13 +280,25 @@ void __init mop500_pins_init(void)
{
nmk_config_pins(mop500_pins_common,
ARRAY_SIZE(mop500_pins_common));
if (machine_is_hrefv60())
nmk_config_pins(mop500_pins_hrefv60,
ARRAY_SIZE(mop500_pins_hrefv60));
else if (machine_is_snowball())
nmk_config_pins(snowball_pins,
ARRAY_SIZE(snowball_pins));
else
nmk_config_pins(mop500_pins_default,
ARRAY_SIZE(mop500_pins_default));
}
void __init snowball_pins_init(void)
{
nmk_config_pins(mop500_pins_common,
ARRAY_SIZE(mop500_pins_common));
nmk_config_pins(snowball_pins,
ARRAY_SIZE(snowball_pins));
}
void __init hrefv60_pins_init(void)
{
nmk_config_pins(mop500_pins_common,
ARRAY_SIZE(mop500_pins_common));
nmk_config_pins(hrefv60_pins,
ARRAY_SIZE(hrefv60_pins));
}
arch/arm/mach-ux500/board-mop500-sdi.c
View file @ eed1e576
......@@ -216,30 +216,48 @@ void __init mop500_sdi_init(void)
/* PoP:ed eMMC on top of DB8500 v1.0 has problems with high speed */
if (!cpu_is_u8500v10())
mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
/* sdi2 on snowball is in ATL_B mode for FSMC (LAN) */
if (!machine_is_snowball())
db8500_add_sdi2(&mop500_sdi2_data, periphid);
/* On-board eMMC */
db8500_add_sdi4(&mop500_sdi4_data, periphid);
if (machine_is_hrefv60() || machine_is_snowball()) {
if (machine_is_hrefv60()) {
mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
sdi0_en = HREFV60_SDMMC_EN_GPIO;
sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
} else if (machine_is_snowball()) {
/*
* On boards with the TC35892 GPIO expander, sdi0 will finally
* be added when the TC35892 initializes and calls
* mop500_sdi_tc35892_init() above.
*/
}
void __init snowball_sdi_init(void)
{
u32 periphid = 0x10480180;
mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
/* On-board eMMC */
db8500_add_sdi4(&mop500_sdi4_data, periphid);
mop500_sdi0_data.gpio_cd = SNOWBALL_SDMMC_CD_GPIO;
mop500_sdi0_data.cd_invert = true;
sdi0_en = SNOWBALL_SDMMC_EN_GPIO;
sdi0_vsel = SNOWBALL_SDMMC_1V8_3V_GPIO;
}
sdi0_configure();
}
}
/*
* On boards with the TC35892 GPIO expander, sdi0 will finally
* be added when the TC35892 initializes and calls
* mop500_sdi_tc35892_init() above.
*/
void __init hrefv60_sdi_init(void)
{
u32 periphid = 0x10480180;
mop500_sdi2_data.capabilities |= MMC_CAP_MMC_HIGHSPEED;
db8500_add_sdi2(&mop500_sdi2_data, periphid);
/* On-board eMMC */
db8500_add_sdi4(&mop500_sdi4_data, periphid);
mop500_sdi0_data.gpio_cd = HREFV60_SDMMC_CD_GPIO;
sdi0_en = HREFV60_SDMMC_EN_GPIO;
sdi0_vsel = HREFV60_SDMMC_1V8_3V_GPIO;
sdi0_configure();
}
arch/arm/mach-ux500/board-mop500.c
View file @ eed1e576
......@@ -603,26 +603,70 @@ static void __init mop500_init_machine(void)
{
int i2c0_devs;
mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
u8500_init_devices();
mop500_pins_init();
platform_add_devices(mop500_platform_devs,
ARRAY_SIZE(mop500_platform_devs));
mop500_i2c_init();
mop500_sdi_init();
mop500_spi_init();
mop500_uart_init();
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
i2c_register_board_info(2, mop500_i2c2_devices,
ARRAY_SIZE(mop500_i2c2_devices));
/* This board has full regulator constraints */
regulator_has_full_constraints();
}
static void __init snowball_init_machine(void)
{
int i2c0_devs;
u8500_init_devices();
snowball_pins_init();
platform_add_devices(snowball_platform_devs,
ARRAY_SIZE(snowball_platform_devs));
mop500_i2c_init();
snowball_sdi_init();
mop500_spi_init();
mop500_uart_init();
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
i2c_register_board_info(2, mop500_i2c2_devices,
ARRAY_SIZE(mop500_i2c2_devices));
/* This board has full regulator constraints */
regulator_has_full_constraints();
}
static void __init hrefv60_init_machine(void)
{
int i2c0_devs;
/*
* The HREFv60 board removed a GPIO expander and routed
* all these GPIO pins to the internal GPIO controller
* instead.
*/
if (!machine_is_snowball()) {
if (machine_is_hrefv60())
mop500_gpio_keys[0].gpio = HREFV60_PROX_SENSE_GPIO;
else
mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
}
u8500_init_devices();
mop500_pins_init();
hrefv60_pins_init();
if (machine_is_snowball())
platform_add_devices(snowball_platform_devs,
ARRAY_SIZE(snowball_platform_devs));
else
platform_add_devices(mop500_platform_devs,
ARRAY_SIZE(mop500_platform_devs));
......@@ -632,7 +676,7 @@ static void __init mop500_init_machine(void)
mop500_uart_init();
i2c0_devs = ARRAY_SIZE(mop500_i2c0_devices);
if (machine_is_hrefv60())
i2c0_devs -= NUM_PRE_V60_I2C0_DEVICES;
i2c_register_board_info(0, mop500_i2c0_devices, i2c0_devs);
......@@ -658,7 +702,7 @@ MACHINE_START(HREFV60, "ST-Ericsson U8500 Platform HREFv60+")
.map_io = u8500_map_io,
.init_irq = ux500_init_irq,
.timer = &ux500_timer,
.init_machine = mop500_init_machine,
.init_machine = hrefv60_init_machine,
MACHINE_END
MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
......@@ -667,5 +711,5 @@ MACHINE_START(SNOWBALL, "Calao Systems Snowball platform")
.init_irq = ux500_init_irq,
/* we re-use nomadik timer here */
.timer = &ux500_timer,
.init_machine = mop500_init_machine,
.init_machine = snowball_init_machine,
MACHINE_END
arch/arm/mach-ux500/board-mop500.h
View file @ eed1e576
......@@ -40,10 +40,13 @@
struct i2c_board_info;
extern void mop500_sdi_init(void);
extern void snowball_sdi_init(void);
extern void mop500_sdi_tc35892_init(void);
void __init mop500_u8500uib_init(void);
void __init mop500_stuib_init(void);
void __init mop500_pins_init(void);
void __init hrefv60_pins_init(void);
void __init snowball_pins_init(void);
void mop500_uib_i2c_add(int busnum, struct i2c_board_info *info,
unsigned n);
......
arch/arm/mach-ux500/cache-l2x0.c 0 → 100644
View file @ eed1e576
/*
* Copyright (C) ST-Ericsson SA 2011
*
* License terms: GNU General Public License (GPL) version 2
*/
#include <linux/io.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
#include <mach/hardware.h>
#include <mach/id.h>
static void __iomem *l2x0_base;
static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
{
/* wait for the operation to complete */
while (readl_relaxed(reg) & mask)
cpu_relax();
}
static inline void ux500_cache_sync(void)
{
writel_relaxed(0, l2x0_base + L2X0_CACHE_SYNC);
ux500_cache_wait(l2x0_base + L2X0_CACHE_SYNC, 1);
}
/*
* The L2 cache cannot be turned off in the non-secure world.
* Dummy until a secure service is in place.
*/
static void ux500_l2x0_disable(void)
{
}
/*
* This is only called when doing a kexec, just after turning off the L2
* and L1 cache, and it is surrounded by a spinlock in the generic version.
* However, we're not really turning off the L2 cache right now and the
* PL310 does not support exclusive accesses (used to implement the spinlock).
* So, the invalidation needs to be done without the spinlock.
*/
static void ux500_l2x0_inv_all(void)
{
uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
/* invalidate all ways */
writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
ux500_cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
ux500_cache_sync();
}
static int ux500_l2x0_init(void)
{
if (cpu_is_u5500())
l2x0_base = __io_address(U5500_L2CC_BASE);
else if (cpu_is_u8500())
l2x0_base = __io_address(U8500_L2CC_BASE);
else
ux500_unknown_soc();
/* 64KB way size, 8 way associativity, force WA */
l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
/* Override invalidate function */
outer_cache.disable = ux500_l2x0_disable;
outer_cache.inv_all = ux500_l2x0_inv_all;
return 0;
}
early_initcall(ux500_l2x0_init);
arch/arm/mach-ux500/cpu.c
View file @ eed1e576
......@@ -12,8 +12,6 @@
#include <linux/mfd/db5500-prcmu.h>
#include <linux/clksrc-dbx500-prcmu.h>
#include <asm/cacheflush.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <asm/mach/map.h>
#include <asm/localtimer.h>
......@@ -26,10 +24,6 @@
void __iomem *_PRCMU_BASE;
#ifdef CONFIG_CACHE_L2X0
static void __iomem *l2x0_base;
#endif
void __init ux500_init_irq(void)
{
void __iomem *dist_base;
......@@ -56,66 +50,3 @@ void __init ux500_init_irq(void)
prcmu_early_init();
clk_init();
}
#ifdef CONFIG_CACHE_L2X0
static inline void ux500_cache_wait(void __iomem *reg, unsigned long mask)
{
/* wait for the operation to complete */
while (readl_relaxed(reg) & mask)
;
}
static inline void ux500_cache_sync(void)
{
void __iomem *base = l2x0_base;
writel_relaxed(0, base + L2X0_CACHE_SYNC);
ux500_cache_wait(base + L2X0_CACHE_SYNC, 1);
}
/*
* The L2 cache cannot be turned off in the non-secure world.
* Dummy until a secure service is in place.
*/
static void ux500_l2x0_disable(void)
{
}
/*
* This is only called when doing a kexec, just after turning off the L2
* and L1 cache, and it is surrounded by a spinlock in the generic version.
* However, we're not really turning off the L2 cache right now and the
* PL310 does not support exclusive accesses (used to implement the spinlock).
* So, the invalidation needs to be done without the spinlock.
*/
static void ux500_l2x0_inv_all(void)
{
void __iomem *base = l2x0_base;
uint32_t l2x0_way_mask = (1<<16) - 1; /* Bitmask of active ways */
/* invalidate all ways */
writel_relaxed(l2x0_way_mask, base + L2X0_INV_WAY);
ux500_cache_wait(base + L2X0_INV_WAY, l2x0_way_mask);
ux500_cache_sync();
}
static int ux500_l2x0_init(void)
{
if (cpu_is_u5500())
l2x0_base = __io_address(U5500_L2CC_BASE);
else if (cpu_is_u8500())
l2x0_base = __io_address(U8500_L2CC_BASE);
else
ux500_unknown_soc();
/* 64KB way size, 8 way associativity, force WA */
l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
/* Override invalidate function */
outer_cache.disable = ux500_l2x0_disable;
outer_cache.inv_all = ux500_l2x0_inv_all;
return 0;
}
early_initcall(ux500_l2x0_init);
#endif
arch/arm/mach-ux500/include/mach/uncompress.h
View file @ eed1e576
......@@ -51,15 +51,9 @@ static void flush(void)
static inline void arch_decomp_setup(void)
{
/* Check in run time if we run on an U8500 or U5500 */
if (machine_is_u8500() ||
machine_is_svp8500v1() ||
machine_is_svp8500v2() ||
machine_is_hrefv60() ||
machine_is_snowball())
ux500_uart_base = U8500_UART2_BASE;
else if (machine_is_u5500())
if (machine_is_u5500())
ux500_uart_base = U5500_UART0_BASE;
else /* not much can be done to help here */
else
ux500_uart_base = U8500_UART2_BASE;
}
......
arch/arm/mach-ux500/pins-db8500.h
View file @ eed1e576
This diff is collapsed.
arch/arm/plat-nomadik/include/plat/pincfg.h
View file @ eed1e576
......@@ -37,7 +37,6 @@
* SLPM value = same as normal
*
* PIN_CFG - default config with alternate function
* PIN_CFG_PULL - default config with alternate function and pull up/down
*/
typedef unsigned long pin_cfg_t;
......@@ -133,10 +132,6 @@ typedef unsigned long pin_cfg_t;
(PIN_CFG_DEFAULT |\
(PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
#define PIN_CFG_PULL(num, alt, pull) \
((PIN_CFG_DEFAULT & ~PIN_PULL_MASK) |\
(PIN_NUM(num) | PIN_##alt | PIN_PULL_##pull))
extern int nmk_config_pin(pin_cfg_t cfg, bool sleep);
extern int nmk_config_pins(pin_cfg_t *cfgs, int num);
extern int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num);
......
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