Commit f629fcfa authored by Caesar Wang's avatar Caesar Wang Committed by Heiko Stuebner

ARM: dts: rockchip: support the spi for rk3036

This patch adds the needed spi node for rk3036 dts.

We have to use the 4 bus emmc to work if someone want to support
the spi devices, since the pins are re-used by emmc data[5-8] and spi.
In some caseswe need to support the spi devices, that will waste the
emmc performance.

Moment, the kylin/evb hasn't the spi devices to work, so maybe we need wait
the new required to enable in kylin/evb board.

Anyway, the spi should be needed land in rk3036 dts.
Signed-off-by: default avatarCaesar Wang <wxt@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 8f338ecf
...@@ -60,6 +60,7 @@ aliases { ...@@ -60,6 +60,7 @@ aliases {
serial0 = &uart0; serial0 = &uart0;
serial1 = &uart1; serial1 = &uart1;
serial2 = &uart2; serial2 = &uart2;
spi = &spi;
}; };
memory { memory {
...@@ -407,6 +408,21 @@ i2c0: i2c@20072000 { ...@@ -407,6 +408,21 @@ i2c0: i2c@20072000 {
status = "disabled"; status = "disabled";
}; };
spi: spi@20074000 {
compatible = "rockchip,rockchip-spi";
reg = <0x20074000 0x1000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks =<&cru PCLK_SPI>, <&cru SCLK_SPI>;
clock-names = "apb-pclk","spi_pclk";
dmas = <&pdma 8>, <&pdma 9>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&spi_txd &spi_rxd &spi_clk &spi_cs0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pinctrl: pinctrl { pinctrl: pinctrl {
compatible = "rockchip,rk3036-pinctrl"; compatible = "rockchip,rk3036-pinctrl";
rockchip,grf = <&grf>; rockchip,grf = <&grf>;
...@@ -618,5 +634,29 @@ uart2_xfer: uart2-xfer { ...@@ -618,5 +634,29 @@ uart2_xfer: uart2-xfer {
}; };
/* no rts / cts for uart2 */ /* no rts / cts for uart2 */
}; };
spi {
spi_txd:spi-txd {
rockchip,pins = <1 29 RK_FUNC_3 &pcfg_pull_default>;
};
spi_rxd:spi-rxd {
rockchip,pins = <1 28 RK_FUNC_3 &pcfg_pull_default>;
};
spi_clk:spi-clk {
rockchip,pins = <2 0 RK_FUNC_2 &pcfg_pull_default>;
};
spi_cs0:spi-cs0 {
rockchip,pins = <1 30 RK_FUNC_3 &pcfg_pull_default>;
};
spi_cs1:spi-cs1 {
rockchip,pins = <1 31 RK_FUNC_3 &pcfg_pull_default>;
};
};
}; };
}; };
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