Commit f82b4bde authored by Rajkumar Manoharan's avatar Rajkumar Manoharan Committed by John W. Linville

ath9k: Move ath9k_init_crypto to common

Signed-off-by: default avatarRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent d77bf3eb
...@@ -663,7 +663,6 @@ extern int led_blink; ...@@ -663,7 +663,6 @@ extern int led_blink;
extern bool is_ath9k_unloaded; extern bool is_ath9k_unloaded;
irqreturn_t ath_isr(int irq, void *dev); irqreturn_t ath_isr(int irq, void *dev);
void ath9k_init_crypto(struct ath_softc *sc);
int ath9k_init_device(u16 devid, struct ath_softc *sc, int ath9k_init_device(u16 devid, struct ath_softc *sc,
const struct ath_bus_ops *bus_ops); const struct ath_bus_ops *bus_ops);
void ath9k_deinit_device(struct ath_softc *sc); void ath9k_deinit_device(struct ath_softc *sc);
......
...@@ -169,6 +169,32 @@ void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow, ...@@ -169,6 +169,32 @@ void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
} }
EXPORT_SYMBOL(ath9k_cmn_update_txpow); EXPORT_SYMBOL(ath9k_cmn_update_txpow);
void ath9k_cmn_init_crypto(struct ath_hw *ah)
{
struct ath_common *common = ath9k_hw_common(ah);
int i = 0;
/* Get the hardware key cache size. */
common->keymax = AR_KEYTABLE_SIZE;
/*
* Check whether the separate key cache entries
* are required to handle both tx+rx MIC keys.
* With split mic keys the number of stations is limited
* to 27 otherwise 59.
*/
if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
/*
* Reset the key cache since some parts do not
* reset the contents on initial power up.
*/
for (i = 0; i < common->keymax; i++)
ath_hw_keyreset(common, (u16) i);
}
EXPORT_SYMBOL(ath9k_cmn_init_crypto);
static int __init ath9k_cmn_init(void) static int __init ath9k_cmn_init(void)
{ {
return 0; return 0;
......
...@@ -62,3 +62,4 @@ void ath9k_cmn_btcoex_bt_stomp(struct ath_common *common, ...@@ -62,3 +62,4 @@ void ath9k_cmn_btcoex_bt_stomp(struct ath_common *common,
enum ath_stomp_type stomp_type); enum ath_stomp_type stomp_type);
void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow, void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
u16 new_txpow, u16 *txpower); u16 new_txpow, u16 *txpower);
void ath9k_cmn_init_crypto(struct ath_hw *ah);
...@@ -572,25 +572,6 @@ static int ath9k_init_queues(struct ath9k_htc_priv *priv) ...@@ -572,25 +572,6 @@ static int ath9k_init_queues(struct ath9k_htc_priv *priv)
return -EINVAL; return -EINVAL;
} }
static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
{
struct ath_common *common = ath9k_hw_common(priv->ah);
int i = 0;
/* Get the hardware key cache size. */
common->keymax = AR_KEYTABLE_SIZE;
if (priv->ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
/*
* Reset the key cache since some parts do not
* reset the contents on initial power up.
*/
for (i = 0; i < common->keymax; i++)
ath_hw_keyreset(common, (u16) i);
}
static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv) static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
{ {
if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) { if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
...@@ -720,7 +701,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv, ...@@ -720,7 +701,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv,
for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++) for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
priv->cur_beacon_conf.bslot[i] = NULL; priv->cur_beacon_conf.bslot[i] = NULL;
ath9k_init_crypto(priv); ath9k_cmn_init_crypto(ah);
ath9k_init_channels_rates(priv); ath9k_init_channels_rates(priv);
ath9k_init_misc(priv); ath9k_init_misc(priv);
......
...@@ -404,31 +404,6 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, ...@@ -404,31 +404,6 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
return error; return error;
} }
void ath9k_init_crypto(struct ath_softc *sc)
{
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
int i = 0;
/* Get the hardware key cache size. */
common->keymax = AR_KEYTABLE_SIZE;
/*
* Reset the key cache since some parts do not
* reset the contents on initial power up.
*/
for (i = 0; i < common->keymax; i++)
ath_hw_keyreset(common, (u16) i);
/*
* Check whether the separate key cache entries
* are required to handle both tx+rx MIC keys.
* With split mic keys the number of stations is limited
* to 27 otherwise 59.
*/
if (sc->sc_ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
}
static int ath9k_init_btcoex(struct ath_softc *sc) static int ath9k_init_btcoex(struct ath_softc *sc)
{ {
struct ath_txq *txq; struct ath_txq *txq;
...@@ -630,7 +605,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc, ...@@ -630,7 +605,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
if (ret) if (ret)
goto err_btcoex; goto err_btcoex;
ath9k_init_crypto(sc); ath9k_cmn_init_crypto(sc->sc_ah);
ath9k_init_misc(sc); ath9k_init_misc(sc);
return 0; return 0;
......
...@@ -345,7 +345,7 @@ static int ath_pci_resume(struct device *device) ...@@ -345,7 +345,7 @@ static int ath_pci_resume(struct device *device)
* semi-random values after suspend/resume. * semi-random values after suspend/resume.
*/ */
ath9k_ps_wakeup(sc); ath9k_ps_wakeup(sc);
ath9k_init_crypto(sc); ath9k_cmn_init_crypto(sc->sc_ah);
ath9k_ps_restore(sc); ath9k_ps_restore(sc);
sc->ps_idle = true; sc->ps_idle = true;
......
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