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Commit fc499473 authored by Tom Rini's avatar Tom Rini
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PPC32: Update the Motorola MCP(n) 765 support code. 

From Mark Greer <mgreer@mvista.com>.
parent 50692f8c
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Inline Side-by-side
Showing with 104 additions and 88 deletions
arch/ppc/configs/mcpn765_defconfig
View file @ fc499473
......@@ -19,6 +19,7 @@ CONFIG_SYSVIPC=y
CONFIG_SYSCTL=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_EMBEDDED is not set
CONFIG_KALLSYMS=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
......@@ -74,8 +75,8 @@ CONFIG_HIGHMEM=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_KCORE_ELF=y
CONFIG_BINFMT_ELF=y
CONFIG_KERNEL_ELF=y
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
# CONFIG_PCI_LEGACY_PROC is not set
# CONFIG_PCI_NAMES is not set
......@@ -103,6 +104,11 @@ CONFIG_KERNEL_START=0xc0000000
CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00800000
#
# Generic Driver Options
#
# CONFIG_FW_LOADER is not set
#
# Memory Technology Devices (MTD)
#
......@@ -122,10 +128,12 @@ CONFIG_BOOT_LOAD=0x00800000
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_INITRD=y
# CONFIG_LBD is not set
#
# Multi-device support (RAID and LVM)
......@@ -133,12 +141,12 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_MD is not set
#
# ATA/IDE/MFM/RLL support
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI support
# SCSI device support
#
# CONFIG_SCSI is not set
......@@ -319,11 +327,6 @@ CONFIG_NET_PCI=y
#
# CONFIG_FB is not set
#
# Old CD-ROM drivers (not SCSI, not IDE)
#
# CONFIG_CD_NO_IDESCSI is not set
#
# Input device support
#
......@@ -526,7 +529,6 @@ CONFIG_MSDOS_PARTITION=y
# Kernel hacking
#
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_KALLSYMS is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
#
......
arch/ppc/platforms/mcpn765_serial.h
View file @ fc499473
......@@ -31,6 +31,7 @@
/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
#define BASE_BAUD ( 1843200 / 16 )
#define UART_CLK 1843200
#ifdef CONFIG_SERIAL_DETECT_IRQ
#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
......
arch/ppc/platforms/mcpn765_setup.c
View file @ fc499473
......@@ -31,6 +31,9 @@
#include <linux/ide.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
#include <linux/serial.h>
#include <linux/tty.h> /* for linux/serial_core.h */
#include <linux/serial_core.h>
#include <asm/system.h>
#include <asm/pgtable.h>
......@@ -49,36 +52,94 @@
#include <asm/pplus.h>
#include "mcpn765.h"
#include "mcpn765_serial.h"
static u_char mcpn765_openpic_initsenses[] __initdata = {
0, /* 16: i8259 cascade (active high) */
1, /* 17: COM1,2,3,4 */
1, /* 18: Enet 1 (front panel) */
1, /* 19: HAWK WDT XXXX */
1, /* 20: 21554 PCI-PCI bridge */
1, /* 21: cPCI INTA# */
1, /* 22: cPCI INTB# */
1, /* 23: cPCI INTC# */
1, /* 24: cPCI INTD# */
1, /* 25: PMC1 INTA#, PMC2 INTB# */
1, /* 26: PMC1 INTB#, PMC2 INTC# */
1, /* 27: PMC1 INTC#, PMC2 INTD# */
1, /* 28: PMC1 INTD#, PMC2 INTA# */
1, /* 29: Enet 2 (connected to J3) */
1, /* 30: Abort Switch */
1, /* 31: RTC Alarm */
(IRQ_SENSE_EDGE | IRQ_POLARITY_POSITIVE),/* 16: i8259 cascade */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 17: COM1,2,3,4 */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 18: Enet 1 (front) */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 19: HAWK WDT XXXX */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 20: 21554 bridge */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 21: cPCI INTA# */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 22: cPCI INTB# */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 23: cPCI INTC# */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 24: cPCI INTD# */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 25: PMC1 INTA#,PMC2 INTB#*/
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 26: PMC1 INTB#,PMC2 INTC#*/
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 27: PMC1 INTC#,PMC2 INTD#*/
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 28: PMC1 INTD#,PMC2 INTA#*/
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 29: Enet 2 (J3) */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 30: Abort Switch */
(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),/* 31: RTC Alarm */
};
extern u_int openpic_irq(void);
extern char cmd_line[];
extern void gen550_progress(char *, unsigned short);
extern void gen550_init(int, struct uart_port *);
int use_of_interrupt_tree = 0;
static void mcpn765_halt(void);
TODC_ALLOC();
#if defined(CONFIG_SERIAL_8250) && \
(defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG))
static void __init
mcpn765_early_serial_map(void)
{
struct uart_port serial_req;
/* Setup serial port access */
memset(&serial_req, 0, sizeof(serial_req));
serial_req.uartclk = UART_CLK;
serial_req.irq = 17;
serial_req.flags = STD_COM_FLAGS;
serial_req.iotype = SERIAL_IO_MEM;
serial_req.membase = (u_char *)MCPN765_SERIAL_1;
serial_req.regshift = 4;
gen550_init(0, &serial_req);
if (early_serial_setup(&serial_req) != 0)
printk(KERN_ERR "Early serial init of port 0 failed\n");
/* Assume early_serial_setup() doesn't modify serial_req */
serial_req.line = 1;
serial_req.irq = 17;
serial_req.membase = (u_char *)MCPN765_SERIAL_2;
gen550_init(1, &serial_req);
if (early_serial_setup(&serial_req) != 0)
printk(KERN_ERR "Early serial init of port 1 failed\n");
/* Assume early_serial_setup() doesn't modify serial_req */
serial_req.line = 2;
serial_req.irq = 17;
serial_req.membase = (u_char *)MCPN765_SERIAL_3;
gen550_init(2, &serial_req);
if (early_serial_setup(&serial_req) != 0)
printk(KERN_ERR "Early serial init of port 2 failed\n");
/* Assume early_serial_setup() doesn't modify serial_req */
serial_req.line = 3;
serial_req.irq = 17;
serial_req.membase = (u_char *)MCPN765_SERIAL_4;
gen550_init(3, &serial_req);
if (early_serial_setup(&serial_req) != 0)
printk(KERN_ERR "Early serial init of port 3 failed\n");
}
#endif
static void __init
mcpn765_setup_arch(void)
{
......@@ -187,12 +248,12 @@ mcpn765_init_IRQ(void)
if ( ppc_md.progress )
ppc_md.progress("init_irq: enter", 0);
openpic_init(1, NUM_8259_INTERRUPTS, NULL, -1);
openpic_init(NUM_8259_INTERRUPTS);
for(i=0; i < NUM_8259_INTERRUPTS; i++)
irq_desc[i].handler = &i8259_pic;
i8259_init(NULL);
i8259_init(0);
if ( ppc_md.progress )
ppc_md.progress("init_irq: exit", 0);
......@@ -361,62 +422,12 @@ mcpn765_ide_init_hwif_ports(hw_regs_t *hw, unsigned long data_port,
static __inline__ void
mcpn765_set_bat(void)
{
unsigned long bat3u, bat3l;
static int mapping_set = 0;
if (!mapping_set) {
__asm__ __volatile__(
" lis %0,0xf000\n \
ori %1,%0,0x002a\n \
ori %0,%0,0x1ffe\n \
mtspr 0x21e,%0\n \
mtspr 0x21f,%1\n \
isync\n \
sync "
: "=r" (bat3u), "=r" (bat3l));
mapping_set = 1;
}
return;
mb();
mtspr(DBAT1U, 0xfe8000fe);
mtspr(DBAT1L, 0xfe80002a);
mb();
}
#ifdef CONFIG_SERIAL_TEXT_DEBUG
#include <linux/serialP.h>
#include <linux/serial_reg.h>
#include <asm/serial.h>
static struct serial_state rs_table[RS_TABLE_SIZE] = {
SERIAL_PORT_DFNS /* Defined in <asm/serial.h> */
};
static void
mcpn765_progress(char *s, unsigned short hex)
{
volatile char c;
volatile unsigned long com_port;
u16 shift;
com_port = rs_table[0].port;
shift = rs_table[0].iomem_reg_shift;
while ((c = *s++) != 0) {
while ((*((volatile unsigned char *)com_port +
(UART_LSR << shift)) & UART_LSR_THRE) == 0)
;
*(volatile unsigned char *)com_port = c;
if (c == '\n') {
while ((*((volatile unsigned char *)com_port +
(UART_LSR << shift)) & UART_LSR_THRE) == 0)
;
*(volatile unsigned char *)com_port = '\r';
}
}
}
#endif /* CONFIG_SERIAL_TEXT_DEBUG */
void __init
platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
unsigned long r6, unsigned long r7)
......@@ -458,11 +469,13 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
ppc_md.heartbeat_reset = 0;
ppc_md.heartbeat_count = 0;
#if defined(CONFIG_SERIAL_8250) && \
(defined(CONFIG_KGDB) || defined(CONFIG_SERIAL_TEXT_DEBUG))
mcpn765_early_serial_map();
#ifdef CONFIG_SERIAL_TEXT_DEBUG
ppc_md.progress = mcpn765_progress;
#else /* !CONFIG_SERIAL_TEXT_DEBUG */
ppc_md.progress = NULL;
#endif /* CONFIG_SERIAL_TEXT_DEBUG */
ppc_md.progress = gen550_progress;
#endif
#endif
#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
ppc_ide_md.default_irq = mcpn765_ide_default_irq;
......
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