Commit ffe14374 authored by Ulrich Kunitz's avatar Ulrich Kunitz Committed by David S. Miller

[PATCH] zd1211rw: removed noisy debug messages

While developing the driver we added a lot of debug messages for
setting hardware registers. These messages make the reading of the
log files difficult and are of no use anymore. This patch removes
those messages in zd_chip.c.
Signed-off-by: default avatarUlrich Kunitz <kune@deine-taler.de>
Signed-off-by: default avatarDaniel Drake <dsd@gentoo.org>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 5dcddfae
...@@ -500,8 +500,6 @@ int zd_chip_lock_phy_regs(struct zd_chip *chip) ...@@ -500,8 +500,6 @@ int zd_chip_lock_phy_regs(struct zd_chip *chip)
return r; return r;
} }
dev_dbg_f(zd_chip_dev(chip),
"CR_REG1: 0x%02x -> 0x%02x\n", tmp, tmp & ~UNLOCK_PHY_REGS);
tmp &= ~UNLOCK_PHY_REGS; tmp &= ~UNLOCK_PHY_REGS;
r = zd_iowrite32_locked(chip, tmp, CR_REG1); r = zd_iowrite32_locked(chip, tmp, CR_REG1);
...@@ -523,8 +521,6 @@ int zd_chip_unlock_phy_regs(struct zd_chip *chip) ...@@ -523,8 +521,6 @@ int zd_chip_unlock_phy_regs(struct zd_chip *chip)
return r; return r;
} }
dev_dbg_f(zd_chip_dev(chip),
"CR_REG1: 0x%02x -> 0x%02x\n", tmp, tmp | UNLOCK_PHY_REGS);
tmp |= UNLOCK_PHY_REGS; tmp |= UNLOCK_PHY_REGS;
r = zd_iowrite32_locked(chip, tmp, CR_REG1); r = zd_iowrite32_locked(chip, tmp, CR_REG1);
...@@ -841,8 +837,6 @@ static int get_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) ...@@ -841,8 +837,6 @@ static int get_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s)
s->atim_wnd_period = values[0]; s->atim_wnd_period = values[0];
s->pre_tbtt = values[1]; s->pre_tbtt = values[1];
s->beacon_interval = values[2]; s->beacon_interval = values[2];
dev_dbg_f(zd_chip_dev(chip), "aw %u pt %u bi %u\n",
s->atim_wnd_period, s->pre_tbtt, s->beacon_interval);
return 0; return 0;
} }
...@@ -864,9 +858,6 @@ static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) ...@@ -864,9 +858,6 @@ static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s)
reqs[2].addr = CR_BCN_INTERVAL; reqs[2].addr = CR_BCN_INTERVAL;
reqs[2].value = s->beacon_interval; reqs[2].value = s->beacon_interval;
dev_dbg_f(zd_chip_dev(chip),
"aw %u pt %u bi %u\n", s->atim_wnd_period, s->pre_tbtt,
s->beacon_interval);
return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs)); return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs));
} }
...@@ -1160,16 +1151,12 @@ int zd_chip_init_hw(struct zd_chip *chip) ...@@ -1160,16 +1151,12 @@ int zd_chip_init_hw(struct zd_chip *chip)
static int update_pwr_int(struct zd_chip *chip, u8 channel) static int update_pwr_int(struct zd_chip *chip, u8 channel)
{ {
u8 value = chip->pwr_int_values[channel - 1]; u8 value = chip->pwr_int_values[channel - 1];
dev_dbg_f(zd_chip_dev(chip), "channel %d pwr_int %#04x\n",
channel, value);
return zd_iowrite16_locked(chip, value, CR31); return zd_iowrite16_locked(chip, value, CR31);
} }
static int update_pwr_cal(struct zd_chip *chip, u8 channel) static int update_pwr_cal(struct zd_chip *chip, u8 channel)
{ {
u8 value = chip->pwr_cal_values[channel-1]; u8 value = chip->pwr_cal_values[channel-1];
dev_dbg_f(zd_chip_dev(chip), "channel %d pwr_cal %#04x\n",
channel, value);
return zd_iowrite16_locked(chip, value, CR68); return zd_iowrite16_locked(chip, value, CR68);
} }
...@@ -1184,9 +1171,6 @@ static int update_ofdm_cal(struct zd_chip *chip, u8 channel) ...@@ -1184,9 +1171,6 @@ static int update_ofdm_cal(struct zd_chip *chip, u8 channel)
ioreqs[2].addr = CR65; ioreqs[2].addr = CR65;
ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1]; ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1];
dev_dbg_f(zd_chip_dev(chip),
"channel %d ofdm_cal 36M %#04x 48M %#04x 54M %#04x\n",
channel, ioreqs[0].value, ioreqs[1].value, ioreqs[2].value);
return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
} }
...@@ -1638,7 +1622,5 @@ int zd_chip_set_multicast_hash(struct zd_chip *chip, ...@@ -1638,7 +1622,5 @@ int zd_chip_set_multicast_hash(struct zd_chip *chip,
{ CR_GROUP_HASH_P2, hash->high }, { CR_GROUP_HASH_P2, hash->high },
}; };
dev_dbg_f(zd_chip_dev(chip), "hash l 0x%08x h 0x%08x\n",
ioreqs[0].value, ioreqs[1].value);
return zd_iowrite32a(chip, ioreqs, ARRAY_SIZE(ioreqs)); return zd_iowrite32a(chip, ioreqs, ARRAY_SIZE(ioreqs));
} }
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