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  1. 10 Feb, 2012 1 commit
  2. 27 Jan, 2012 2 commits
  3. 11 Aug, 2011 1 commit
  4. 04 Aug, 2011 1 commit
  5. 10 Jun, 2011 1 commit
    • Bruce Allan's avatar
      e1000e: access multiple PHY registers on same page at the same time · 2b6b168d
      Bruce Allan authored
      Doing a PHY page select can take a long time, relatively speaking. This
      can cause a significant delay when updating a number of PHY registers on
      the same page by unnecessarily setting the page for each PHY access. For
      example when going to Sx, all the PHY wakeup registers (WUC, RAR[], MTA[],
      SHRAR[], IP4AT[], IP6AT[], etc.) on 82577/8/9 need to be updated which
      takes a long time which can cause issues when suspending.
      
      This patch introduces new PHY ops function pointers to allow callers to
      set the page directly and do any number of PHY accesses on that page.
      This feature is currently only implemented for 82577, 82578 and 82579
      PHYs for both the normally addressed registers as well as the special-
      case addressing of the PHY wakeup registers on page 800. For the latter
      registers, the existing function for accessing the wakeup registers has
      been divided up into three- 1) enable access to the wakeup register page,
      2) perform the register access and 3) disable access to the wakeup register
      page. The two functions that enable/disable access to the wakeup register
      page are necessarily available to the caller so that the caller can restore
      the value of the Port Control (a.k.a. Wakeup Enable) register after the
      wakeup register accesses are done.
      
      All instances of writing to multiple PHY registers on the same page are
      updated to use this new method and to acquire any PHY locking mechanism
      before setting the page and performing the register accesses, and release
      the locking mechanism afterward.
      
      Some affiliated magic number cleanup is done as well.
      Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
      Tested-by: default avatarJeff Pieper <jeffrey.e.pieper@intel.com>
      Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
      2b6b168d
  6. 14 Apr, 2011 1 commit
  7. 24 Jan, 2011 1 commit
  8. 14 Jan, 2011 2 commits
  9. 10 Jan, 2011 1 commit
  10. 25 Dec, 2010 2 commits
  11. 11 Dec, 2010 2 commits
  12. 01 Nov, 2010 1 commit
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  14. 13 May, 2010 1 commit
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  16. 03 Dec, 2009 2 commits
  17. 02 Dec, 2009 5 commits
  18. 21 Nov, 2009 5 commits
  19. 20 Nov, 2009 2 commits
  20. 30 Oct, 2009 1 commit
  21. 26 Oct, 2009 1 commit
    • Bruce Allan's avatar
      e1000e: allow for swflag to be held over consecutive PHY accesses · 5ccdcecb
      Bruce Allan authored
      PCH-based parts (82577/82578) and some ICH8-based parts (82566) need to
      hold the swflag (sw/fw/hw hardware semaphore) over consecutive PHY accesses
      in order to perform sw-driven PHY configuration during initialization to
      workaround known hardware issues (see follow-on patch).  This patch
      provides new PHY read/write functions (and function pointers) that will
      allow accessing the PHY registers assuming the swflag has already been
      acquired.  The actual PHY register access code has moved into helper
      functions that are called with a flag indicating whether or not the swflag
      has already been acquired and acquires/releases it if not.
      
      The functions called from within the updated PHY access functions had to be
      updated to assume the swflag was already acquired, and other functions that
      called those functions were also updated to acquire/release the swflag.
      Signed-off-by: default avatarBruce Allan <bruce.w.allan@intel.com>
      Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5ccdcecb
  22. 04 Jul, 2009 2 commits
  23. 03 Jun, 2009 1 commit
  24. 22 Nov, 2008 1 commit