- 31 Oct, 2015 4 commits
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Linus Walleij authored
There are a bunch of drivers that utilize the "ngpios" DT property without any vendor prefix. Try to start cleaning up the mess by defining what we mean by this property. Cc: devicetree@vger.kernel.org Cc: Pramod Kumar <pramodku@broadcom.com> Cc: Jonas Gorski <jogo@openwrt.org> Signed-off-by:Linus Walleij <linus.walleij@linaro.org>
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Alban Bedel authored
Add an entry for the ATH79 GPIO driver with myself as maintainer. Signed-off-by:
Alban Bedel <albeu@free.fr> Signed-off-by:
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Mika Westerberg authored
In Microsoft Surface3 the GPIO detecting lid state is shared between GPIO event and operation region. Below is simplied version of the DSDT from Surface3 including relevant parts: Scope (GPO0) { Name (_AEI, ResourceTemplate () { GpioInt (Edge, ActiveBoth, Shared, PullNone, 0x0000, "\\_SB.GPO0", 0x00, ResourceConsumer, , ) { // Pin list 0x004C } }) OperationRegion (GPOR, GeneralPurposeIo, Zero, One) Field (GPOR, ByteAcc, NoLock, Preserve) { Connection ( GpioIo (Shared, PullNone, 0x0000, 0x0000, IoRestrictionNone, "\\_SB.GPO0", 0x00, ResourceConsumer,,) { // Pin list 0x004C } ), HELD, 1 } Method (_E4C, 0, Serialized) // _Exx: Edge-Triggered GPE { If ((HELD == One)) { ^^LID.LIDB = One } Else { ^^LID.LIDB = Zero Notify (LID, 0x80) // Status Change } Notify (^^PCI0.SPI1.NTRG, One) // Device Check } } When GPIO 0x4c changes we call ASL method _E4C which tries to read HELD field (the same GPIO). This triggers following error on the console: ACPI Error: Method parse/execution failed [\_SB.GPO0._E4C] (Node ffff88013f4b4438), AE_ERROR (20150930/psparse-542) The error happens because ACPI GPIO operation region handler (acpi_gpio_adr_space_handler()) tries to acquire the very same GPIO which returns an error (-EBUSY) because the GPIO is already reserved for the GPIO event. Fix this so that we "borrow" the event GPIO if we find the GPIO belongs to an event. Allow this only for GPIOs that are read. To be able to go through acpi_gpio->events list for operation region access we need to make sure the list is properly initialized whenever GPIO chip is registered. Link: https://bugzilla.kernel.org/show_bug.cgi?id=106571Signed-off-by:Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
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Linus Walleij authored
Create a Kconfig submenu for drivers using X86 port-mapped I/O and depend on X86 for this. Suggested-by:
Simon Guinot <simon.guinot@sequanux.org> Signed-off-by:
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- 30 Oct, 2015 1 commit
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William Breathitt Gray authored
Add William Breathitt Gray as the maintainer of the ACCES 104-IDIO-16 GPIO driver. Signed-off-by:
William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by:
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- 27 Oct, 2015 6 commits
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Soren Brinkmann authored
HW and driver support the GPIO as interrupt-controller. Document that in the DT binding. Signed-off-by:
Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by:
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Soren Brinkmann authored
The driver does not have any real architecture dependencies. To avoid listing each architecture that might use this driver on some FPGA-enabled platform, drop these dependencies. Signed-off-by:
Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by:
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Guenter Roeck authored
Returning an error instead of NULL in bgpio_map if platform_get_resource_byname does not find a resource was introduced with commit cf3f2a2c ("gpio: generic: improve error handling in bgpio_map"). This results in several qemu runtime failures with default and non-default configurations, if attempts are made to boot from mmcblk0. Examples for failures with multi_v7_defconfig are Machine: vexpress-a9 dtb: vexpress-v2p-ca9 Machine: vexpress-a15 dtb: vexpress-v2p-ca15-tc1 Crash: VFS: Cannot open root device "mmcblk0" or unknown-block(0,0): error -6 Please append a correct "root=" boot option; here are the available partitions: Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0) Looking into the code, always returning an error if bgpio_map fails does not appear to make much sense, since the code in bgpio_setup_io specifically supports some of the resources to be NULL. Fixes: cf3f2a2c ("gpio: generic: improve error handling in bgpio_map") Cc: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
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Grygorii Strashko authored
Put in a compliance checklist. Signed-off-by:
Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:
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Linus Walleij authored
This reverts commit 677b2ff4.
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William Breathitt Gray authored
The ACCES 104-IDIO-16 family of PC/104 utility boards feature 16 optically isolated inputs and 16 optically isolated FET solid state outputs. This driver provides GPIO support for these 32 channels of digital I/O. Change-of-State detection interrupts are not supported. GPIO 0-15 correspond to digital outputs 0-15, while GPIO 16-31 correspond to digital inputs 0-15. The base port address for the device may be set via the idio_16_base module parameter. Signed-off-by:
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- 26 Oct, 2015 1 commit
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YD Tseng authored
This patch adds a new GPIO driver for AMD Promontory chip. This GPIO controller is enumerated by ACPI and the ACPI compliant hardware ID is AMDF030. Change history: v2: 1. fix coding style 2. registers renaming v3: 1. change include file 2. fix coding style 3. remove module_init/exit, add module_platform_driver 4. remove MODULE_ALIAS v4: 1. change TOTAL_GPIO_PINS to PT_TOTAL_GPIO 2. remove PCI dependency in Kconfig 3. fix subject line Signed-off-by:YD Tseng <Yd_Tseng@asmedia.com.tw> Signed-off-by:
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- 22 Oct, 2015 1 commit
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Kamlakant Patel authored
commit "325f0a (MIPS: Netlogic: Use chip_data for irq_chip methods)" Updates "mips/netlogic/common/irq.c" to use chip_data to store interrupt controller data pointer. Before this commit handler_data was used to store interrupt controller data which caused errors while using gpiochip_set_chained_irqchip. Update XLP GPIO driver to use the gpiolib irqchip helpers. And add missing depends on OF_GPIO in Kconfig. Signed-off-by:
Kamlakant Patel <kamlakant.patel@broadcom.com> Signed-off-by:
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- 20 Oct, 2015 1 commit
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Linus Walleij authored
Add some information about real time compliance to the driver document. Inspired by Grygorii Strashko's real time compliance patches. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by:
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- 19 Oct, 2015 1 commit
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Zubair Lutfullah Kakakhel authored
MIPSfpga uses the axi gpio controller. Enable the driver for MIPS. Signed-off-by:
Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Signed-off-by:
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- 16 Oct, 2015 8 commits
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Laurent Pinchart authored
The flag matches the DT GPIO_SINGLE_ENDED flag and allows drivers to parse and use the DT flag to handle single-ended (open-drain or open-source) GPIOs. Signed-off-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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Laurent Pinchart authored
When requesting a GPIO through the legacy or the gpiod_* API the gpiochip request operation is first called and then the GPIO flags are parsed and the GPIO is configured. This prevents the gpiochip from rejecting the request if the flags are not supported by the device. To fix this split the parse-and-configure operation in two and parse flags before requesting the GPIO. Signed-off-by:
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Jonas Gorski authored
Replace all trivial request/free callbacks that do nothing but call into pinctrl code with the generic versions. Signed-off-by:
Jonas Gorski <jogo@openwrt.org> Acked-by:
Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by:
Heiko Stuebner <heiko@sntech.de> Acked-by:
Eric Anholt <eric@anholt.net> Acked-by:
Andrew Bresticker <abrestic@chromium.org> Acked-by:
Baruch Siach <baruch@tkos.co.il> Acked-by:
Matthias Brugger <matthias.bgg@gmail.com> Acked-by:
Lee Jones <lee@kernel.org> Acked-by:
Laxman Dewangan <ldewangan@nvidia.com> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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Jonas Gorski authored
Instead of storing in the chip data whether the chip uses pinctrl and conditionally call pinctrl_{request,free}_gpio, just don't populate request/free in that case. This makes the implementations trivial and the same as the generic implementations, thus we can just use them. Signed-off-by: -
Jonas Gorski authored
Instead of storing in the chip data whether the chip uses pinctrl and conditionally call pinctrl_{request,free}_gpio, just don't populate request/free in that case. This makes the implementations trivial and the same as the generic implementations, thus we can just use them. Signed-off-by: -
Jonas Gorski authored
Replace all trivial request/free callbacks that do nothing but call into pinctrl code with the generic versions. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:
James Hogan <james.hogan@imgtec.com> Acked-by:
Stefan Agner <stefan@agner.ch> Acked-by:
Joachim Eastwood <manabian@gmail.com> Acked-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
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Jonas Gorski authored
Provide generic request/free implementations that pinctrl aware gpio drivers can use instead of open coding if they use a 1:1 pin to gpio signal mapping. Signed-off-by:
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Grygorii Strashko authored
This patch fixes below static checker warning by changing type of irq field in struct gpio_bank from u16 to int. drivers/gpio/gpio-omap.c:1191 omap_gpio_probe() warn: assigning (-6) to unsigned variable 'bank->irq' drivers/gpio/gpio-omap.c 1188 bank->irq = platform_get_irq(pdev, 0); 1189 if (bank->irq <= 0) { bank->irq is u16. 1190 if (!bank->irq) 1191 bank->irq = -ENXIO; Does not work. 1192 if (bank->irq != -EPROBE_DEFER) Does not work. 1193 dev_err(dev, 1194 "can't get irq resource ret=%d\n", bank->irq); 1195 return bank->irq; 1196 } Fixes: commit 89d18e3a: "gpio: omap: switch to use platform_get_irq" Signed-off-by:
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- 15 Oct, 2015 2 commits
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Linus Walleij authored
The PL061 can handle level IRQs and edge IRQs, however it is just utilizing handle_simple_irq() for all IRQs. Inspired by Stefan Agners patch to vf610, this assigns the right handler depending on what type is set up, and after this handle_bad_irq() is only used as default and if the type is not specified, as is done in the OMAP driver: defining the IRQ type is really not optional for this driver. The interrupt handler was just writing the interrupt clearing register for all lines that were high when entering the handling loop, this is wrong: that register is only supposed to be written (on a per-line basis) for edge IRQs, so this ACK was moved to the .irq_ack() callback as is proper. Tested with PL061 on the ARM RealView PB11MPCore and the MMC/SC card detect GPIO. Cc: Jonas Gorski <jogo@openwrt.org> Cc: Stefan Agner <stefan@agner.ch> Signed-off-by: -
Dan Carpenter authored
We were returning with "chip->lock" held by mistake. It's safe to move the return to before we take the spinlock. Fixes: 1dbf7f29 ('gpio: pl061: detail IRQ trigger handling') Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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- 05 Oct, 2015 6 commits
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Linus Walleij authored
This reverts commit ddd54040. We need to preserve only using this naming strategy for names coming from chip->names[], the descripor->name field is for the new interface.
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Andy Shevchenko authored
This patch adds a support of the expandes found on Intel Galileo Gen2 board. The platform information comes from ACPI. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
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Andy Shevchenko authored
Instead of using id->driver_data directly we copied it to the internal structure. This will help to adapt driver for ACPI use. Signed-off-by:
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Heiner Kallweit authored
Use the ERRPTR standard way to return an error code in a pointer thus simplifiying the code. Signed-off-by:
Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by:
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Heiner Kallweit authored
Replace devm_request_mem_region / devm_ioremap with devm_ioremap_resource. Signed-off-by:
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Heiner Kallweit authored
If bgpio_map returns NULL then err should always be set. Signed-off-by:
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- 02 Oct, 2015 9 commits
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Thierry Reding authored
The TCA9539 is almost identical to the PCA9555 and software-compatible with this driver. It exposes 16 general purpose I/O pins in two 8-bit configurations. Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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Julia Lawall authored
The function __max730x_remove is called from the remove functions of drivers/gpio/gpio-max7300.c and drivers/gpio/gpio-max7301.c. In both cases, the probe function allocates ts using devm_kzalloc. Explicitly freeing such a value with kfree will cause a double free. Signed-off-by:
Julia Lawall <Julia.Lawall@lip6.fr> Reviewed-by:
Alexandre Courbot <acourbot@nvidia.com> Signed-off-by:
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Grygorii Strashko authored
This patch converts TI OMAP GPIO driver to use generic irq handler instead of chained IRQ handler. This way OMAP GPIO driver will be compatible with RT kernel where it will be forced thread IRQ handler while in non-RT kernel it still will be executed in HW IRQ context. As part of this change the IRQ wakeup configuration is applied to GPIO Bank IRQ as it now will be under control of IRQ PM Core during suspend. There are also additional benefits: - on-RT kernel there will be no complains any more about PM runtime usage in atomic context "BUG: sleeping function called from invalid context"; - GPIO bank IRQs will appear in /proc/interrupts and its usage statistic will be visible; - GPIO bank IRQs could be configured through IRQ proc_fs interface and, as result, could be a part of IRQ balancing process if needed; - GPIO bank IRQs will be under control of IRQ PM Core during suspend to RAM. Disadvantage: - additional runtime overhed as call chain till omap_gpio_irq_handler() will be longer now - necessity to use wa_lock in omap_gpio_irq_handler() to W/A warning in handle_irq_event_percpu() WARNING: CPU: 1 PID: 35 at kernel/irq/handle.c:149 handle_irq_event_percpu+0x51c/0x638() This patch doesn't fully follows recommendations provided by Sebastian Andrzej Siewior [1], because It's required to go through and check all GPIO IRQ pin states as fast as possible and pass control to handle_level_irq or handle_edge_irq. handle_level_irq or handle_edge_irq will perform actions specific for IRQ triggering type and wakeup corresponding registered threaded IRQ handler (at least it's expected to be threaded). IRQs can be lost if handle_nested_irq() will be used, because excecution time of some pin specific GPIO IRQ handler can be very significant and require accessing ext. devices (I2C). Idea of such kind reworking was also discussed in [2]. [1] http://www.spinics.net/lists/linux-omap/msg120665.html [2] http://www.spinics.net/lists/linux-omap/msg119516.htmlTested-by:Tony Lindgren <tony@atomide.com> Tested-by:
Austin Schuh <austin@peloton-tech.com> Signed-off-by:
Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by:
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Grygorii Strashko authored
The PM runtime API can't be used in atomic contex on -RT even if it's configured as irqsafe. As result, below error report can be seen when PM runtime API called from IRQ chip's callbacks irq_startup/irq_shutdown/irq_set_type, because they are protected by RAW spinlock: BUG: sleeping function called from invalid context at kernel/locking/rtmutex.c:917 in_atomic(): 1, irqs_disabled(): 128, pid: 96, name: insmod 3 locks held by insmod/96: #0: (&dev->mutex){......}, at: [<c04752c8>] __driver_attach+0x54/0xa0 #1: (&dev->mutex){......}, at: [<c04752d4>] __driver_attach+0x60/0xa0 #2: (class){......}, at: [<c00a408c>] __irq_get_desc_lock+0x60/0xa4 irq event stamp: 1834 hardirqs last enabled at (1833): [<c06ab2a4>] _raw_spin_unlock_irqrestore+0x88/0x90 hardirqs last disabled at (1834): [<c06ab068>] _raw_spin_lock_irqsave+0x2c/0x64 softirqs last enabled at (0): [<c003d220>] copy_process.part.52+0x410/0x19d8 softirqs last disabled at (0): [< (null)>] (null) Preemption disabled at:[< (null)>] (null) CPU: 1 PID: 96 Comm: insmod Tainted: G W O 4.1.3-rt3-00618-g57e2387-dirty #184 Hardware name: Generic DRA74X (Flattened Device Tree) [<c00190f4>] (unwind_backtrace) from [<c0014734>] (show_stack+0x20/0x24) [<c0014734>] (show_stack) from [<c06a62ec>] (dump_stack+0x88/0xdc) [<c06a62ec>] (dump_stack) from [<c006ca44>] (___might_sleep+0x198/0x2a8) [<c006ca44>] (___might_sleep) from [<c06ab6d4>] (rt_spin_lock+0x30/0x70) [<c06ab6d4>] (rt_spin_lock) from [<c04815ac>] (__pm_runtime_resume+0x68/0xa4) [<c04815ac>] (__pm_runtime_resume) from [<c04123f4>] (omap_gpio_irq_type+0x188/0x1d8) [<c04123f4>] (omap_gpio_irq_type) from [<c00a64e4>] (__irq_set_trigger+0x68/0x130) [<c00a64e4>] (__irq_set_trigger) from [<c00a7bc4>] (irq_set_irq_type+0x44/0x6c) [<c00a7bc4>] (irq_set_irq_type) from [<c00abbf8>] (irq_create_of_mapping+0x120/0x174) [<c00abbf8>] (irq_create_of_mapping) from [<c0577b74>] (of_irq_get+0x48/0x58) [<c0577b74>] (of_irq_get) from [<c0540a14>] (i2c_device_probe+0x54/0x15c) [<c0540a14>] (i2c_device_probe) from [<c04750dc>] (driver_probe_device+0x184/0x2c8) [<c04750dc>] (driver_probe_device) from [<c0475310>] (__driver_attach+0x9c/0xa0) [<c0475310>] (__driver_attach) from [<c0473238>] (bus_for_each_dev+0x7c/0xb0) [<c0473238>] (bus_for_each_dev) from [<c0474af4>] (driver_attach+0x28/0x30) [<c0474af4>] (driver_attach) from [<c0474760>] (bus_add_driver+0x154/0x200) [<c0474760>] (bus_add_driver) from [<c0476348>] (driver_register+0x88/0x108) [<c0476348>] (driver_register) from [<c0541600>] (i2c_register_driver+0x3c/0x90) [<c0541600>] (i2c_register_driver) from [<bf003018>] (pcf857x_init+0x18/0x24 [gpio_pcf857x]) [<bf003018>] (pcf857x_init [gpio_pcf857x]) from [<c000998c>] (do_one_initcall+0x128/0x1e8) [<c000998c>] (do_one_initcall) from [<c06a4220>] (do_init_module+0x6c/0x1bc) [<c06a4220>] (do_init_module) from [<c00dd0c8>] (load_module+0x18e8/0x21c4) [<c00dd0c8>] (load_module) from [<c00ddaa0>] (SyS_init_module+0xfc/0x158) [<c00ddaa0>] (SyS_init_module) from [<c000ff40>] (ret_fast_syscall+0x0/0x54) The IRQ chip interface defines only two callbacks which are executed in non-atomic contex - irq_bus_lock/irq_bus_sync_unlock, so lets move PM runtime calls there. Tested-by: -
Linus Walleij authored
It is customary for GPIO controllers to support open drain/collector and open source/emitter configurations. Add standard GPIO line flags to account for this and augment the documentation to say that these are the most generic bindings. Several people approached me to add new flags to the lines, and this makes sense, but let's first bind up the most common cases before we start to add exotic stuff. Thanks to H. Nikolaus Schaller for ideas on how to encode single-ended wiring such as open drain/source and open collector/emitter. Cc: Tony Lindgren <tony@atomide.com> Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: H. Nikolaus Schaller <hns@goldelico.com> Signed-off-by: -
Diego Elio Pettenò authored
This patch adds support for the GPIOs found on the ITE super-I/O chips IT87xx. Signed-off-by:
Diego Elio Pettenò <flameeyes@flameeyes.eu> Signed-off-by:
Christophe Vu-Brugier <cvubrugier@fastmail.fm> Signed-off-by:
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Dirk Behme authored
The parameter offset is an unsigned, so it makes no sense to compare it for >= 0. Fix the compiler warning regarding this by removing this comparison. As the macro GPIO_OFFSET_VALID is only used at this single place, simplify the code by dropping the macro completely and dropping the invert, too. No functional change. Signed-off-by:
Dirk Behme <dirk.behme@gmail.com> Acked-by:
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Richard Fitzgerald authored
Signed-off-by:
Richard Fitzgerald <rf@opensource.wolfsonmicro.com> Signed-off-by:
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Nicholas Krause authored
This fixes error checking in the function device_pca957x_init to properly check and return error code values from the calls to the function pca953x_write_regs if they fail as to properly signal callers when a error occurs due a failure when writing registers for this gpio based device. Signed-off-by:
Nicholas Krause <xerofoify@gmail.com> Reviewed-by:
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