- 08 Apr, 2013 14 commits
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Florian Vaussard authored
Convert the on-board LED connected to the TWL4030 (LEDB) to use pwm-leds. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Peter Ujfalusi authored
Section to describe the backlight for the LCD panels. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Peter Ujfalusi authored
Sections to describe the pwm-leds in the system. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Peter Ujfalusi authored
We have proper driver stack to handle the pmu_stat LED which is connected PWMB of twl4030. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Peter Ujfalusi authored
Enable support for the PWMs and LED as PWM drivers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Peter Ujfalusi authored
Enable support for the PWMs and LEDs as PWM drivers. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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AnilKumar Ch authored
Add a new address space/memory resource to d_can device tree node. D_CAN RAM initialization is achieved through RAMINIT register which is part of AM33XX control module address space. D_CAN RAM init or de-init should be done by writing instance corresponding value to control module register. Till we have a separate control module driver to write to control module, d_can driver will handle the register writes to control module by itself. So a new address space to represent this control module register is added to d_can driver. Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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AnilKumar Ch authored
Add d_can instances to aliases node to get the D_CAN instance number from the driver. To initialize D_CAN message RAM, corresponding instance number is required. To initialize instance 0 message RAM then 0x1 should be written and for instance 1 message RAM, 0x2 should be written to control module register. With device-tree framework ip instance number is "-1" by default for all instances. To get device id/instance number then modules should be added to DT "aliases" node. of_alias_get_id() gives the device id number based on number of alias nodes present in "aliases node". Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Matthias Brugger authored
This is a follow-up to Javier Martinez effort adding initial device tree support to IGEP technology devices [1]. It adds uart1 and uart2 bindings to the generic dtsi for the IGEP boards. [1] http://www.spinics.net/lists/linux-omap/msg83409.htmlSigned-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Javier Martinez Canillas authored
ISEE IGEP COM Module is an TI OMAP3 SoC computer on module. This patch adds an initial device tree support to boot an IGEP COM Module from the MMC/SD. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> [b-cousson@ti.com: Update the Makefile for 3.8-rc2] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Javier Martinez Canillas authored
ISEE IGEPv2 is an TI OMAP3 SoC based embedded board. This patch adds an initial device tree support to boot an IGEPv2 from the MMC/SD. Currently is working everything that is supported by DT on OMAP3 SoCs (MMC/SD, GPIO LEDs, EEPROM, TWL4030 audio). Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> [benoit.cousson@linaro.org: Update the Makefile for 3.8-rc2] Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Javier Martinez Canillas authored
Add a generic .dtsi device tree source file for the common characteristics across IGEP Technology devices. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Tested-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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AnilKumar Ch authored
Rename I2C and GPIO nodes according to AM33XX TRM. According to AM33XX TRM device instances are starting from "0" like i2c0, i2c1 and i2c3. Signed-off-by: Pantelis Antoniou <panto@antoniou-consulting.com> [panto@antoniou-consulting.com: initial patch by pantelis's] Signed-off-by: AnilKumar Ch <anilkumar@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
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Benoit Cousson authored
Merge tag 'omap-devel-b-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into for_3.10/dts_merged
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- 02 Apr, 2013 20 commits
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Roger Quadros authored
Provide RESET and Power regulators for the USB PHY, the USB Host port mode and the PHY device. Also provide pin multiplexer information for USB host pins. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Adds device nodes for HS USB Host module, TLL module, OHCI and EHCI controllers. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and NOP PHY device. VAUX2 supplies the PHY's VCC. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulator and the NOP PHY device. VAUX2 supplies the PHY's VCC. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Remove deprecated USBHS platform data. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's RESET regulators and the NOP PHY devices. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
Use usbhs_init_phys() to register the PHY's VCC and RESET regulators and the NOP PHY device. Get rid of managing the PHY clock as it will be done by the PHY driver. For that to work we create a clock alias that links the PHY clock name to the PHY device name. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Roger Quadros authored
This helper allows board support code to add the PHY's VCC and RESET regulators which are GPIO controlled as well as the NOP PHY device. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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- 01 Apr, 2013 5 commits
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Rajendra Nayak authored
omap3_noncore_dpll_set_rate() attempts an enable of bypass clk as well as ref clk for every .set_rate attempt on a noncore DPLL, regardless of whether the .set_rate results in the DPLL being locked or put in bypass. Early at boot, while some of these DPLLs are programmed and locked (using .set_rate for the DPLL), this causes an ordering issue. For instance, on OMAP5, the USB DPLL derives its bypass clk from ABE DPLL. If a .set_rate of USB DPLL which programmes the M,N and locks it is called before the one for ABE, the enable of USB bypass clk (derived from ABE DPLL) then attempts to lock the ABE DPLL and fails as the M,N values for ABE are yet to be programmed. To get rid of this ordering needs, enable bypass clk for a DPLL as part of its .set_rate only when its being put in bypass, and only enable the ref clk when its locked. Reported-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Paul Walmsley authored
_pwrdm_save_clkdm_state_and_activate() tried to test one of its unsigned arguments to determine whether it was less than zero. Fix by moving the error test to the caller. Reported-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Rajendra Nayak authored
_HWMOD_WAKEUP_ENABLED is currently unused across the hwmod framework. Just get rid of it, so we have one less flag to worry about. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Vaibhav Hiremath authored
WDT1 module can take one of the below clocks as input functional clock - - On-Chip 32K RC Osc [default/reset] - 32K from PRCM The On-Chip 32K RC Osc clock is not an accurate clock-source as per the design/spec, so as a result, for example, timer which supposed to get expired @60Sec, but will expire somewhere ~@40Sec, which is not expected by any use-case. The solution here is to switch the input clock-source to PRCM generated 32K clock-source during boot-time itself. Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoit Cousson <benoit.cousson@linaro.org> Cc: Paul Walmsley <paul@pwsan.com>
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Vaibhav Hiremath authored
This patch adds sysc definitions to the wdt1 hwmod entry, which in-turn makes sure that sysc idle bit-fields are configured to valid state on enable/disable callbacks. With the recent submitted patch from Santosh Shilimkar, "ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc" (commit: 4a98c2d89), it is required to add sysconf information to each valid hwmod entry, else device will not be come out from idle state properly and leads to below kernel crash - [2.190237] Unhandled fault: external abort on non-linefetch (0x1028) at 0xf9e35034 [2.198325] Internal error: : 1028 [#1] SMP ARM [2.203101] Modules linked in: [2.206334] CPU: 0 Not tainted (3.9.0-rc3-00059-gd114294#1) [2.212679] PC is at omap_wdt_disable.clone.5+0xc/0x60 [2.218090] LR is at omap_wdt_probe+0x184/0x1fc Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Benoit Cousson <benoit.cousson@linaro.org> Cc: Paul Walmsley <paul@pwsan.com>
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- 31 Mar, 2013 1 commit
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Linus Torvalds authored
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