- 09 Oct, 2015 14 commits
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Jean-Philippe Brucker authored
Implement the system and memory-mapped register accesses in asm/arch_gicv3.h for 32bit architectures. This patch is a straightforward translation of the arm64 header. 64bit accesses are done in two times and don't need atomicity: TYPER is read-only, and the upper-word of IROUTER is always zero on 32bit architectures. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jean-Philippe Brucker authored
On 32bit platforms, we cannot assure that an I/O ldrd or strd will be done atomically. Besides, an hypervisor would be unable to emulate such accesses. In order to allow the AArch32 version of the driver to split them into two 32bit accesses while keeping the requirement for atomic writes, this patch specializes the IROUTER and TYPER accesses. Since the latter is an ID register, it won't need to be read atomically, but we still avoid future confusion by using gic_read_typer instead of a generic gic_readq. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jean-Philippe Brucker authored
This patch does a few simple compatibility-related changes: - change the system register access prototypes to their actual size, - homogenise mpidr accesses with unsigned long, - force the 64bit register values to unsigned long long. Note: the list registers are 64bit on GICv3, but the AArch32 vGIC driver will need to split their values into two 32bit registers: LRn and LRCn. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Jean-Philippe Brucker authored
This patch moves the GICv3 system register access helpers to arch/arm64/. Their 32bit counterparts will need to use mrc/mcr accesses instead of mrs_s/msr_s. [maz: fixed conflict with Cavium erratum handling] Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Duc Dang authored
APM X-Gene GICv2m implementation has an erratum where the MSI data needs to be the offset from the spi_start in order to trigger the correct MSI interrupt. This is different from the standard GICv2m implementation where the MSI data is the absolute value within the range from spi_start to (spi_start + num_spis) of each v2m frame. This patch reads MSI_IIDR register (present in all GICv2m implementations) to identify X-Gene GICv2m implementation and apply workaround to change the data portion of MSI vector. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Duc Dang <dhdang@apm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
The current requirements do not describe the case where a GICv3 system gets booted with system register access disabled, and expect the kernel to drive GICv3 in GICv2 mode. Describe the expected settings for that particular case. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
When using a GICv3 in compatibility (v2) mode, having GICv3 system register access enabled is not really compliant with the architecture. Warn if the firmware (or the hypervisor) has been lazy. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
As the firmware (or the hypervisor) may have disabled SRE access, check that SRE can actually be enabled before declaring that we do have that capability. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
In order for gic_enable_sre to be used by the arm64 core code, move it to arm-gic-v3.h. As a bonus, we now also check if system registers have been already enabled, and return early if they have. In all cases, the function now returns a boolean indicating if the enabling has been successful. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
Contrary to what was originally expected, EL3 firmware can (for whatever reason) disable GICv3 system register access. In this case, the kernel explodes very early. Work around this by testing if the SRE bit sticks or not. If it doesn't, abort the GICv3 setup, and pray that the firmware has passed a DT that doesn't contain a GICv3 node. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Chen-Yu Tsai authored
Switch to the new of_io_request_and_map() call, so the IO resource is properly held, and also shows up in /proc/iomem. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Link: http://lkml.kernel.org/r/1444063334-19832-3-git-send-email-wens@csie.orgSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Chen-Yu Tsai authored
The device tree node name is typically "interrupt-controller", which is rather useless when used in printk messages and irq chip names for identification purposes. Use the driver name "sunxi-nmi" instead. While at it move the identifier from pr_err() calls to the pr_fmt macro. Also remove the "__func__" identifier from the error message in the interrupt type setting callback, sunxi_sc_nmi_set_type(). The driver name in the pr_fmt macro should be enough. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Link: http://lkml.kernel.org/r/1444063334-19832-2-git-send-email-wens@csie.orgSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Feng Wu authored
irq_set_vcpu_affinity() is needed when CONFIG_SMP=n, so move the definition out of "#ifdef CONFIG_SMP" Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Feng Wu <feng.wu@intel.com> Cc: jiang.liu@linux.intel.com Cc: pbonzini@redhat.com Link: http://lkml.kernel.org/r/1443860438-144926-1-git-send-email-feng.wu@intel.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Mika Westerberg authored
When a CPU is offlined all interrupts that have an action are migrated to other still online CPUs. However, if the interrupt has chained handler installed this is not done. Chained handlers are used by GPIO drivers which support interrupts, for instance. When the affinity is not corrected properly we end up in situation where most interrupts are not arriving to the online CPUs anymore. For example on Intel Braswell system which has SD-card card detection signal connected to a GPIO the IO-APIC routing entries look like below after CPU1 is offlined: pin30, enabled , level, low , V(52), IRR(0), S(0), logical , D(03), M(1) pin31, enabled , level, low , V(42), IRR(0), S(0), logical , D(03), M(1) pin32, enabled , level, low , V(62), IRR(0), S(0), logical , D(03), M(1) pin5b, enabled , level, low , V(72), IRR(0), S(0), logical , D(03), M(1) The problem here is that the destination mask still contains both CPUs even if CPU1 is already offline. This means that the IO-APIC still routes interrupts to the other CPU as well. We solve the problem by providing a default action for chained interrupts. This action allows the migration code to correct affinity (as it finds desc->action != NULL). Also make the default action handler to emit a warning if for some reason a chained handler ends up calling it. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Link: http://lkml.kernel.org/r/1444039935-30475-1-git-send-email-mika.westerberg@linux.intel.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 01 Oct, 2015 5 commits
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Mika Westerberg authored
These two functions are not used anywhere in the kernel source tree so remove them. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Link: http://lkml.kernel.org/r/1443704093-36837-2-git-send-email-mika.westerberg@linux.intel.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Mika Westerberg authored
It should say IRQ_NESTED_THREAD instead of IRQ_NESTED_TRHEAD. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Link: http://lkml.kernel.org/r/1443704093-36837-1-git-send-email-mika.westerberg@linux.intel.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Axel Lin authored
Chained irq handlers usually set up handler data as well. We now have a function to set both under irq_desc->lock. Replace the two calls with one. Signed-off-by: Axel Lin <axel.lin@ingics.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Link: http://lkml.kernel.org/r/1443709604.12993.0.camel@ingics.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Thomas Gleixner authored
Bring in the change which we offered arm[64] folks to pull into their trees.
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Yang Yingliang authored
ARM and ARM64 have almost identical code for migrating interrupts on cpu hotunplug. Provide a generic version which can be used by both. The new code addresses a shortcoming in the ARM[64] variants which fails to update the affinity change in some cases. The solution for this is to use the core function irq_do_set_affinity() instead of open coding it. [ tglx: Added copyright notice and license boilerplate. Rewrote subject and changelog. ] Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Acked-by: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: <linux-arm-kernel@lists.infradead.org> Link: http://lkml.kernel.org/r/1443087135-17044-2-git-send-email-yangyingliang@huawei.comSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 30 Sep, 2015 1 commit
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Ulrich Hecht authored
Works the same as on r8a7779. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Link: http://lkml.kernel.org/r/1443607387-19147-1-git-send-email-geert+Brenesas@glider.beSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 29 Sep, 2015 8 commits
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Magnus Damm authored
Convert the IRQC driver to rely on GENERIC_IRQ_CHIP and set IRQ_GC_INIT_NESTED_LOCK to enable nested locking. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Cc: jason@lakedaemon.net Cc: geert+renesas@glider.be Cc: horms@verge.net.au Cc: Magnus Damm <magnus.damm@gmail.com> Link: http://lkml.kernel.org/r/20150928094237.32552.83434.sendpatchset@little-appleSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Magnus Damm authored
For some reason the name of the external interrupt controller has changed name with r8a7795, so use "intc-ex" instead of "irqc" as r8a7795 compat string to follow the friendly documentation. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> Reviewed-by: horms@verge.net.au Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Cc: jason@lakedaemon.net Cc: Magnus Damm <magnus.damm@gmail.com> Link: http://lkml.kernel.org/r/20150928094228.32552.83336.sendpatchset@little-appleSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Robert Richter authored
Use newly introduced jump label API. Make this a separate patch for easier backporting to older kernels of the errata patch set. Signed-off-by: Robert Richter <rrichter@cavium.com> Reviewed-by: Marc Zygnier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Tirumalesh Chalamarla <tchalamarla@cavium.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1442869119-1814-7-git-send-email-rric@kernel.orgSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Robert Richter authored
This implements two gicv3-its errata workarounds for ThunderX. Both with small impact affecting only ITS table allocation. erratum 22375: only alloc 8MB table size erratum 24313: ignore memory access type The fixes are in ITS initialization and basically ignore memory access type and table size provided by the TYPER and BASER registers. Signed-off-by: Ganapatrao Kulkarni <gkulkarni@caviumnetworks.com> Signed-off-by: Robert Richter <rrichter@cavium.com> Reviewed-by: Marc Zygnier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Tirumalesh Chalamarla <tchalamarla@cavium.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Jason Cooper <jason@lakedaemon.net> Cc: Will Deacon <will.deacon@arm.com> Link: http://lkml.kernel.org/r/1442869119-1814-6-git-send-email-rric@kernel.orgSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Robert Richter authored
Some GIC revisions require an individual configuration to esp. add workarounds for HW bugs. This patch implements generic code to parse the hw revision provided by an IIDR register value and runs specific code if hw matches. A function is added that reads the IIDR registers for ITS (GITS_IIDR) and then goes through a list of init functions to be called for specific versions. Same could be done for GICV3 (GICD_IIDR), but there are no users yet for it. The patch is needed to implement workarounds for HW errata in Cavium's ThunderX GICV3 ITS. Signed-off-by: Robert Richter <rrichter@cavium.com> Reviewed-by: Marc Zygnier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Tirumalesh Chalamarla <tchalamarla@cavium.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1442869119-1814-5-git-send-email-rric@kernel.orgSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Robert Richter authored
No need to read the typer register in the loop. Values do not change. This patch is basically a prerequisite for a follow-on patch that adds errata code for Cavium ThunderX. It moves the calculation of the number of id entries to the beginning of the function close to other setup values that are needed to allocate the its table. Now we have a central location to modify the setup parameters and the errata code can be implemented in a single block. Signed-off-by: Robert Richter <rrichter@cavium.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Tirumalesh Chalamarla <tchalamarla@cavium.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1442869119-1814-4-git-send-email-rric@kernel.orgSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Robert Richter authored
This patch implements Cavium ThunderX erratum 23154. The gicv3 of ThunderX requires a modified version for reading the IAR status to ensure data synchronization. Since this is in the fast-path and called with each interrupt, runtime patching is used using jump label patching for smallest overhead (no-op). This is the same technique as used for tracepoints. Signed-off-by: Robert Richter <rrichter@cavium.com> Reviewed-by: Marc Zygnier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Tirumalesh Chalamarla <tchalamarla@cavium.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Jason Cooper <jason@lakedaemon.net> Cc: Will Deacon <will.deacon@arm.com> Link: http://lkml.kernel.org/r/1442869119-1814-3-git-send-email-rric@kernel.orgSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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Robert Richter authored
The number of pages for the its table may exceed the maximum of 256. Adding a range check and limitting the number to its maximum. Based on a patch from Tirumalesh Chalamarla <tchalamarla@cavium.com>. Signed-off-by: Tirumalesh Chalamarla <tchalamarla@cavium.com> Signed-off-by: Robert Richter <rrichter@cavium.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1442869119-1814-2-git-send-email-rric@kernel.orgSigned-off-by: Thomas Gleixner <tglx@linutronix.de>
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- 27 Sep, 2015 12 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull x86 fixes from Thomas Gleixner: "Two bugfixes from Andy addressing at least some of the subtle NMI related wreckage which has been reported by Sasha Levin" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/nmi/64: Fix a paravirt stack-clobbering bug in the NMI code x86/paravirt: Replace the paravirt nop with a bona fide empty function
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull irq fix from Thomass Gleixner: "A bugfix for the atmel aic5 irq chip driver which caches the wrong data and thereby breaking resume" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/atmel-aic5: Use per chip mask caches in mask/unmask()
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git://ftp.arm.linux.org.uk/~rmk/linux-armLinus Torvalds authored
Pull ARM fixes from Russell King: "Just two fixes: wire up the new system calls added during the last merge window, and fix another user access site" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: ARM: alignment: fix alignment handling for uaccess changes ARM: wire up new syscalls
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds authored
Pull ARM SoC fixes from Olof Johansson: "Our first real batch of fixes this release cycle. Nothing really concerning, and diffstat is a bit inflated due to some DT contents moving around on STi platforms. There's a collection of them here: - A fixup for a build breakage that hits on arm64 allmodconfig in QCOM SCM firmware drivers - MMC fixes for OMAP that had quite a bit of breakage this merge window. - Misc build/warning fixes on PXA and OMAP - A couple of minor fixes for Beagleboard X15 which is now starting to see a few more users in the wild" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits) ARM: sti: dt: adapt DT to fix probe/bind issues in DRM driver ARM: dts: fix omap2+ address translation for pbias firmware: qcom: scm: Add function stubs for ARM64 ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2 ARM: omap2plus_defconfig: enable GPIO_PCA953X ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late ARM: dts: am57xx-beagle-x15: Update Phy supplies ARM: pxa: balloon3: Fix build error ARM: dts: Fixup model name for HP t410 dts ARM: dts: DRA7: fix a typo in ethernet ARM: omap2plus_defconfig: make PCF857x built-in ARM: dts: Use ti,pbias compatible string for pbias ARM: OMAP5: Cleanup options for SoC only build ARM: DRA7: Select missing options for SoC only build ARM: OMAP2+: board-generic: Remove stale of_irq macros ARM: OMAP4+: PM: erratum is used by OMAP5 and DRA7 as well ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi ARM: dts: am57xx-beagle-x15: Add wakeup irq for mcp79410 ARM: dts: am335x-phycore-som: Fix mpu voltage ...
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git://git.samba.org/sfrench/cifs-2.6Linus Torvalds authored
Pull CIFS fixes from Steve French: "Four fixes from testing at the recent SMB3 Plugfest including two important authentication ones (one fixes authentication problems to some popular servers when clock times differ more than two hours between systems, the other fixes Kerberos authentication for SMB3)" * 'for-next' of git://git.samba.org/sfrench/cifs-2.6: fix encryption error checks on mount [SMB3] Fix sec=krb5 on smb3 mounts cifs: use server timestamp for ntlmv2 authentication disabling oplocks/leases via module parm enable_oplocks broken for SMB3
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https://github.com/rjarzmik/linuxOlof Johansson authored
ARM: pxa: fixes for v4.3 These fixes are mainly regression fixes triggered by irq changes, common clock framework introduction and sound side-effect of other platforms. * tag 'pxa-fixes-v4.3' of https://github.com/rjarzmik/linux: ARM: pxa: balloon3: Fix build error ARM: pxa: ssp: Fix build error by removing originally incorrect DT binding ARM: pxa: fix DFI bus lockups on startup Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'omap-for-v4.3/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes Fixes for omaps for v4.3-rc cycle: - Two more patches to fix most of the MMC regressions with the PBIAS regulator changes. At least two MMC driver related issues still seems to remain for omap3 legacy booting and omap4 duovero. Note that the dts changes depend on a recent regulator fix, and are based on the regulator commit now in mainline kernel - Enable autoidle for am43xx clocks to prevent clocks from staying always on - Fix i2c5 pinctrl offsets for omap5-uevm - Enable PCA953X as that's needed for HDMI to work on omap5 - Update phy supplies for beagle x15 beta board - Use palmas-usb for on beagle x15 to start using the related driver that recently got merged * tag 'omap-for-v4.3/fixes-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: fix omap2+ address translation for pbias ARM: dts: am57xx-beagle-x15: use palmas-usb for USB2 ARM: omap2plus_defconfig: enable GPIO_PCA953X ARM: dts: omap5-uevm.dts: fix i2c5 pinctrl offsets ARM: OMAP2+: AM43XX: Enable autoidle for clks in am43xx_init_late ARM: dts: am57xx-beagle-x15: Update Phy supplies regulator: pbias: program pbias register offset in pbias driver ARM: omap2plus_defconfig: Enable MUSB DMA support ARM: DRA752: Add ID detect for ES2.0 ARM: OMAP3: vc: fix 'or' always true warning ARM: OMAP2+: Fix booting if no timer parent clock is available ARM: OMAP2+: omap-device: fix race deferred probe of omap_hsmmc vs omap_device_late_init Signed-off-by: Olof Johansson <olof@lixom.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6Linus Torvalds authored
Pull crypto fixes from Herbert Xu: "This fixes the following issues: - check the return value of platform_get_irq as signed int in xgene. - skip adf_dev_restore on virtual functions in qat. - fix double-free with backlogged requests in marvell_cesa" * git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: hwrng: xgene - fix handling platform_get_irq crypto: qat - VF should never trigger SBR on PH crypto: marvell - properly handle CRYPTO_TFM_REQ_MAY_BACKLOG-flagged requests
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git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pendingLinus Torvalds authored
Pull SCSI target fixes from Nicholas Bellinger: "This includes a iser-target series from Jenny + Sagi @ Mellanox that addresses the few remaining active I/O shutdown bugs, along with a patch to support zero-copy for immediate data payloads that gives a nice performance improvement for small block WRITEs. Also included are some recent >= v4.2 regression bug-fixes. The most notable is a RCU conversion regression for SPC-3 PR registrations, and recent removal of obsolete RFC-3720 markers that introduced a login regression bug with MSFT iSCSI initiators. Thanks to everyone who has been testing + reporting bugs for v4.x" * git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending: iscsi-target: Avoid OFMarker + IFMarker negotiation target: Make TCM_WRITE_PROTECT failure honor D_SENSE bit target: Fix target_sense_desc_format NULL pointer dereference target: Propigate backend read-only to core_tpg_add_lun target: Fix PR registration + APTPL RCU conversion regression iser-target: Skip data copy if all the command data comes as immediate iser-target: Change the recv buffers posting logic iser-target: Fix pending connections handling in target stack shutdown sequnce iser-target: Remove np_ prefix from isert_np members iser-target: Remove unused variables iser-target: Put the reference on commands waiting for unsol data iser-target: remove command with state ISTATE_REMOVE
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usbLinus Torvalds authored
Pull USB fixes from Greg KH: "Here are some USB driver fixes for 4.3-rc3. There's the usual assortment of new device ids, combined with xhci and gadget driver fixes. Full details in the shortlog. All of these have been in linux-next with no reported problems" * tag 'usb-4.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (34 commits) MAINTAINERS: remove amd5536udc USB gadget driver maintainer USB: whiteheat: fix potential null-deref at probe xhci: init command timeout timer earlier to avoid deleting it uninitialized xhci: change xhci 1.0 only restrictions to support xhci 1.1 usb: xhci: exit early in xhci_setup_device() if we're halted or dying usb: xhci: stop everything on the first call to xhci_stop usb: xhci: Clear XHCI_STATE_DYING on start usb: xhci: lock mutex on xhci_stop xhci: Move xhci_pme_quirk() behind #ifdef CONFIG_PM xhci: give command abortion one more chance before killing xhci usb: Use the USB_SS_MULT() macro to get the burst multiplier. usb: dwc3: gadget: Fix BUG in RT config usb: musb: fix cppi channel teardown for isoch transfer usb: phy: isp1301: Export I2C module alias information usb: gadget: drop null test before destroy functions usb: gadget: dummy_hcd: in transfer(), return data sent, not limit usb: gadget: dummy_hcd: fix rescan logic for transfer usb: gadget: dummy_hcd: fix unneeded else-if condition usb: gadget: dummy_hcd: emulate sending zlp in packet logic usb: musb: dsps: fix polling in device-only mode ...
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/ttyLinus Torvalds authored
Pull serial driver fix from Greg KH: "Here is one serial driver fix for 4.3-rc3 that resolves a module loading issue due to splitting up of the 8250 driver into smaller pieces. It's been in linux-next with no reported problems" * tag 'tty-4.3-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: tty: serial: Add missing module license for 8250_base.ko
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