#define FR2                  0  // Values: 0 (FR1), 1 (FR2)
#define NR_TDD_CONFIG        2  // Values: FR1: 1, 2, 3, 4 (compatible with LTE TDD config 2) FR2: 10
#define N_ANTENNA_DL         2  // Values: 1 (SISO), 2 (MIMO 2x2), 4 (MIMO 4x4)
#define N_ANTENNA_UL         2  // Values: 1, 2, 4
#define NR_BANDWIDTH         {{ slapparameter_dict.get('nr_bandwidth', slap_configuration['configuration.default_nr_bandwidth']) }} // NR cell bandwidth
#define NR_LONG_PUCCH_FORMAT 2  // Values: 2, 3, 4

{
  log_options: "all.level=error,all.max_size=0,nas.level=debug,nas.max_size=1,ngap.level=debug,ngap.max_size=1,xnap.level=debug,xnap.max_size=1,rrc.level=debug,rrc.max_size=1,phy.level=info,file.rotate=1G,file.path=/dev/null",
  log_filename: "{{ directory['log'] }}/gnb.log",

  rf_driver: {
        name: "sdr",
        
        args: "dev0=/dev/sdr0",
        
        // sync: "gps",
        rx_antenna: "tx_rx",
  },
  tx_gain: {{ slapparameter_dict.get('tx_gain', slap_configuration['configuration.default_nr_tx_gain']) }}, 
  rx_gain: {{ slapparameter_dict.get('rx_gain', slap_configuration['configuration.default_nr_rx_gain']) }}, 

  amf_list: [
{% if slapparameter_dict.get('amf_list', '') %}
{%- for i, k in enumerate(slapparameter_dict['amf_list']) %}
{%- if i == 0 %}
    {
{%- else -%}
    , {
{%- endif %}
         amf_addr: "{{ slapparameter_dict['amf_list'][k]['amf_addr'] }}",
    }
{%- endfor -%}
{% else %}
    {
      amf_addr: "127.0.1.100",
    },
{% endif %}
  ],
  
{% if slapparameter_dict.get('amf_list', '') %}
{%   if slapparameter_dict.get('use_ipv4', False) %}
  gtp_addr: "{{ gtp_addr_v4 }}",
{%   else %}
  gtp_addr: "{{ gtp_addr_v6 }}",
{%   endif %}
{% else %}
  gtp_addr: "127.0.1.1",
{% endif %}

  gnb_id_bits: 28,
  gnb_id: {{ slapparameter_dict.get('gnb_id', '0x12345') }},

  nr_support: true,

  rf_ports: [
    {
#if FR2  
      
      rf_dl_freq: 3500, 
      rf_ul_freq: 3500, 
      
      
//      rx_to_tx_latency: 1, 
#endif
    },
  ],

  
  cell_list: [],

  nr_cell_list: [
  {
    rf_port: 0,
    cell_id: 0x01,
    band: {{ slapparameter_dict.get('nr_band', slap_configuration['configuration.default_nr_band']) }},
    dl_nr_arfcn: {{ slapparameter_dict.get('dl_nr_arfcn', slap_configuration['configuration.default_dl_nr_arfcn']) }},
    subcarrier_spacing: 30, 
    ssb_pos_bitmap: "{{ slapparameter_dict.get('ssb_pos_bitmap', slap_configuration['configuration.default_nr_ssb_pos_bitmap']) }}",
  },
  ], 

  nr_cell_default: {
    bandwidth: NR_BANDWIDTH, 
    n_antenna_dl: N_ANTENNA_DL,
    n_antenna_ul: N_ANTENNA_UL,

    
    tdd_ul_dl_config: {
#if NR_TDD_CONFIG == 1
      pattern1: {
        period: 5, 
        dl_slots: 7,
        dl_symbols:  2,
        ul_slots: 2,
        ul_symbols: 2,
      },
#elif NR_TDD_CONFIG == 2
      pattern1: {
        period: 5, 
        dl_slots: 7,
        dl_symbols: 6,
        ul_slots: 2,
        ul_symbols: 4,
      },
#elif NR_TDD_CONFIG == 3
      pattern1: {
        period: 5, 
        dl_slots: 6,
        dl_symbols: 2,
        ul_slots: 3,
        ul_symbols: 2,
      },
#elif NR_TDD_CONFIG == 4
      pattern1: {
        period: 3, 
        dl_slots: 3,
        dl_symbols: 6,
        ul_symbols: 4,
        ul_slots: 2,
      },
      pattern2: {
        period: 2, 
        dl_slots: 4,
        dl_symbols: 0,
        ul_symbols: 0,
        ul_slots: 0,
      },
#elif NR_TDD_CONFIG == 10
      
      pattern1: {
        period: 0.625, 
        dl_slots: 3,
        dl_symbols: 10,
        ul_slots: 1,
        ul_symbols: 2,
      },
#endif
    },
    ssb_period: 20, 
    n_id_cell: {{ slapparameter_dict.get('pci', 500) }},

  plmn_list: [
{%- if slapparameter_dict.get('plmn_list', '') %}
{%- for i, k in enumerate(slapparameter_dict['plmn_list']) %}
{%- if i == 0 -%}
      {
{%- else -%}
      , {
{%- endif %}
      plmn: "{{ slapparameter_dict['plmn_list'][k]['plmn'] }}",
      tac: {{ slapparameter_dict['plmn_list'][k].get('tac', 100) }},
{%- if slapparameter_dict['plmn_list'][k].get('ranac', '') %}
      ranac: {{ slapparameter_dict['plmn_list'][k]['ranac'] }},
{%- endif %}
      reserved: {{ str(slapparameter_dict['plmn_list'][k].get('reserved', false)).lower() }},
      nssai: [
{%- if slapparameter_dict.get('nssai', '') %}
{%- for j, k in enumerate(slapparameter_dict['nssai']) %}
{%- if j == 0 %}
        {
{%- else -%}
        , {
{%- endif %}
         sst: {{ slapparameter_dict['nssai'][k]['sst'] }},
{%- if slapparameter_dict['nssai'][k].get('sd', '') %}
         sd: {{ slapparameter_dict['nssai'][k]['sd'] }},
{%- endif %}
        }
{%- endfor -%}
{% else %}
        {
         sst: 1,
        },
{% endif %}
      ],
      }
{%- endfor -%}
{% else %}
      {
      plmn: "00101",
      tac: 100,
      reserved: false,
      nssai: [
{%- if slapparameter_dict.get('nssai', '') %}
{%- for j, k in enumerate(slapparameter_dict['nssai']) %}
{%- if j == 0 %}
        {
{%- else -%}
        , {
{%- endif %}
         sst: {{ slapparameter_dict['nssai'][k]['sst'] }},
{%- if slapparameter_dict['nssai'][k].get('sd', '') %}
         sd: {{ slapparameter_dict['nssai'][k]['sd'] }},
{%- endif %}
        }
{%- endfor -%}
{% else %}
        {
         sst: 1,
        },
{% endif %}
       ],
      },
{%- endif %}
    ],

    
    si_window_length: 40,

    cell_barred: false,
    intra_freq_reselection: true,
    q_rx_lev_min: -70,
    q_qual_min: -20,
    p_max: 10, 

    root_sequence_index: 1, 

    
    sr_period: 40,

    dmrs_type_a_pos: 2,

    
    //pdsch_harq_ack_max: 2,

    prach: {
#if NR_TDD_CONFIG == 4
      prach_config_index: 156, 
#else
      prach_config_index: 160, 
#endif
      msg1_subcarrier_spacing: 30, 
      msg1_fdm: 1,
      msg1_frequency_start: -1,
      zero_correlation_zone_config: 15,
      preamble_received_target_power: -110, 
      preamble_trans_max: 7,
      power_ramping_step: 4, 
      ra_response_window: 20, 
      restricted_set_config: "unrestricted_set",
      ra_contention_resolution_timer: 64, 
      ssb_per_prach_occasion: 1,
      cb_preambles_per_ssb: 8,
    },

    pdcch: {
      search_space0_index: 0,

      dedicated_coreset: {
        rb_start: -1, 
        l_crb: -1, 
        duration: 0, 
        precoder_granularity: "sameAsREG_bundle",
      },

      css: {
        n_candidates: [ 0, 0, 1, 0, 0 ],
      },
      rar_al_index: 2,
      si_al_index: 2,

      uss: {
        n_candidates: [ 0, 2, 1, 0, 0 ],
        dci_0_1_and_1_1: true,
      },
      al_index: 1,
    },

    pdsch: {
      mapping_type: "typeA",
      dmrs_add_pos: 1,
      dmrs_type: 1,
      dmrs_max_len: 1,
      
      
      mcs_table: "qam256",
      rar_mcs: 2,
      si_mcs: 6,
      
      
    },

    csi_rs: {
      nzp_csi_rs_resource: [
        {
          csi_rs_id: 0,
#if N_ANTENNA_DL == 1
          n_ports: 1,
          frequency_domain_allocation: "row2",
          bitmap: "100000000000",
          cdm_type: "no_cdm",
#elif N_ANTENNA_DL == 2
          n_ports: 2,
          frequency_domain_allocation: "other",
          bitmap: "100000",
          cdm_type: "fd_cdm2",
#elif N_ANTENNA_DL == 4
          n_ports: 4,
          frequency_domain_allocation: "row4",
          bitmap: "100",
          cdm_type: "fd_cdm2",
#elif N_ANTENNA_DL == 8
          n_ports: 8,
          frequency_domain_allocation: "other",
          bitmap: "110011",
          cdm_type: "fd_cdm2",
#else
#error unsupported number of DL antennas
#endif
          density: 1,
          first_symb: 4,
          rb_start: 0,
          l_crb: -1, 
          power_control_offset: 0, 
          power_control_offset_ss: 0, 
          period: 80,
          offset: 1, 
          qcl_info_periodic_csi_rs: 0,
        },
#if FR2 == 0
#define USE_TRS
#endif
#ifdef USE_TRS
        
        {
          csi_rs_id: 1,
          n_ports: 1,
          frequency_domain_allocation: "row1",
          bitmap: "0001",
          cdm_type: "no_cdm",
          density: 3,
          first_symb: 4,
          rb_start: 0,
          l_crb: -1, 
          power_control_offset: 0, 
          power_control_offset_ss: 0, 
          period: 40,
          offset: 11,
          qcl_info_periodic_csi_rs: 0,
        },
        {
          csi_rs_id: 2,
          n_ports: 1,
          frequency_domain_allocation: "row1",
          bitmap: "0001",
          cdm_type: "no_cdm",
          density: 3,
          first_symb: 8,
          rb_start: 0,
          l_crb: -1, 
          power_control_offset: 0, 
          power_control_offset_ss: 0, 
          period: 40,
          offset: 11,
          qcl_info_periodic_csi_rs: 0,
        },
        {
          csi_rs_id: 3,
          n_ports: 1,
          frequency_domain_allocation: "row1",
          bitmap: "0001",
          cdm_type: "no_cdm",
          density: 3,
          first_symb: 4,
          rb_start: 0,
          l_crb: -1, 
          power_control_offset: 0, 
          power_control_offset_ss: 0, 
          period: 40,
          offset: 12,
          qcl_info_periodic_csi_rs: 0,
        },
        {
          csi_rs_id: 4,
          n_ports: 1,
          frequency_domain_allocation: "row1",
          bitmap: "0001",
          cdm_type: "no_cdm",
          density: 3,
          first_symb: 8,
          rb_start: 0,
          l_crb: -1, 
          power_control_offset: 0, 
          power_control_offset_ss: 0, 
          period: 40,
          offset: 12,
          qcl_info_periodic_csi_rs: 0,
        },
#endif
      ],
      nzp_csi_rs_resource_set: [
        {
          csi_rs_set_id: 0,
          nzp_csi_rs_resources: [ 0 ],
          repetition: false,
        },
#ifdef USE_TRS
        {
          csi_rs_set_id: 1,
          nzp_csi_rs_resources: [ 1, 2, 3, 4 ],
          repetition: false,
          trs_info: true,
        },
#endif
      ],
      
     csi_im_resource: [
        {
          csi_im_id: 0,
          pattern: 1,
          subcarrier_location: 8,
          symbol_location: 8,
          rb_start: 0,
          l_crb: -1, 
          period: 80,
          offset: 1, 
        },
      ],
      csi_im_resource_set: [
        {
          csi_im_set_id: 0,
          csi_im_resources: [ 0 ],
        }
      ],
      
      zp_csi_rs_resource: [
        {
          csi_rs_id: 0,
          frequency_domain_allocation: "row4",
          bitmap: "100",
          n_ports: 4,
          cdm_type: "fd_cdm2",
          first_symb: 8,
          density: 1,
          rb_start: 0,
          l_crb: -1, 
          period: 80,
          offset: 1,
        },
      ],
      p_zp_csi_rs_resource_set: [
        {
          zp_csi_rs_resources: [ 0 ],
        },
      ],

      csi_resource_config: [
        {
          csi_rsc_config_id: 0,
          nzp_csi_rs_resource_set_list: [ 0 ],
          resource_type: "periodic",
        },
        {
          csi_rsc_config_id: 1,
          csi_im_resource_set_list: [ 0 ],
          resource_type: "periodic",
        },
#ifdef USE_TRS
        {
          csi_rsc_config_id: 2,
          nzp_csi_rs_resource_set_list: [ 1 ],
          resource_type: "periodic",
        },
#endif
      ],
      csi_report_config: [
        {
          resources_for_channel_measurement: 0,
          csi_im_resources_for_interference: 1,
          report_config_type: "periodic",
          period: 80,
          report_quantity: "CRI_RI_PMI_CQI",
#if N_ANTENNA_DL > 1    
          codebook_config: {
            codebook_type: "type1",
            sub_type: "typeI_SinglePanel",
#if N_ANTENNA_DL == 2
#elif N_ANTENNA_DL == 4
            n1: 2,
            n2: 1,
            codebook_mode: 1,
#elif N_ANTENNA_DL == 8
            n1: 4,
            n2: 1,
            codebook_mode: 1,
#endif
          },
#endif
          cqi_table: 2,
          subband_size: "value1",
        },
      ],
    },
    
    pucch: {
      pucch_group_hopping: "neither",
      hopping_id: -1, 
      p0_nominal: -90,
#if 0
        pucch0: {
          initial_cyclic_shift: 1,
          n_symb: 1,
        },
#else
        pucch1: {
          n_cs: 3,
          n_occ: 3,
          freq_hopping: true,
        },
#endif
#if NR_LONG_PUCCH_FORMAT == 2
        pucch2: {
          n_symb: 2,
          n_prb: 1,
          freq_hopping: true,
          simultaneous_harq_ack_csi: false,
          max_code_rate: 0.25,
        },
#elif NR_LONG_PUCCH_FORMAT == 3
        pucch3: {
          bpsk: false,
          additional_dmrs: false,
          freq_hopping: true,
          n_prb: 1,
          simultaneous_harq_ack_csi: true,
          max_code_rate: 0.25,
        },
#elif NR_LONG_PUCCH_FORMAT == 4
        pucch4: {
          occ_len: 4,
          bpsk: false,
          additional_dmrs: false,
          freq_hopping: true,
          simultaneous_harq_ack_csi: true,
          max_code_rate: 0.25,
        },
#endif
    },

    pusch: {
      mapping_type: "typeA",
      n_symb: 14,
      dmrs_add_pos: 1,
      dmrs_type: 1,
      dmrs_max_len: 1,
      tf_precoding: false,
      mcs_table: "qam256", 
      mcs_table_tp: "qam256", 
      ldpc_max_its: 5,
      
      p0_nominal_with_grant: -76,
      msg3_mcs: 4,
      msg3_delta_power: 0, 
      beta_offset_ack_index: 9,

      
      
    },

    
    mac_config: {
      msg3_max_harq_tx: 5,
      ul_max_harq_tx: 5, 
      dl_max_harq_tx: 5, 
      ul_max_consecutive_retx: 30, 
      dl_max_consecutive_retx: 30, 
      periodic_bsr_timer: 20,
      retx_bsr_timer: 320,
      periodic_phr_timer: 500,
      prohibit_phr_timer: 200,
      phr_tx_power_factor_change: "dB3",
      sr_prohibit_timer: 0, 
      sr_trans_max: 64,
    },

    cipher_algo_pref: [],
    integ_algo_pref: [2, 1],

    inactivity_timer: 10000,

#ifndef EPS_FALLBACK
#define EPS_FALLBACK 0
#endif


    drb_config: [
  
  {
    qci: 1, 
    use_for_en_dc: false,
#if EPS_FALLBACK > 0
    trigger_eps_fallback: true,
#endif
    ims_dedicated_bearer: true,
    pdcp_config: {
      discardTimer: 100, 
      pdcp_SN_SizeUL: 12,
      pdcp_SN_SizeDL: 12,
      statusReportRequired: false,
      outOfOrderDelivery: false,
      t_Reordering: 0,
      
      
    },
    rlc_config: {
      ul_um: {
        sn_FieldLength: 6,
      },
      dl_um: {
        sn_FieldLength: 6,
        t_Reassembly: 50,
      },
    },
    logical_channel_config: {
      priority: 7,
      prioritisedBitRate: 0, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 1,
    },
  },
  {
    qci: 2, 
    use_for_en_dc: false,
#if EPS_FALLBACK > 0
    trigger_eps_fallback: true,
#endif
    ims_dedicated_bearer: true,
    pdcp_config: {
      discardTimer: 150, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: false,
      outOfOrderDelivery: false,
      t_Reordering: 0,
    },
    rlc_config: {
      ul_um: {
        sn_FieldLength: 12,
      },
      dl_um: {
        sn_FieldLength: 12,
        t_Reassembly: 50,
      },
    },
    logical_channel_config: {
      priority: 8,
      prioritisedBitRate: 0, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 1,
    },
  },
  {
    qci: 3, 
    pdcp_config: {
      discardTimer: 100, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: false,
      outOfOrderDelivery: false,
      t_Reordering: 0,
    },
    rlc_config: {
      ul_um: {
        sn_FieldLength: 12,
      },
      dl_um: {
        sn_FieldLength: 12,
        t_Reassembly: 50,
      },
    },
    logical_channel_config: {
      priority: 7,
      prioritisedBitRate: 0, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 2,
    },
  },
  {
    qci: 4, 
    pdcp_config: {
      discardTimer: 0, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: true,
      outOfOrderDelivery: false,
    },
    rlc_config: {
      ul_am: {
        sn_FieldLength: 18,
        t_PollRetransmit: 80, 
        pollPDU: 64,
        pollByte: 125, 
        maxRetxThreshold: 4,
      },
      dl_am: {
        sn_FieldLength: 18,
        t_Reassembly: 80, 
        t_StatusProhibit: 10, 
      },
    },
    logical_channel_config: {
      priority: 9,
      prioritisedBitRate: 8, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 3,
    },
  },
  {
    qci: 65, 
    use_for_en_dc: false,
#if EPS_FALLBACK > 0
    trigger_eps_fallback: true,
#endif
    ims_dedicated_bearer: true,
    pdcp_config: {
      discardTimer: 100, 
      pdcp_SN_SizeUL: 12,
      pdcp_SN_SizeDL: 12,
      statusReportRequired: false,
      outOfOrderDelivery: false,
      t_Reordering: 0,
      
      
    },
    rlc_config: {
      ul_um: {
        sn_FieldLength: 6,
      },
      dl_um: {
        sn_FieldLength: 6,
        t_Reassembly: 50,
      },
    },
    logical_channel_config: {
      priority: 5,
      prioritisedBitRate: 0, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 4,
    },
  },
  {
    qci: 66, 
    use_for_en_dc: false,
#if EPS_FALLBACK > 0
    trigger_eps_fallback: true,
#endif
    ims_dedicated_bearer: true,
    pdcp_config: {
      discardTimer: 150, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: false,
      outOfOrderDelivery: false,
      t_Reordering: 0,
    },
    rlc_config: {
      ul_um: {
        sn_FieldLength: 12,
      },
      dl_um: {
        sn_FieldLength: 12,
        t_Reassembly: 50,
      },
    },
    logical_channel_config: {
      priority: 7,
      prioritisedBitRate: 0, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 4,
    },
  },
  {
    qci: 67, 
    use_for_en_dc: false,
#if EPS_FALLBACK > 0
    trigger_eps_fallback: true,
#endif
    ims_dedicated_bearer: true,
    pdcp_config: {
      discardTimer: 100, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: false,
      outOfOrderDelivery: false,
      t_Reordering: 0,
    },
    rlc_config: {
      ul_um: {
        sn_FieldLength: 12,
      },
      dl_um: {
        sn_FieldLength: 12,
        t_Reassembly: 50,
      },
    },
    logical_channel_config: {
      priority: 6,
      prioritisedBitRate: 0, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 5,
    },
  },
  
  {
    qci: 5, 
    use_for_en_dc: false,
    pdcp_config: {
      discardTimer: 0, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: true,
      outOfOrderDelivery: false,
    },
    rlc_config: {
      ul_am: {
        sn_FieldLength: 18,
        t_PollRetransmit: 80, 
        pollPDU: 64,
        pollByte: 125, 
        maxRetxThreshold: 4,
      },
      dl_am: {
        sn_FieldLength: 18,
        t_Reassembly: 80, 
        t_StatusProhibit: 10, 
      },
    },
    logical_channel_config: {
      priority: 6,
      prioritisedBitRate: 8, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 4,
    },
  },
  {
    qci: 6, 
    pdcp_config: {
      discardTimer: 0, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: true,
      outOfOrderDelivery: false,
    },
    rlc_config: {
      ul_am: {
        sn_FieldLength: 18,
        t_PollRetransmit: 80, 
        pollPDU: 64,
        pollByte: 125, 
        maxRetxThreshold: 4,
      },
      dl_am: {
        sn_FieldLength: 18,
        t_Reassembly: 80, 
        t_StatusProhibit: 10, 
      },
    },
    logical_channel_config: {
      priority: 10,
      prioritisedBitRate: 8, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 5,
    },
  },
  {
    qci: 7, 
    pdcp_config: {
      discardTimer: 100, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: false,
      outOfOrderDelivery: false,
      t_Reordering: 0,
    },
    rlc_config: {
      ul_um: {
        sn_FieldLength: 12,
      },
      dl_um: {
        sn_FieldLength: 12,
        t_Reassembly: 50,
      },
    },
    logical_channel_config: {
      priority: 11,
      prioritisedBitRate: 0, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 6,
    },
  },
  {
    qci: 8, 
    pdcp_config: {
      discardTimer: 0, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: true,
      outOfOrderDelivery: false,
    },
    rlc_config: {
      ul_am: {
        sn_FieldLength: 18,
        t_PollRetransmit: 80, 
        pollPDU: 64,
        pollByte: 125, 
        maxRetxThreshold: 4,
      },
      dl_am: {
        sn_FieldLength: 18,
        t_Reassembly: 80, 
        t_StatusProhibit: 10, 
      },
    },
    logical_channel_config: {
      priority: 12,
      prioritisedBitRate: 8, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 7,
    },
  },
  {
    qci: 9, 
    pdcp_config: {
      discardTimer: 0, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: true,
      outOfOrderDelivery: false,
    },
    rlc_config: {
      ul_am: {
        sn_FieldLength: 18,
        t_PollRetransmit: 80, 
        pollPDU: 64,
        pollByte: 125, 
        maxRetxThreshold: 4,
      },
      dl_am: {
        sn_FieldLength: 18,
        t_Reassembly: 80, 
        t_StatusProhibit: 10, 
      },
    },
    logical_channel_config: {
      priority: 13,
      prioritisedBitRate: 8, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 7,
    },
  },
  {
    qci: 69, 
    use_for_en_dc: false,
    pdcp_config: {
      discardTimer: 0, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: true,
      outOfOrderDelivery: false,
    },
    rlc_config: {
      ul_am: {
        sn_FieldLength: 18,
        t_PollRetransmit: 80, 
        pollPDU: 64,
        pollByte: 125, 
        maxRetxThreshold: 4,
      },
      dl_am: {
        sn_FieldLength: 18,
        t_Reassembly: 80, 
        t_StatusProhibit: 10, 
      },
    },
    logical_channel_config: {
      priority: 4,
      prioritisedBitRate: 8, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 4,
    },
  },
  {
    qci: 70, 
    pdcp_config: {
      discardTimer: 0, 
      pdcp_SN_SizeUL: 18,
      pdcp_SN_SizeDL: 18,
      statusReportRequired: true,
      outOfOrderDelivery: false,
    },
    rlc_config: {
      ul_am: {
        sn_FieldLength: 18,
        t_PollRetransmit: 80, 
        pollPDU: 64,
        pollByte: 125, 
        maxRetxThreshold: 4,
      },
      dl_am: {
        sn_FieldLength: 18,
        t_Reassembly: 80, 
        t_StatusProhibit: 10, 
      },
    },
    logical_channel_config: {
      priority: 11,
      prioritisedBitRate: 8, 
      bucketSizeDuration: 100, 
      logicalChannelGroup: 5,
    },
  },
],

  },
}