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Titouan Soulard
slapos
Commits
753e9402
Commit
753e9402
authored
Aug 10, 2023
by
Lu Xu
👀
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software/ors-amarisoft: 4T4R supported for lopcomm RU
parent
a7225929
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software/ors-amarisoft/netconf/cu_config.jinja2.xml
software/ors-amarisoft/netconf/cu_config.jinja2.xml
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software/ors-amarisoft/netconf/cu_config.jinja2.xml
View file @
753e9402
<config
xmlns=
"urn:ietf:params:xml:ns:netconf:base:1.0"
>
<xc:config
xmlns:xc=
"urn:ietf:params:xml:ns:netconf:base:1.0"
>
<user-plane-configuration
xc:operation=
"replace"
xmlns=
"urn:o-ran:uplane-conf-option8:1.0"
>
<!-- low-level-t[r]x-links -->
<low-level-tx-links>
<name>
TXA0P00C00
</name>
<processing-element>
PE0
</processing-element>
<tx-array-carrier>
TXA0CC00
</tx-array-carrier>
<low-level-tx-endpoint>
TXA0P00C00
</low-level-tx-endpoint>
</low-level-tx-links>
<low-level-tx-links>
<name>
TXA0P01C00
</name>
<processing-element>
PE0
</processing-element>
<tx-array-carrier>
TXA0CC00
</tx-array-carrier>
<low-level-tx-endpoint>
TXA0P01C00
</low-level-tx-endpoint>
</low-level-tx-links>
<low-level-tx-links>
<name>
TXA0P02C00
</name>
<processing-element>
PE0
</processing-element>
<tx-array-carrier>
TXA0CC00
</tx-array-carrier>
<low-level-tx-endpoint>
TXA0P02C00
</low-level-tx-endpoint>
</low-level-tx-links>
<low-level-tx-links>
<name>
TXA0P03C00
</name>
<processing-element>
PE0
</processing-element>
<tx-array-carrier>
TXA0CC00
</tx-array-carrier>
<low-level-tx-endpoint>
TXA0P03C00
</low-level-tx-endpoint>
</low-level-tx-links>
<low-level-rx-links>
<name>
RXA0P00C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<low-level-rx-endpoint>
RXA0P00C00
</low-level-rx-endpoint>
</low-level-rx-links>
<low-level-rx-links>
<name>
PRACH0P00C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<low-level-rx-endpoint>
PRACH0P00C00
</low-level-rx-endpoint>
</low-level-rx-links>
<low-level-rx-links>
<name>
RXA0P01C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<low-level-rx-endpoint>
RXA0P01C00
</low-level-rx-endpoint>
</low-level-rx-links>
<low-level-rx-links>
<name>
PRACH0P01C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<low-level-rx-endpoint>
PRACH0P01C00
</low-level-rx-endpoint>
</low-level-rx-links>
<low-level-rx-links>
<name>
RXA0P02C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<low-level-rx-endpoint>
RXA0P02C00
</low-level-rx-endpoint>
</low-level-rx-links>
<low-level-rx-links>
<name>
PRACH0P02C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<low-level-rx-endpoint>
PRACH0P02C00
</low-level-rx-endpoint>
</low-level-rx-links>
<low-level-rx-links>
<name>
RXA0P03C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<low-level-rx-endpoint>
RXA0P03C00
</low-level-rx-endpoint>
</low-level-rx-links>
<low-level-rx-links>
<name>
PRACH0P03C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<low-level-rx-endpoint>
PRACH0P03C00
</low-level-rx-endpoint>
</low-level-rx-links>
<!-- low-level-t[r]x-endpoints -->
<low-level-tx-endpoints>
<name>
TXA0P00C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
0
</eaxc-id>
</e-axcid>
</low-level-tx-endpoints>
<low-level-tx-endpoints>
<name>
TXA0P01C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
1
</eaxc-id>
</e-axcid>
</low-level-tx-endpoints>
<low-level-tx-endpoints>
<name>
TXA0P02C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
2
</eaxc-id>
</e-axcid>
</low-level-tx-endpoints>
<low-level-tx-endpoints>
<name>
TXA0P03C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
3
</eaxc-id>
</e-axcid>
</low-level-tx-endpoints>
<low-level-rx-endpoints>
<name>
RXA0P00C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
0
</eaxc-id>
</e-axcid>
<non-time-managed-delay-enabled>
false
</non-time-managed-delay-enabled>
</low-level-rx-endpoints>
<low-level-rx-endpoints>
<name>
PRACH0P00C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
8
</eaxc-id>
</e-axcid>
<non-time-managed-delay-enabled>
false
</non-time-managed-delay-enabled>
</low-level-rx-endpoints>
<low-level-rx-endpoints>
<name>
RXA0P01C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
1
</eaxc-id>
</e-axcid>
<non-time-managed-delay-enabled>
false
</non-time-managed-delay-enabled>
</low-level-rx-endpoints>
<low-level-rx-endpoints>
<name>
PRACH0P01C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
9
</eaxc-id>
</e-axcid>
<non-time-managed-delay-enabled>
false
</non-time-managed-delay-enabled>
</low-level-rx-endpoints>
<low-level-rx-endpoints>
<name>
RXA0P02C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
2
</eaxc-id>
</e-axcid>
<non-time-managed-delay-enabled>
false
</non-time-managed-delay-enabled>
</low-level-rx-endpoints>
<low-level-rx-endpoints>
<name>
PRACH0P02C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
10
</eaxc-id>
</e-axcid>
<non-time-managed-delay-enabled>
false
</non-time-managed-delay-enabled>
</low-level-rx-endpoints>
<low-level-rx-endpoints>
<name>
RXA0P03C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
3
</eaxc-id>
</e-axcid>
<non-time-managed-delay-enabled>
false
</non-time-managed-delay-enabled>
</low-level-rx-endpoints>
<low-level-rx-endpoints>
<name>
PRACH0P03C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
11
</eaxc-id>
</e-axcid>
<non-time-managed-delay-enabled>
false
</non-time-managed-delay-enabled>
</low-level-rx-endpoints>
<!-- t[r]x-array-carriers -->
<tx-links>
<name>
TXA0P00C00
</name>
<processing-element>
PE0
</processing-element>
<tx-array-carrier>
TXA0CC00
</tx-array-carrier>
<tx-endpoint>
TXA0P00C00
</tx-endpoint>
</tx-links>
{% if slapparameter_dict.get('n_antenna_dl') == 4 %}
<tx-links>
<name>
TXA0P01C00
</name>
<processing-element>
PE0
</processing-element>
<tx-array-carrier>
TXA0CC00
</tx-array-carrier>
<tx-endpoint>
TXA0P01C00
</tx-endpoint>
</tx-links>
{% endif %}
<tx-links>
<name>
TXA0P00C01
</name>
<processing-element>
PE0
</processing-element>
<tx-array-carrier>
TXA0CC00
</tx-array-carrier>
<tx-endpoint>
TXA0P00C01
</tx-endpoint>
</tx-links>
{% if slapparameter_dict.get('n_antenna_dl') == 4 %}
<tx-links>
<name>
TXA0P01C01
</name>
<processing-element>
PE0
</processing-element>
<tx-array-carrier>
TXA0CC00
</tx-array-carrier>
<tx-endpoint>
TXA0P01C01
</tx-endpoint>
</tx-links>
{% endif %}
<rx-links>
<name>
RXA0P00C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<rx-endpoint>
RXA0P00C00
</rx-endpoint>
</rx-links>
<rx-links>
<name>
PRACH0P00C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<rx-endpoint>
PRACH0P00C00
</rx-endpoint>
</rx-links>
{% if slapparameter_dict.get('n_antenna_dl') == 4 %}
<rx-links>
<name>
RXA0P01C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<rx-endpoint>
RXA0P01C00
</rx-endpoint>
</rx-links>
<rx-links>
<name>
PRACH0P01C00
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<rx-endpoint>
PRACH0P01C00
</rx-endpoint>
</rx-links>
{% endif %}
<rx-links>
<name>
RXA0P00C01
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<rx-endpoint>
RXA0P00C01
</rx-endpoint>
</rx-links>
<rx-links>
<name>
PRACH0P00C01
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<rx-endpoint>
PRACH0P00C01
</rx-endpoint>
</rx-links>
{% if slapparameter_dict.get('n_antenna_dl') == 4 %}
<rx-links>
<name>
RXA0P01C01
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<rx-endpoint>
RXA0P01C01
</rx-endpoint>
</rx-links>
<rx-links>
<name>
PRACH0P01C01
</name>
<processing-element>
PE0
</processing-element>
<rx-array-carrier>
RXA0CC00
</rx-array-carrier>
<rx-endpoint>
PRACH0P01C01
</rx-endpoint>
</rx-links>
{% endif %}
<tx-endpoints>
<name>
TXA0P00C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
0
</eaxc-id>
</e-axcid>
</tx-endpoints>
{% if slapparameter_dict.get('n_antenna_dl') == 4 %}
<tx-endpoints>
<name>
TXA0P01C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
2
</eaxc-id>
</e-axcid>
</tx-endpoints>
{% endif %}
<tx-endpoints>
<name>
TXA0P00C01
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
1
</eaxc-id>
</e-axcid>
</tx-endpoints>
{% if slapparameter_dict.get('n_antenna_dl') == 4 %}
<tx-endpoints>
<name>
TXA0P01C01
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
3
</eaxc-id>
</e-axcid>
</tx-endpoints>
{% endif %}
<rx-endpoints>
<name>
RXA0P00C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
0
</eaxc-id>
</e-axcid>
</rx-endpoints>
<rx-endpoints>
<name>
PRACH0P00C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
8
</eaxc-id>
</e-axcid>
</rx-endpoints>
{% if slapparameter_dict.get('n_antenna_dl') == 4 %}
<rx-endpoints>
<name>
RXA0P01C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
2
</eaxc-id>
</e-axcid>
</rx-endpoints>
<rx-endpoints>
<name>
PRACH0P01C00
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
9
</eaxc-id>
</e-axcid>
</rx-endpoints>
{% endif %}
<rx-endpoints>
<name>
RXA0P00C01
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
1
</eaxc-id>
</e-axcid>
</rx-endpoints>
<rx-endpoints>
<name>
PRACH0P00C01
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
24
</eaxc-id>
</e-axcid>
</rx-endpoints>
{% if slapparameter_dict.get('n_antenna_dl') == 4 %}
<rx-endpoints>
<name>
RXA0P01C01
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
3
</eaxc-id>
</e-axcid>
</rx-endpoints>
<rx-endpoints>
<name>
PRACH0P01C01
</name>
<e-axcid>
<o-du-port-bitmask>
61440
</o-du-port-bitmask>
<band-sector-bitmask>
3968
</band-sector-bitmask>
<ccid-bitmask>
112
</ccid-bitmask>
<ru-port-bitmask>
15
</ru-port-bitmask>
<eaxc-id>
25
</eaxc-id>
</e-axcid>
</rx-endpoints>
{% endif %}
<tx-array-carriers>
<name>
TXA0CC00
</name>
<absolute-frequency-center>
{{ slapparameter_dict.get('txa0cc00_center_frequency_earfcn', 300) }}
</absolute-frequency-center>
<absolute-frequency-center>
{{ slapparameter_dict.get('txa0cc00_center_frequency_earfcn', 300) }}
</absolute-frequency-center>
<center-of-channel-bandwidth>
{{ slapparameter_dict.get('txa0cc00_center_frequency', 2140000000) }}
</center-of-channel-bandwidth>
<channel-bandwidth>
{{ slapparameter_dict.get('txa0cc00_bandwidth', 20000000) }}
</channel-bandwidth>
<active>
{{ slapparameter_dict.get('txa0cc00_active', 'INACTIVE') }}
</active>
<rw-type>
LTE
</rw-type>
<rw-duplex-scheme>
FDD
</rw-duplex-scheme>
<gain>
50
</gain>
<gain>
{{ slapparameter_dict.get('txa0cc00_gain', '-20') }}
</gain>
<downlink-radio-frame-offset>
0
</downlink-radio-frame-offset>
<downlink-sfn-offset>
0
</downlink-sfn-offset>
</tx-array-carriers>
<rx-array-carriers>
<name>
RXA0CC00
</name>
<absolute-frequency-center>
{{ slapparameter_dict.get('rxa0cc00_center_frequency_earfcn', 18300) }}
</absolute-frequency-center>
<center-of-channel-bandwidth>
{{ slapparameter_dict.get('rxa0cc00_center_frequency', 1950000000) }}
</center-of-channel-bandwidth>
<channel-bandwidth>
{{ slapparameter_dict.get('rxa0cc00_bandwidth', 20000000) }}
</channel-bandwidth>
<absolute-frequency-center>
{{ slapparameter_dict.get('rxa0cc00_center_frequency_earfcn', 18300) }}
</absolute-frequency-center>
<center-of-channel-bandwidth>
{{ slapparameter_dict.get('rxa0cc00_center_frequency', 1950000000) }}
</center-of-channel-bandwidth>
<channel-bandwidth>
{{ slapparameter_dict.get('rxa0cc00_bandwidth', 20000000) }}
</channel-bandwidth>
<active>
{{ slapparameter_dict.get('rxa0cc00_active', 'INACTIVE') }}
</active>
<downlink-radio-frame-offset>
0
</downlink-radio-frame-offset>
<downlink-sfn-offset>
0
</downlink-sfn-offset>
<gain-correction>
0.0
</gain-correction>
<n-ta-offset>
0
</n-ta-offset>
</rx-array-carriers>
</config>
\ No newline at end of file
</user-plane-configuration>
</xc:config>
\ No newline at end of file
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