1. Half twins is 8xSFP+ and 8xSFP with OCPv3 NIC support board
2. Using SD1=8S (PLLF=100MHz, PLLS=161.132825MHz) runtime downgrade from
10G to 1G, according to SFP module inserted is not supported
3. Reverted default DDR speed to 3200
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>