Commit 07047528 authored by Rabeeh Khoury's avatar Rabeeh Khoury

Move to LSDK 19.09 with some new features

This patch holds the following modifications and support -
1. Added support to LSDK 19.09. Notice that conflicting patch
directories will hold the release prefix (look at patch/linux-*).
2. We don't use lsdk.config config file any more and added the required
kernel driver via lx2k_additions.config file
3. Add 4 eeprom support (512Kb I2C bootable, two SPD and 2Kb for misc)
Signed-off-by: default avatarRabeeh Khoury <rabeeh@solid-run.com>
parent 6797449d
CONFIG_GPIO_SYSFS=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_NET_PKTGEN=y
CONFIG_USB_SERIAL=y
CONFIG_USB_SERIAL_CONSOLE=y
CONFIG_USB_SERIAL_GENERIC=y
......@@ -22,5 +25,14 @@ CONFIG_DRM_AMD_DC=y
CONFIG_CHASH=m
CONFIG_PMBUS=y
CONFIG_SENSORS_PMBUS=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_PWM=y
CONFIG_SENSORS_AMC6821=y
CONFIG_SENSORS_LM90=y
CONFIG_SENSORS_LTC2978=y
CONFIG_SENSORS_LTC2978_REGULATOR=y
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TMPFS_XATTR=y
CONFIG_BLK_DEV_RAM_SIZE=524288
From 05acb6ecc8eb7426c4664a1e8fd22ad69256d541 Mon Sep 17 00:00:00 2001
From: Rabeeh Khoury <rabeeh@solid-run.com>
Date: Sun, 26 Jan 2020 15:36:07 +0200
Subject: [PATCH] arm64: dts: lx2160a-cex7: add on-module eeproms
This patch adds 4 eeprom support on i2c mux channel #0 -
1. Bootable 512Kbit eeprom at address 0x50.
2. Memory SO-DIMMs SPD channels at 0x51 (upper SO-DIMM) and 0x53.
3. 2Kb eeprom at 0x57 will be used by SolidRun to hold manufacturing
data.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
---
.../boot/dts/freescale/fsl-lx2160a-cex7.dts | 22 ++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
index 1c1a0d47897d..2b8f1118b37a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
@@ -81,7 +81,27 @@ I2C switch -
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
-
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+ 24aa512@50 {
+ compatible = "atmel,24c512";
+ reg = <0x50>;
+ };
+ spd1@51 {
+ compatible = "atmel,spd";
+ reg = <0x51>;
+ };
+ spd2@53 {
+ compatible = "atmel,spd";
+ reg = <0x53>;
+ };
+ m24c02@57 {
+ compatible = "atmel,24c02";
+ reg = <0x57>;
+ };
+ };
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1
From 7eedfa6d3725d1a10499a14415d34de1b4666e7a Mon Sep 17 00:00:00 2001
From: Rabeeh Khoury <rabeeh@solid-run.com>
Date: Sun, 28 Jul 2019 14:18:55 +0300
Subject: [PATCH 1/3] arm64: dts: lx2160a: add lx2160acex7 device tree build
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
---
arch/arm64/boot/dts/freescale/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index c46538f38181..3a72b3d3a67a 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -29,3 +29,4 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-cex7.dtb
--
2.17.1
From 35dc5b03bb8f7b93fb474c39d7689d39062ff81a Mon Sep 17 00:00:00 2001
From: Rabeeh Khoury <rabeeh@solid-run.com>
Date: Sun, 28 Jul 2019 14:21:06 +0300
Subject: [PATCH 2/3] arm64: dts: lx2160a: add lx2160acex7 device tree
The device tree enables the following features -
1. dpmac17 RGMII MAC connected to Atheros AR8035 phy
2. 2x MDIO busses
3. 2x USB 3.0 controllers
4. 4x SATA ports
5. MT35X 512Mb SPI flash
6. Temperature sensor on i2c0 channel 3
7. AMC6821 temperature and PWM fan controller
The module supports AMC6821 and EMC2301 PWM controllers where either can
be assembled, but not both together since the PWM and TACH signals are
shared between them.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
---
.../boot/dts/freescale/fsl-lx2160a-cex7.dts | 190 ++++++++++++++++++
1 file changed, 190 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
new file mode 100644
index 000000000000..872fcf9e724d
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
@@ -0,0 +1,190 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+//
+// Device Tree file for LX2160A-CEx7
+//
+// Copyright 2019 SolidRun ltd.
+
+/dts-v1/;
+
+#include "fsl-lx2160a.dtsi"
+
+/ {
+ model = "SolidRun LX2160A COM express type 7 module";
+ compatible = "fsl,lx2160a-cex7", "fsl,lx2160a";
+
+ aliases {
+ crypto = &crypto;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ sb_3v3: regulator-sb3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "RT7290";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&crypto {
+ status = "okay";
+};
+
+&esdhc0 {
+ sd-uhs-sdr104;
+ sd-uhs-sdr50;
+ sd-uhs-sdr25;
+ sd-uhs-sdr12;
+ status = "okay";
+};
+
+&esdhc1 {
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ bus-width = <8>;
+ status = "okay";
+};
+
+
+/*
+i2c busses are -
+/dev/i2c0 - CTRL #0 - connected to PCA9547 I2C switch
+/dev/i2c1 - CTRL #2 - COM module to carrier (general I2C_CK/I2C_DAT)
+/dev/i2c2 - CTRL #4 - Connected to RTC PCF2129AT (0x51), EEPROM (0x54,0x55,0x56,0x57)
+
+I2C switch -
+/dev/i2c3 - CH0 - SO-DIMMs SPD (0x51, 0x53), 2Kb EEPROM (0x57), bootable 512Kb eeprom (0x50)
+/dev/i2c4 - CH1 - 100MHz clk gen (address 0x6a)
+/dev/i2c5 - CH2 - LTC3882 DC-DC controller on 0x63
+/dev/i2c6 - CH3 - SA56004ED (0x4c), SA56004FD (0x4d), COM module SMB_CK,SMB_DAT and COM module 10G_LED_SDA,10G_LED_SCL
+/dev/i2c7 - CH4 - SFP #0 I2C
+/dev/i2c8 - CH5 - SFP #1 I2C
+/dev/i2c9 - CH6 - SFP #2 I2C
+/dev/i2c10 - CH7 - SFP #3 I2C
+
+
+*/
+
+
+
+&i2c0 {
+ status = "okay";
+
+ i2c-mux@77 {
+ compatible = "nxp,pca9547";
+ reg = <0x77>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x1>;
+ fan-temperature-ctrlr@18 {
+ compatible = "ti,amc6821";
+ reg = <0x18>;
+ cooling-min-state = <0>;
+ cooling-max-state = <9>;
+ #cooling-cells = <2>;
+ };
+ };
+ i2c@3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x3>;
+
+ temperature-sensor@48 {
+ compatible = "nxp,sa56004";
+ reg = <0x48>;
+ vcc-supply = <&sb_3v3>;
+ };
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+
+ rtc@51 {
+ compatible = "nxp,pcf2129";
+ reg = <0x51>;
+ // IRQ10_B
+ interrupts = <0 150 0x4>;
+ };
+};
+
+&fspi {
+ status = "okay";
+ flash0: mt35xu512aba@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "micron,m25p80";
+ m25p,fast-read;
+ spi-max-frequency = <50000000>;
+ reg = <0>;
+ /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
+ spi-rx-bus-width = <8>;
+ spi-tx-bus-width = <1>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&uart1 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
+
+&emdio1 {
+ status = "okay";
+ rgmii_phy1: ethernet-phy@1 {
+ /* AR8035 PHY - "compatible" property not strictly needed */
+ compatible = "ethernet-phy-id004d.d072";
+ reg = <0x1>;
+ /* Poll mode - no "interrupts" property defined */
+ };
+};
+
+&emdio2 {
+ status = "okay";
+};
+
+&dpmac17 {
+ phy-handle = <&rgmii_phy1>;
+ phy-connection-type = "rgmii-id";
+};
+
+&sata0 {
+ status = "okay";
+};
+
+&sata1 {
+ status = "okay";
+};
+
+&sata2 {
+ status = "okay";
+};
+
+&sata3 {
+ status = "okay";
+};
--
2.17.1
From 441f2a5907ae0988d38531faf74deca2cdb312f6 Mon Sep 17 00:00:00 2001
From: Rabeeh Khoury <rabeeh@solid-run.com>
Date: Thu, 26 Dec 2019 17:49:36 +0200
Subject: [PATCH 4/4] pci: accept pcie base class id = 0x0
spr2803 pcie base class id is 0x0; this patch removes the case where it
doesn't allocate resources for such a device
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
---
drivers/pci/setup-bus.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 79b1824e83b4..f8a3cbaa55e8 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -182,7 +182,7 @@ static void __dev_sort_resources(struct pci_dev *dev,
u16 class = dev->class >> 8;
/* Don't touch classless devices or host bridges or ioapics. */
- if (class == PCI_CLASS_NOT_DEFINED || class == PCI_CLASS_BRIDGE_HOST)
+ if (/*class == PCI_CLASS_NOT_DEFINED ||*/ class == PCI_CLASS_BRIDGE_HOST)
return;
/* Don't touch ioapic devices already enabled by firmware */
--
2.17.1
From cca2439ac83136b9ed85f8519931018d4f5385e6 Mon Sep 17 00:00:00 2001
From: Rabeeh Khoury <rabeeh@solid-run.com>
Date: Sun, 12 Jan 2020 14:24:47 +0200
Subject: [PATCH] arm64: dts: lx2160a-cex7: add ltc3882 support
ltc3882 is lx2 cortex-a72 core voltage.
this patch adds it to the device tree support; the driver is in
drivers/hwmon/pmbus/ltc2978.c
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
index 872fcf9e724d..1c1a0d47897d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
@@ -94,6 +94,15 @@ I2C switch -
#cooling-cells = <2>;
};
};
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2>;
+ ltc3882@5c {
+ compatible = "ltc3882";
+ reg = <0x5c>;
+ };
+ };
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1
From 05acb6ecc8eb7426c4664a1e8fd22ad69256d541 Mon Sep 17 00:00:00 2001
From: Rabeeh Khoury <rabeeh@solid-run.com>
Date: Sun, 26 Jan 2020 15:36:07 +0200
Subject: [PATCH] arm64: dts: lx2160a-cex7: add on-module eeproms
This patch adds 4 eeprom support on i2c mux channel #0 -
1. Bootable 512Kbit eeprom at address 0x50.
2. Memory SO-DIMMs SPD channels at 0x51 (upper SO-DIMM) and 0x53.
3. 2Kb eeprom at 0x57 will be used by SolidRun to hold manufacturing
data.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
---
.../boot/dts/freescale/fsl-lx2160a-cex7.dts | 22 ++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
index 1c1a0d47897d..2b8f1118b37a 100644
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-cex7.dts
@@ -81,7 +81,27 @@ I2C switch -
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
-
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0>;
+ 24aa512@50 {
+ compatible = "atmel,24c512";
+ reg = <0x50>;
+ };
+ spd1@51 {
+ compatible = "atmel,spd";
+ reg = <0x51>;
+ };
+ spd2@53 {
+ compatible = "atmel,spd";
+ reg = <0x53>;
+ };
+ m24c02@57 {
+ compatible = "atmel,24c02";
+ reg = <0x57>;
+ };
+ };
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
--
2.17.1
......@@ -9,7 +9,7 @@ set -e
###############################################################################
# General configurations
###############################################################################
RELEASE=LSDK-19.06
RELEASE=LSDK-19.09
BUILDROOT_VERSION=2019.05.2
#UEFI_RELEASE=DEBUG
......@@ -104,6 +104,8 @@ for i in $QORIQ_COMPONENTS; do
cd $i
if [ "x$i" == "xlinux" ] && [ "x$RELEASE" == "xLSDK-19.06" ]; then
git checkout -b LSDK-19.06-V4.19 refs/tags/LSDK-19.06-V4.19
elif [ "x$i" == "xlinux" ] && [ "x$RELEASE" == "xLSDK-19.09" ]; then
git checkout -b LSDK-19.09-V4.19
else
git checkout -b $RELEASE refs/tags/$RELEASE
fi
......@@ -124,6 +126,9 @@ for i in $QORIQ_COMPONENTS; do
if [[ -d $ROOTDIR/patches/$i/ ]]; then
git am $ROOTDIR/patches/$i/*.patch
fi
if [[ -d $ROOTDIR/patches/$i-$RELEASE/ ]]; then
git am $ROOTDIR/patches/$i-$RELEASE/*.patch
fi
fi
done
......@@ -288,7 +293,7 @@ cat > kernel2160cex7.its << EOF
};
initrd {
description = "initrd for arm64";
data = /incbin/("../../patches/linux/ramdisk_rootfs_arm64.ext4.gz");
data = /incbin/("../../patches/linux-${RELEASE}/ramdisk_rootfs_arm64.ext4.gz");
type = "ramdisk";
arch = "arm64";
os = "linux";
......
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