atf: fix bug where RCWSR12-14 were accidentally overridden with 0

README.md

@@ -21,7 +21,7 @@ A docker image providing a consistent build environment can be used as below:
    ```
 2. invoke build script in working directory
    ```
-   docker run -i -t -v "$PWD":/work lx2160a_build -u $(id -u) -g $(id -g)
+   docker run --rm -i -t -v "$PWD":/work lx2160a_build -u $(id -u) -g $(id -g)
    ```
 
 ### rootless Podman

patches/atf-LSDK-21.08/0008-lx2160a-fix-i2c-bus-flushing-to-use-correct-rcw-addr.patch

+From 02af32a64466f05976b538aa2c336d01a00b172c Mon Sep 17 00:00:00 2001
+From: Josua Mayer <josua@solid-run.com>
+Date: Sun, 22 Jan 2023 16:05:38 +0200
+Subject: [PATCH] lx2160a: fix i2c bus flushing to use correct rcw addresses
+ for pinmux
+
+0x700000000 appears to be an overlay or override area which can not be
+used for reading the original value of rcw.
+
+Change to 0x01e00100 which can both read and write.
+
+Signed-off-by: Josua Mayer <josua@solid-run.com>
+---
+ plat/nxp/common/setup/ls_i2c_init.c | 6 +++---
+ 1 file changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/plat/nxp/common/setup/ls_i2c_init.c b/plat/nxp/common/setup/ls_i2c_init.c
+index 202fe2e6d..76dfd3376 100644
+--- a/plat/nxp/common/setup/ls_i2c_init.c
++++ b/plat/nxp/common/setup/ls_i2c_init.c
+@@ -17,7 +17,7 @@
+ #define NXP_IIC7_ADDR	0x02060000
+ #define NXP_IIC8_ADDR	0x02070000
+ 
+-#define RCWSR12				0x70010012c
++#define RCWSR12				0x01e0012c
+ #define RCWSR12_IIC2_PMUX_MASK		0x00000007 /* [0..2] */
+ #define RCWSR12_IIC2_PMUX_IIC2		0x00000000
+ #define RCWSR12_IIC2_PMUX_GPIO		0x00000001
+@@ -33,11 +33,11 @@
+ #define RCWSR12_IIC6_PMUX_MASK		0x00007000 /* [12..14] */
+ #define RCWSR12_IIC6_PMUX_IIC6		0x00000000
+ #define RCWSR12_IIC6_PMUX_GPIO		0x00001000
+-#define RCWSR13				0x700100130
++#define RCWSR13				0x01e00130
+ #define RCWSR12_SDHC2_DAT74_PMUX_MASK	0x00000003
+ #define RCWSR12_SDHC2_DAT74_PMUX_SDHC2	0x00000000
+ #define RCWSR12_SDHC2_DAT74_PMUX_IIC78	0x00000001
+-#define RCWSR14				0x700100134
++#define RCWSR14				0x01e00134
+ #define RCWSR14_IIC1_PMUX_MASK		0x00000400 /* [10] */
+ #define RCWSR14_IIC1_PMUX_IIC1		0x00000000
+ #define RCWSR14_IIC1_PMUX_GPIO		0x00000400
+-- 
+2.35.3
+